Method of Lithographic Patterning

Abstract

According to some embodiments, embodiments of the present disclosure provide a method of lithographic patterning. The method includes: forming a photoresist layer over a substrate; performing an infiltration process to introduce a metal compound into the photoresist layer to enhance the sensitivity of the photoresist layer to extreme ultraviolet light radiation; performing an exposure process on the photoresist layer using the extreme ultraviolet light radiation; and performing a development process on the photoresist layer to form a patterned impedance layer.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to semiconductor technology, and particularly to a method of lithographic patterning. Background Art

[0002] The semiconductor integrated circuit industry has experienced exponential growth. Technological advancements in integrated circuit materials and design have produced several generations of integrated circuits, each with smaller and more complex circuits than the previous generation. During the evolution of integrated circuits, the functional density (i.e., the number of interconnect devices per unit chip area) generally increases while the geometric dimensions (i.e., the smallest element (or line) that can be produced using the process) decrease. This miniaturization process typically provides benefits in terms of increased production efficiency and reduced associated costs. This miniaturization also increases the complexity of integrated circuit processes and production. For example, as semiconductor manufacturing continues to shrink the pitch below the 20 nm node, traditional i-ArF faces significant challenges. Optical limitations result in the inability to achieve the target resolution and lithography performance. Extreme ultraviolet (EUV) lithography has been utilized to support the critical dimension (CD) requirements of smaller devices. The scanners used in EUV lithography employ radiation in the extreme ultraviolet region, with wavelengths ranging from approximately 1 nm to approximately 100 nm. Some EUV scanners are similar to certain optical scanners and can provide 4x (4X) reduction projection printing onto a resist film coated on a substrate, except that EUV scanners use reflective optical elements instead of refractive optical elements. EUV lithography imposes a complex set of requirements on the photoresist film. The photo acid generator (PAG) in ArF resist absorbs light at a wavelength of 193 nm and generates an acid, which has a 1000-fold chemical amplifier reaction (CAR) and deprotects the acid labile group (ALG). However, existing photoresists are not sensitive to EUV light. Due to the low power of EUV tools and other factors, the photoresist cannot effectively generate sufficient acid to achieve the required resolution, resulting in various patterning problems such as line width roughness and critical dimension uniformity. To improve this field, a method of photoresist and lithographic patterning is needed. Summary of the Invention

[0003] Embodiments of the present disclosure provide a lithographic patterning method, including: forming a photoresist layer on a substrate; performing an infiltration process on this photoresist layer using a metal precursor to enhance the sensitivity of this photoresist layer to extreme ultraviolet light radiation; performing an exposure process on this photoresist layer using extreme ultraviolet light radiation; and performing a development process on this photoresist layer to form a patterned impedance layer.

[0004] Embodiments of the present disclosure provide a lithographic patterning method, including: forming a photoresist layer on a substrate; performing a first infiltration process to introduce a first metal compound into this photoresist layer to enhance the sensitivity of this photoresist layer to extreme ultraviolet light radiation; performing an exposure process on this photoresist layer using extreme ultraviolet light radiation; performing a second infiltration process to introduce a second metal compound into this photoresist layer to enhance the sensitivity of this photoresist layer; and performing a development process on this photoresist layer to form a patterned photoresist layer.

[0005] Embodiments of the present disclosure provide a lithographic patterning method, including: forming a photoresist layer on a semiconductor substrate; performing a first infiltration process to introduce a first metal compound into this photoresist layer; performing a second infiltration process to introduce a second metal compound into this photoresist layer, where the composition of the second metal compound is different from that of the first metal compound; performing an exposure process on this photoresist layer using extreme ultraviolet light radiation, and both the first and second metal compounds are located in this photoresist layer, which has an enhanced sensitivity of this photoresist layer to extreme ultraviolet light radiation; and performing a development process on this photoresist layer to form a patterned photoresist layer. Description of the Drawings

[0006] Embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. It should be noted that, in accordance with standard practices in the industry, the various features are not drawn to scale and are only used for illustration. In fact, the dimensions of the elements can be arbitrarily enlarged or reduced to clearly show the features of the embodiments of the present disclosure.

[0007] Figure 1 is a flowchart showing a lithographic patterning method according to some embodiments.

[0008] Figure 2 and Figure 3 and Figure 4 are flowcharts showing a lithographic patterning method according to various embodiments.

[0009] Figure 5A and Figure 5B and Figure 5C and Figure 5D and Figure 5E and Figure 5F and Figure 5G are cross-sectional schematic views showing a semiconductor structure at various manufacturing stages according to some embodiments.

[0010] Figure 6A and Figure 6B According to some embodiments, a cross-sectional view of a semiconductor structure at various manufacturing stages is shown.

[0011] Figure 7 According to some embodiments, a cross-sectional view of a semiconductor structure at various manufacturing stages is shown.

[0012] Figure 8 According to some embodiments, it shows Figure 5A photoresist material.

[0013] Among them, the reference numerals are explained as follows:

[0014] 100, 120, 130, 140 methods

[0015] 102, 104, 106, 106(1), 106(2), 106(3), 108, 110, 112, 144, 146, 148, 150, 152, 154, 156 operations

[0016] 106A, 106B, 106C, 106D steps

[0017] 200 semiconductor structure

[0018] 202 substrate

[0019] 204 lower layer

[0020] 204’ patterned lower layer

[0021] 206 impedance layer

[0022] 206’ patterned impedance layer

[0023] 206a unexposed portion

[0024] 206b exposed portion

[0025] 207 metal compound

[0026] 208, 212 metal-containing materials

[0027] 208 first precursor

[0028] 212 second precursor

[0029] 216 third precursor

[0030] 300 impedance material

[0031] 302 polymer

[0032] 304 barrier group

[0033] 306 Photoacid Generator

[0034] 308 Solvent Detailed Implementation Modes

[0035] Numerous embodiments or examples are provided below for implementing different elements of the embodiments of the present disclosure. Specific examples of each element and its configuration are described below to simplify the description of the embodiments of the present disclosure. Of course, these are merely examples and are not intended to limit the embodiments of the present disclosure. For example, when it is described that a first element is formed on a second element, it may include an embodiment where the first and second elements are in direct contact, or it may include an embodiment where additional elements are formed between the first and second elements such that they are not in direct contact. In addition, the embodiments of the present disclosure may repeatedly reference numerical values and / or letters in various examples. Such repetition is for the purpose of simplicity and clarity and is not intended to indicate a relationship between different embodiments and / or configurations being discussed.

[0036] Moreover, in subsequent embodiments of the present disclosure, forming a component on another component, this component being connected and / or coupled to another component may include an embodiment where these components are in direct contact, or it may include an embodiment where additional components are inserted between these components such that these components may not be in direct contact. In addition, relative spatial terms, such as "lower", "higher", "horizontal", "vertical", "above", "over", "below", "beneath", "upward", "downward", "top", "bottom", etc. and their derivatives (such as "horizontally", "downwardly", "upwardly", etc.) are used to simplify the relationship between some components and other components in the embodiments of the present disclosure. Relative spatial terms are used to cover different orientations of devices including the components. Additionally, when using terms such as "about", "approximately" and similar terms to describe a number or a range of numbers, this term is used to cover numbers within a reasonable range, including the described number, such as within + / - 10% of the described number or other values understood by those skilled in the art to which the present disclosure pertains. For example, the term "about 5 nm" covers a size range from 4.5 nm to 5.5 nm.

[0037] Embodiments of the present disclosure generally relate to methods for manufacturing semiconductor devices, particularly lithographic patterning processes related to extreme ultraviolet radiation. In lithographic patterning, after a photoresist (or resist only) film is exposed to radiation, such as extreme ultraviolet radiation, it is developed in a developer (chemical solution). The developer removes a portion of the photoresist film (e.g., the exposed portion in a positive-tone photoresist or the unexposed portion in a negative-tone photoresist), thereby forming a photoresist pattern, which may include line patterns and / or trench patterns. Subsequently, the photoresist pattern is used as an etch mask in a subsequent etching process to transfer the pattern to the underlying material layer. Alternatively, in a subsequent ion implantation process applied to the underlying material layer, such as an epitaxial semiconductor layer, the photoresist pattern is then used as an ion implantation mask.

[0038] Generally, in order to produce the smallest possible circuits, most advanced lithography systems are designed to use light with very short wavelengths, such as deep ultraviolet light with a wavelength of 200 nm or less than 200 nm, or extreme ultraviolet light in the region of approximately 13.5 nm. These light sources are relatively weak, so photosensitive films (such as photoresists) need to be designed to utilize this light as effectively as possible. The photoresists currently used in microelectronics / nanoelectronics manufacturing basically adopt the concept of chemical amplification to improve the light utilization efficiency.

[0039] Photoresists that employ chemical amplification are commonly referred to as "chemically amplified resist (CAR)". The photoresist includes a polymer that resists etching or ion implantation during semiconductor manufacturing; an acid-generating compound (such as a photoacid generator); and a solvent. In some examples, the polymer also includes at least one acid-labile group that reacts to acid. The photoacid generator absorbs radiant energy and generates acid. During the lithography process, before coating the photoresist onto a workpiece (such as a semiconductor wafer), the polymer and the photoacid generator are mixed in a solvent. The photoacid generator is insensitive to extreme ultraviolet radiation. That is, there are problems in further improving lithography efficiency (such as resolution / contrast, line width roughness, and sensitivity). Due to the limited power of extreme ultraviolet lithography systems, existing photoresists cannot provide the desired resolution and contrast imaging effect during the lithography exposure process. Therefore, the photoresist of the embodiments of the present disclosure further includes a method of incorporating metal-containing chemicals to increase the sensitivity of the photoresist. The metal-containing chemicals can be used as sensitizers or increase sensitivity through other mechanisms, which will be further explained later. For example, the sensitizer is sensitive to extreme ultraviolet radiation, absorbs extreme ultraviolet radiation, and generates electrons. Therefore, the photoacid generator absorbs the electrons and generates acid.

[0040] Combining metal-containing chemicals into a photoresist requires a new design photoresist with different compositions and a method for synthesizing the new photoresist, which is costly. Further, it may be necessary to tune the photoresist to have other physical properties, such as etch resistance to a specific process. This makes it more difficult to align the composition of the photoresist and the synthesis of the corresponding photoresist to individual patterning process flows. Embodiments of the present disclosure solve the above problems by a method that includes one or more penetrations at specific manufacturing stages, so that it is not necessary to synthesize a new photoresist for extreme ultraviolet lithography processes.

[0041] Figure 1 FIG. 6 is a flowchart of a method 100 for patterning a substrate (e.g., a semiconductor wafer) according to various aspects of the present disclosure, shown in some embodiments. To improve pattern size accuracy, method 100 may be implemented in whole or in part by an advanced lithography process system employing radiation, such as extreme ultraviolet light, or other radiation such as deep ultraviolet light, electron beam (e-beam) lithography, or X-ray lithography. In embodiments of the present disclosure, extreme ultraviolet lithography is used as the main example. Additional operations may be provided before, during, and after method 100, and for additional embodiments of the method, some of the steps described may be replaced, omitted, or reordered.

[0042] Figures 5A to 5F FIG. 7 is a cross-sectional view of a semiconductor structure 200 (or workpiece) constructed at various manufacturing stages according to some embodiments. The following, together with Figure 1 and Figures 5A to 5F describe method 100, in which semiconductor structure 200 is manufactured using an embodiment of method 100. Semiconductor structure 200 may be an intermediate workpiece or a part thereof during the manufacture of an integrated circuit. The integrated circuit may include logic circuits, memory structures, passive components (such as resistors, capacitors, and inductors), and active components such as diodes, field effect transistors, metal oxide semiconductor field effect transistors, complementary metal oxide semiconductor transistors, bipolar transistors, high voltage transistors, high frequency transistors, fin field effect transistors, other three-dimensional field effect transistors, such as gate-all-around (GAA) field effect transistors, nanowire transistors, nanosheet transistors, and combinations of the above.

[0043] Refer to Figure 1 Together with Figure 5A, Method 100 begins with operation 102 of a semiconductor structure 200. The semiconductor structure 200 includes a substrate 202. In one embodiment, the substrate 202 is a semiconductor substrate (e.g., a wafer). Further in this embodiment, the substrate 202 includes silicon in a crystalline structure. In alternative embodiments, the substrate 202 includes other elemental semiconductors such as germanium, or compound semiconductors such as silicon carbide, gallium arsenide, indium arsenide, and indium phosphide). The substrate 202 includes one or more layers of materials or components. The substrate 202 may include a silicon-on-insulator (SOI) substrate that is strained / stressed to enhance performance, includes an epitaxial region, includes isolation regions, includes doped regions, includes one or more semiconductor devices or portions thereof, includes conductive and / or non-conductive layers, and / or includes other suitable components and layers. In certain embodiments, the substrate 202 includes a pair of semiconductor materials (such as silicon and silicon germanium) or an epitaxial growth stack for fabricating nanowire transistors or nanosheet transistors.

[0044] In embodiments of the present disclosure, the substrate 202 includes an underlayer (or layer of material) 204 on which a process will be performed, such as patterning or implantation. For example, the underlayer 204 is a hard mask layer to be patterned. In another example, the underlayer 204 is an epitaxial semiconductor layer to be ion implanted. However, in another embodiment, the substrate 202 may not include an underlayer. In one embodiment, the underlayer 204 is a hard mask layer that includes materials such as silicon oxide, silicon nitride, silicon oxynitride, or other suitable materials or components. In one embodiment, the underlayer 204 is an anti-reflection coating (ARC), such as a nitrogen-free anti-reflection coating (NFARC), that includes materials such as silicon oxide, silicon oxygen carbide, or plasma enhanced chemical vapor deposited silicon oxide. In various embodiments, the underlayer 204 may include a high-k dielectric layer, a gate layer, a hard mask layer, an interface layer, a capping layer, a diffusion / barrier layer, a dielectric layer, a conductive layer, other suitable layers, and / or combinations of the above

[0045] In some embodiments, the semiconductor structure 200 may alternatively be a photomask for patterning a semiconductor wafer. Further in these embodiments, the substrate 202 is a photomask substrate, which may include a transparent material (such as quartz), or a low thermal expansion material, for example: a silicon oxide - titanium oxide compound. The photomask substrate may further include a material layer to be patterned. Further in this example, the photomask may be used for: for example, I-line light radiation, or deep ultraviolet light (for example, 248 nm radiation by a krypton fluoride (KrF) excimer laser or 193 nm radiation by an argon fluoride (ArF) excimer laser). Thus, the lower layer 204 is a material layer to be patterned to define a circuit pattern. For example, the lower layer 204 is an absorption layer, such as a chromium layer or other suitable material for a deep ultraviolet photomask.

[0046] Method 100 proceeds to operation 104 to form a photoresist layer (or just a resist layer) 206 over the substrate 202 ( Figure 5A ), for example over the lower layer 204. The resist layer 206 has etching (or ion implantation) resistance and is sensitive to the radiation used in the lithography exposure process. In embodiments of the present disclosure, the resist layer 206 is sensitive to extreme ultraviolet light radiation. In certain embodiments, the resist layer 206 includes a bilayer or a trilayer for lithographic patterning. For example, the trilayer resist includes a bottom layer, an intermediate layer on the bottom layer, and a photosensitive layer on the intermediate layer. For etching selectivity, the bottom layer and the intermediate layer are designed to have different compositions. Further in this example, the bottom layer is a carbon-rich polymer material and the intermediate layer is a silicon-rich material. In Figure 5A , only the photosensitive layer is shown and is referred to as the resist layer 206. However, this is for illustration only and is not limited thereto. It may include additional layers, such as those in a bilayer or trilayer resist architecture (scheme). Referring to Figure 5A , in one embodiment, the resist layer 206 is formed by a spin coating process. In certain embodiments, the resist layer 206 is further processed by a soft bake process. This soft bake process has a lower bake temperature compared to a general soft bake. For example, the bake temperature range of this soft bake process is between 60 °C and 80 °C.

[0047] The resist layer 206 is sensitive to radiation, such as deep ultraviolet light, or extreme ultraviolet light (such as light with a wavelength of 13.5 nm), electron beams, and ion beams. In embodiments of the present disclosure, the resist layer 206 is sensitive to extreme ultraviolet light radiation and is used in extreme ultraviolet lithography processes. However, the extreme ultraviolet light sensitivity of the resist layer 206 needs to be enhanced via subsequent operations of method 100.

[0048] Figure 8Disclosed is an impedance material 300 of an impedance layer 206 constructed according to some embodiments. In this example, the impedance material 300 utilizes a chemically amplified impedance material. For example, the chemically amplified impedance material is negative and includes a polymer material that turns insoluble in a developer, such as an alkaline solution, after reacting with an acid. In another example, the chemically amplified impedance material is positive and includes a polymer material that turns soluble in a developer after reacting with an acid. In yet another example, the chemically amplified impedance material includes a polymer material that changes its polarity after reacting with an acid.

[0049] The impedance material 300 is sensitive to radiation, such as the radiation source of a lithography system: extreme ultraviolet light. However, as mentioned above, the impedance material 300 is not sensitive enough to extreme ultraviolet light and thus needs to be boosted. The impedance material 300 includes a polymer 302 to provide resistance to etching (or ion implantation). In various embodiments, the polymer 302 includes a poly(norbornene)-co-maleic anhydride (COMA) polymer, a polyhydroxystyrene (PHS) polymer, or an acrylate-based polymer. For example, the acrylate-based polymer includes a poly(methyl methacrylate) (PMMA) polymer. The polymer 302 also includes a plurality of side locations that can form chemical bonds with other chemicals. For example, the PHS polymer includes a plurality of hydroxyl (OH) groups that can form chemical bonds with other chemicals.

[0050] In some examples, the impedance material 300 further includes a blocking group 304, such as an acid-labile group ALG or an acid-reactive dissolution inhibitor. In the embodiments of the present disclosure, the blocking group 304 forms a chemical bond with the polymer 302. For example, in one example, it forms a bond with the hydroxyl group of PHS. The acid-labile group is a chemical group that is deprotected by a photoacid generator in the exposed area of the impedance layer. Therefore, the exposed impedance material 300 can change its polarity and dissolubility. For example, the solubility of the exposed impedance material increases in a developer (for positive-type impedance) or decreases in a developer (for negative-type impedance). When the exposure dose of the lithography exposure process reaches the dose threshold, the exposed impedance material will be insoluble in the developer, or the exposed impedance material will be soluble in the developer. In one example, the acid-labile group includes t-butoxycarbonyl (tBOC).

[0051] The impedance material 300 includes an acid-generating compound, such as a photoacid generator 306. The photoacid generator 306 absorbs radiant energy and generates an acid. The impedance material 300 also includes a solvent 308. During the lithography process, before coating the impedance material onto a workpiece (such as a semiconductor wafer), the polymer 302 and the photoacid generator 306 are mixed in the solvent 308. In some embodiments, the photoacid generator 306 includes a phenyl ring. In a specific example, the photoacid generator 306 includes a sulfonium cation, such as a triphenylsulfonium (TPS) group; and an anion, such as a triflate anion. In particular, the cation of the photoacid generator and sulfur have a chemical bond and an additional chemical bond, so that the sensitivity (or absorption) of the photoacid generator 306 to electrons (or other types of secondary radiation) increases.

[0052] Existing photoacid generators are basically insensitive to extreme ultraviolet radiation. Organic elements in the photoacid generator or impedance, such as carbon and nitrogen, are weak in extreme ultraviolet photon absorption. In the embodiments of the present disclosure, the subsequent operation after coating the impedance layer 206 will process the impedance layer 206 to further introduce a metal or metal oxide to enhance extreme ultraviolet sensitivity and / or increase etch resistance.

[0053] Refer to Figure 1 Together with Figure 5B, this method includes operation 106 of performing an infiltration process on the impedance layer 206, thereby introducing a metal compound 207 (such as a metal, a metal oxide, or a combination of the foregoing) into the impedance layer 206. In some examples, the metal compound 207 may include a metal nitride. By the infiltration process 106, the composition of the impedance layer 206 is changed, having the addition of 207 and obtaining different material properties, such as enhanced radiation sensitivity and increased etch resistance. During the infiltration process, the metal compound 207 is infiltrated into the impedance layer 206 and combined with the polymeric material of the impedance layer 206, such as reacting with the polymeric material of the impedance layer 206, dispersing therein, or forming a chemical bond therewith, as Figure 8 shown. In some embodiments, the size range of the metal compound 207 is between about 2 nm and about 3 nm.

[0054] The infiltration process 106 can be implemented by atomic layer deposition technology or chemical vapor deposition technology. Atomic layer deposition technology is a cyclic process with multiple cycles. Each cycle also includes a first half-cycle and a second half-cycle. The number of cycles determines the amount of the metal compound combined with the impedance layer 206. Taking the metal compound of alumina as an example. In the first half-cycle, the precursor is a metal-organic, such as trimethylaluminum (Al2(CH3)6, TMA). The metal-organic precursor reacts with the polymeric material of the impedance layer 206. In the second half-cycle, an oxidant, such as water, is used as the precursor and reacts with the organometallic group to form a metal compound. In the embodiments of the present disclosure, the metal compound is alumina. Between these half-cycles, a nitrogen purge is applied to prepare the surface of the impedance layer 206 for subsequent half-cycles. The process temperature of the atomic layer deposition process is greater than room temperature. According to some embodiments, the range is between, for example, 80 °C and 100 °C. For example, the substrate 202 is maintained at the process temperature, such as between 80 °C and 100 °C. Thus, in one cycle, the atomic layer deposition process includes applying the Al2(CH3)6 precursor, nitrogen purge, applying water, and nitrogen purge. This is repeated for multiple cycles until the concentration of alumina combined in the impedance layer 206 reaches the desired value.

[0055] In the chemical vapor deposition process of bonding alumina to the impedance layer 206, Al2(CH3)6 and water are used as precursors to form a metal compound in the polymer material of the impedance layer 206. The conditions of the chemical vapor deposition process include a relatively high temperature, such as a temperature range from 80 °C to 100 °C. In some examples, water is maintained at a high temperature, such as a temperature in the range of 80 °C to 100 °C. In some embodiments, the substrate 202 is maintained at a high temperature, such as between 80 °C and 100 °C. The amount of the metal compound 207 bonded to the impedance layer 206 is related to various parameters of the infiltration process, such as the coating temperature and the partial pressure of the metal-containing precursor (such as the partial pressure of Al2(CH3)6). In some embodiments, the metal compound 207 infiltrated into the impedance layer 206 has a weight concentration range between about 5% and about 10%.

[0056] Performing an infiltration process on the impedance layer 206 may include non-uniformly dispersing the metal compound 207 into the impedance layer 206. This non-uniform dispersion can be achieved by selecting an appropriate solvent or by the weight of the metal compound 207. In one example, the concentration of the metal compound 207 in the impedance layer 206 has a gradient concentration that increases from the top surface to the bottom surface. This gradient concentration results in non-uniform extreme ultraviolet light sensitivity, which can offset the footing issue caused by the lithography exposure process.

[0057] In some embodiments, the infiltration process 106 can use spin coating with a metal-containing chemical suitable for the solvent, such as propylene glycol monomethyl ether acetate (PGMEA), to introduce the metal compound into the impedance layer 206. According to some embodiments, the spin rate ranges between 500 rpm and 4000 rpm.

[0058] During the infiltration process 106, by using some techniques (such as spin coating), a metal-containing material 208 can be formed on the impedance layer 206, as Figure 5C shown. In this case, the infiltration process 106 can include multiple steps, as Figure 1 the steps 106A to 106D shown on the right. In the embodiments of the present disclosure, the infiltration process 106 includes step 106A, which coats the metal-containing material 208 onto the impedance layer 206, such as a spin coating process. For better infiltration, the metal-containing material 208 includes the metal compound 207 and a solvent so that the metal-containing material 208 is in a liquid state.

[0059] The infiltration process 106 further includes step 106B, which heats the metal-containing material 208 during the soaking time to enhance the infiltration process. During the soaking time, the metal compound 207 in the metal-containing material 208 is diffused into the impedance layer 206 and can further react with the polymeric material of the impedance layer 206. The heating process can be applied directly or indirectly to the metal-containing material 208. In some examples, the metal-containing material 208 is heated by a suitable heating mechanism, such as infrared radiation, microwaves, eddy currents, resistors, or a combination of the foregoing. In certain embodiments, the metal-containing solution is pre-heated before being applied to the impedance layer 206.

[0060] During the soaking time, the metal compound 207 (such as a metal or metal oxide) is infiltrated from the metal-containing material 208 into the impedance layer 206 and can further react with the polymer of the impedance layer 206, such as by diffusion, absorption, and / or nucleation on functional species (such as carbonyl C=O). The metal compound 207 can form a chemical bond with the polymer, such as an M-CH3 bond. The amount of alumina incorporated into the impedance layer 206 is related to various parameters of the infiltration process 106, such as the soaking time and the heating temperature (e.g., in the range of 80 °C to 100 °C according to some examples). Therefore, the amount of alumina (or other metal or metal oxide) is controlled by steps 106A and 106B (such as the heating temperature) and removed in a subsequent step 106C (the starting time of which determines the duration of the impregnation). Thus, to enhance the performance (including extreme ultraviolet light sensitivity and etch resistance), the concentration of the metal compound 207 infiltrated into the impedance layer 206 can be fine-tuned and optimized.

[0061] After the metal-containing material 208 on the impedance layer 206 has undergone an appropriate impregnation period such that the metal compound 207 has sufficiently (e.g., to the desired concentration) infiltrated into the impedance layer 206, operation 106 can proceed to step 106C, which performs a removal process using a suitable removal solution to remove the excess portion of the metal-containing material 208 that has not infiltrated into the impedance layer 206.

[0062] After the removal step 106C, operation 106 may proceed to step 106D, baking the impedance layer 206 to bring the impedance layer 206 to appropriate conditions for a lithographic exposure process. In an embodiment of the present disclosure, the impedance layer 206 is pre-baked before the infiltration process of operation 106, making the infiltration process more efficient. The baking process may be similar to a soft bake, but its baking temperature is lower than that of a soft bake. For example, the baking temperature ranges between 60 °C and 80 °C. The baking process of step 106D is designed to drive out solvents or other liquids and prepare the impedance layer 206 for subsequent exposure processes. After removing the excess metal-containing material 208 through step 106C, the impedance layer 206 contains a metal compound 207 at an expected concentration, which has modified characteristics (such as radiation sensitivity and etch resistance), as Figure 5B shown.

[0063] Using some techniques (such as atomic layer deposition or chemical vapor deposition techniques), the infiltration process 106 may include a subset of steps 106A to 106D. For example, when using atomic layer deposition technology or chemical vapor deposition technology in the infiltration process, step 106B is implemented simultaneously with atomic layer deposition. Further in this example, when implementing an atomic layer deposition process (or chemical vapor deposition process) to combine the metal compound 207 with the impedance layer 206, the substrate 202 is heated and maintained at a high temperature (for example, in the range between 80 °C and 100 °C). In some examples of the infiltration process 106, steps 106C and 106D may be further sequentially implemented after the atomic layer deposition or chemical vapor deposition process is completed.

[0064] In addition to the above example of alumina as the metal compound 207, different metal-containing precursors can be used in the infiltration process to incorporate different metal compounds 207 (different metals or metal oxides) into the impedance layer 206, using different metal-containing precursors. For example, for the metal compound 207 of ZnO, zinc acetate, zinc chloride, and zinc acetylacetonate can be used as the metal-containing precursors. For the metal compound 207 of TiO2, titanium isopropoxide with water or titanium tetrachloride with water can be used as the metal-containing precursors. For the metal compound 207 of tungsten (W), the metal-containing precursors can include bis(tert-butylimino)bis(tert-butylamino)tungsten, bis(tert-butylimino)bis(dimethylamino)tungsten, bis(cyclopentadienyl)tungsten, tungsten hexacarbonyl, or bis(cyclopentadienyl)tungsten dihydride. For the metal compound 207 of hafnium (Hf), the metal-containing precursors can include HfCl4 or hafnium isopropoxide isopropanol. For the metal compound 207 of tin (Sn), the metal-containing precursors can include hexamethylditin, (CH3)6Sn2. For the metal compound 207 of zirconium (Zr), the metal-containing precursors can include ZrCl4, or zirconium(IV) tert-butoxide.

[0065] In some embodiments, the infiltration process 106 includes an infiltration process using two metal compounds (such as two metal oxides, two metals, or one metal plus one metal oxide). Thus, through one infiltration process 106, two metal compounds are introduced into the impedance layer 206. For example, the infiltration process introduces a transparent metal compound and an absorbing metal compound in an appropriate concentration ratio to enhance the extreme ultraviolet (EUV) sensitivity of the impedance layer 206. The transparent metal compound refers to a metal compound that is penetrable to the EUV radiation of the EUV lithography exposure process; and the absorbing metal compound refers to a metal compound that absorbs the EUV radiation of the EUV lithography exposure process. In various examples, the transparent metal compounds include Hf, Zr, Ti, other transparent metals, corresponding metal oxides, or combinations thereof. In other examples, the absorbing metal compounds include Sn, Al, other absorbing metals, corresponding metal oxides, or combinations thereof. The transparent metal compound is penetrable to the EUV radiation and does not absorb the EUV radiation. However, the transparent metal compound causes the EUV radiation to scatter and travel farther, thus increasing the EUV radiation absorbed by the absorbing metal compound. Thus, the EUV sensitivity of the impedance layer 206 is enhanced by these two metal compounds, and it can be maximized when the ratio of the two is adjusted to an appropriate range. For example, if the absorbing metal compound has a higher absorption, the concentration of the transparent metal compound may need to be lowered. In addition, the concentration of the transparent metal compound needs to be increased to increase the EUV radiation absorbed by the absorbing metal compound.

[0066] In some embodiments, operation 106 includes two infiltration processes implemented in sequence, such as 106(1) and 106(2), each of which is designed to have a metal precursor to introduce an individual metal that is different from each other. For example, the first infiltration process 106(1) introduces a transparent metal compound and the second infiltration process 106(2) introduces an absorbing metal compound. Each infiltration process 106 may include steps 106A to 106D or a subset thereof.

[0067] Referring to Figure 1 and Figure 5D, method 100 proceeds to 108, and an exposure process is performed on the impedance layer 206 using extreme ultraviolet light radiation of a lithography system. In an embodiment of the present disclosure, the extreme ultraviolet light radiation has a wavelength of 13.5 nm. 108 can be performed in a vacuum. In some embodiments, in a suitable exposure mode such as step-and-scan, the radiation beam is directed at the impedance layer 206 to form an image of a circuit pattern defined on a mask (e.g., a transmissive mask or a reflective mask). Through the mask or the exposure process, various resolution enhancement methods can be used or implemented, such as phase-shifting, off-axis illumination (OAI), and / or optical proximity correction (OPC). For example, optical proximity correction (OPC) features can be incorporated into the circuit pattern on the mask. In another example, the mask is a phase-shifting mask, such as an alternative phase-shift mask, an attenuated phase-shift mask, or a chrome-less phase-shift mask. In yet another example, the exposure process is implemented in an off-axis illumination mode. In some other embodiments, the radiation beam is directly adjusted in a predefined pattern (e.g., an IC layout) without using a mask (e.g., using a digital pattern generator or a direct-write mode). Since the sensitivity of the impedance layer 206 is enhanced through the penetration process and the exposure threshold of the impedance layer is reduced, for example, below 20 mJ / cm 2 . Therefore, according to this example, the exposure process is performed with a dose less than 20 mJ / cm 2 .

[0068] 108 may further include other steps after the exposure process, such as heat treatment. In an embodiment of the present disclosure, 108 includes a post-exposure baking (PEB) process on the semiconductor structure 200, particularly on the impedance layer 206 coated on the substrate 202. In a specific embodiment, the post-exposure baking process can be performed in a thermal chamber with a temperature range between about 120°C and about 160°C.

[0069] After the exposure process of 108, a latent pattern is formed on the impedance layer 206. The latent pattern of the impedance layer is related to the exposure pattern on the impedance layer, which ultimately becomes a physical impedance pattern through, for example, a developing process. The latent pattern of the impedance layer 206 includes an unexposed portion 206a and an exposed portion 206b. In this case, the exposed portion 206b of the impedance layer 206 is physically or chemically altered. In some examples, the exposed portion 206b is altered by polymerization, such as cross-linked in a negative resist or depolymerized in a positive resist. In other examples, the exposed portion 206b is deprotected, inducing a polarity change for dual-tone imaging (selectively removing the exposed or unexposed portion by an organic developer solution or an aqueous developer solution).

[0070] After the exposure process, method 100 may also include a post-exposure baking process.

[0071] Referring Figure 1 and Figure 5E to, method 100 proceeds to 110, and according to some embodiments, the exposed impedance layer 206 is developed in a developer. A patterned impedance layer 206' is formed through the developing process. In some embodiments, the impedance layer 206 is a negative resist, and the exposed portion of the photoresist layer is cross-linked and thus remains after the developing process. In certain embodiments, the impedance layer 206 is polarity-changed after operation 106, and a dual-tone developing process can be implemented. For example, the exposed portion of the impedance layer 206 changes from a non-polar state (hydrophobic state) to a polar state (hydrophilic state), and then the exposed portion 206b will be removed by an aqueous solvent (positive imaging), such as tetramethyl ammonium hydroxide (TMAH), or the unexposed portion 206a will be removed by an organic solvent (negative imaging), such as butyl acetate. In some other examples, the impedance layer 206 changes from a polar state to a non-polar state, and then the exposed portion 206b will be removed by an organic solvent (positive imaging) or the unexposed portion 206a will be removed by an aqueous solvent (negative imaging).

[0072] Figure 5E In some of the examples shown, the unexposed portion 206a is removed in the developing process. In Figure 5EIn the example shown, the patterned impedance layer 206' is represented by a two-line pattern (this type of impedance is referred to as negative impedance). However, the following discussion is equally applicable to impedance patterns represented by trenches.

[0073] Referring Figure 1 to Figure 5F and

[0074] , method 100 includes operation 112 of performing a process on semiconductor structure 200 using the patterned impedance layer 206' as a mask, such that the process is applied only to a portion of the semiconductor structure 200 that is within the openings of the patterned impedance layer 206', while other portions covered by the patterned impedance layer 206' are protected from the process. In some embodiments, the process includes using the patterned impedance layer 206' as an etch mask to apply an etch process to underlying layer 204, thereby transferring the pattern of the patterned photoresist layer 206' to the underlying layer 204. In other embodiments, the process includes using the patterned impedance layer as an ion implantation mask to apply an ion implantation process to semiconductor structure 200, thereby forming various doped features in semiconductor structure 200. Figure 5G In this example, the underlying layer 204 is a hard mask. Taking this embodiment further, the pattern is first transferred from the patterned impedance layer 206' to the hard mask layer 204 and then to other layers of the substrate 202. For example, using dry (plasma) etching, wet etching, and / or other etching methods, the hard mask can be etched through the openings of the patterned impedance layer 206'. The dry etch process can implement oxygen-containing gas, fluorine-containing gas, chlorine-containing gas, bromine-containing gas, iodine-containing gas, other suitable gases and / or plasmas, and / or combinations thereof. During the etching of the hard mask 204, the patterned impedance layer 206' can be partially consumed. In one embodiment, the remaining portion of the patterned impedance layer 206' can be stripped, leaving the patterned hard mask 204' on the substrate 202, as

[0075] shown. Figure 1Not shown in the figure, before, during, or after the above operations, method 100 may include other operations. In one embodiment, substrate 202 is a semiconductor substrate and method 100 proceeds to form a fin field effect transistor structure. In this embodiment, method 100 includes forming a plurality of active fins in semiconductor substrate 202. Further in this embodiment, operation 110 further includes etching substrate 202 by patterning the openings of hard mask 204' to form trenches in substrate 202; filling the trenches with a dielectric material; performing a chemical mechanical polishing process to form a shallow trench isolation (STI) component; and performing epitaxial growth or recessing the shallow trench isolation component to form fin active regions. In another embodiment, method 100 includes other operations to form a plurality of gate electrodes in semiconductor substrate 202. Method 100 may further form gate spacers, doped source / drain regions, contacts for gate / source / drain components, and the like. In another embodiment, a target pattern is formed as a metal line in a multi-layer interconnect structure. For example, a metal line may be formed in an inter-layer dielectric (ILD) of substrate 202, which has been etched by operation 110 to form a plurality of trenches. Method 100 proceeds to fill the trenches with a conductive material, such as metal; and further polish the conductive material using a process such as chemical mechanical planarization (CMP) to expose the patterned inter-layer dielectric, thereby forming a metal line in the inter-layer dielectric. The above are non-limiting examples of devices / structures, which may be fabricated and / or improved using method 100 and impedance layer 206 according to various aspects of the embodiments of the present disclosure.

[0076] Using method 100 of the embodiments of the present disclosure, the extreme ultraviolet light sensitivity and etching resistance of impedance layer 206 are enhanced without introducing new impedance materials, only using an infiltration process, which is cost-effective in integrated circuit manufacturing. In addition, according to individual applications, the impedance can be adjusted via infiltration. In some embodiments, by the infiltration process, the metal or metal oxide incorporated into the impedance layer may have a gradient concentration with the highest density on the top surface to the lowest density on the bottom surface of the photoresist layer.

[0077] To increase the extreme ultraviolet light sensitivity and etching resistance, the lithography process of the embodiments of the present disclosure uses infiltration to incorporate metal or metal oxide, and there may be other embodiments, such as those described below by Figures 2 to 4 Some operations in the method are similar to the operations in method 100 and are not described in detail for simplicity.

[0078] Figure 2 is a flowchart of method 120 constructed according to some embodiments. Method 120 starts from block 102 in the figure, providing substrate 202, as Figure 5AAs shown. Method 120 proceeds to operation 104 to form an impedance layer 206 on a substrate 202. Method 120 includes two infiltration processes implemented in a specific order. The two infiltration processes are respectively referred to as the first infiltration process 106(1) and the second infiltration process 106(2).

[0079] In this example, method 120 proceeds to perform the first infiltration process 106(1) on the impedance layer 206 using a first precursor 208 to introduce a first metal compound 207 (a first metal or metal oxide) to enhance the extreme ultraviolet light sensitivity of the impedance layer 206, as Figure 5B shown. In some embodiments, the first metal compound 207 is selected to enhance extreme ultraviolet light sensitivity. Alternatively, the first infiltration process 106(1) may include two infiltration procedures, individually including steps 106A to 106D or a subset of the foregoing, which are designed to introduce individual metal compounds, such as one for introducing an absorption metal compound and another for introducing a transparent metal compound, similar to those described in method 100. Operation 106(1) is implemented before the exposure process. For example, operation 106(1) includes an infiltration procedure for introducing tin into the impedance layer 206 and another infiltration procedure for introducing hafnium.

[0080] Thereafter, method 120 proceeds to 108 to perform an exposure process on the impedance layer 206, thereby forming a latent pattern on the impedance layer 206, as Figure 5D shown. The impedance layer 206 is processed by the first infiltration process 106(1) to have enhanced extreme ultraviolet light sensitivity to the exposure process. According to some embodiments, after the exposure process, method 120 may also include a post-exposure baking process.

[0081] Thereafter, method 120 proceeds to perform the second infiltration process 106(2) on the exposed impedance layer 206 using a suitable metal-containing precursor to introduce another metal compound into the impedance layer 206. For example, by a suitable infiltration process (such as spin coating as described above), a metal-containing material 212 (similar to Figure 5C the metal-containing material 208) can be formed on the impedance layer 206, as Figure 6A shown. The second infiltration process 106(2) is designed to enhance the etch resistance of the impedance layer 206. For example, the second infiltration process 106(2) introduces aluminum oxide into the impedance layer 206. The second infiltration process 106(2) is implemented after the exposure process and the post-exposure baking process, so there is less liquid in the impedance layer 206 and it is in better conditions for the second infiltration process.

[0082] Method 120 also includes operation 110 to perform a development process, thereby forming a patterned impedance layer 206’, as Figure 5Eas shown; and 112 performs a process on the semiconductor structure 200, such as patterning the lower layer 204 to form a patterned lower layer 204’, as Figure 5F shown.

[0083] Alternatively, operation 106(2) is implemented after the development process of 110, as Figure 6B shown. This is beneficial for the second infiltration process because the patterned impedance layer 206’ has more surfaces available for infiltration, such as the top surface and the sidewall surfaces. The second precursor 212 is disposed on the top surface and the sidewall surfaces of the patterned impedance layer 206’, and thus the second infiltration process is more effective.

[0084] Figure 3 is a flowchart of a method 130 constructed according to some embodiments. The method 130 starts from block 102, providing a substrate 202, as Figure 5A shown. The method 130 proceeds to operation 104 to form an impedance layer 206 on the substrate 202.

[0085] The method 130 proceeds to apply a first infiltration process 106(1) to the impedance layer 206 using a first precursor 208 to introduce a first metal or metal oxide to enhance the extreme ultraviolet (EUV) sensitivity of the impedance layer 206, as Figure 5B shown. The first metal compound 207 is selected to enhance the EUV sensitivity. Alternatively, operation 106(1) may include two infiltration procedures, individually including steps 106A to 106D or a subset of the foregoing, which are designed to introduce individual metal compounds 207, such as one for introducing an absorbing metal and another for introducing a transparent metal, similar to that described in method 100. Operation 106(1) is implemented before the exposure process. For example, operation 106(1) includes one infiltration for introducing tin and another infiltration for introducing hafnium to the impedance layer 206.

[0086] Thereafter, the method 130 proceeds to 108 to perform an exposure process on the impedance layer 206, thereby forming a latent pattern on the impedance layer 206, as Figure 5D shown. The impedance layer 206 is processed by the first infiltration process 106(1) to have enhanced EUV sensitivity to the exposure process. After the exposure process, the method 130 may also include a post-exposure bake process.

[0087] Thereafter, the method 130 proceeds to apply a second infiltration process 106(2) to the exposed impedance layer 206 using a second metal-containing precursor to introduce a second metal compound into the impedance layer 206. The second infiltration process 106(2) is designed to enhance the etch resistance of the impedance layer 206. For example, the second infiltration process 106(2) introduces aluminum oxide to the impedance layer 206. Operation 106(2) is implemented after the exposure process.

[0088] Method 130 also includes operation 110, performing a developing process, thereby forming a patterned impedance layer 206’, as Figure 5E shown.

[0089] Thereafter, method 130 proceeds to perform a third infiltration process 106(3) on the patterned impedance layer 206’ using a third precursor 216, introducing a third metal or metal oxide into the patterned impedance layer 206’, as Figure 7 shown. This is beneficial for the third infiltration process for the same reasons as described in method 120. In particular, the third precursor 216 is disposed on the top surface and sidewall surfaces of the patterned impedance layer 206’, so the third infiltration process is more effective. The second infiltration process 106(2) and the third infiltration process 106(3) are designed to introduce two different metals or metal oxides to increase the etch resistance of the impedance layer. For example, for stronger etch resistance, the second infiltration process introduces aluminum oxide and the third infiltration process introduces aluminum nitride (AlN) into the impedance layer.

[0090] In addition, the first infiltration process 106(1); the second infiltration process 106(2); and the third infiltration process 106(3) may each include steps 106A to 106D as described above.

[0091] Method 130 proceeds to 112, performing a process on the substrate 202, such as an etching process, as Figure 5F shown.

[0092] Figure 4FIG. 140 is a flowchart of a lithography process method 140 constructed according to some embodiments. To enhance the extreme ultraviolet (EUV) light sensitivity of the impedance layer, both an absorption and a transparent metal compound are introduced into the impedance layer through infiltration at a specific concentration ratio. As stated above, the transparent metal compound is penetrable to EUV radiation and does not absorb EUV radiation. However, the transparent metal compound causes EUV radiation to scatter and travel farther, thus increasing the EUV radiation absorbed by the absorption metal compound. Thus, the EUV light sensitivity of the impedance layer 206 is enhanced by these two metal compounds, and when the ratio of the two is adjusted to an appropriate range, it can be maximized. For example, if the absorption metal compound has a higher absorption, the concentration of the transparent metal compound may need to be lowered. An excessively high concentration of the transparent metal compound in the impedance layer 206 may reduce EUV absorption and even reduce the resolution, because the EUV light in the impedance layer may travel a longer path before being absorbed. In addition, the concentration of the transparent metal compound needs to be increased to increase the EUV radiation absorbed by the absorption metal compound. On the other hand, if only the absorption metal compound is used and its absorption is high, the EUV radiation in the exposure process may be mostly absorbed by the top portion of the impedance layer 206, resulting in non-uniform exposure due to impedance depth and footing problems after development. Therefore, method 140 provides an infiltration procedure to introduce the absorption metal compound and the transparent metal compound at an optimal concentration or ratio.

[0093] Method 140 provides various operations, such as the aforementioned operations 102, 104, 108, 110, and 112. Method 140 also includes operation 106, which performs an infiltration process on the impedance layer 206 before the exposure process of 108 to increase the EUV light sensitivity of the impedance layer 206. However, the infiltration process 106 introduces the optimal concentrations of both the transparent metal compound and the absorption metal compound. In some embodiments, the optimal concentrations are determined by the simulation described in operations 144 and 146, or by the experiment described in operations 148 to 156. Method 140 may include additional infiltration processes after the exposure process, as described in methods 100, 120, and 130. Each infiltration process may include steps 106A to 106D.

[0094] In the simulation procedure, method 140 includes operation 144, which performs a simulation process on the EUV impedance layer with the transparent metal compound and the absorption metal compound at respective concentrations; and operation 146, which determines the optimal concentrations based on the EUV light sensitivity of the impedance layer. Thus, method 140 provides the optimal concentrations to the infiltration process of operation 106.

[0095] In an experimental procedure, method 140 starts at operation 148, preparing a wafer coated with an impedance layer and penetrated with transparent metal compounds and absorption metal compounds at respective concentrations; operation 150, performing an exposure process on the impedance layer with a given dose; operation 152, performing a development process to form a patterned impedance layer; operation 154, measuring the profile of the patterned impedance layer on the wafer; operation 156, determining the optimal concentration based on the measured profile. Thus, method 140 provides the optimal concentration to the penetration process of operation 106.

[0096] Embodiments of the present disclosure provide a lithography process that combines a penetration process with metals or metal oxides into an impedance layer, thereby enhancing the extreme ultraviolet (EUV) sensitivity and etch resistance of the impedance layer during EUV lithography. The method may include multiple penetration processes and some penetration processes implemented after the exposure process. By implementing the methods disclosed in various embodiments, some of the advantages described below may be presented. However, it should be understood that different embodiments disclosed herein provide different advantages and not all embodiments necessarily require specific advantages. For example, there is no need to adopt a new impedance material, which is not cost-effective and not application specific. In another example, the penetration process can be adjusted for individual applications. In addition, both the EUV sensitivity and etch resistance of the impedance material are enhanced. In some other examples, due to the increased etch resistance, the hard mask can be eliminated and not used.

[0097] In one aspect, embodiments of the present disclosure provide a semiconductor manufacturing method. This method includes forming a photoresist layer on a substrate; performing a penetration process to introduce metal compounds into this photoresist layer to enhance the sensitivity of this photoresist layer to extreme ultraviolet radiation; performing an exposure process on this photoresist layer using extreme ultraviolet radiation; and performing a development process on this photoresist layer to form a patterned photoresist layer.

[0098] Another aspect of embodiments of the present disclosure relates to a semiconductor manufacturing method. This method includes forming a photoresist layer on a substrate; performing a first penetration process on this photoresist layer using a first metal-containing chemical to enhance the sensitivity of this photoresist layer to extreme ultraviolet radiation; performing an exposure process on this photoresist layer using extreme ultraviolet radiation; performing a second penetration process on this photoresist layer using a second metal-containing chemical, this second metal-containing chemical being different from this first metal-containing chemical; and performing a development process on the photoresist layer to form a patterned photoresist layer.

[0099] Another aspect of the embodiments of the present disclosure relates to a semiconductor structure. This semiconductor structure includes forming a photoresist layer on the semiconductor structure; performing a first infiltration process to introduce a first metal into the photoresist layer; performing a second infiltration process to introduce a second metal into the photoresist layer, the second metal being different from the first metal; performing an exposure process on the photoresist layer using extreme ultraviolet light radiation, both the first and the second metals being located in the photoresist layer, enhancing the sensitivity of the photoresist layer to extreme ultraviolet light radiation; and performing a development process on the photoresist layer to form a patterned photoresist layer.

[0100] In some embodiments, the steps of performing the infiltration process include: performing an infiltration process to introduce a first metal compound and a second metal compound into the photoresist layer, wherein the composition of the second metal compound is different from the composition of the first metal compound. The first metal compound contains tin (Sn) and the second metal compound contains hafnium (Hf). The first metal compound is absorptive to extreme ultraviolet light radiation and the second metal compound is transparent to extreme ultraviolet light radiation. The first metal compound includes one of the following: tin (Sn), aluminum (Al), tin oxide, alumina, and combinations thereof; and the second metal includes one of the following: hafnium (Hf), zirconium (Zr), titanium (Ti), hafnium oxide, zirconium oxide, titanium oxide, and combinations thereof.

[0101] In some embodiments, the metal-containing precursors are designed to introduce a first metal compound having a first concentration and a second metal compound having a second concentration, wherein the first and the second concentrations correspond to the maximum sensitivity of the photoresist layer to extreme ultraviolet light radiation.

[0102] In some embodiments, the infiltration process is the first infiltration process, the metal compound is the first metal compound, and the first infiltration process is performed before the exposure process, and further includes: after performing the exposure process, performing a second infiltration process to introduce a second metal compound into the photoresist layer, the composition of the second metal compound being different from the composition of the first metal compound. In certain embodiments, it further includes performing a third infiltration process after the development process to introduce a third metal compound into the photoresist layer, thereby enhancing the etch resistance of the photoresist layer, the composition of the third metal compound being different from the composition of the first and the second metal compounds.

[0103] In some embodiments, performing the infiltration process includes coating a metal-containing material on a photoresist and heating the metal-containing material. Heating the metal-containing material includes heating the metal-containing material to a given high temperature before coating the metal-containing material on the photoresist layer. Heating the metal-containing material includes heating the metal-containing material using one of microwave radiation and infrared radiation. Heating the metal-containing material includes heating the substrate.

[0104] In some embodiments, performing the infiltration process includes performing the infiltration process to introduce a metal compound to enhance the sensitivity of the photoresist layer to extreme ultraviolet light radiation and the etching resistance of the photoresist layer.

[0105] In some embodiments, the steps of performing a first infiltration process include: before performing the exposure process, using a first metal-containing precursor to perform the first infiltration process to introduce a first metal compound into the photoresist layer; and the steps of performing a second infiltration process include: after performing the exposure process, using a second metal-containing precursor to perform the second infiltration process to introduce a second metal compound into the photoresist layer, wherein the composition of the second metal compound is different from the composition of the first metal compound. The steps of performing the first infiltration process include: before performing the exposure process, performing the first infiltration process to introduce a first transparent metal compound into the photoresist layer; and the steps of performing the second infiltration process include: before performing the exposure process, performing the second infiltration process to introduce the second metal compound into the photoresist layer, wherein the second metal is different from the first metal. The first metal compound is an absorbing metal compound, including one of the following: tin, aluminum, tin oxide, aluminum oxide, and combinations thereof; and the second metal compound is a transparent metal compound, including one of the following: hafnium, zirconium, titanium, hafnium oxide, zirconium oxide, titanium oxide, and combinations thereof. In certain embodiments, it further includes performing a third infiltration process after the development process to introduce a third metal compound into the photoresist layer to enhance the etching resistance, and the composition of the third metal compound is different from the compositions of the first and the second metal compounds. In some embodiments, performing the first infiltration process includes performing the first infiltration process to introduce the first metal compound into the photoresist layer such that it has a gradient concentration with the highest density at a bottom surface to the lowest density at a top surface of the photoresist layer.

[0106] The foregoing outlines the features of several embodiments so that those skilled in the art to which this disclosure pertains can better understand various aspects of the present disclosure. Those skilled in the art to which this disclosure pertains should understand that they can readily use the present disclosure as a basis to design or modify other processes and structures to achieve the same purposes and / or advantages as the embodiments described herein. Those skilled in the art to which this disclosure pertains should also understand that such equivalent structures do not depart from the spirit and scope of the present disclosure, and that they can make various changes, substitutions, and replacements herein without departing from the spirit and scope of the present disclosure.

Claims

1. A lithographic patterning method, comprising: Forming a photoresist layer on a substrate; Performing an infiltration process on the photoresist layer using a metal precursor to enhance the sensitivity of the photoresist layer to extreme ultraviolet light radiation; After the infiltration process, performing an exposure process on the photoresist layer using the extreme ultraviolet light radiation; and Performing a development process on the photoresist layer to form a patterned impedance layer.

2. The lithographic patterning method according to claim 1, wherein the step of performing the infiltration process comprises: performing the infiltration process to introduce a first metal compound and a second metal compound into the photoresist layer, wherein the composition of the second metal compound is different from the composition of the first metal compound.

3. The lithographic patterning method according to claim 2, wherein the first metal compound comprises tin and the second metal compound comprises hafnium.

4. The lithographic patterning method according to claim 2, wherein the first metal compound is absorbent to the extreme ultraviolet light radiation and the second metal compound is penetrable to the extreme ultraviolet light radiation.

5. The lithographic patterning method according to claim 4, wherein the first metal compound comprises one of the following: tin, aluminum, tin oxide, aluminum oxide, and combinations thereof; and the second metal compound comprises one of the following: hafnium, zirconium, titanium, hafnium oxide, zirconium oxide, titanium oxide, and combinations thereof.

6. The lithographic patterning method according to claim 2, wherein the metal precursor is designed to introduce the first metal compound with a first concentration and the second metal compound with a second concentration, wherein the first concentration and the second concentration correspond to a maximum sensitivity of the photoresist layer to the extreme ultraviolet light radiation.

7. The lithographic patterning method according to claim 1, wherein the infiltration process is a first infiltration process, the first infiltration process uses the metal precursor to introduce a first metal compound into the photoresist layer, and the first infiltration process is performed before the exposure process. The method further comprises: after performing the exposure process, performing a second infiltration process to introduce a second metal compound into the photoresist layer, wherein the composition of the second metal compound is different from the composition of the first metal compound.

8. The lithographic patterning method according to claim 7, further comprising: performing a third infiltration process after performing the development process to introduce a third metal compound into the photoresist layer to enhance the etching resistance of the photoresist layer, wherein the composition of the third metal compound is different from the composition of the first metal compound and the second metal compound.

9. The lithographic patterning method according to claim 1, wherein performing the infiltration process comprises: coating a metal-containing material on the photoresist layer and heating the metal-containing material.

10. The lithographic patterning method according to claim 9, wherein heating the metal-containing material comprises: heating the metal-containing material to a given high temperature before coating the metal-containing material on the photoresist layer.

11. The lithographic patterning method according to claim 10, wherein heating the metal-containing material comprises: heating the metal-containing material using one of microwave radiation and infrared radiation.

12. The lithographic patterning method as claimed in claim 9, wherein heating the metal-containing material comprises: heating the substrate.

13. The lithographic patterning method as claimed in claim 1, wherein performing the infiltration process comprises: performing the infiltration process to introduce a metal compound to enhance the sensitivity of the photoresist layer to extreme ultraviolet light radiation and the etching resistance of the photoresist layer.

14. A lithographic patterning method, comprising: forming a photoresist layer on a substrate; performing a first infiltration process to introduce a first metal compound into the photoresist layer to enhance a sensitivity of the photoresist layer to extreme ultraviolet light radiation; after the first infiltration process, performing an exposure process on the photoresist layer using the extreme ultraviolet light radiation; performing a second infiltration process to introduce a second metal compound into the photoresist layer to enhance the etching selectivity of the photoresist layer; and performing a development process on the photoresist layer to form a patterned photoresist layer.

15. The lithographic patterning method as claimed in claim 14, wherein the step of performing the first infiltration process comprises: performing the first infiltration process using a first metal-containing precursor before performing the exposure process to introduce the first metal compound into the photoresist layer; and the step of performing the second infiltration process comprises: performing the second infiltration process using a second metal-containing precursor after performing the exposure process to introduce the second metal compound into the photoresist layer, wherein the composition of the second metal compound is different from the composition of the first metal compound.

16. The lithographic patterning method as claimed in claim 14, wherein the step of performing the first infiltration process comprises: performing the first infiltration process before performing the exposure process to introduce a first transparent metal compound into the photoresist layer; and the step of performing the second infiltration process comprises: performing the second infiltration process before performing the exposure process to introduce the second metal compound into the photoresist layer, wherein the second metal compound is different from the first metal compound.

17. The lithographic patterning method as claimed in claim 16, wherein the first metal compound is an absorption metal compound, comprising one of the following: tin, aluminum, tin oxide, aluminum oxide, and combinations thereof; and the second metal compound is a transparent metal compound, comprising one of the following: hafnium, zirconium, titanium, hafnium oxide, zirconium oxide, titanium oxide, and combinations thereof.

18. The lithographic patterning method as claimed in claim 16, further comprising: after the development process, performing a third infiltration process to introduce a third metal compound into the photoresist layer to enhance the etching resistance, wherein the composition of the third metal compound is different from the compositions of the first metal compound and the second metal compound.

19. The lithographic patterning method as claimed in claim 14, wherein performing the first infiltration process comprises: performing the first infiltration process to introduce the first metal compound into the photoresist layer such that it has a gradient concentration with a highest density at a bottom surface to a lowest density at a top surface of the photoresist layer.

20. A lithographic patterning method, comprising: forming a photoresist layer on a semiconductor substrate; Perform a first infiltration process to introduce a first metal compound into the photoresist layer; Perform a second infiltration process to introduce a second metal compound into the photoresist layer, the composition of the second metal compound being different from the composition of the first metal compound; After the second infiltration process, perform an exposure process on the photoresist layer using extreme ultraviolet light radiation, both the first metal compound and the second metal compound being located in the photoresist layer, which has an enhanced sensitivity of the photoresist layer to the extreme ultraviolet light radiation; and Perform a development process on the photoresist layer to form a patterned photoresist layer.

21. A lithographic patterning method, comprising: Form a photoresist layer on a substrate; Perform a first infiltration process on the photoresist layer using a cyclic process, the cyclic process further comprising: Apply an organometallic precursor to the photoresist layer; After applying the organometallic precursor to the photoresist layer, contact the photoresist layer with nitrogen; and After contacting the photoresist layer with nitrogen, contact the photoresist layer with an oxidant; and After the first infiltration process, perform an exposure process on the photoresist layer.

22. The lithographic patterning method according to claim 21, wherein the step of contacting the photoresist layer with nitrogen is implemented between the step of applying the organometallic precursor to the photoresist layer and the step of contacting the photoresist layer with the oxidant.

23. The lithographic patterning method according to claim 21, wherein the step of performing the infiltration process on the photoresist layer comprises repeating the following steps for a plurality of cycles: The step of applying the organometallic precursor to the photoresist layer; The step of contacting the photoresist layer with nitrogen after applying the organometallic precursor to the photoresist layer; and The step of contacting the photoresist layer with an oxidant after contacting the photoresist layer with nitrogen.

24. The lithographic patterning method according to claim 23, wherein the step of performing the infiltration process on the photoresist layer comprises: maintaining the substrate within a process temperature range between 80 degrees Celsius and 100 degrees Celsius.

25. The lithographic patterning method according to claim 21, wherein, The step of applying the organometallic precursor to the photoresist layer: comprises applying a precursor that includes trimethylaluminum; and The step of contacting the photoresist layer with an oxidant comprises: contacting water with the photoresist layer.

26. The lithographic patterning method according to claim 21, further comprising: after performing the exposure process on the photoresist layer, performing a second infiltration process on the photoresist layer.

27. The lithographic patterning method according to claim 26, further comprising: Performing a development process on the photoresist layer to form a patterned photoresist layer; and After forming the patterned photoresist layer, performing a third infiltration process on the photoresist layer.

28. The lithographic patterning method according to claim 27, wherein the second infiltration process introduces aluminum oxide and the third infiltration process introduces aluminum nitride into the photoresist layer to increase the etching resistance.

29. The lithographic patterning method as claimed in claim 21, wherein the step of performing the infiltration process comprises: performing the first infiltration process to introduce a first metal compound and a second metal compound into the photoresist layer, wherein the composition of the second metal compound is different from that of the first metal compound.

30. The lithographic patterning method as claimed in claim 29, wherein the first metal compound is absorbent to extreme ultraviolet light radiation and the second metal compound is penetrable to the extreme ultraviolet light radiation.

31. The lithographic patterning method as claimed in claim 30, wherein the first metal compound comprises one of the following: tin, aluminum, tin oxide, aluminum oxide, and combinations thereof; and the second metal compound comprises one of the following: hafnium, zirconium, titanium, hafnium oxide, zirconium oxide, titanium oxide, and combinations thereof.

32. A lithographic patterning method, comprising: forming a photoresist layer on a substrate; performing a first infiltration process to introduce a first metal compound into the photoresist layer, so as to have a gradient concentration from a highest density at a bottom surface to a lowest density at a top surface of the photoresist layer, thereby enhancing a sensitivity of the photoresist layer to extreme ultraviolet light radiation; after the first infiltration process, performing an exposure process on the photoresist layer using the extreme ultraviolet light radiation; and performing a development process on the photoresist layer to form a patterned photoresist layer.

33. The lithographic patterning method as claimed in claim 32, further comprising: after performing an exposure process on the photoresist layer, performing a second infiltration process to introduce a second metal compound into the photoresist layer to enhance an etching resistance of the photoresist layer.

34. The lithographic patterning method as claimed in claim 33, further comprising: after performing a development process on the photoresist layer, performing a third infiltration process to introduce a third metal compound into the patterned photoresist layer to enhance its etching resistance.

35. The lithographic patterning method as claimed in claim 33, wherein the step of performing the first infiltration process comprises: before performing the exposure process, performing the first infiltration process using a first metal-containing precursor to introduce the first metal compound into the photoresist layer; and the step of performing the second infiltration process comprises: performing the second infiltration process using a second metal-containing precursor to introduce the second metal compound into the photoresist layer, wherein the composition of the second metal compound is different from that of the first metal compound.

36. The lithographic patterning method as claimed in claim 35, wherein the first metal compound is an absorption metal compound, comprising one of the following: tin, aluminum, tin oxide, aluminum oxide, and combinations thereof; and the second metal compound is a transparent metal compound, comprising one of the following: hafnium, zirconium, titanium, hafnium oxide, zirconium oxide, titanium oxide, and combinations thereof.

37. A lithographic patterning method, comprising: forming a photoresist layer on a semiconductor substrate; performing a first infiltration process to introduce a first metal compound into the photoresist layer; after the first infiltration process, performing an exposure process on the photoresist layer; Perform a development process on the photoresist layer to form a patterned photoresist layer; and After forming the patterned photoresist layer, perform a second infiltration process to introduce a second metal compound into the patterned photoresist layer from a top surface and sidewalls of the patterned photoresist layer.

38. The lithographic patterning method according to claim 37, wherein the lithographic patterning method further comprises: after the exposure process and before the development process, perform a third infiltration process to introduce a third metal compound into the photoresist layer, thereby enhancing the etching resistance of the photoresist layer.

39. The lithographic patterning method according to claim 38, further comprising, before the exposure process: perform a fourth infiltration process to introduce a fourth metal compound into the photoresist layer to have a gradient concentration with a highest density at a bottom surface to a lowest density at a top surface of the photoresist layer.

40. The lithographic patterning method according to claim 39, wherein the fourth infiltration process comprises a cyclic process, and each cycle of the fourth infiltration process comprises: Apply an organometallic precursor to the photoresist layer; After applying the organometallic precursor to the photoresist layer, contact the photoresist layer with nitrogen; and After contacting the photoresist layer with nitrogen, contact the photoresist layer with an oxidant.

41. A lithographic patterning method, comprising: Form a photoresist layer on a substrate; Perform a first infiltration process on the photoresist layer using a cyclic process, and the cyclic process further comprises: Apply an organometallic precursor to the photoresist layer; After applying the organometallic precursor to the photoresist layer, contact the photoresist layer with nitrogen; and After contacting the photoresist layer with nitrogen, contact the photoresist layer with an oxidant; After the first infiltration process, perform an exposure process on the photoresist layer using extreme ultraviolet light radiation; After the step of performing an exposure process on the photoresist layer, perform a second infiltration process on the photoresist layer; and Perform a development process on the photoresist layer to form a patterned photoresist layer.

42. The lithographic patterning method according to claim 41, wherein the step of contacting the photoresist layer with nitrogen is implemented between the step of applying the organometallic precursor to the photoresist layer and the step of contacting the photoresist layer with the oxidant in each cycle of the cyclic process.

43. The lithographic patterning method according to claim 41, wherein the step of performing the first infiltration process on the photoresist layer comprises: maintaining the substrate within a process temperature range between 80 degrees Celsius and 100 degrees Celsius.

44. The lithographic patterning method according to claim 41, wherein The step of applying the organometallic precursor to the photoresist layer comprises: applying a precursor comprising trimethylaluminum; and The step of contacting the photoresist layer with the oxidant comprises: contacting water with the photoresist layer.

45. The lithographic patterning method according to claim 41, further comprising: after performing a development process on the photoresist layer to form the patterned photoresist layer, perform a third infiltration process on the patterned photoresist layer to enhance its etching resistance.

46. The lithographic patterning method as claimed in claim 45, wherein the second infiltration process introduces aluminum oxide and the third infiltration process introduces aluminum nitride into the photoresist layer to increase the etching resistance.

47. The lithographic patterning method as claimed in claim 41, wherein the step of performing the first infiltration process includes: performing the first infiltration process to introduce a first metal compound and a second metal compound into the photoresist layer; the composition of the second metal compound is different from that of the first metal compound; the first metal compound is absorptive to the extreme ultraviolet light radiation and the second metal compound is penetrative to the extreme ultraviolet light radiation.

48. The lithographic patterning method as claimed in claim 47, wherein the first metal compound includes one of the following: tin, aluminum, tin oxide, aluminum oxide, and combinations thereof; and the second metal compound includes one of the following: hafnium, zirconium, titanium, hafnium oxide, zirconium oxide, titanium oxide, and combinations thereof.

49. A lithographic patterning method, comprising: forming a photoresist layer on a substrate; performing a first infiltration process using a cyclic process to introduce a first metal compound into the photoresist layer, the cyclic process further including: applying an organometallic precursor to the photoresist layer; after applying the organometallic precursor to the photoresist layer, contacting the photoresist layer with nitrogen; and after contacting the photoresist layer with nitrogen, contacting the photoresist layer with an oxidant; after the first infiltration process, performing an exposure process on the photoresist layer; performing a second infiltration process on the photoresist layer to introduce a second metal compound into the photoresist layer, the second metal compound being different from the first metal compound; performing a development process on the photoresist layer to form a patterned photoresist layer; and after forming the patterned photoresist layer, performing a third infiltration process on the patterned photoresist layer to enhance its etching resistance.

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