VCSEL bias circuit and related equipment

Abstract

The present application discloses a VCSEL bias circuit and related equipment. When the feedback loop composed of an operational amplifier, a transistor M0, a resistor Rt, a reference voltage source Vref, a filter resistor Rf and a filter capacitor Cf in the circuit is stable, the voltage at the in-phase input terminal of the operational amplifier is equal to the voltage at the inverting input terminal; when the voltage between the first input port and the second input port of the differential circuit is a first voltage, the current on the laser diode is the same as the current on the resistor Rt; when the voltage between the first input port and the second input port of the differential circuit is a second voltage, the current on the laser diode is the difference between the current on the resistor Rt and the output current of the modulated current source; wherein the first voltage is greater than the second voltage. The use of the application embodiment does not affect the output stage bandwidth, and at the same time avoids the problem of optical eye diagram distortion caused by impedance discontinuity.

Description

Technical Field

[0001] The present application relates to the field of circuit design, and in particular to a VCSEL bias circuit and related equipment. Background Art

[0002] With the development of society, new technologies such as 5G, virtual reality (VR), and artificial intelligence (AI) are constantly evolving, and the demand for bandwidth for massive data is also increasing. Compared with traditional copper wire communication, fiber optic communication has the advantages of high bandwidth, no interference from radio waves, and high transmission quality. It has become the first choice for wired communication network wiring. Optical communication systems are generally composed of optical fibers, optical transceivers, and passive optical devices, among which the optical transceiver module completes the electro-optical conversion function. Vertical-cavity surface-emitting laser (VCSEL) is a laser diode technology mainly used in short-distance laser communication. It is widely used in data centers, fiber channel storage and other fields. It has the advantages of low cost and easy integration.

[0003] Traditional VCSEL driving circuits include AC coupling and DC coupling. AC coupling requires the use of external components such as capacitors and inductors, which is costly and not conducive to optimizing PCB design. DC coupling can be divided into two driving modes: common cathode and common anode. Due to physical structure limitations, common cathode VCSEL laser diodes occupy a mainstream position in the market.

[0004] The traditional common cathode VCSEL laser diode bias circuit mainly uses resistor bias or PMOS current source as the bias current source. However, using a resistor to provide bias current for the laser diode requires the system to introduce a second power supply to effectively control the bias current, which brings inconvenience to the system application; using a PMOS current source as the bias current, the device parasitic capacitance introduced by the PMOS current source is large, which affects the output stage bandwidth and limits high-speed communication applications. In addition, the output impedance of the PMOS current source is high. When the distance between the VCSEL laser diode and the chip is long, the signal path impedance discontinuity introduces reflections, and the optical eye diagram will be significantly distorted. Summary of the invention

[0005] The embodiments of the present application provide a VCSEL bias circuit and related equipment. The use of the embodiments of the application does not affect the output stage bandwidth, and at the same time avoids the problem of optical eye diagram distortion caused by impedance discontinuity.

[0006] In a first aspect, an embodiment of the present application provides a VCSEL bias circuit, including: a differential circuit, a resistor Rd, a resistor Rt, a PMOS transistor M0, a reference voltage source Vref, a modulation current source, an operational amplifier, a filter resistor Rf, a filter capacitor Cf and a laser diode;

[0007] The source of the PMOS transistor M0 is connected to a DC voltage source VCC, the drain of the PMOS transistor M0 is connected to a first port of the resistor Rd, a first port of the resistor Rt and a positive electrode of the reference voltage source Vref, the negative electrode of the reference voltage source Vref is connected to a non-inverting input terminal of the operational amplifier, the output port of the operational amplifier is connected to a gate of the PMOS transistor M0, the second port of the resistor Rd is connected to a first port of the differential circuit, the second port of the resistor Rt is connected to an output port of the differential circuit, the output port of the differential circuit is connected to an anode of the laser diode and a first port of the filter resistor Rf, the second port of the filter resistor Rf is connected to an inverting input terminal of the operational amplifier and a first port of the filter capacitor Cf, the second port of the differential circuit is connected to a positive electrode of the modulation current source, the negative electrode of the modulation current source, the cathode of the laser diode and the second port of the filter capacitor Cf are all grounded;

[0008] When the feedback loop formed by the operational amplifier, the PMOS transistor M0, the resistor Rt, the reference voltage source Vref, the filter resistor Rf and the filter capacitor Cf is stable, the voltage at the non-inverting input terminal of the operational amplifier is equal to the voltage at the inverting input terminal;

[0009] When the voltage between the first input port and the second input port of the differential circuit is a first voltage, the current Ivcsel on the laser diode is equal to Ibias.

[0010] When the voltage between the first input port and the second input port of the differential circuit is a second voltage, the current Ivcsel on the laser diode is equal to Ibias-Imod;

[0011] The first voltage is greater than the second voltage, Ibias=Vref / Rt, Imod is the output current of the modulation current source, and the reference voltage source Vref is a voltage source with an adjustable output voltage.

[0012] In an optional embodiment, the differential circuit includes: transistor Q0, transistor Q1, resistor R0 and resistor R1

[0013] Wherein, the collector and base of the transistor Q0 are respectively the first port and the first input port of the differential circuit, the collector and the base of the transistor Q1 are respectively the output port and the second input port of the differential circuit, the emitter of the transistor Q0 is connected to the first port of the resistor R0, the emitter of the transistor Q1 is connected to the second port of the resistor R1, and the second port of the resistor R0 and the first port of the resistor R1 are both connected to the positive electrode of the modulation current source;

[0014] When the voltage between the first input port and the second input port of the differential circuit is the first voltage, the transistor Q0 is in an on state, and the transistor Q1 is in an off state;

[0015] When the voltage between the first input port and the second input port of the differential circuit is the second voltage, the transistor Q0 is in a closed state, and the transistor Q1 is in a conducting state.

[0016] In an optional embodiment, the time constant formed by the resistor Rf and the capacitor Cf is greater than a preset time length, and the preset time length is the input time length of the first voltage or the second voltage.

[0017] In an optional embodiment, the resistance of the reference resistor Rf is much greater than the resistance of the resistor Rt.

[0018] In a second aspect, an embodiment of the present application provides another VCSEL bias circuit, including: a differential circuit, a resistor Rd, a resistor Rt, a PMOS transistor M0, a resistor Rdac, an adjustment current source Idac, a modulation current source, an operational amplifier, a filter resistor Rf, a filter capacitor Cf and a laser diode;

[0019] The source of the PMOS transistor M0 is connected to a DC voltage source VCC, the drain of the PMOS transistor M0 is connected to a first port of the resistor Rd, a first port of the resistor Rt and a first port of the resistor Rdac, the second port of the resistor Rdac is connected to a non-inverting input terminal of the operational amplifier and a positive electrode of the regulating current source Idac, the output port of the operational amplifier is connected to a gate of the PMOS transistor M0, the second port of the resistor Rd is connected to a first port of the differential circuit, the second port of the resistor Rt is connected to an output port of the differential circuit, the output port of the differential circuit is connected to an anode of the laser diode and a first port of the filter resistor Rf, the second port of the filter resistor Rf is connected to an inverting input terminal of the operational amplifier and a first port of the filter capacitor Cf, the second port of the differential circuit is connected to a positive electrode of the modulation current source, the negative electrode of the regulation current source Idac, the negative electrode of the modulation current source, the cathode of the laser diode and a second port of the filter capacitor Cf are all grounded;

[0020] When the feedback loop formed by the operational amplifier, the PMOS transistor M0, the resistor Rt, the reference voltage source Vref, the filter resistor Rf and the filter capacitor Cf is stable, the voltage at the non-inverting input terminal of the operational amplifier is equal to the voltage at the inverting input terminal;

[0021] When the voltage between the first input port and the second input port of the differential circuit is a first voltage, the current Ivcsel on the laser diode is equal to Ibias.

[0022] When the voltage between the first input port and the second input port of the differential circuit is a second voltage, the current Ivcsel on the laser diode is equal to Ibias-Imod;

[0023] The first voltage is greater than the second voltage, Ibias=Vref / Rt, Imod is the output current of the modulation current source, the adjustment current source Idac is a current source with adjustable output current and / or the resistor Rdac is an adjustable resistor.

[0024] In an optional embodiment, the differential circuit includes: transistor Q0, transistor Q1, resistor R0 and resistor R1

[0025] Wherein, the collector and base of the transistor Q0 are respectively the first port and the first input port of the differential circuit, the collector and the base of the transistor Q1 are respectively the output port and the second input port of the differential circuit, the emitter of the transistor Q0 is connected to the first port of the resistor R0, the emitter of the transistor Q1 is connected to the second port of the resistor R1, and the second port of the resistor R0 and the first port of the resistor R1 are both connected to the positive electrode of the modulation current source;

[0026] When the voltage between the first input port and the second input port of the differential circuit is the first voltage, the transistor Q0 is in an on state, and the transistor Q1 is in an off state;

[0027] When the voltage between the first input port and the second input port of the differential circuit is the second voltage, the transistor Q0 is in a closed state, and the transistor Q1 is in a conducting state.

[0028] In an optional embodiment, the time constant formed by the resistor Rf and the capacitor Cf is greater than a preset time length, and the preset time length is the input time length of the first voltage or the second voltage.

[0029] In an optional embodiment, the resistance of the reference resistor Rf is much greater than the resistance of the resistor Rt.

[0030] In a third aspect, an embodiment of the present application further provides an optical transmitter, comprising the VCSEL bias circuit as described in the first aspect or the second aspect.

[0031] In a fourth aspect, an embodiment of the present application further provides a fiber optic transceiver, comprising the VCSEL bias circuit as described in the first aspect or the second aspect, or the optical transmitter as described in the third aspect.

[0032] It can be seen that the present application detects the voltage across the output matching resistor of the laser diode driving circuit, compares it with the voltage output by the reference voltage source, and then feedback controls the output stage voltage source of the driving circuit. At this time, the output impedance is low resistance and will not affect the bandwidth of the output stage circuit. At the same time, since the output impedance matches the characteristic impedance of the transmission line and the AC impedance of the VCSEL, the phenomenon of optical eye diagram distortion can be avoided.

[0033] These and other aspects of the present application will become more clearly understood in the description of the following embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0035] Figure 1 It is a structural schematic diagram of a VCSEL bias circuit in the prior art;

[0036] Figure 2 It is a structural schematic diagram of another VCSEL bias circuit in the prior art;

[0037] Figure 3 A schematic diagram of the structure of a VCSEL bias circuit provided by an embodiment of the present invention;

[0038] Figure 4 A schematic structural diagram of a VCSEL bias circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0039] The following are detailed descriptions of each.

[0040] See also Figure 1 , Figure 1 FIG. 1 is a schematic diagram of a VCSEL bias circuit in the prior art. Figure 1 As shown, the VCSEL bias circuit includes a resistor Rd, a resistor R, a transistor Q1, a transistor Q2, a resistor R0, a resistor R1, a modulation current source Imod and a laser diode.

[0041] Among them, the first port of resistor Rd and the first port of resistor R are connected to the DC voltage source VCC, the second port of resistor Rd is connected to the collector of transistor Q1, the second port of resistor R is connected to the collector of transistor Q2, the emitter of transistor Q1 is connected to the first port of resistor R0, the emitter of transistor Q2 is connected to the second port of resistor R1, the second port of resistor R0 and the first port of resistor R1 are both connected to the positive electrode of modulation current source Imod, the base of transistor Q2 is connected to the anode of laser diode, and the cathode of modulation current source Imod and laser diode are both grounded.

[0042] for Figure 1 The bias circuit shown uses a resistor R to provide a bias current for the laser diode. This method requires the system to introduce a second power supply to effectively control the bias current, which brings inconvenience to the application of the system.

[0043] See also Figure 2 , Figure 2FIG. 1 is a schematic diagram of the structure of another VCSEL bias circuit in the prior art. Figure 2 The bias circuit shown uses a PMOS current source as the bias current. The parasitic capacitance Cpar introduced by the PMOS current source is usually between several hundred fF and several pF, which affects the output stage bandwidth and limits high-speed communication applications. In addition, the output impedance of the PMOS current source is relatively high. When the distance between the laser diode and the chip is long, the discontinuous signal path impedance introduces reflections, and the optical eye diagram will be significantly distorted.

[0044] Based on the above defects in the prior art, the present application proposes a new bias circuit. Figure 3 , Figure 3 A schematic diagram of a VCSEL bias circuit is provided for an embodiment of the present application. Figure 3 As shown, the bias circuit includes: a differential circuit, a resistor Rd, a resistor Rt, a PMOS transistor M0, a reference voltage source Vref, a modulation current source, an operational amplifier, a filter resistor Rf, a filter capacitor Cf and a laser diode;

[0045] The source of the PMOS transistor M0 is connected to the DC voltage source VCC, the drain of the PMOS transistor M0 is connected to the first port of the resistor Rd, the first port of the resistor Rt and the positive electrode of the reference voltage source Vref, the negative electrode of the reference voltage source Vref is connected to the non-inverting input terminal of the operational amplifier, the output port of the operational amplifier is connected to the gate of the PMOS transistor M0, the second port of the resistor Rd is connected to the first port of the differential circuit, the second port of the resistor Rt is connected to the output port of the differential circuit, the output port of the differential circuit is connected to the anode of the laser diode and the first port of the filter resistor Rf, the second port of the filter resistor Rf is connected to the inverting input terminal of the operational amplifier and the first port of the filter capacitor Cf, the second port of the differential circuit is connected to the positive electrode of the modulation current source, the negative electrode of the modulation current source, the cathode of the laser diode and the second port of the filter capacitor Cf are all grounded;

[0046] When the feedback loop formed by the operational amplifier, the PMOS transistor M0, the resistor Rt, the reference voltage source Vref, the filter resistor Rf and the filter capacitor Cf is stable, the voltage at the non-inverting input terminal of the operational amplifier is equal to the voltage at the inverting input terminal;

[0047] When the voltage between the first input port and the second input port of the differential circuit is the first voltage, the current Ivcsel on the laser diode is equal to Ibias.

[0048] When the voltage between the first input port and the second input port of the differential circuit is the second voltage, the current Ivcsel on the laser diode is equal to Ibias-Imod;

[0049] The first voltage is greater than the second voltage, Ibias=Vref / Rt, Imod is the output current of the modulation current source, and the reference voltage source Vref is a voltage source with an adjustable output voltage.

[0050] In an optional embodiment, the differential circuit includes: transistor Q0, transistor Q1, resistor R0 and resistor R1

[0051] Wherein, the collector and base of the transistor Q0 are respectively the first port and the first input port of the differential circuit, the collector and the base of the transistor Q1 are respectively the output port and the second input port of the differential circuit, the emitter of the transistor Q0 is connected to the first port of the resistor R0, the emitter of the transistor Q1 is connected to the second port of the resistor R1, and the second port of the resistor R0 and the first port of the resistor R1 are both connected to the positive electrode of the modulation current source;

[0052] When the voltage between the first input port and the second input port of the differential circuit is a first voltage, the transistor Q0 is in an on state, and the transistor Q1 is in an off state;

[0053] When the voltage between the first input port and the second input port of the differential circuit is the second voltage, the transistor Q0 is in a closed state, and the transistor Q1 is in a conducting state.

[0054] Specifically, the resistor Rt is an output matching resistor, which is used to match the VCSEL AC impedance, thereby avoiding the distortion of the optical eye diagram caused by impedance discontinuity. Usually Rt = 50 ohms. By detecting the voltage across Rt and comparing it with the preset reference voltage source Vref, when the feedback loop formed by the operational amplifier and the PMOS transistor M0 is stable, the voltage at the in-phase input terminal of the operational amplifier is equal to the voltage at the inverting input terminal. At this time, Vref = Ibias*Rt. It can be seen that the laser diode bias current can be changed by changing the output voltage of the reference voltage source Vref. The anode of the laser diode is a high-frequency signal. In order to avoid the parasitic capacitance affecting the high-frequency performance and also for the stable operation of the loop, a low-pass filter composed of a filter resistor Rf and a filter capacitor Cf is introduced to solve these two problems.

[0055] In an optional embodiment, the time constant formed by the resistor Rf and the capacitor Cf is greater than a preset time length, and the preset time length is the input time length of the first voltage or the second voltage.

[0056] Furthermore, the resistance value of Rf is much greater than the resistance value of Rt, so that the time constant formed by the resistor Rf and the capacitor Cf is greater than a preset time length.

[0057] It should be noted here that when the voltage between the first input port and the second input port of the differential circuit is the first voltage, it can be regarded as a signal that the differential circuit input is "1"; when the voltage between the first input port and the second input port of the differential circuit is the first voltage, it can be regarded as a signal that the differential circuit input is "0"; therefore, when the differential circuit input is continuously "1" or "continuously 0", it can be regarded as inputting the first voltage or the second voltage between the first input port and the second input port of the differential circuit, and continuing for a period of time, and the time is the length of the continuous "1" or the continuous "0". For example, the duration corresponding to a "0" signal or a "1" signal is 0.1ns. When the differential circuit continuously inputs N1 "1" signals, it means that the first voltage is input between the first input port and the second input port of the differential circuit and lasts for N1*0.1ns; when the differential circuit continuously inputs N2 "0" signals, it means that the second voltage is input between the first input port and the second input port of the differential circuit and lasts for N2*0.1ns. Among them, the multiple "1" signals or multiple "0" signals input by the differential circuit are related to the input high-speed data code protocol.

[0058] The first voltage is a high level, and the second voltage is a low level, for example, the first voltage is 0.4V, and the second voltage is -0.4V.

[0059] When there is no signal input to the differential circuit, assuming that the output stage differential pair works symmetrically, the current IQ0 between the collector and emitter of transistor Q0 and the current IQ1 between the collector and emitter of transistor Q1 are both 0.5*Imod. At this time, the current Ivcsel on the laser diode is Ibias-0.5*Imod; when the input is a "1" signal, IQ1=0, transistor Q1 is in the off state, and the current Ivcsel on the laser diode is Ibias; when the input is a "0" signal, IQ1=1, transistor Q1 is in the on state, and the current Ivcsel on the laser diode is Ibias-Imod.

[0060] From the above, it can be known that the current Ivcsel on the laser diode can be related to the bias current Ibias. Therefore, the size of Ibias can be changed by adjusting the size of the reference voltage source Vref, thereby adjusting the current Ivcsel on the laser diode to meet the current requirements of different laser diodes.

[0061] It can be seen that the present application detects the voltage across the output matching resistor of the laser diode driving circuit, compares it with the voltage output by the reference voltage source, and then feedback controls the output stage voltage source of the driving circuit. At this time, the output impedance is low resistance and will not affect the bandwidth of the output stage circuit. At the same time, since the output impedance matches the characteristic impedance of the transmission line and the AC impedance of the VCSEL, the phenomenon of optical eye diagram distortion can be avoided.

[0062] See also Figure 4 , Figure 4 A schematic diagram of a VCSEL bias circuit is provided for an embodiment of the present application. Figure 4 As shown, the bias circuit includes: a differential circuit, a resistor Rd, a resistor Rt, a PMOS transistor M0, a resistor Rdac, an adjustment current source Idac, a modulation current source, an operational amplifier, a filter resistor Rf, a filter capacitor Cf and a laser diode;

[0063] The source of the PMOS transistor M0 is connected to the DC voltage source VCC, the drain of the PMOS transistor M0 is connected to the first port of the resistor Rd, the first port of the resistor Rt and the first port of the resistor Rdac, the second port of the resistor Rdac is connected to the non-inverting input terminal of the operational amplifier and the positive terminal of the regulating current source Idac, the output port of the operational amplifier is connected to the gate of the PMOS transistor M0, the second port of the resistor Rd is connected to the first port of the differential circuit, the second port of the resistor Rt is connected to the output port of the differential circuit, the output port of the differential circuit is connected to the anode of the laser diode and the first port of the filter resistor Rf, the second port of the filter resistor Rf is connected to the inverting input terminal of the operational amplifier and the first port of the filter capacitor Cf, the second port of the differential circuit is connected to the positive terminal of the modulation current source, the negative terminal of the regulating current source Idac, the negative terminal of the modulation current source, the cathode of the laser diode and the second port of the filter capacitor Cf are all grounded;

[0064] When the feedback loop formed by the operational amplifier, the PMOS transistor M0, the resistor Rt, the reference voltage source Vref, the filter resistor Rf and the filter capacitor Cf is stable, the voltage at the non-inverting input terminal of the operational amplifier is equal to the voltage at the inverting input terminal;

[0065] When the voltage between the first input port and the second input port of the differential circuit is the first voltage, the current Ivcsel on the laser diode is equal to Ibias.

[0066] When the voltage between the first input port and the second input port of the differential circuit is the second voltage, the current Ivcsel on the laser diode is equal to Ibias-Imod;

[0067] Wherein, the first voltage is greater than the second voltage, Ibias=Vref / Rt, Imod is the output current of the modulated current source, the regulating current source Idac is a current source with adjustable output current and / or the resistor Rdac is a resistor with adjustable resistance. In other words, the magnitude of the current Ibias is controlled by adjusting the current source Idac, or by adjusting the resistor Rdac, or by adjusting the current source Idac and the resistor Rdac.

[0068] Depend on Figure 3It can be seen from the embodiment shown that the current Ivcsel of the laser diode can be adjusted by adjusting the output voltage of the reference voltage source Vref. Figure 4 In the figure, the function of the reference voltage source Vref is realized by the resistor Rdac and the adjustable current source Idac. Vref=Idac*Rdac=Ibias*Rt, so, Ibias=Idac*Rdac / Rt. Generally speaking, the adjustable current source Idac can be digitally adjustable through a digital DAC current source, can be digitally adjustable through a digital DAC resistor, can be digitally adjustable through a digital DAC current source and a digital DAC resistor.

[0069] In an optional embodiment, the differential circuit includes: transistor Q0, transistor Q1, resistor R0 and resistor R1

[0070] Wherein, the collector and base of the transistor Q0 are respectively the first port and the first input port of the differential circuit, the collector and the base of the transistor Q1 are respectively the output port and the second input port of the differential circuit, the emitter of the transistor Q0 is connected to the first port of the resistor R0, the emitter of the transistor Q1 is connected to the second port of the resistor R1, and the second port of the resistor R0 and the first port of the resistor R1 are both connected to the positive electrode of the modulation current source;

[0071] When the voltage between the first input port and the second input port of the differential circuit is a first voltage, the transistor Q0 is in an on state, and the transistor Q1 is in an off state;

[0072] When the voltage between the first input port and the second input port of the differential circuit is the second voltage, the transistor Q0 is in a closed state, and the transistor Q1 is in a conducting state.

[0073] In an optional embodiment, the time constant formed by the resistor Rf and the capacitor Cf is greater than a preset time length, and the preset time length is the input time length of the first voltage or the second voltage.

[0074] Furthermore, the resistance of the reference resistor Rf is much greater than the resistance of the resistor Rt, so that the time constant formed by the resistor Rf and the capacitor Cf is greater than a preset time length.

[0075] It should be noted that the specific description of this embodiment can be found in Figure 3 The relevant description of the illustrated embodiment will not be repeated here.

[0076] The present application also provides a light transmitter, which includes: Figure 3 or Figure 4 The VCSEL bias circuit is shown.

[0077] The embodiment of the present application also provides a fiber optic transceiver, the optical line terminal comprising: Figure 3 or Figure 4 The VCSEL bias circuit shown, or the optical transmitter described above.

[0078] The bias circuit disclosed in the present application can be applied to various types of laser driving circuits, especially high-speed driving circuits with a rate of 25G or above.

[0079] The embodiments of the present application are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for general technical personnel in this field, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. A vertical cavity surface laser emitter VCSEL bias circuit, characterized in that: include: Differential circuit, resistor Rd, resistor Rt, PMOS transistor M0, reference voltage source Vref, modulation current source, operational amplifier, filter resistor Rf, filter capacitor Cf and laser diode; The source of the PMOS transistor M0 is connected to a DC voltage source VCC, the drain of the PMOS transistor M0 is connected to a first port of the resistor Rd, a first port of the resistor Rt and a positive electrode of the reference voltage source Vref, the negative electrode of the reference voltage source Vref is connected to a non-inverting input terminal of the operational amplifier, the output port of the operational amplifier is connected to a gate of the PMOS transistor M0, the second port of the resistor Rd is connected to a first port of the differential circuit, the second port of the resistor Rt is connected to an output port of the differential circuit, the output port of the differential circuit is connected to an anode of the laser diode and a first port of the filter resistor Rf, the second port of the filter resistor Rf is connected to an inverting input terminal of the operational amplifier and a first port of the filter capacitor Cf, the second port of the differential circuit is connected to a positive electrode of the modulation current source, the negative electrode of the modulation current source, the cathode of the laser diode and the second port of the filter capacitor Cf are all grounded; The differential circuit comprises: a transistor Q0, a transistor Q1, a resistor R0 and a resistor R1; wherein the collector and the base of the transistor Q0 are respectively the first port and the first input port of the differential circuit, the collector and the base of the transistor Q1 are respectively the output port and the second input port of the differential circuit, the emitter of the transistor Q0 is connected to the first port of the resistor R0, the emitter of the transistor Q1 is connected to the second port of the resistor R1, and the second port of the resistor R0 and the first port of the resistor R1 are both connected to the positive electrode of the modulation current source; When the feedback loop formed by the operational amplifier, the PMOS transistor M0, the resistor Rt, the reference voltage source Vref, the filter resistor Rf and the filter capacitor Cf is stable, the voltage at the non-inverting input terminal of the operational amplifier is equal to the voltage at the inverting input terminal; When the voltage between the first input port and the second input port of the differential circuit is the first voltage, the transistor Q0 is in the on state, the transistor Q1 is in the off state, and the current Ivcsel on the laser diode is equal to Ibias. When the voltage between the first input port and the second input port of the differential circuit is the second voltage, the transistor Q0 is in a closed state, the transistor Q1 is in a conducting state, and the current Ivcsel on the laser diode is equal to Ibias-Imod; Wherein, the first voltage is greater than the second voltage, the Ibias=Vref / Rt, the Imod is the output current of the modulation current source, and the reference voltage source Vref is a voltage source with adjustable output voltage; The time constant formed by the filter resistor Rf and the filter capacitor Cf is greater than a preset time length, and the preset time length is the input time length of the first voltage or the second voltage; The resistance of the filter resistor Rf is much greater than the resistance of the resistor Rt.

2. A vertical cavity surface laser emitter VCSEL bias circuit, characterized in that: include: Differential circuit, resistor Rd, resistor Rt, PMOS transistor M0, resistor Rdac, regulating current source Idac, modulating current source, operational amplifier, filter resistor Rf, filter capacitor Cf and laser diode; The source of the PMOS transistor M0 is connected to a DC voltage source VCC, the drain of the PMOS transistor M0 is connected to a first port of the resistor Rd, a first port of the resistor Rt and a first port of the resistor Rdac, the second port of the resistor Rdac is connected to a non-inverting input terminal of the operational amplifier and a positive electrode of the regulating current source Idac, the output port of the operational amplifier is connected to a gate of the PMOS transistor M0, the second port of the resistor Rd is connected to a first port of the differential circuit, the second port of the resistor Rt is connected to an output port of the differential circuit, the output port of the differential circuit is connected to an anode of the laser diode and a first port of the filter resistor Rf, the second port of the filter resistor Rf is connected to an inverting input terminal of the operational amplifier and a first port of the filter capacitor Cf, the second port of the differential circuit is connected to a positive electrode of the modulation current source, the negative electrode of the regulation current source Idac, the negative electrode of the modulation current source, the cathode of the laser diode and a second port of the filter capacitor Cf are all grounded; The differential circuit comprises: a transistor Q0, a transistor Q1, a resistor R0 and a resistor R1; wherein the collector and the base of the transistor Q0 are respectively the first port and the first input port of the differential circuit, the collector and the base of the transistor Q1 are respectively the output port and the second input port of the differential circuit, the emitter of the transistor Q0 is connected to the first port of the resistor R0, the emitter of the transistor Q1 is connected to the second port of the resistor R1, and the second port of the resistor R0 and the first port of the resistor R1 are both connected to the positive electrode of the modulation current source; When the feedback loop formed by the operational amplifier, the PMOS transistor M0, the resistor Rt, the resistor Rdac, the regulating current source Idac, the filter resistor Rf and the filter capacitor Cf is stable, the voltage at the non-inverting input terminal of the operational amplifier is equal to the voltage at the inverting input terminal; When the voltage between the first input port and the second input port of the differential circuit is the first voltage, the transistor Q0 is in the on state, the transistor Q1 is in the off state, and the current Ivcsel on the laser diode is equal to Ibias. When the voltage between the first input port and the second input port of the differential circuit is the second voltage, the transistor Q0 is in a closed state, the transistor Q1 is in a conducting state, and the current Ivcsel on the laser diode is equal to Ibias-Imod; Wherein, the first voltage is greater than the second voltage, the Ibias=Idac*Rdac / Rt, the Imod is the output current of the modulation current source, the adjustment current source Idac is a current source with adjustable output current and / or the resistor Rdac is a resistor with adjustable resistance; The time constant formed by the filter resistor Rf and the filter capacitor Cf is greater than a preset time length, and the preset time length is the input time length of the first voltage or the second voltage; The resistance of the filter resistor Rf is much greater than the resistance of the resistor Rt.

3. A light transmitter, characterized in that: The optical transmitter comprises the bias circuit as claimed in claim 1 or 2.

4. An optical fiber transceiver, characterized in that: The optical fiber transceiver includes the bias circuit as claimed in claim 1 or 2, or the optical transmitter as claimed in claim 3.

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