Bandgap reference circuit and electronic device

Abstract

The application provides a band gap reference circuit and an electronic device, comprising: a compensation module for generating a compensation voltage of a reference voltage temperature curvature based on a current proportional to absolute temperature, a current source with a temperature coefficient of zero and a base-emitter voltage of a triode; and a reference voltage generation module connected to the compensation module, for generating a reference voltage independent of temperature by mutual offset of one positive temperature coefficient voltage and one negative temperature coefficient voltage, and compensating the temperature curvature of the reference voltage by the compensation module. The band gap reference circuit and the electronic device of the application overcome the curvature problem of the reference voltage by compensating high-order nonlinear components, greatly improve the stability of the reference voltage to temperature, and further improve the system accuracy.

Description

Technical Field

[0001] This invention relates to the field of circuit design, and in particular to a bandgap reference circuit and electronic device. Background Technology

[0002] A bandgap voltage reference is a reference voltage source used as a voltage reference in analog or mixed-signal circuits. It is one of the core modules in analog and digital circuits. Due to its advantages such as simple structure, high accuracy, and low temperature coefficient, the bandgap voltage reference has been widely used in integrated circuits.

[0003] The existing expression for a bandgap reference voltage source includes a first-order linear component T of temperature and a higher-order nonlinear component Tln(T). The first-order linear component T can be canceled out by setting appropriate parameters, but the higher-order nonlinear component Tln(T) cannot be canceled out, which causes the output reference voltage to have a certain curvature as the temperature changes.

[0004] Improving the stability of the bandgap reference voltage and thus achieving higher accuracy has always been one of the problems that those skilled in the art urgently need to solve. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a bandgap reference circuit and electronic device to solve the problem of curvature in the bandgap reference voltage in the prior art.

[0006] To achieve the above and other related objectives, the present invention provides a bandgap reference circuit, the bandgap reference circuit comprising at least:

[0007] The compensation module generates a reference voltage for temperature curvature compensation based on a current proportional to absolute temperature, a current source with a zero temperature coefficient, and the base-emitter voltage of a transistor.

[0008] A reference voltage generation module, connected to the compensation module, generates a temperature-independent reference voltage by canceling out a positive temperature coefficient voltage and a negative temperature coefficient voltage, and compensates for the temperature curvature of the reference voltage through the compensation voltage.

[0009] Optionally, the compensation module includes a first current source, a second current source, a third current source, a first NPN transistor, a second NPN transistor, a third NPN transistor, a fourth NPN transistor, a first NMOS transistor, and a second NMOS transistor;

[0010] One end of the first current source is connected to the power supply voltage, and the other end is connected to the collector of the first NPN transistor; the base and collector of the first NPN transistor are connected, and the emitter is connected to the collector of the second NPN transistor; the base and collector of the second NPN transistor are connected, and the emitter is grounded.

[0011] The collector of the third NPN transistor is connected to the power supply voltage, the base is connected to the base of the first NPN transistor, and the emitter is grounded via the second current source.

[0012] One end of the third current source is connected to the power supply voltage, and the other end is connected to the collector of the fourth NPN transistor; the base of the fourth NPN transistor is connected to the emitter of the third NPN transistor, and the emitter of the fourth NPN transistor is connected to the drain of the first NMOS transistor; the gate of the first NMOS transistor is connected to the collector of the fourth NPN transistor, and its source is grounded; the source of the second NMOS transistor is grounded, its gate is connected to the gate of the first NMOS transistor, and its drain outputs the compensation voltage.

[0013] Alternatively, the current output by the first current source and the third current source is proportional to the absolute temperature; the second current source is a constant current source with a temperature coefficient of zero.

[0014] Alternatively, the first NMOS transistor and the second NMOS transistor operate in the linear region.

[0015] Alternatively, the reference voltage generation module includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth NPN transistor, a sixth NPN transistor, and a first amplifier;

[0016] One end of the first resistor is connected to the power supply voltage, and the other end is connected to the collector of the fifth NPN transistor; the emitter of the fifth NPN transistor is connected to the first end of the third resistor via the second resistor;

[0017] One end of the fourth resistor is connected to the power supply voltage, and the other end is connected to the collector of the sixth NPN transistor; the emitter of the sixth NPN transistor is connected to the first end of the third resistor; the second end of the third resistor is connected to the output terminal of the compensation module.

[0018] The inverting input of the first amplifier is connected to the collector of the fifth NPN transistor, the non-inverting input of the first amplifier is connected to the collector of the sixth NPN transistor, and the output of the first amplifier outputs the reference voltage and feeds it back to the base of the fifth NPN transistor and the base of the sixth NPN transistor.

[0019] Alternatively, the reference voltage generation module includes a fourth current source, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a seventh NPN transistor, an eighth NPN transistor, a ninth NPN transistor, and a second amplifier.

[0020] One end of the fifth resistor is connected to the power supply voltage, and the other end is connected to the collector of the seventh NPN transistor; the emitter of the seventh NPN transistor is grounded via the fourth current source.

[0021] One end of the sixth resistor is connected to the power supply voltage, and the other end is connected to the collector of the eighth NPN transistor; the emitter of the eighth NPN transistor is grounded via the fourth current source.

[0022] The inverting input terminal of the second amplifier is connected to the collector of the seventh NPN transistor, the non-inverting input terminal of the second amplifier is connected to the collector of the eighth NPN transistor, and the output terminal of the second amplifier outputs the reference voltage and feeds it back to the base of the eighth NPN transistor.

[0023] One end of the seventh resistor is connected to the output terminal of the second amplifier, and the other end is connected to the base of the seventh NPN transistor; one end of the eighth resistor is connected to the base of the seventh NPN transistor, and the other end is connected to the collector of the ninth NPN transistor; the base and collector of the ninth NPN transistor are connected, and the emitter is connected to the output terminal of the compensation module.

[0024] Alternatively, the reference voltage generation module includes a ninth resistor, a tenth resistor, an eleventh resistor, a tenth NPN transistor, an eleventh NPN transistor, and a third amplifier;

[0025] One end of the ninth resistor is connected to the output terminal of the third amplifier, and the other end is connected to the collector of the tenth NPN transistor via the tenth resistor; the base and collector of the tenth NPN transistor are connected, and the emitter is connected to the output terminal of the compensation module.

[0026] One end of the eleventh resistor is connected to the output terminal of the third amplifier, and the other end is connected to the collector of the eleventh NPN transistor; the base and collector of the eleventh NPN transistor are connected, and the emitter is connected to the output terminal of the compensation module.

[0027] The inverting input terminal of the third amplifier is connected to the connection node of the ninth and tenth resistors, the non-inverting input terminal is connected to the collector of the eleventh NPN transistor, and the output terminal outputs the reference voltage.

[0028] Optionally, the compensation module includes a fifth current source, a sixth current source, a first PNP transistor, a second PNP transistor, a fourth amplifier, and a third NMOS transistor;

[0029] One end of the fifth current source is connected to the power supply voltage, and the other end is connected to the emitter of the first PNP transistor; the base and collector of the first PNP transistor are grounded.

[0030] One end of the sixth current source is connected to the power supply voltage, and the other end is connected to the emitter of the second PNP transistor; the collector of the second PNP transistor is grounded; the drain of the third NMOS transistor is connected to the base of the second PNP transistor and outputs the compensation voltage, and the source is grounded.

[0031] The inverting input of the fourth amplifier is connected to the emitter of the first PNP transistor, the non-inverting input is connected to the emitter of the second PNP transistor, and the output is connected to the gate of the third NMOS transistor.

[0032] Alternatively, the current output by the fifth current source is proportional to the absolute temperature; the sixth current source is a constant current source with a temperature coefficient of zero.

[0033] Alternatively, the reference voltage generation module includes a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a third PNP transistor, a fourth PNP transistor, and a fifth amplifier;

[0034] One end of the twelfth resistor is connected to the output terminal of the fifth amplifier, and the other end is connected to the emitter of the third PNP transistor via the thirteenth resistor; the base of the third PNP transistor is connected to the output terminal of the compensation module, and the collector is grounded.

[0035] One end of the fourteenth resistor is connected to the output terminal of the fifth amplifier, and the other end is connected to the emitter of the fourth PNP transistor; the base of the fourth PNP transistor is connected to the output terminal of the compensation module, and the collector is grounded.

[0036] The inverting input of the fifth amplifier is connected to the connection node of the twelfth and thirteenth resistors, the non-inverting input is connected to the emitter of the fourth PNP transistor, and the output terminal outputs the reference voltage.

[0037] To achieve the above and other related objectives, the present invention provides an electronic device, which includes at least the above-described bandgap reference circuit.

[0038] As described above, the bandgap reference circuit and electronic device of the present invention have the following beneficial effects:

[0039] The bandgap reference circuit and electronic device of the present invention greatly improve the temperature stability of the reference voltage by compensating for higher-order nonlinear components, thereby improving the system accuracy. Attached Figure Description

[0040] Figure 1 The diagram shown is a schematic representation of a bandgap reference circuit according to the present invention.

[0041] Figure 2 This diagram illustrates the relationship between reference voltage and temperature without curvature compensation.

[0042] Figure 3 The diagram shows the relationship between the reference voltage and temperature after curvature compensation according to the present invention.

[0043] Figure 4 The diagram shown is another structural schematic of the bandgap reference circuit of the present invention.

[0044] Figure 5 The diagram shown represents another structural schematic of the bandgap reference circuit of the present invention.

[0045] Figure 6 The diagram shown represents another possible structure of the bandgap reference circuit of the present invention.

[0046] Component designation explanation

[0047] 1. Bandgap reference circuit

[0048] 11 Compensation Module

[0049] 12. Reference Voltage Generation Module Detailed Implementation

[0050] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0051] Please see Figures 1-6 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0052] Example 1

[0053] like Figure 1As shown, this embodiment provides a bandgap reference circuit 1, which includes:

[0054] Compensation module 11 and reference voltage generation module 12.

[0055] like Figure 1 As shown, the compensation module 11 generates a reference voltage temperature curvature compensation voltage based on a current proportional to absolute temperature, a current source with a zero temperature coefficient, and the base-emitter voltage of a transistor.

[0056] Specifically, in this embodiment, the compensation module 11 includes a first current source I1, a second current source I2, a third current source I3, a first NPN transistor Q1, a second NPN transistor Q2, a third NPN transistor Q3, a fourth NPN transistor Q4, a first NMOS transistor M1, and a second NMOS transistor M2.

[0057] One end of the first current source I1 is connected to the power supply voltage VCC, and the other end is connected to the collector of the first NPN transistor Q1. The first current source I1 is a current proportional to absolute temperature (PTAT). In this embodiment, the current flowing through the first current source I1 is set to a1*T. The base and collector of the first NPN transistor Q1 are connected, and the emitter is connected to the collector of the second NPN transistor Q2. The base and collector of the second NPN transistor Q2 are connected, and the emitter is grounded.

[0058] The collector of the third NPN transistor Q3 is connected to the power supply voltage VCC, the base is connected to the base of the first NPN transistor Q1, and the emitter is grounded via the second current source 12. The current flowing through the second current source 12 is a fixed value. In this embodiment, the current flowing through the second current source 12 is set to I. const It does not change with temperature.

[0059] One end of the third current source I3 is connected to the power supply voltage VCC, and the other end is connected to the collector of the fourth NPN transistor Q4. The third current source I3 is a current proportional to absolute temperature (PTAT). In this embodiment, the current flowing through the third current source I1 is set to a2*T. The base of the fourth NPN transistor Q4 is connected to the emitter of the third NPN transistor Q3, and the emitter is connected to the drain of the first NMOS transistor M1. The gate of the first NMOS transistor M1 is connected to the collector of the fourth NPN transistor Q4, and its source is grounded. The source of the second NMOS transistor M2 is grounded, its gate is connected to the gate of the first NMOS transistor M1, and its drain outputs the compensation voltage. The first NMOS transistor M1 and the second NMOS transistor M2 operate in the linear region, and the first NMOS transistor M1 and the second NMOS transistor M2 are matched, with a width-to-length ratio of 1:m1.

[0060] like Figure 1 As shown, the reference voltage generation module 12 is connected to the compensation module 11, and generates a temperature-independent reference voltage V by canceling out a positive temperature coefficient voltage and a negative temperature coefficient voltage. BG And the reference voltage V is compensated by the compensation voltage. BG Temperature curvature.

[0061] Specifically, the reference voltage generation module 12 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth NPN transistor Q5, a sixth NPN transistor Q6, and a first amplifier U1.

[0062] One end of the first resistor R1 is connected to the power supply voltage VCC, and the other end is connected to the collector of the fifth NPN transistor Q5. The emitter of the fifth NPN transistor Q5 is connected to the first end of the third resistor R3 via the second resistor R2. One end of the fourth resistor R4 is connected to the power supply voltage VCC, and the other end is connected to the collector of the sixth NPN transistor Q6. The emitter of the sixth NPN transistor Q6 is connected to the first end of the third resistor R3. The second end of the third resistor R3 is connected to the drain of the second NMOS transistor M2. The resistance values ​​of the first resistor R1 and the fourth resistor R4 are equal, and the emitter junction area ratio of the fifth NPN transistor Q5 to the sixth NPN transistor Q6 is n1:1, where n1 can be set to a specific value as needed.

[0063] The inverting input of the first amplifier U1 is connected to the collector of the fifth NPN transistor Q5, the non-inverting input is connected to the collector of the sixth NPN transistor Q6, and the output terminal outputs the reference voltage V. BGAnd the feedback is sent to the base of the fifth NPN transistor Q5 and the sixth NPN transistor Q6.

[0064] like Figure 1 As shown, for a bipolar device, we can obtain:

[0065]

[0066] in, Ic is the collector current, Is is the saturation current, and V BE The base-emitter voltage, V T Let be the thermal voltage, k be the Boltzmann constant, T be the Kelvin absolute temperature, and q be the electron charge. Ignoring the base currents of the fifth NPN transistor Q5 and the sixth NPN transistor Q6, based on the reference voltage generation module 12, we can obtain:

[0067]

[0068] Among them, I C5 I is the collector current of the fifth NPN transistor Q5. C6 I is the collector current of the sixth NPN transistor Q6. C5 and I C6 It is a current that is proportional to absolute temperature (PTAT), V BE5 V is the base-emitter voltage of the fifth NPN transistor Q5. BE6 R1 is the base-emitter voltage of the sixth NPN transistor Q6, R2 is the resistance of the second resistor R2, and n1 is the ratio of the emitter junction area of ​​the fifth NPN transistor Q5 to that of the sixth NPN transistor Q6. If one end of the third resistor R3 is grounded, we can further obtain:

[0069]

[0070] Among them, V BG R3 is the reference voltage, and R3 is the resistance value of the third resistor. Since the sixth NPN transistor Q6 operates with a collector current proportional to absolute temperature, we can conclude that:

[0071]

[0072] Among them, V G0 V is the bandgap voltage of silicon at zero Kelvin, T0 is the reference temperature, and V is the reference voltage. BE0Let be the base-emitter voltage of the transistor at the reference temperature T0, η be a process-dependent constant (between 3.6 and 4), and θ be the degree of correlation between the collector current and temperature (when 0 = 1, the collector current is PTAT). Combining equations (3) and (4), we can further obtain:

[0073]

[0074] In the above formula, by selecting the appropriate The ratio can be used to cancel out the first-order linear component T of temperature in the second and third terms using the fourth term, thus obtaining a reference voltage V for a relatively constant temperature. BG However, the third term still contains a higher-order nonlinear component of temperature, T ln(T), such as... Figure 2 As shown, the resulting reference voltage V BG The curvature becomes the reference voltage V BG The main source of temperature instability severely limits the overall accuracy of bandgap reference circuits.

[0075] When one end of the third resistor R3 is not grounded, but connected to the drain of the second NMOS transistor M2, the compensation module 11 supplies the reference voltage V. BG Compensation was provided so that the reference voltage V BG The following relationship must be satisfied:

[0076]

[0077] The compensation voltage is the drain-source voltage V of the second NMOS transistor M2. ds2 Furthermore, the drain-source voltage V of the second NMOS transistor M2... ds2 The following relationship must be satisfied:

[0078]

[0079]

[0080] V ds1 =V BE1 +V BE2 -V BE3 -V BE (9),

[0081]

[0082] Where, r ds2 r is the drain-source resistance of the second NMOS transistor M2 biased in the linear region. ds1 V is the drain-source resistance of the first NMOS transistor M1 biased in the linear region. ds1V is the drain-source voltage of the first NMOS transistor M1. BE1 V is the base-emitter voltage of the first NPN transistor Q1. BE2 V is the base-emitter voltage of the second NPN transistor Q2. BE3 V is the base-emitter voltage of the third NPN transistor Q3. BE4 Given the base-emitter voltage of the fourth NPN transistor Q4, combined with equations (6) to (10), we can obtain:

[0083]

[0084] By setting appropriate Ratio, I const1 And m1 can use the fourth term to eliminate the first-order linear component T of the second term, and use the fifth term to eliminate the higher-order nonlinear component T ln(T) of the third term, thereby obtaining a reference voltage with higher temperature stability, such as Figure 3 As shown, it is obvious that the reference voltage V is compensated by the compensation module 11. BG The temperature curvature is significantly improved.

[0085] Example 2

[0086] like Figure 4 As shown, this embodiment provides a bandgap reference circuit 1, which differs from the first embodiment in that the structure of the reference voltage generation module 12 is different.

[0087] Specifically, the reference voltage generation module 12 includes a fourth current source I4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a seventh NPN transistor Q7, an eighth NPN transistor Q8, a ninth NPN transistor Q9, and a second amplifier U2.

[0088] One end of the fifth resistor R5 is connected to the power supply voltage VCC, and the other end is connected to the collector of the seventh NPN transistor Q7. The emitter of the seventh NPN transistor Q7 is grounded via the fourth current source I4.

[0089] One end of the sixth resistor R6 is connected to the power supply voltage VCC, and the other end is connected to the collector of the eighth NPN transistor Q8. The resistance value of the sixth resistor R6 is equal to that of the fifth resistor R5. The emitter of the eighth NPN transistor Q8 is grounded through the fourth current source I4. The emitter junction area ratio of the seventh NPN transistor Q7 to the eighth NPN transistor Q8 is n2:1, and n2 can be set to a specific value as needed. The current flowing through the fourth current source I4 is a fixed value and does not change with temperature.

[0090] The inverting input of the second amplifier U2 is connected to the collector of the seventh NPN transistor Q7, and the non-inverting input is connected to the collector of the eighth NPN transistor Q8. The output terminal outputs the reference voltage V. BG And it is fed back to the base of the eighth NPN transistor Q8.

[0091] One end of the seventh resistor R7 is connected to the output terminal of the second amplifier U2, and the other end is connected to the base of the seventh NPN transistor Q7. One end of the eighth resistor R8 is connected to the base of the seventh NPN transistor Q7, and the other end is connected to the collector of the ninth NPN transistor Q9. The base and collector of the ninth NPN transistor Q9 are connected, and its emitter is connected to the output terminal of the compensation module 11.

[0092] Based on the circuit structure of the reference voltage generation module 12, it can be known that...

[0093]

[0094]

[0095] Among them, I R7 The current flowing through the seventh resistor R7 is V, where R7 is the resistance of the seventh resistor R7, and R8 is the resistance of the eighth resistor R8. BE9 Let n1 be the base-emitter voltage of the ninth NPN transistor Q9, and n2 be the ratio of the emitter junction area of ​​the seventh NPN transistor Q7 to that of the eighth NPN transistor Q8. Therefore, by combining equations (4), (8) to (10) and equation (13), the reference voltage V can be obtained. BG The following relationship must be satisfied:

[0096]

[0097] By setting appropriate Ratio, I const1 The fourth term can be used to eliminate the first-order linear component T of the second and third terms, and the fifth term can be used to eliminate the higher-order nonlinear component T ln(T) of the third term, thereby obtaining a reference voltage with higher temperature stability.

[0098] Example 3

[0099] like Figure 5 As shown, this embodiment provides a bandgap reference circuit 1, which differs from Embodiment 1 and Embodiment 2 in that the structure of the reference voltage generation module 12 is different.

[0100] Specifically, the reference voltage generation module 12 includes a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a tenth NPN transistor Q10, an eleventh NPN transistor Q11, and a third amplifier U3.

[0101] One end of the ninth resistor R9 is connected to the output terminal of the third amplifier U3, and the other end is connected to the collector of the tenth NPN transistor Q10 via the tenth resistor R10. The base and collector of the tenth NPN transistor Q10 are connected, and the emitter is connected to the output terminal of the compensation module 11.

[0102] One end of the eleventh resistor R11 is connected to the output terminal of the third amplifier U3, and the other end is connected to the collector of the eleventh NPN transistor Q11. The resistance value of the eleventh resistor R11 is equal to that of the ninth resistor R9. The base and collector of the tenth NPN transistor Q11 are connected, and the emitter is connected to the output terminal of the compensation module 11. The emitter junction area ratio of the tenth NPN transistor Q10 to the eleventh NPN transistor Q11 is n3:1, and n3 can be set to a specific value as needed.

[0103] The inverting input terminal of the third amplifier U3 is connected to the connection node of the ninth resistor R9 and the tenth resistor R10, the non-inverting input terminal is connected to the collector of the eleventh NPN transistor Q11, and the output terminal outputs the reference voltage V. BG .

[0104] Based on the circuit structure of the reference voltage generation module 12, it can be seen that:

[0105]

[0106] Among them, V BE11 R is the base-emitter voltage of the eleventh NPN transistor Q11. 10 Let R be the resistance value of the tenth resistor R10. 11 The value of the eleventh resistor R11 is given, and n3 is the ratio of the emitter junction area of ​​the tenth NPN transistor Q10 to that of the eleventh NPN transistor Q11. Therefore, by combining equations (4), (8) to (10) and equation (15), the reference voltage V can be obtained. BG The following relationship must be satisfied:

[0107]

[0108]

[0109] By setting appropriate Ratio, I const1The fourth term can be used to eliminate the first-order linear component T of the second and third terms, and the fifth term can be used to eliminate the higher-order nonlinear component T ln(T) of the third term, thereby obtaining a reference voltage with higher temperature stability.

[0110] Example 4

[0111] like Figure 6 As shown, this embodiment provides a bandgap reference circuit 1, which differs from embodiments one to three in that the structures of the compensation module 11 and the reference voltage generation module 12 are different.

[0112] Specifically, the compensation module 11 includes a fifth current source 15, a sixth current source 16, a first PNP transistor Q12, a second PNP transistor Q13, a fourth amplifier U4, and a third NMOS transistor M3.

[0113] One end of the fifth current source I5 is connected to the power supply voltage VCC, and the other end is connected to the emitter of the first PNP transistor Q12. The fifth current source I5 is a current proportional to absolute temperature (PTAT). In this embodiment, the current flowing through the fifth current source I5 is set to a3*T. The base and collector of the first PNP transistor Q12 are grounded.

[0114] One end of the sixth current source I6 is connected to the power supply voltage VCC, and the other end is connected to the emitter of the second PNP transistor Q13. The current flowing through the sixth current source I6 is a fixed value. In this embodiment, the current flowing through the sixth current source I6 is set to I. cons The voltage does not change with temperature. The collector of the second PNP transistor Q13 is grounded. The emitter area ratio of the first PNP transistor Q12 to the second PNP transistor Q13 is 1:m2, where m2 can be set to a specific value as needed. The drain of the third NMOS transistor M3 is connected to the base of the second PNP transistor Q13 and outputs the compensation voltage, while its source is grounded.

[0115] The inverting input of the fourth amplifier U4 is connected to the emitter of the first PNP transistor Q12, the non-inverting input is connected to the emitter of the second PNP transistor Q13, and the output is connected to the gate of the third NMOS transistor M3.

[0116] Specifically, the reference voltage generation module 12 includes a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a third PNP transistor Q14, a fourth PNP transistor Q15, and a fifth amplifier U5.

[0117] One end of the twelfth resistor R12 is connected to the output terminal of the fifth amplifier U, and the other end is connected to the emitter of the third PNP transistor Q14 via the thirteenth resistor R13; the base of the third PNP transistor Q14 is connected to the output terminal of the compensation module 11, and the collector is grounded.

[0118] One end of the fourteenth resistor R14 is connected to the output terminal of the fifth amplifier U5, and the other end is connected to the emitter of the fourth PNP transistor Q15. The resistance value of the fourteenth resistor R14 is equal to that of the twelfth resistor R12. The base of the fourth PNP transistor Q15 is connected to the output terminal of the compensation module 11, and the collector is grounded. The emitter junction area ratio of the third PNP transistor Q14 to the fourth PNP transistor Q15 is n4:1, and n4 can be set to a specific value as needed.

[0119] The inverting input of the fifth amplifier U5 is connected to the junction of the twelfth resistor R12 and the thirteenth resistor R13, the non-inverting input is connected to the emitter of the fourth PNP transistor Q15, and the output terminal outputs the reference voltage VB. G .

[0120] Since the PNP transistors are fabricated on a p-substrate, this embodiment modifies the curvature compensation scheme and accordingly biases the bases of the third PNP transistor Q14 and the fourth PNP transistor Q15.

[0121] Based on the circuit structure of the compensation module 11, it can be known that:

[0122]

[0123] Among them, V B This is the drain voltage of the third NMOS transistor M3. Based on the circuit structure of the reference voltage generation module 12, it can be seen that:

[0124]

[0125] Among them, V BE15 R is the base-emitter voltage of the fourth PNP transistor Q15. 13 R is the resistance value of the thirteenth resistor R13. 14 The resistance value of the fourteenth resistor R14 is given, and n4 is the ratio of the emitter junction area of ​​the third PNP transistor Q14 to that of the fourth PNP transistor Q15. Therefore, by combining equations (4), (17) to (18), the reference voltage V can be obtained. BG The following relationship must be satisfied:

[0126]

[0127] By setting appropriate Ratio, I cons The fourth term can be used to eliminate the first-order linear component T of the second and third terms, and the fifth term can be used to eliminate the higher-order nonlinear component T ln(T) of the third term, thereby obtaining a reference voltage with higher temperature stability.

[0128] The bandgap reference circuit of the present invention greatly improves the temperature stability of the reference voltage by compensating for the higher-order nonlinear component T ln(T). Embodiments 1 to 4 are only a few implementations of the present invention. Any circuit structure that can compensate for the temperature curvature of the reference voltage is included in the present invention, and will not be described in detail here.

[0129] Example 5

[0130] This embodiment provides an electronic device, which includes any one of the bandgap reference circuits from Embodiment 1 to Embodiment 4. The bandgap reference circuit provides a reference voltage for other circuits in the electronic device.

[0131] In summary, this invention provides a bandgap reference circuit and electronic device, comprising: a compensation module that generates a compensation voltage for the temperature curvature of a reference voltage based on a current proportional to absolute temperature, a current source with a zero temperature coefficient, and the base-emitter voltage of a transistor; and a reference voltage generation module connected to the compensation module that generates a temperature-independent reference voltage by canceling out a positive temperature coefficient voltage and a negative temperature coefficient voltage, and compensates for the temperature curvature of the reference voltage through the compensation module. The bandgap reference circuit and electronic device of this invention overcome the curvature problem of the reference voltage by compensating for higher-order nonlinear components, greatly improving the temperature stability of the reference voltage and thus improving system accuracy. Therefore, this invention effectively overcomes the various shortcomings of the prior art and has high industrial applicability.

[0132] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A bandgap reference circuit, characterized in that, The bandgap reference circuit includes at least: The compensation module generates a reference voltage for temperature curvature compensation based on a current proportional to absolute temperature, a current source with a zero temperature coefficient, and the base-emitter voltage of a transistor. A reference voltage generation module, connected to the compensation module, generates a temperature-independent reference voltage by canceling out a positive temperature coefficient voltage and a negative temperature coefficient voltage, and superimposes the compensation voltage on the reference voltage to compensate for the temperature curvature of the reference voltage. The compensation module is based on a second NMOS transistor connected in series in the reference voltage generation module. The source of the second NMOS transistor is grounded, the gate receives the control voltage, and the drain outputs the compensation voltage. Alternatively, when the reference voltage generation module includes a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a third PNP transistor, a fourth PNP transistor, and a fifth amplifier, compensation is achieved based on the control of the bases of the third PNP transistor and the fourth PNP transistor by the compensation module. Specifically, one end of the twelfth resistor is connected to the output of the fifth amplifier, and the other end is connected to the emitter of the third PNP transistor via the thirteenth resistor. The base of the third PNP transistor is connected to the output of the compensation module, and its collector is grounded. One end of the fourteenth resistor is connected to the output of the fifth amplifier, and the other end is connected to the emitter of the fourth PNP transistor. The base of the fourth PNP transistor is connected to the output of the compensation module, and its collector is grounded. The inverting input of the fifth amplifier is connected to the junction of the twelfth and thirteenth resistors, the non-inverting input is connected to the emitter of the fourth PNP transistor, and the output terminal outputs the reference voltage.

2. The bandgap reference circuit according to claim 1, characterized in that: When the compensation module performs compensation based on the second NMOS transistor, the compensation module includes a first current source, a second current source, a third current source, a first NPN transistor, a second NPN transistor, a third NPN transistor, a fourth NPN transistor, a first NMOS transistor, and a second NMOS transistor. One end of the first current source is connected to the power supply voltage, and the other end is connected to the collector of the first NPN transistor; the base and collector of the first NPN transistor are connected, and the emitter is connected to the collector of the second NPN transistor; the base and collector of the second NPN transistor are connected, and the emitter is grounded. The collector of the third NPN transistor is connected to the power supply voltage, the base is connected to the base of the first NPN transistor, and the emitter is grounded via the second current source. One end of the third current source is connected to the power supply voltage, and the other end is connected to the collector of the fourth NPN transistor; the base of the fourth NPN transistor is connected to the emitter of the third NPN transistor, and the emitter of the fourth NPN transistor is connected to the drain of the first NMOS transistor; the gate of the first NMOS transistor is connected to the collector of the fourth NPN transistor, and its source is grounded; the gate of the second NMOS transistor is connected to the gate of the first NMOS transistor.

3. The bandgap reference circuit according to claim 2, characterized in that: The current output by the first current source and the third current source is proportional to the absolute temperature; the second current source is a constant current source and is independent of temperature.

4. The bandgap reference circuit according to claim 2, characterized in that: The first NMOS transistor and the second NMOS transistor operate in the linear region.

5. The bandgap reference circuit according to any one of claims 2 to 4, characterized in that: The reference voltage generation module includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth NPN transistor, a sixth NPN transistor, and a first amplifier; One end of the first resistor is connected to the power supply voltage, and the other end is connected to the collector of the fifth NPN transistor; the emitter of the fifth NPN transistor is connected to the first end of the third resistor via the second resistor; One end of the fourth resistor is connected to the power supply voltage, and the other end is connected to the collector of the sixth NPN transistor; the emitter of the sixth NPN transistor is connected to the first end of the third resistor; the second end of the third resistor is connected to the output terminal of the compensation module. The inverting input of the first amplifier is connected to the collector of the fifth NPN transistor, the non-inverting input of the first amplifier is connected to the collector of the sixth NPN transistor, and the output of the first amplifier outputs the reference voltage and feeds it back to the base of the fifth NPN transistor and the base of the sixth NPN transistor.

6. The bandgap reference circuit according to any one of claims 2 to 4, characterized in that: The reference voltage generation module includes a fourth current source, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a seventh NPN transistor, an eighth NPN transistor, a ninth NPN transistor, and a second amplifier; One end of the fifth resistor is connected to the power supply voltage, and the other end is connected to the collector of the seventh NPN transistor; the emitter of the seventh NPN transistor is grounded via the fourth current source. One end of the sixth resistor is connected to the power supply voltage, and the other end is connected to the collector of the eighth NPN transistor; the emitter of the eighth NPN transistor is grounded via the fourth current source. The inverting input terminal of the second amplifier is connected to the collector of the seventh NPN transistor, the non-inverting input terminal of the second amplifier is connected to the collector of the eighth NPN transistor, and the output terminal of the second amplifier outputs the reference voltage and feeds it back to the base of the eighth NPN transistor. One end of the seventh resistor is connected to the output terminal of the second amplifier, and the other end is connected to the base of the seventh NPN transistor; one end of the eighth resistor is connected to the base of the seventh NPN transistor, and the other end is connected to the collector of the ninth NPN transistor; the base and collector of the ninth NPN transistor are connected, and the emitter is connected to the output terminal of the compensation module.

7. The bandgap reference circuit according to any one of claims 2 to 4, characterized in that: The reference voltage generation module includes a ninth resistor, a tenth resistor, an eleventh resistor, a tenth NPN transistor, an eleventh NPN transistor, and a third amplifier; One end of the ninth resistor is connected to the output terminal of the third amplifier, and the other end is connected to the collector of the tenth NPN transistor via the tenth resistor; the base and collector of the tenth NPN transistor are connected, and the emitter is connected to the output terminal of the compensation module. One end of the eleventh resistor is connected to the output terminal of the third amplifier, and the other end is connected to the collector of the eleventh NPN transistor; the base and collector of the eleventh NPN transistor are connected, and the emitter is connected to the output terminal of the compensation module. The inverting input terminal of the third amplifier is connected to the connection node of the ninth and tenth resistors, the non-inverting input terminal is connected to the collector of the eleventh NPN transistor, and the output terminal outputs the reference voltage.

8. The bandgap reference circuit according to claim 1, characterized in that: When the reference voltage generation module includes a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a third PNP transistor, a fourth PNP transistor, and a fifth amplifier, the compensation module includes a fifth current source, a sixth current source, a first PNP transistor, a second PNP transistor, a fourth amplifier, and a third NMOS transistor. One end of the fifth current source is connected to the power supply voltage, and the other end is connected to the emitter of the first PNP transistor; the base and collector of the first PNP transistor are grounded. One end of the sixth current source is connected to the power supply voltage, and the other end is connected to the emitter of the second PNP transistor; the collector of the second PNP transistor is grounded; the drain of the third NMOS transistor is connected to the base of the second PNP transistor and outputs the compensation voltage, and the source is grounded. The inverting input of the fourth amplifier is connected to the emitter of the first PNP transistor, the non-inverting input is connected to the emitter of the second PNP transistor, and the output is connected to the gate of the third NMOS transistor.

9. The bandgap reference circuit according to claim 8, characterized in that: The current output by the fifth current source is proportional to the absolute temperature; the sixth current source is a constant current source with a temperature coefficient of zero.

10. An electronic device, characterized in that, The electronic device includes at least: The bandgap reference circuit as described in any one of claims 1 to 9.

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