Synchronous rectifier control circuit, flyback voltage conversion circuit and control method

Abstract

The present invention provides a control circuit for controlling a synchronous rectifier, a flyback voltage conversion circuit, and a control method for controlling the synchronous rectifier. The control circuit includes a controllable current source coupled to the control terminal of the synchronous rectifier; and a timing circuit coupled to the controllable current source. The timing circuit is configured to start timing when the synchronous rectifier is turned on and, after a first time interval, output an active signal to control the controllable current source to cause current to flow out of the node at the control terminal of the synchronous rectifier. The control circuit, flyback voltage conversion circuit, and control method of the present invention are used to accurately shut down the synchronous rectifier, improving system efficiency and stability.

Description

Technical Field

[0001] The present invention relates to the field of electronics, and specifically but not limited to, a control circuit for controlling a synchronous rectifier tube, a flyback voltage conversion circuit, and a control method for controlling the synchronous rectifier tube. Background Art

[0002] The flyback voltage converter includes a primary circuit and a secondary circuit, such as Figure 1 As shown, the primary current and the secondary circuit are isolated by transformer T. The primary switch Q in the primary circuit transfers energy to the secondary through switching. The secondary circuit includes a rectifier D. When the primary switch Q is off, rectifier D conducts, passing a freewheeling current to power the output capacitor Co and the load. When the freewheeling current drops to zero, rectifier D turns off, now supplying power to the load through the output capacitor Co. To improve power supply efficiency, synchronous rectifiers are typically used as secondary rectifiers. High-efficiency rectification is achieved by timely controlling the on and off times of the synchronous rectifiers. However, this poses a challenge in accurately timing the turn-off of the secondary synchronous rectifiers. This is because delayed turn-off can cause the secondary synchronous rectifiers and the primary switch to be switched on, leading to system reliability and stability issues. If the turn-off is premature, the synchronous rectification function is disabled when the freewheeling current is high, reducing system efficiency.

[0003] In view of this, it is necessary to provide a new structure or control method to solve at least part of the above problems. Summary of the Invention

[0004] In response to one or more problems in the prior art, the present invention proposes a control circuit for controlling a synchronous rectifier, a flyback voltage conversion circuit, and a control method for controlling the synchronous rectifier.

[0005] According to one aspect of the present invention, a control circuit for controlling a synchronous rectifier includes: a controllable current source for coupling to a control terminal of the synchronous rectifier; and a timing circuit coupled to the controllable current source, wherein the timing circuit is configured to start timing when the synchronous rectifier is turned on, and output a valid signal after a first time interval for controlling the controllable current source to cause current to flow out of a node at the control terminal of the synchronous rectifier.

[0006] In one embodiment, the controllable current source includes a switch and a current source connected in series, wherein the output end of the timing circuit is coupled to the control end of the switch; the control circuit further includes a synchronous control circuit coupled to the synchronous rectifier tube, which is used to turn on the synchronous rectifier tube when the voltage difference across the synchronous rectifier tube is less than a first threshold value, and is used to turn off the synchronous rectifier tube when the voltage difference across the synchronous rectifier tube is greater than a second threshold value.

[0007] In one embodiment, the control circuit further includes a time interval adjustment circuit, wherein the time interval adjustment circuit detects a second time interval from when the switch is turned on to when the synchronous rectifier is turned off, and adjusts the first time interval according to the second time interval.

[0008] In one embodiment, when the second time interval is smaller than a preset value, the first time interval is shortened; when the second time interval is larger than the preset value, the first time interval is increased.

[0009] In one embodiment, the timing circuit outputs an invalid signal for turning off the switch after a third time interval after turning on the switch.

[0010] In one embodiment, the control circuit further includes a pulse width signal generating circuit coupled between the output terminal of the timing circuit and the control terminal of the switch. When the timing circuit starts to output a valid signal, the pulse width signal generating circuit generates a pulse width signal for intermittently turning on the switch.

[0011] In one embodiment, the control circuit further includes a comparison circuit, which is used to compare the control terminal voltage of the synchronous rectifier with a third threshold value, and turn off the switch when the control terminal voltage is less than the third threshold value.

[0012] According to another aspect of the present invention, a flyback voltage conversion circuit includes a primary circuit and a secondary circuit, wherein the secondary circuit includes a synchronous rectifier and the control circuit as described in any one of the above embodiments.

[0013] According to another aspect of the present invention, a control method for controlling a synchronous rectifier includes: coupling a controllable current source to the control end of the synchronous rectifier; detecting the conduction time point of the synchronous rectifier; and controlling the current in the controllable current source to flow out from the control end node of the synchronous rectifier after a preset first time interval of the conduction of the synchronous rectifier.

[0014] In one embodiment, the control method further includes acquiring a second time interval from when the switch is turned on to when the synchronous rectifier is turned off, and adjusting the first time interval according to the second time interval.

[0015] The control circuit, flyback voltage conversion circuit and control method proposed in the present invention can reduce the control terminal voltage of the synchronous rectifier tube through a current source, and at the same time use a timing circuit and a time adjustment circuit to automatically optimize the control terminal voltage of the synchronous rectifier tube, so that the synchronous rectifier tube is accurately turned off, thereby improving system efficiency and stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A flyback voltage converter circuit is shown;

[0017] Figure 2 shows a schematic diagram of a control circuit according to an embodiment of the present invention;

[0018] Figure 3 shows a circuit diagram of a control circuit according to an embodiment of the present invention;

[0019] Figure 4 A schematic flow chart of a first time interval adjustment method according to an embodiment of the present invention is shown;

[0020] Figure 5 shows a waveform diagram according to an embodiment of the present invention;

[0021] Figure 6 shows a waveform diagram according to another embodiment of the present invention;

[0022] Figure 7 shows a control circuit according to another embodiment of the present invention;

[0023] Figure 8 It shows an embodiment of the present invention can be used for Figure 7 A waveform diagram of the circuit embodiment shown;

[0024] Figure 9 A schematic diagram of a flyback voltage conversion circuit according to an embodiment of the present invention is shown;

[0025] Figure 10 A flow chart of a control method for controlling a synchronous rectifier tube according to an embodiment of the present invention is shown.

[0026] The same reference numerals in different diagrams represent the same or similar components or elements. DETAILED DESCRIPTION

[0027] In order to further understand the present invention, preferred embodiments of the present invention are described below in conjunction with examples. However, it should be understood that these descriptions are only for further illustrating the features and advantages of the present invention, rather than limiting the claims of the present invention.

[0028] The description in this section focuses on several typical embodiments only, and the present invention is not limited to the scope of the embodiments described. Combinations of different embodiments, replacement of certain technical features in different embodiments, and replacement of certain technical features in the embodiments with the same or similar prior art methods are also within the scope of the present invention.

[0029] The term "coupled" or "connected" as used in this specification encompasses both direct and indirect connections. An indirect connection is a connection through an intermediate medium, such as an electrically conductive medium like a conductor, which may contain parasitic inductance or capacitance. An indirect connection may also include a connection through other active or passive devices that achieve the same or similar functions, such as a switch, driver circuit, signal amplifier circuit, or follower circuit, among other circuits or components.

[0030] Figure 2 A control circuit 20 for controlling a synchronous rectifier 10 according to an embodiment of the present invention is shown. The control circuit 20 includes a controllable current source 21 and a timing circuit 22. The controllable current source 21 is coupled to the control terminal of the synchronous rectifier 10. The timing circuit 22 is coupled to the controllable current source 21. Preferably, the output terminal of the timing circuit 22 can be coupled to the control terminal of the controllable current source 21. The timing circuit 22 starts timing when the synchronous rectifier 10 is turned on, and outputs a valid signal after a first time interval for controlling the controllable current source 21 to make current flow out of the synchronous rectifier control terminal node A. In one embodiment, the first time interval is a preset fixed value. In a preferred embodiment, the first time interval is adjusted for the next cycle based on the length of the time period from when the controllable current source current starts to flow out of the synchronous rectifier control terminal node to when the synchronous rectifier is turned off.

[0031] In one embodiment, the synchronous rectifier 10 includes a field effect transistor (FET). In a preferred embodiment, the synchronous rectifier 10 includes a metal oxide semiconductor field effect transistor (MOSFET). In the illustrated embodiment, the synchronous rectifier 10 is a PNP type MOSFET tube, and the synchronous rectifier 10 has a drain, a gate and a source, wherein the gate is the control terminal of the synchronous rectifier 10. In another embodiment, the synchronous rectifier can also be other types of switching tubes, wherein the synchronous rectifier is connected in parallel with a diode, and the diode can be a parasitic diode. In one embodiment, the synchronous rectifier includes a junction field effect transistor. The positive electrode of the controllable current source 21 is coupled to the control terminal node of the synchronous rectifier 10, and the negative electrode of the controllable current source 21 is coupled to the low voltage node. Figure 2In the embodiment shown, the control terminal node is coupled to the gate of the synchronous rectifier 10. In one embodiment, the negative electrode of the controllable current source 21 is coupled to the reference ground of the control circuit 20. When the gate voltage of the synchronous rectifier 10 is pulled up by the driving circuit, the synchronous rectifier 10 is turned on. When the timing circuit 22 outputs a valid signal, the current of the controllable current source 21 is controlled to flow out from the control terminal node A of the synchronous rectifier 10, so that the control terminal voltage of the synchronous rectifier 10 is reduced. By dynamically reducing the control terminal voltage of the synchronous rectifier, the synchronous rectifier can be turned off at a lower freewheeling current, thereby improving system efficiency. At the same time, it can avoid shutdown delays. In the application of the flyback voltage conversion circuit, it can prevent the primary side switch and the secondary side synchronous rectifier from being turned on at the same time, thereby preventing the system from malfunctioning.

[0032] Figure 3 A circuit diagram of a control circuit 30 according to an embodiment of the present invention is shown. The control circuit 30 includes a controllable current source and a timing circuit 32. In the illustrated embodiment, the controllable current source includes a current source I1 and a switch S1 connected in series. The output of the timing circuit 32 is coupled to the control terminal of the switch S1. The positive terminal of the current source I1 is coupled to the control terminal of the synchronous rectifier 10, the negative terminal of the current source I1 is coupled to the first terminal of the switch S1, and the other terminal of the switch S1 is grounded. In another embodiment, the positions of the current source I1 and the switch S1 can be swapped. In one embodiment, the reference ground of the control circuit 30 is coupled to the source terminal of the synchronous rectifier, which includes a field-effect transistor. In one embodiment, the synchronous rectifier is coupled between the output terminal of the flyback voltage conversion circuit and the secondary winding. The reference ground of the secondary control circuit 30 is the source terminal of the upper transistor of the synchronous rectifier, which is not shared with the reference ground of the secondary circuit. In another embodiment, the synchronous rectifier is used as the bottom tube and is coupled to the reference ground of the secondary circuit. The reference ground of the control circuit 30 and the reference ground of the secondary circuit are commonly grounded. The source terminal of the synchronous rectifier may also not be coupled to the reference ground of the control circuit 30.

[0033] The control circuit may further include a synchronous control circuit 33, which is coupled to the control terminal of the synchronous rectifier 10 through the drive circuit 34 to control the on and off of the synchronous rectifier 10. In the illustrated embodiment, the synchronous control circuit 33 has an input terminal and an output terminal. The input terminal of the synchronous control circuit 33 is coupled to the detection signal Vds representing the voltage difference across the synchronous rectifier, the output terminal of the synchronous control circuit 33 is coupled to the control terminal of the synchronous rectifier 10, and the output terminal of the synchronous control circuit 33 is coupled to the control terminal of the synchronous rectifier 10 and the first input terminal of the timing circuit 32. When the voltage difference Vds across the synchronous rectifier is less than a first threshold value Vref1, the synchronous rectifier 10 is turned on. When the voltage difference Vds across the synchronous rectifier is greater than a second threshold value Vref2, the synchronous rectifier is turned off. Specifically, in the illustrated embodiment, the synchronous control circuit 33 includes a first comparison circuit C1, a second comparison circuit C2, and a trigger circuit U3. The first comparison circuit C1 receives a first threshold signal Vref1 at its non-inverting input and a detection signal Vds representing the voltage difference across the synchronous rectifier at its inverting input. The second comparison circuit C2 receives the detection signal Vds at its non-inverting input and a second threshold signal Vref2 at its inverting input. A first input (S) of the trigger circuit U3 is coupled to the output of the first comparison circuit C1, a second input (R) of the trigger circuit U3 is coupled to the output of the second comparison circuit C2, and the output of the trigger circuit U3 is coupled to the control terminal of the synchronous rectifier 10. The second threshold signal Vref2 is greater than the first threshold signal Vref1. When the detection signal Vds is less than the first threshold signal Vref1, the trigger circuit U3 is set and outputs a pulse width modulation (PWM) signal SR of a first level, which turns on the synchronous rectifier 10. When the detection signal Vds is greater than the second threshold signal Vref2, the trigger circuit U3 is reset and outputs a second-level PWM signal SR for turning off the synchronous rectifier 10. The control circuit 30 further includes a drive circuit 34. The input terminal of the drive circuit 34 is coupled to the output terminal of the synchronous control circuit 33, that is, receives the pulse width modulation (PWM) signal SR output by the trigger circuit U3. The output terminal of the drive circuit 34 is coupled to the control terminal of the synchronous rectifier 10. When the pulse width modulation signal SR is in a first state, such as a high level, it is used to turn on the synchronous rectifier 10. When the pulse width modulation signal SR is in a second state, such as a low level, it is used to turn off the synchronous rectifier 10. The drive circuit 34 amplifies the signal SR and provides a drive signal suitable for driving the synchronous rectifier 10, which is used to control the conduction and shutdown of the synchronous rectifier 10.The conduction control circuit may further include an AND gate and a primary switch conduction detection circuit, wherein a first input terminal of the AND gate is coupled to the output terminal of the first comparison circuit C1, a second input terminal of the AND gate is coupled to the output terminal of the primary switch conduction detection circuit, and the output terminal of the AND gate is coupled to the set input terminal of the trigger circuit U3. When the primary switch conduction detection circuit detects that the primary switch is turned on, when the voltage difference Vds across the synchronous rectifier tube is less than the first threshold value Vref1, the conduction of the synchronous rectifier tube 10 is controlled.

[0034] The timing circuit 32 begins timing when the synchronous rectifier 10 turns on, and after a first time interval T1, outputs a valid signal to turn on the switch S1, causing the current of the current source I1 to flow out of the control terminal node of the synchronous rectifier 10, thereby lowering the voltage at the control terminal of the synchronous rectifier 10. In one embodiment, the input of the timing circuit 32 receives the PWM signal SR output by the trigger circuit U3. When the signal SR changes from a low level to a high level, the timing circuit begins timing. After the first time interval, the output signal of the timing circuit changes from an invalid signal to a valid signal, such as from a low level to a high level, to turn on the switch S1. In another embodiment, the input of the timing circuit 32 is coupled to the output of the first comparison circuit C1. When the output signal of the comparison circuit C1 changes from a low level to a high level, the timing circuit begins timing. In yet another embodiment, the output of the timing circuit 32 is coupled to the output of the AND gate.

[0035] continue Figure 3 As described above, the control circuit 30 further includes a time interval adjustment circuit 31. In the illustrated embodiment, a first input terminal of the time interval adjustment circuit 31 is coupled to the output terminal of the synchronous control circuit 33 for receiving a signal SR. A second input terminal of the time interval adjustment circuit 31 is coupled to the output terminal of the timing circuit 32. The output terminal of the time interval adjustment circuit 31 is coupled to the second input terminal of the timing circuit 32 for setting a first time interval T1 to be timed by the timing circuit 32. In one embodiment, the time interval adjustment circuit 31 detects a second time interval from when the switch S1 turns on to when the synchronous rectifier 10 turns off, adjusts the first time interval T1 based on the second time interval, and outputs a signal T1 to the timing circuit 32 for controlling the first time interval, which is used to adjust the length of the first time interval of the next cycle of the timing circuit 32. In this way, the timing circuit begins timing when it detects that the synchronous rectifier 10 is turned on based on the new first time interval signal, and outputs a valid signal to turn on the switch S1 when the timing reaches the first time interval T1.

[0036] The following combination Figure 3 、 Figure 4 and Figure 5 The example is used to illustrate the first time interval adjustment method.

[0037] Figure 4The figure shows a schematic flow diagram of a method for adjusting a first time interval T1 according to an embodiment of the present invention. First, a time parameter T0 is set inside the system. When it is detected that the synchronous rectifier tube (MOSFET) 10 is turned on, the timing starts. When the timing reaches the end of the first time interval T1, the switch S1 is turned on, and the current source draws current from the MOSFET gate to reduce the gate voltage. When the drain-source voltage Vds is greater than the second threshold Vref2, the MOSFET is turned off. The timing circuit 32 further detects a second time interval T2 from the turn-on of the switch S1 to the turn-off of the MOSFET, that is, the time difference from the turn-on of the switch S1 to the turn-off of the MOSFET. It is judged whether the second time interval T2 is greater than a preset parameter T0. If T2 is greater than T0, the first time interval T1 is increased; if T2 is less than T0, the first time interval T1 is decreased.

[0038] In another embodiment, the preset time parameters include a first parameter T01 and a second parameter T02, where T01 < T02. When T2 > T02, T1 is increased. When T2 < T01, T1 is decreased. If T01 < T2 < T02, T1 remains unchanged.

[0039] Figure 5 The figure shows a waveform schematic diagram according to an embodiment of the present invention. Referring to Figure 3 , the signals from top to bottom are the voltage difference across the synchronous rectifier tube, that is, Figure 3In the illustrated embodiment, the drain-source voltage Vds, the control signal SR for controlling the synchronous rectifier, the control signal CT for controlling the switch S1, and the voltage Gate at the control terminal of the synchronous rectifier 10 are shown. At time ta, the voltage difference signal Vds across the synchronous rectifier is less than the first threshold signal Vref1, and the control signal SR changes to an effective value (shown as a high level) to turn on the synchronous rectifier. At this point, the timing circuit 32 begins timing. After the first time interval T1, at time point tb, the current source control signal CT changes to an effective value (high level) to turn on the switch S1 for a period of time T3. At this point, the current of the current source I1 flows out of the synchronous rectifier control terminal node, and the synchronous rectifier gate voltage Gate decreases. When the freewheeling current becomes zero or the Vds voltage reverses, Vds is greater than the second threshold Vref2. At time tc, the signal SR changes from a high level to a low level, and the control signal Gate output by the drive circuit is pulled down to ground potential, turning off the synchronous rectifier. In continuous current mode control, the reduced gate voltage allows the gate voltage to drop below the MOSFET turn-on threshold more quickly when Vds rises and reaches the third threshold Vref3, preventing the synchronous rectifier and the primary switch from being turned on simultaneously. In discontinuous current mode control, the reduced gate voltage increases the on-resistance, which is used to turn off the synchronous rectifier at a lower freewheeling current, thereby improving the efficiency of the synchronous rectifier. The timing circuit obtains a second time interval T2 from the time switch S1 is turned on to the time the MOSFET is turned off, and adjusts or maintains the first time interval T1 based on time interval T2. In one embodiment, the method for adjusting or maintaining the first time interval T1 based on time interval T2 includes comparing time duration T2 with a preset time value. When time duration T2 is greater than a preset time value, time duration T1 is increased; when time duration T2 is less than a preset time value, time duration T1 is decreased. In one embodiment, the preset time value is externally adjustable, such as by adjusting the value of an external resistor or capacitor. Switch S1 is turned off after being turned on for the third time interval T3. The on-time duration T3 of the switch S1 may be a preset time duration, or may be controlled according to a detected condition, such as being controlled according to the MOSFET gate voltage.

[0040] Figure 6 FIG. 2 shows a waveform diagram of another embodiment of the present invention. After the timing circuit counts T1 and outputs a valid signal, the switch S1 is intermittently turned on. Figure 6 As shown. The intermittent conduction can be preset with a fixed duty cycle, and the intermittent conduction duration T2 can be a preset value, or can be controlled according to detection conditions, such as by controlling according to the MOSFET gate voltage. In one embodiment, see Figure 2 or Figure 3The control circuit further includes a signal generating circuit, which is coupled between the timing circuit and the switch S1. The input end of the signal generating circuit is coupled to the output end of the timing circuit, and the output end of the signal generating circuit is coupled to the control end of the switch S1. The signal generating circuit is used to generate a high and low level alternating signal for intermittently turning on the switch S1.

[0041] Figure 7 FIG. 1 shows a circuit diagram of a control circuit according to an embodiment of the present invention. The control circuit may include the synchronous rectifier tube 10 itself. Figure 3 compared to, Figure 7 The illustrated embodiment further includes a comparison circuit 73 and a trigger circuit 74. The first input terminal (non-inverting input terminal) of the comparison circuit 73 is coupled to the third threshold signal Vref3, the second input terminal (inverting input terminal) of the comparison circuit is coupled to the control terminal of the synchronous rectifier 10 for receiving the control signal Gate, and the output terminal of the comparison circuit 73 is coupled to the control terminal of the switch S1 through the trigger circuit 74. Specifically, the output terminal of the comparison circuit 73 is coupled to the reset input terminal of the trigger circuit 74, the output terminal of the timing circuit 72 is coupled to the set input terminal of the trigger circuit 74, and the output terminal of the trigger circuit 74 is coupled to the control terminal of the switch S1. The comparison circuit 73 is used to compare the voltage Gate at the control terminal of the synchronous rectifier with the third threshold value Vref3. When the signal Gate is less than the threshold signal Vref3, the trigger circuit 74 is reset and the switch S1 is turned off. Of course, the trigger circuit 74 can also be replaced by other circuits.

[0042] Figure 8 FIG. 1 shows a waveform diagram according to an embodiment of the present invention. Figure 7 At time ta, when the synchronous rectifier 10 turns on, the timing circuit begins timing. After the first time interval T1, at time tb, when the output signal of the timing circuit 72 transitions from a low level to a high level, the trigger circuit 74 is set to output a high-level signal, signal CT becomes high, and switch S1 turns on. Simultaneously, the timing circuit 72 begins timing again. At time td, when the gate voltage Gate transitions from being higher than the third threshold Vref3 to being lower than the third threshold Vref3, the output signal of the comparison circuit 73 becomes high, the trigger circuit 74 is reset, signal CT becomes low, and switch S1 turns off. When the drain-source voltage Vds is greater than the second threshold Vref2, at time tc, signal SR is set low, and the synchronous rectifier turns off. The timing circuit obtains the duration T2 from tb to tc and adjusts the first time interval T1 based on the second time interval T2.

[0043] Figure 9A schematic diagram of a flyback voltage conversion circuit according to an embodiment of the present invention is shown. The flyback voltage conversion circuit includes a primary circuit and a secondary circuit. The primary circuit is coupled to the primary winding of a transformer T and includes a primary switch Q. The secondary circuit is coupled to the secondary winding of the transformer T and includes a synchronous rectifier 10 and a control circuit 90. A first terminal of the control circuit 90 is coupled to a first terminal D of the synchronous rectifier 10, another terminal of the control circuit 90 is coupled to a second terminal S of the synchronous rectifier 10, and an output terminal of the control circuit is coupled to a control terminal G of the synchronous rectifier 10. The control circuit 90 can be any of the control circuits described in this specific embodiment.

[0044] In one embodiment, the control circuit 90 is fabricated on the same semiconductor substrate as the semiconductor wafer.

[0045] In another embodiment, the control circuit includes the synchronous rectifier itself.

[0046] In one embodiment, the control circuit and the synchronous rectifier are packaged in the same package to form a semiconductor electronic package.

[0047] In another embodiment, the controllable current source may include a voltage-controlled current source, and the voltage at the gate terminal of the synchronous rectifier is controlled by controlling the magnitude of the current source.

[0048] Figure 10 A flow chart of a control method for controlling a synchronous rectifier according to an embodiment of the present invention is shown. The method includes: in step 1001, coupling a current source to the control terminal of the synchronous rectifier. In one embodiment, the synchronous rectifier includes a MOSFET tube, and the current source is coupled to the gate of the MOSFET. In step 1002, detecting and obtaining the turn-on time point of the synchronous rectifier. In one embodiment, when the drain-source voltage of the synchronous rectifier is less than a first threshold, the turn-on time point of the synchronous rectifier is obtained. In step 1003, when the synchronous rectifier is turned on, timing is started, and after a first time interval T1, the current source is turned on, and the current source causes current to flow out from the control terminal node. In one embodiment, the method for turning on the current source includes connecting the current source in series with a switch, and turning on the switch after the first time interval T1. In one embodiment, the method further includes obtaining a second time interval between turning on the switch and turning off the synchronous rectifier, and adjusting the first time interval according to the second time interval. In one embodiment, the method for adjusting the first time interval T1 according to the second time interval T2 includes comparing the duration T2 with a preset time value, and increasing the duration T1 when the duration T2 is greater than the preset time value; and decreasing the duration T1 when the duration T2 is less than the preset time value.

[0049] Those skilled in the art should know that the logic controls such as "high level" and "low level", "set" and "reset", "AND gate" and "OR gate", "in-phase" and "inverted" in the above logic controls can be interchanged or changed with each other, and the same functions or purposes as the above embodiments can be achieved by adjusting subsequent logic controls.

[0050] The description and application of the present invention here are illustrative and are not intended to limit the scope of the present invention to the above-mentioned embodiments. The relevant descriptions of the effects or advantages involved in the specification may not be reflected in the actual experimental examples due to the uncertainty of specific condition parameters or other factors, and the relevant descriptions of the effects or advantages are not used to limit the scope of the invention. Variations and changes to the embodiments disclosed here are possible, and the replacement of the embodiments and various equivalent components are well known to those of ordinary skill in the art. It should be clear to those skilled in the art that, without departing from the spirit or essential characteristics of the present invention, the present invention can be implemented in other forms, structures, arrangements, proportions, and with other components, materials and parts. Without departing from the scope and spirit of the present invention, other variations and changes can be made to the embodiments disclosed here.

Claims

1. A control circuit for controlling a synchronous rectifier, characterized in that: The control circuit comprises: A controllable current source, configured to couple to a control terminal of the synchronous rectifier; a timing circuit coupled to a controllable current source, the timing circuit being configured to start timing when the synchronous rectifier is turned on and outputting a valid signal after a first time interval for controlling the controllable current source to cause current to flow out of a control terminal node of the synchronous rectifier, the controllable current source comprising a switch and a current source connected in series, wherein an output terminal of the timing circuit is coupled to a control terminal of the switch; a synchronous control circuit coupled to the synchronous rectifier tube, for turning on the synchronous rectifier tube when the voltage difference across the synchronous rectifier tube is less than a first threshold, and for turning off the synchronous rectifier tube when the voltage difference across the synchronous rectifier tube is greater than a second threshold; A time interval adjustment circuit, wherein the time interval adjustment circuit detects a second time interval from when the switch is turned on to when the synchronous rectifier is turned off, and adjusts the first time interval according to the second time interval, wherein when the second time interval is less than a preset value, the first time interval is shortened; when the second time interval is greater than the preset value, the first time interval is increased.

2. The control circuit according to claim 1, wherein: The timing circuit outputs an invalid signal for turning off the switch after a third time interval after turning on the switch.

3. The control circuit according to claim 1, wherein: The control circuit further includes a pulse width signal generating circuit coupled between the output end of the timing circuit and the control end of the switch. When the timing circuit starts to output a valid signal, the pulse width signal generating circuit generates a pulse width signal for intermittently turning on the switch.

4. The control circuit according to any one of claims 1 to 3, characterized in that: The control circuit further includes a comparison circuit, which is used to compare the control terminal voltage of the synchronous rectifier with a third threshold value, and turn off the switch when the control terminal voltage is less than the third threshold value.

5. A flyback voltage conversion circuit, comprising a primary circuit and a secondary circuit, characterized in that: The secondary circuit includes a synchronous rectifier and the control circuit according to any one of claims 1 to 3.

6. A control method for controlling a synchronous rectifier, comprising: When the voltage difference across the synchronous rectifier is less than a first threshold, the synchronous rectifier is turned on; when the voltage difference across the synchronous rectifier is greater than a second threshold, the synchronous rectifier is turned off; A controllable current source is coupled to the control terminal of the synchronous rectifier, wherein the controllable current source includes a switch and a current source connected in series; Detecting the conduction time point of the synchronous rectifier; After a preset first time interval when the synchronous rectifier is turned on, the current in the controllable current source is controlled to flow out from the control end node of the synchronous rectifier; a second time interval from when the switch is turned on to when the synchronous rectifier is turned off is obtained, and the first time interval is adjusted according to the second time interval, wherein when the second time interval is less than the preset value, the first time interval is shortened; when the second time interval is greater than the preset value, the first time interval is increased.

Images