Configurable Data Refresh from Volatile Memory to Non-Volatile Memory

Abstract

A device is provided, the device comprising: a first storage device for storing one or more parameters, a second storage device for storing data, and a third storage device. The device may further comprise a first circuit for detecting a triggering event. The device may further comprise a second circuit for causing, in response to the triggering event, data to be transferred from the second storage device to the third storage device, while one or more components of the device are operative in accordance with the one or more parameters.

Description

[0001] Priority Claim

[0002] This application claims priority to U.S. Patent Application No. 15 / 856,780, filed on December 28, 2017, entitled "Configurable Data Refresh from Volatile Memory to Non-Volatile Memory", which is hereby incorporated by reference in its entirety for all purposes. BACKGROUND OF THE INVENTION

[0003] When a volatile memory is not powered for at least a threshold period of time and the data in the memory is not refreshed for at least the threshold period of time, the data stored in the volatile memory may be lost. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Embodiments of the present disclosure will be more fully understood from the detailed description given below and the accompanying drawings of various embodiments of the disclosure. However, the detailed description and the drawings should not be used to limit the present disclosure to a specific embodiment, but are for illustration and understanding only.

[0005] Figure 1 An apparatus according to some embodiments is shown that, in response to detecting a trigger event, transfers data from a first storage device (e.g., a volatile storage device) to a second storage device (e.g., a non-volatile storage device) in a configurable manner.

[0006] Figure 2 A flowchart according to some embodiments is shown that depicts a method for operating an apparatus to transfer data from a first storage device to a second storage device in a configurable manner in response to detecting a trigger event.

[0007] Figures 3 - 5 Shown according to some embodiments is Figure 1 various operations of the apparatus.

[0008] Figure 6 A computing device, smart device, computer system, or SoC (system-on-chip) according to some embodiments is shown, wherein the computing device can transfer data from a first storage device (e.g., a volatile storage device) to a second storage device (e.g., a non-volatile storage device) in a configurable manner in response to detecting a trigger event. DETAILED DESCRIPTION

[0009] For example, in addition to power from an alternating current (AC) source, the device may also have a backup battery and / or a backup power source such as a supercapacitor. Trigger events in the device may include loss of power from the AC source, may include errors in the device (e.g., severe hardware errors, severe software errors, system crashes, etc.), and / or may include any suitable event that may require the device to be shut down or reset. In response to detecting a trigger event, it may be useful to transfer data from the volatile storage device of the device to the non-volatile storage device (e.g., so that the data is not lost or corrupted in the volatile storage device due to possible power unavailability, possible device shutdown, etc.).

[0010] In one example, not all components in the device may be available for data transfer while the data is being transferred from the volatile storage device to the non-volatile storage device. In another example, if data transfer is required, for example, due to loss of AC power, the power available for such data transfer may be limited (e.g., from the battery and / or backup power source). The power available for such data transfer may be based on the battery capacity, the remaining charge of the battery, the aging of the battery, and / or other factors. In some embodiments, the operating parameters of various components may be configurable while the data is being transferred.

[0011] Merely as an example, if relatively more power is available, the data transfer can be performed in less time without much concern for the power used for data transfer. On the other hand, if the available power is limited or relatively less, the data transfer can be performed at a slow speed, for example, to save the power required for data transfer. Various embodiments of the present disclosure discuss configuring the device particularly when transferring data from the volatile storage device to the non-volatile storage device in response to a trigger event, for example, to balance the power consumed in the transfer, the transfer speed, etc. Other technical effects will be readily understood from the various embodiments and the drawings.

[0012] In the following description, many details are discussed to provide a more thorough explanation of the embodiments of the present disclosure. However, it will be readily understood by those skilled in the art that the embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form rather than in detail to avoid obscuring the embodiments of the present disclosure.

[0013] Note that, in the corresponding drawings of the embodiments, signals are represented by lines. Some lines may be thicker to indicate more constituent signal paths; and / or some lines have arrows at one or more ends to indicate the main information flow direction. Such indications are not intended to be limiting. Instead, these lines are used in conjunction with one or more exemplary embodiments to facilitate easier understanding of the circuit or logic unit. As indicated by design requirements or preferences, any represented signal may actually include one or more signals that can propagate in either direction and can be implemented with any suitable type of signal scheme.

[0014] Throughout the specification and in the claims, the term "connected" refers to a direct connection between the objects being connected without any intermediate device, such as an electrical, mechanical, or magnetic connection. The term "coupled" refers to a direct or indirect connection between the objects being connected (e.g., a direct electrical, mechanical, or magnetic connection), or an indirect connection through one or more passive or active intermediate devices. The term "circuit" or "module" may refer to one or more passive and / or active components arranged to cooperate with each other to provide a desired function. The term "signal" may refer to at least one current signal, voltage signal, magnetic signal, or data / clock signal. The meanings of "a", "an", and "the" include plural forms. The meaning of "in" includes "in" and "on". The terms "substantially", "close to", "approximate", "near", and "about" generally refer to within + / - 10% of the target value.

[0015] Unless otherwise specified, the use of ordinal adjectives "first", "second", and "third", etc. to describe a common object only indicates that different instances of the same object are being referred to, and is not intended to imply that the objects so described must exist in a given order in terms of time, space, rank, or any other manner.

[0016] For the purposes of this disclosure, the phrases "A and / or B" and "A or B" mean (A), (B), or (A and B). For the purposes of this disclosure, the phrase "A, B, and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C). The terms "left", "right", "front", "rear", "top", "bottom", "above", "below", etc. (if any) are used in the specification and claims for descriptive purposes and not necessarily to describe a permanent relative position.

[0017] Figure 1FIG. 0 shows an apparatus 100 according to some embodiments that, in response to detecting a trigger event, transfers data from a first storage device 120 (e.g., volatile memory) to a second storage device 124 (e.g., non-volatile storage device) in a configurable manner. In some embodiments, apparatus 100 includes storage devices 120 and 124. In some other embodiments (and at least partially contrary to the illustration of Figure 1 ), storage device 124 may be external to apparatus 100, but may be plugged into, or coupled to, apparatus 100 (e.g., storage device 124 may be an external flash memory, an external hard drive, etc.).

[0018] In some embodiments, storage device 120 may be volatile memory, e.g., random access memory (RAM), dynamic random access memory (DRAM), etc. By way of example only, storage device 120 may be implemented as one or more dual in-line memory modules (DIMMs).

[0019] Storage device 120 may require power to maintain the stored information. Storage device 120 may retain its contents when powered on, but when power is interrupted, the stored data may be lost quickly. In one example, storage device 120 may be electrically refreshed at periodic (or aperiodic) intervals to retain data.

[0020] In one example, a storage controller ( Figure 1 not shown) associated with storage device 120 may cause a refresh of the data in storage device 120 (e.g., during normal or regular operation of storage device 120). In one example, storage device 120 may also operate in a self-refresh state. When storage device 120 is in the self-refresh state, storage device 120 may refresh the data by itself, e.g., without any intervention or assistance from a memory controller. Thus, when storage device 120 is in the self-refresh state, the memory controller may be powered off, in a low power mode, in a power-gated and / or clock-gated state, disabled, undergo a reset cycle, etc.

[0021] Storage device 124 may be non-volatile memory or a non-volatile storage device. Examples of such non-volatile storage device 124 may include read only memory (ROM), flash memory, flash drives, ferroelectric RAM, magnetic computer storage devices (e.g., hard disk drives), solid state drives, optical discs, external hard drives, etc. Storage device 124 may not require continuous power to maintain the stored information. Storage device 120 may retain its contents when powered off.

[0022] In some embodiments, device 100 includes another storage device 128. In one example, storage device 128 may include one or more registers, although in some other examples, storage device 128 may be part of one of storage devices 120 or 124. In one example, storage device 128 stores one or more parameters 129. In some embodiments, data may be transferred from storage device 120 to storage device 124 according to one or more parameters 129 (e.g., after a trigger event is detected), as will be discussed in further detail later herein.

[0023] In some embodiments, device 100 may include a boot up circuit 104 (also referred to as circuit 104). Circuit 104 may facilitate the boot up process of device 100. For example, when device 100 is powered on or turned on (or reset after a power down event or after an error condition), circuit 104 may be initially powered on. Then, circuit 104 may initialize and start various other components of device 100 (e.g., one or more processors). Thus, circuit 104 may be used for hardware initialization during the boot up process. In one example, circuit 104 may include, for example, a Platform Controller Hub (PCH) that may be present in a chipset architecture developed by Intel Corporation. In one example, circuit 104 may include the Basic Input / Output System (BIOS) of device 100.

[0024] In some embodiments, device 100 includes one or more processors 108. For example, processor 108 may include one or more physical devices such as a microprocessor, an application processor, a microcontroller, a programmable logic device, or other processing means. Processing operations performed by processor 108 may include the execution of an operating platform or operating system on which applications and / or device functions of device 100 may be executed. Processing operations may also include: operations related to I / O (input / output) with a human user or other device, operations related to power management, operations related to connecting device 100 to another device, operations related to audio I / O and / or display I / O, or any other suitable operations of device 100. In one example, as will be discussed in further detail herein, processing operations performed by processor 108 may include facilitating data transfer between storage devices 120 and 124. In some embodiments, processor 108 may include one or more multi-core processors. For example, processor 108 may have multiple processing cores.

[0025] In some embodiments, device 100 may include cache 112. Cache 112 may include a level 1 (L1) cache, a level 2 (L2) cache, etc. In one example, processor 108 may access data from cache 112, temporarily store data in cache 112, and so on.

[0026] In some embodiments, device 100 may include trigger event detection circuit 116 (also referred to as circuit 116). Circuit 116 may detect one or more trigger events in device 100. By way of example only, trigger events may include the loss of power from an AC source (e.g., power from the AC source may be supplied via an adapter and power circuit 136). In another example, a trigger event may include the charge level of battery 140 powering device 100 depleting below a threshold (e.g., AC power is not available from power circuit 136). In yet another example, a trigger event may include an error in device 100 (e.g., a severe hardware error, a severe software error, a system crash, etc.), which may require shutting down or resetting device 100. In one example, a trigger event may include any suitable event that may require shutting down or resetting device 100, e.g., it may be necessary to shut down or reset device 100 immediately or nearly immediately, without sufficient power and / or opportunity to gracefully and systematically shut down (or reset) device 100.

[0027] In some embodiments, in response to detecting a trigger event, one or more processing cores of processor 108 (or another suitable component of device 100) may transfer data from volatile storage device 120 to non-volatile storage device 124 (e.g., to prevent data loss in volatile storage device 120 due to an impending shutdown or reset of device 100).

[0028] In some embodiments, device 100 further includes configuration circuit 118 (also referred to as circuit 118). Circuit 118 may store and / or configure parameters 129. For example, data may be transferred from storage device 120 to storage device 124 according to one or more parameters 129 (e.g., in response to detecting a trigger event). In one example, circuit 118 may include the BIOS of device 100, the baseboard management controller (BMC) of device 100, the innovation engine (IE) of device 100, etc.

[0029] In some embodiments, device 100 may further include system configuration circuit 132 (also referred to as circuit 132). By way of example only, circuit 132 may include the PCH of device 100, a power management controller (PMC), a convergence security and manageability engine (CSME), and / or another suitable component of device 100.

[0030] For example, at least when data is being transferred from storage device 120 to storage device 124 upon detection of a trigger event, circuit 132 may configure one or more components of device 100. For example, circuit 132 may control the states of various processing cores of a processor. For example, circuit 132 may control the operating voltage and / or operating frequency of individual processing cores of processor 108, selectively power-gate and / or clock-gate one or more processing cores of processor 108, selectively power-gate and / or clock-gate one or more other components of device 100, selectively disable one or more components of the device, and so on. For example, at least when data is being transferred from storage device 120 to storage device 124 upon detection of a trigger event, circuit 132 may also select the number of processing cores in processor 108 that are operable or operating in a normal state (e.g., S0 state), and the number of processing cores in processor 108 that are to be disabled or inoperable (e.g., in a low-power state, off state, power-gated and / or clock-gated state, etc.).

[0031] In some embodiments, device 100 may include multiple IP (intellectual property) blocks. An IP block may be a reusable unit of logic, cell, or integrated circuit layout design, which may be the intellectual property of another party. Examples of IP blocks may include I / O circuits (e.g., universal serial bus or USB circuits), serializer / deserializer (SerDes) circuits, phase-locked loop (PLL) circuits, physical layer (PHY) circuits, and so on. In one example, for example, at least when data is being transferred from storage device 120 to storage device 124 upon detection of a trigger event, circuit 132 may also make one or more IP blocks operable or working, and make one or more other IP blocks inoperable (e.g., in a low-power state, off state, power-gated and / or clock-gated state, etc.).

[0032] In some embodiments, circuit 132 may configure one or more components of device 100 based on one or more parameters 129. For example, when transferring data from storage device 120 to storage device 124 (e.g., in response to detection of a trigger event), circuit 132 may configure one or more components of device 100 based on one or more parameters 129.

[0033] In some embodiments, one or more parameters 129 may indicate, for example, the mode in which device 100 operates when data is being transferred from storage device 120 to storage device 124 in response to detecting a trigger event. By way of example only, when data is being transferred from storage device 120 to storage device 124 in response to detecting a trigger event, device 100 may operate in one of a base mode, an aggressive power mode, an aggressive performance mode, or another suitable mode.

[0034] In base mode, when data is being transferred from storage device 120 to storage device 124 in response to detecting a trigger event, circuit 132 may enable one or more components (e.g., one or more processing cores, components, IP blocks, etc.) while disabling another or more components (e.g., power gating and / or clock gating them). For example, one or more components may be used or associated with the transfer of data from storage device 120 to storage device 124, and thus, circuit 132 may enable the one or more components. For example, if device 100 is operating in base mode, the voltage and / or frequency of one or more components may be maintained at their respective normal or typical levels. Certain components may not be required for transferring data from storage device 120 to storage device 124, and these components may be, for example, network interfaces, display I / O, audio I / O, etc., and these components may be disabled.

[0035] In aggressive power mode, when data is being transferred from storage device 120 to storage device 124 in response to detecting a trigger event, circuit 132 may enable one or more components (e.g., one or more processing cores, components, IP blocks, etc.) while disabling another or more components (e.g., power gating and / or clock gating them). For example, one or more components may be used or associated with the transfer of data from storage device 120 to storage device 124, and thus, circuit 132 may enable the one or more components. However, unlike base mode (e.g., in base mode, the voltage and / or frequency of one or more components is maintained at its respective normal or typical level), in aggressive power mode, the voltage and / or frequency of one or more components may be maintained at a nominal level (e.g., the minimum level necessary to maintain operation of these components).

[0036] In the aggressive performance mode, when data is being transferred from storage device 120 to storage device 124 in response to detecting a trigger event, circuit 132 can make one or more components operable while disabling another or more components. However (e.g., different from the basic mode or aggressive power mode), in the aggressive performance mode, the voltage and / or frequency of one or more components can be maintained at a level that results in higher performance of these components (e.g., such that the data transfer rate from storage device 120 to storage device 124 is faster).

[0037] By way of example only, assume that a component (e.g., a processing core) in the first one or more components can operate within a voltage range of 5 volts (V) to 6V. For example, this component can typically or normally operate within a voltage range of 5.4V to 5.6V. The nominal voltage or minimum voltage to operate this component can be 5V (although e.g., the performance of the component at 5V is slower than in the range of 5.4V - 5.6V). The maximum voltage to operate this component can be 6V. Also assume that this component helps transfer data from storage device 120 to storage device 124. In one example, in the basic mode, this component can be operated within the range of 5.4V–5.6V, which may result in a medium speed of data transfer from storage device 120 to storage device 124 and may consume medium power. On the other hand, in the aggressive power mode, this component can be operated at 5V, which may result in a relatively low speed of data transfer from storage device 120 to storage device 124 but may consume low power. In the aggressive performance mode, this component can be operated at 6V, which may result in a relatively high speed of data transfer from storage device 120 to storage device 124 and may consume high power.

[0038] In some embodiments, the multiple components (e.g., processing cores) that are operable (e.g., when data is being transferred from storage device 120 to storage device 124 in response to detecting a trigger event) can also be based on the mode. For example, in the aggressive performance mode, a larger number of processing cores can be made operable, resulting in faster data transfer. Conversely, in the aggressive power mode, a smaller number of processing cores can be made operable, resulting in lower data transfer. In the basic mode, an intermediate number of processing cores can be made operable, resulting in medium data transfer.

[0039] Thus, the aggressive performance mode can facilitate faster data transfer but also consume higher power. On the other hand, the aggressive power mode can facilitate slower data transfer and can consume lower power. The power consumption and data transfer speed of the basic mode can be between the aggressive performance mode and the aggressive power mode.

[0040] In some embodiments, the mode that is activated (e.g., when data is being transferred from storage device 120 to storage device 124 in response to detecting a trigger event) can be a configurable parameter. For example, parameter 129 can indicate the mode that is to be activated.

[0041] In one example, the mode to be activated can be set by a user of device 100, the manufacturer of device 100, etc. In another example, the mode to be activated can be based on the available battery capacity of battery 140 (e.g., when the trigger event is loss of AC power), the time required to charge battery 140, the type of battery 140, the type and / or rating of a supercapacitor that can be used to power the data transfer from storage device 120 to storage device 124 (e.g., in place of or in addition to power from battery 140), and so on. For example, if the charge level of the battery is high (e.g., above a threshold), then an aggressive performance mode can be activated; and if the charge level of the battery is low, then an aggressive power mode or a basic mode can be activated.

[0042] In another example, the mode to be activated can be based on the amount of data to be transferred from storage device 120 to storage device 124. For example, if a large amount of data is to be transferred (e.g., greater than a threshold), then an aggressive performance mode can be activated; otherwise, an aggressive power mode or a basic mode can be activated.

[0043] In yet another example, the mode to be activated can be based on the type of trigger event. For example, if the trigger event is due to an error in the device and the device can still use AC power, then an aggressive performance mode (or a basic mode) can be activated. On the other hand, if the trigger event is due to loss of AC power received via power circuit 136 (and potentially the remaining battery charge is less than a threshold), then an aggressive power mode (or a basic mode) can be activated.

[0044] Although three modes (e.g., a basic mode, an aggressive power mode, and an aggressive performance mode) are discussed above herein, those skilled in the art can also envision any other suitable modes based on the teachings of this disclosure. In some examples, a combination of two or more modes can be used. For example, a first processing core can operate at the highest voltage and / or frequency level (e.g., according to the aggressive performance mode), while a second processing core can operate at a normal or typical voltage and / or frequency level (e.g., according to the basic mode).

[0045] In some embodiments, in addition to or instead of activating a mode, parameter 129 can specify operating parameters for a single component, or a group of components, or an individual component of device 100 (e.g., to operate when data is being transferred from storage device 120 to storage device 124 in response to detecting a trigger event).

[0046] Figure 2 FIG. 2 depicts a flow chart according to some embodiments that depicts a method 200 for operating a device (e.g., device 100) in a configurable manner to transfer data from a first storage device 120 (e.g., volatile memory) to a second storage device 124 (e.g., non-volatile storage device) in response to detecting a trigger event. Figures 3 - 5 illustrates various operations of device 100 according to some embodiments. Thus, relative to Figure 1 one or more of Figures 3 - 5 discussed are some operations of method 200. Figure 2

[0047] Referring again to Figure 2 although the blocks in the flow chart are shown in a particular order, the order of the actions can be modified. Thus, the illustrated embodiments can be performed in a different order and some actions / blocks can be performed in parallel. According to certain embodiments, Figure 2 some of the blocks and / or operations listed in Figure 2 can be optional. The numbering of the presented blocks is for clarity and is not intended to prescribe the order of operations in which the various blocks must occur.

[0048] At 204 of method 200, device 100 can operate in a normal operating state. For example, device 100 can operate according to the S0 state of the Advanced Configuration and Power Interface (ACPI) specification. In some embodiments, device 100 (e.g., circuit 118) can configure parameter 129 and store it in storage device 128. In some embodiments, device 100 (e.g., circuit 118) can enable data transfer from storage device 120 to storage device 124 (e.g., enable parameter 129).

[0049] At 208, a trigger event can be detected. For example, as Figure 3 shown in FIG. 3, circuit 116 can detect trigger event 303. As discussed previously herein, the trigger event can include one or more of the following: loss of power from the AC source, an error in device 100 (e.g., a severe hardware error, a severe software error, a system crash, etc.), or other suitable event that may require shutting down or resetting device 100.

[0050] In some embodiments, if the trigger event 303 at 208 is a loss of power from the AC source, power from battery 140, power from a backup power source (e.g., a supercapacitor of device 100, power from an uninterruptible power supply or UPS, etc.) can be used to perform various subsequent operations of method 200.

[0051] ​At 212, in response to detecting a trigger event 303, data 305b can be transferred from one or more components to the storage device 120. For example, as Figure 3 shown, data 305b can be transferred from the processor 108 of the device 100, the cache 112, one or more registers, and / or one or more other components of the device 100. In one example, data 305a can be stored in the storage device 120 before detecting the trigger event 303, and in response to detecting the trigger event 303, data 305b can be added to the storage device 120.

[0052] In some embodiments, data 305b can include, for example: data that the processor 108 is currently processing, data representing the current state of the device 100, data in the write queue of the processor 108, data in the I / O path, data stored in the cache 112, and / or any other critical data. In some embodiments, the operation at 212 can be optional. For example, the method 200 can continue without transferring data 305b to the storage device 120.

[0053] At 216, a self-refresh state can be initiated for the storage device 120 (e.g., as Figure 3 shown). The storage device 120 can continue to refresh the stored data (e.g., data 305a and 305b) periodically or intermittently, even if, for example, the associated memory controller is disabled or undergoes a reset cycle. Thus, data 305a, 305b will not be lost even if the associated memory controller is at least temporarily disabled.

[0054] At 220, the device 100 can perform a reset (e.g., a global reset). For example, if the trigger event 303 is due to a hardware or software error or a system crash, such a reset can eliminate the error condition. Since the storage device 120 is in the self-refresh state, the data 305a and 305b stored in the storage device 120 may not be lost. In one example, during the reset at 220, the storage device 120 continues to be in the self-refresh state. Also at 220, after the reset, the startup circuit 104 can be initialized.

[0055] At 224, the device 100 (e.g., circuit 132) can determine whether the parameter 129 is stored in the storage device 128, and / or can determine whether the data transfer from the storage device 120 to the storage device 124 (e.g., in response to the trigger event) is enabled. If so, the device 100 (e.g., circuit 132) can read the parameter 129 from the storage device 128, as Figure 4 shown.

[0056] Moreover, circuit 132 may determine operating parameter 409 for one or more components of device 100 based on read parameter 129 and / or taking into account one or more other factors (e.g., see Figure 4 ). One or more other factors may include: determining whether the trigger event is due to power loss, the charge level of a backup power source (e.g., battery 140, supercapacitor, etc.), the aging of battery 140, the amount of data to be transmitted, any preset configuration of the user or manufacturer of device 100, and so on.

[0057] In one example, operating parameter 409 may be in accordance with the various modes discussed previously herein. In one example, operating parameter 409 may specify the operating conditions of an individual component (e.g., an individual processing core) (e.g., the voltage level of the component, the operating frequency of the component, whether the component core is to be clock gated and / or power gated, whether the component is to be disabled, etc.), as further discussed in detail elsewhere in this disclosure.

[0058] At 228, device 100 (e.g., circuit 104) may start or initialize various components of device 100 and operate these components, for example, at least in part, according to operating parameter 409. For example, one or more processing cores of processor 108 may be initialized and operated according to operating parameter 409.

[0059] At 232, device 100 may transfer data 305a and / or 305b (or a subset of this data) from volatile storage device 120 to non-volatile storage device 124 (e.g., as Figure 5 shown), while the components of device 100 operate according to operating parameter 409. Thus, while data is being transferred from storage device 120 to storage device 124, device 100 operates according to operating parameter 409, where operating parameter 409 may be determined at least in part based on parameter 129. At 236, device 100 may be reset again (e.g., if the trigger event is due to an error in device 100), or may be shut down (e.g., if the trigger event is due to AC power loss).

[0060] Figure 6 Illustrated is a computing device 2100, smart device, computing device, computer system, or system-on-chip (SoC) 2100 according to some embodiments, where computing device 2100 may transfer data from a first storage device (e.g., volatile storage device) to a second storage device (e.g., non-volatile storage device) in a configurable manner in response to detecting a trigger event. It should be noted that Figure 6 those elements having the same reference numerals (or names) as elements in any other figure may operate or function in any manner similar to the manner described, but is not limited thereto.

[0061] In some embodiments, computing device 2100 represents a suitable computing device, such as a computing tablet, mobile phone or smartphone, laptop computer, desktop computer, IoT device, server, set-top box, electronic reader with wireless capabilities, etc. It should be understood that certain components are generally shown in computing device 2100, but not all components of such a device are shown.

[0062] In some embodiments, computing device 2100 includes a first processor 2110. Various embodiments of the present disclosure may also include a network interface within 2170, such as a wireless interface, such that system embodiments may be incorporated into a wireless device (such as a cellular phone or personal digital assistant).

[0063] In one embodiment, processor 2110 may include one or more physical devices, such as a microprocessor, application processor, microcontroller, programmable logic device, or other processing means. The processing operations performed by processor 2110 include the execution of an operating platform or operating system, on which applications and / or device functions are executed. The processing operations include: operations related to I / O (input / output) with a human user or other devices, operations related to power management, and / or operations related to connecting computing device 2100 to another device. The processing operations may also include operations related to audio I / O, and / or display I / O.

[0064] In one embodiment, computing device 2100 includes an audio subsystem 2120, which represents the hardware (such as audio hardware and audio circuits) and software (such as drivers, codecs) components associated with providing audio functionality to the computing device. The audio functionality may include speaker and / or headphone output, and microphone input. Devices for such functionality may be integrated into computing device 2100, or connected to computing device 2100. In one embodiment, the user interacts with computing device 2100 by providing audio commands that are received and processed by processor 2110.

[0065] Display subsystem 2130 represents the hardware (such as a display device) and software (such as drivers) components that provide a visual and / or tactile display for a user to interact with computing device 2100. Display subsystem 2130 includes a display interface 2132, which includes a particular screen or hardware device for providing a display to the user. In one embodiment, display interface 2132 includes logic separate from processor 2110 to perform at least some of the processing related to the display. In one embodiment, display subsystem 2130 includes a touchscreen (or touchpad) device that provides both output and input to the user.

[0066] The I / O controller 2140 represents the hardware devices and software components related to the interaction with the user. The I / O controller 2140 is operable to manage the hardware that is part of the audio subsystem 2120 and / or the display subsystem 2130. Additionally, the I / O controller 2140 shows connection points for attaching additional devices to the computing device 2100, through which the user can interact with the system. For example, devices that may be attached to the computing device 2100 may include a microphone device, a speaker or stereo system, a video system or other display device, a keyboard or keypad device, or other I / O devices used with specific applications such as a card reader or other devices.

[0067] As described above, the I / O controller 2140 can interact with the audio subsystem 2120 and / or the display subsystem 2130. For example, the input through a microphone or other audio device can provide input or commands for one or more applications or functions of the computing device 2100. Additionally, an audio output can be provided in place of or in addition to the display output. In another example, if the display subsystem 2130 includes a touch screen, the display device also acts as an input device, which can be at least partially managed by the I / O controller 2140. There may also be other buttons or switches on the computing device 2100 to provide I / O functions managed by the I / O controller 2140.

[0068] In one embodiment, the I / O controller 2140 manages devices such as an accelerometer, a camera, a light sensor, or other environmental sensors, or other hardware that may be included in the computing device 2100. The input can be part of a direct user interaction and provide environmental input to the system to affect its operation (such as filtering noise, adjusting the display for brightness detection, firing the camera flash, or other features).

[0069] In one embodiment, the computing device 2100 includes a power management 2150 that manages battery power usage, battery charging, and features related to power-saving operations. The memory subsystem 2160 includes memory devices for storing information in the computing device 2100. The memory can include non-volatile (the state does not change if the power to the memory device is interrupted) and / or volatile (the state is uncertain if the power to the memory device is interrupted) memory devices. The memory subsystem 2160 can store application data, user data, music, photos, documents, or other data, as well as system data (whether long-term or temporary) related to the execution of the applications and functions of the computing device 2100. In one embodiment, the computing device 2100 includes a clock generation subsystem 2152 to generate clock signals.

[0070] The components of the embodiments are also provided as a machine-readable medium (e.g., memory 2160) for storing computer-executable instructions (e.g., instructions for implementing any other processes discussed herein). The machine-readable medium (e.g., memory 2160) can include, but is not limited to: flash memory, optical disks, CD-ROMs, DVD ROMs, RAMs, EPROMs, EEPROMs, magnetic or optical cards, phase change memories (PCMs), or other types of machine-readable media suitable for storing electronic or computer-executable instructions. For example, embodiments of the present disclosure can be downloaded as a computer program (e.g., BIOS), which can be transmitted from a remote computer (e.g., a server) to the requesting computer (e.g., a client) in the form of a data signal via a communication link (e.g., a modem or a network connection).

[0071] Connectivity 2170 includes hardware devices (e.g., wireless and / or wired connectors and communication hardware) and software components (e.g., drivers, protocol stacks) to enable the computing device 2100 to communicate with external devices. The computing device 2100 can be a separate device, such as other computing devices, wireless access points or base stations, and peripheral devices, such as headphones, printers, or other devices.

[0072] Connectivity 2170 can include multiple different types of connectivity. Generally speaking, the computing device 2100 is illustrated as having cellular connectivity 2172 and wireless connectivity 2174. Cellular connectivity 2172 generally refers to cellular network connectivity provided by a wireless carrier, such as via GSM (Global System for Mobile Communications) or variants or derivatives, CDMA (Code Division Multiple Access) or variants or derivatives, TDM (Time Division Multiplexing) or variants or derivatives, or other cellular service standards. Wireless connectivity (or wireless interface) 2174 refers to non-cellular wireless connectivity and can include personal area networks (e.g., Bluetooth, near field, etc.), local area networks (e.g., Wi-Fi), and / or wide area networks (e.g., WiMax) or other wireless communications.

[0073] The peripheral connection 2180 includes a hardware interface and a connector for making a peripheral connection, as well as software components (e.g., drivers, protocol stacks). It will be understood that the computing device 2100 can be either a peripheral device of other computing devices ("going to" 2182) or have peripheral devices connected thereto ("coming from" 2184). The computing device 2100 typically has a "docking" connector to connect to other computing devices for purposes such as managing (e.g., downloading and / or uploading, changing, synchronizing) the content on the computing device 2100. Additionally, the docking connector can allow the computing device 2100 to connect to certain peripheral devices that allow the computing device 2100 to control content output, e.g., output to an audio-visual or other system.

[0074] In addition to proprietary docking connectors or other proprietary connection hardware, the computing device 2100 can also make the peripheral connection 2180 through a general-purpose or standards-based connector. General-purpose types can include: Universal Serial Bus (USB) connectors (which can include any of many different hardware interfaces), DisplayPort including MiniDisplayPort (MDP), High-Definition Multimedia Interface (HDMI), Firewire, or other types.

[0075] In some embodiments, the computing device 2100 can implement Figure 1 and Figures 3 - 5 the device 100. For example, the computing device 2100 can include circuits 104, 118, 116, 132, 136, etc. In one example, the processor 2110 can include the processor 108. The cache 112 can be coupled to the processor 2110. Storage devices 120, 124, 128 can be included in the computing device 2100 (e.g., in the memory subsystem 2160). The computing device 2100 can operate to, for example, transfer data from the storage device 120 to the storage device 124 in a configurable manner in response to detecting a trigger event, e.g., as discussed in this disclosure.

[0076] References in the specification to "an embodiment", "one embodiment", "some embodiments" or "other embodiments" mean that a particular feature, structure, or characteristic described in connection with the embodiments is included in at least some embodiments, but not necessarily all embodiments. The appearances of "an embodiment", "one embodiment" or "some embodiments" throughout the specification are not necessarily all referring to the same embodiment. If the specification states that a component, feature, structure, or characteristic "may", "might", or "could" be included, that particular component, feature, structure, or characteristic is not necessarily included. If the specification or claims refer to "a" or "an" element, it does not mean that there is only one element. If the specification or claims refer to "additional" elements, it does not exclude the presence of more than one additional element.

[0077] In addition, in one or more embodiments, particular features, structures, functions, or characteristics may be combined in any suitable manner. For example, a first embodiment may be combined with a second embodiment in any case where the particular features, structures, functions, or characteristics associated with the two embodiments are not mutually exclusive.

[0078] Although the present disclosure has been described in connection with particular embodiments thereof, many alternatives, modifications, and variations of such embodiments will be apparent to those skilled in the art in light of the foregoing description. The embodiments of the present disclosure are intended to embrace all such alternatives, modifications, and variations that fall within the broad scope of the appended claims.

[0079] Additionally, for the sake of simplicity of illustration and discussion, and so as not to obscure the present disclosure, well-known power / ground connections to integrated circuit (IC) chips and other components may or may not be shown in the presented figures. Further, the arrangements may be shown in block diagram form in order to avoid obscuring the present disclosure, and also in view of the fact that details regarding the implementation of such block diagram arrangements are highly dependent on the platform within which the present disclosure is to be implemented (i.e., these details should be entirely within the capabilities of those skilled in the art). In cases where specific details (e.g., circuits) are set forth to describe example embodiments of the present disclosure, it should be apparent to those skilled in the art that the present disclosure may be practiced without, or with variations of, these specific details. Accordingly, the description should be regarded as illustrative rather than restrictive.

[0080] The following examples relate to additional embodiments. Details of these examples may be used anywhere in one or more embodiments. All optional features of the apparatus described herein may also be implemented with respect to a method or process.

[0081] Example 1. A device, comprising: a first storage device for storing one or more parameters; a second storage device for storing data; and a third storage device; a first circuit for detecting a trigger event; and a second circuit for, in response to the trigger event, causing the data to be transferred from the second storage device to the third storage device, while one or more components of the device are operative to operate according to the one or more parameters.

[0082] Example 2. The device according to Example 1 or any other example, wherein the one or more parameters include one or more of the following: an indication of a first quantity of processing cores operative when the data is being transferred; an indication of a second quantity of processing cores in a low power state or non-operative when the data is being transferred; an indication of one or both of an operating voltage or an operating frequency of a processing core associated with the transfer of the data; an indication of a first mode of a plurality of modes, wherein, when the data is being transferred, the one or more components of the device are operative to operate according to the first mode; or an identification of one or more components that are not used for transferring data when the data is being transferred and are operative to operate in a low power state or a non-operative state.

[0083] Example 3. The device according to Example 1 or any other example, further comprising: a third circuit for configuring the one or more parameters based on one or more of the following: a charge level of a battery of the device, a type of the trigger event, or an amount of data to be transferred.

[0084] Example 4. The device according to Example 3 or any other example, wherein the third circuit is operative to: configure the one or more parameters to have a first value in response to the charge level of the battery being higher than a threshold; and configure the one or more parameters to have a second value in response to the charge level of the battery being lower than the threshold, wherein the first value is different from the second value.

[0085] Example 5. The device according to Example 3 or any other example, wherein the third circuit is operative to: configure the one or more parameters to have a first value in response to the trigger event being a first type, the first value corresponding to a first quantity of components of the device operative to transfer the data; and configure the one or more parameters to have a second value in response to the trigger event being a second type, the second value corresponding to a second quantity of components of the device operative to transfer the data, wherein the first quantity is different from the second quantity.

[0086] Example 6. The apparatus according to Example 5 or any other example, wherein: the first type of trigger event includes loss of power from an alternating current (AC) to direct current (DC) adapter that supplies AC power to the apparatus; the second type of trigger event includes an error in the apparatus that causes the apparatus to start or reset; and the first quantity is lower than the second quantity.

[0087] Example 7. The apparatus according to Example 3 or any other example, wherein the third circuit is configured to: in response to the data volume being higher than a threshold, configure the one or more parameters to have a first value corresponding to a first quantity of components operable to transmit the data in the apparatus; and in response to the data volume being lower than the threshold, configure the one or more parameters to have a second value corresponding to a second quantity of components operable to transmit the data in the apparatus, wherein the first quantity is higher than the second quantity.

[0088] Example 8. The apparatus according to any one of Examples 1-6 or any other example, wherein the trigger event includes one or both of the following: loss of power from an alternating current (AC) to direct current (DC) adapter that supplies AC power to the apparatus; or an error in the apparatus that causes the apparatus to start or reset.

[0089] Example 9. The apparatus according to any one of Examples 1-7 or any other example, wherein: the first storage device includes one or more registers; the second storage device includes volatile memory; and the third storage device includes non-volatile memory.

[0090] Example 10. The apparatus according to any one of Examples 1-7 or any other example, wherein: after detecting the trigger event and in response to the trigger event, a first subset of the data is stored in the second storage device; and before detecting the trigger event, a second subset of the data is stored in the second storage device.

[0091] Example 11. The apparatus according to Example 10 or any other example, wherein: the first subset of the data is stored in the second storage device from one or more of the following: cache, processor, write queue, or input / output (I / O) path.

[0092] Example 12. A system includes: a memory for storing data; a processor coupled to the memory, the processor including a plurality of processing cores; a non-volatile storage device; a first circuit for causing the data to be transferred from the memory to the non-volatile storage device in response to a trigger event; a second circuit for configuring the operation of individual ones of the plurality of processing cores according to one or more parameters while the data is being transferred; and a wireless interface for allowing the processor to communicate with another device.

[0093] Example 13. The system of Example 12 or any other example, wherein the one or more parameters include one or both of the following: an indication of a first quantity of processing cores that are operable while the data is being transferred; or an indication of a second quantity of processing cores that are in a disabled state while the data is being transferred.

[0094] Example 14. The system of Example 12 or any other example, wherein the one or more parameters include an indication of one or both of an operating voltage or an operating frequency of a processing core associated with the transfer of the data.

[0095] Example 15. The system of Example 12 or any other example, wherein the one or more parameters include an indication of a first mode of a plurality of modes, wherein the plurality of processing cores are to operate according to the first mode while the data is being transferred.

[0096] Example 16. The system of Example 12 or any other example, wherein the second circuit is for further configuring the operation of individual ones of the plurality of processing cores according to one or more of the following: a charge level of a battery of the system, a type of the trigger event, or an amount of data to be transferred.

[0097] Example 17. The system of any one of Examples 12 - 16 or any other example, wherein the non-volatile storage device is one of the following: a read-only memory (ROM), a flash memory, a flash drive, a magnetic computer storage device, a hard disk drive, a solid state drive, an optical disc, or an external hard drive.

[0098] Example 18. A device, comprising: a first storage device for storing one or more parameters; a second storage device for storing data; and a third storage device; a first circuit for configuring the one or more parameters to have a first value corresponding to a first mode and a second value corresponding to a second mode; a second circuit for detecting a trigger event and determining the mode of the device based on the type of the trigger event; and a third circuit for performing the following operations in response to the trigger event: selecting one of the first value or the second value for the one or more parameters based on the determined mode of the device, and causing the data to be transferred from the second storage device to the third storage device when one or more components of the device are operative to operate according to the selected one of the first value or the second value of the one or more parameters.

[0099] Example 19. The device according to Example 18 or any other example, wherein: in response to the selection of the first value, a first number of components of the device are operative to transfer the data; and in response to the selection of the second value, a second number of components of the device are operative to transfer the data, the first number being different from the second number.

[0100] Example 20. The device according to Example 19 or any other example, wherein: a first type of trigger event includes a loss of power from an alternating current (AC) to direct current (DC) adapter that supplies AC power to the device; a second type of trigger event includes an error in the device that causes the device to start or reset; the third circuit is for selecting the first value for the one or more parameters based on determining that the trigger event is the first type; the third circuit is for selecting the second value for the one or more parameters based on determining that the trigger event is the second type; and the first number is less than the second number.

[0101] Example 21. A non-transitory computer-readable storage medium for storing instructions that, when executed by a processor, cause the processor to: detect an event; in response to detecting the event, access one or more parameters; in response to detecting the event, cause data to be transferred from a volatile storage device to a non-volatile storage device; and operate the processor according to the one or more parameters while the data is being transferred.

[0102] Example 22. The non-transitory computer-readable storage medium according to Example 21 or any other example, wherein the instructions cause the processor to: transfer a first subset of the data to the volatile storage device after detecting the event and before transferring the data from the volatile storage device to the non-volatile storage device.

[0103] Example 23. The non-transitory computer-readable storage medium described in any one of Examples 21-22 or any other example, for operating the processor according to the one or more parameters, the instructions cause the processor to: operate a first processing core of the processor according to the one or more parameters to transfer the data from the volatile storage device to the non-volatile storage device; and disable a second processing core of the processor according to the one or more parameters while the data is being transferred from the volatile storage device to the non-volatile storage device.

[0104] Example 24. A method includes: detecting an event; in response to detecting the event, accessing one or more parameters; in response to detecting the event, causing data to be transferred from a volatile storage device to a non-volatile storage device; and operating the processor according to the one or more parameters while the data is being transferred.

[0105] Example 25. The method described in Example 24 or any other example further includes: transferring a first subset of the data to the volatile storage device after detecting the event and before transferring the data from the volatile storage device to the non-volatile storage device.

[0106] Example 26. The method described in any one of Examples 24-25 or any other example, wherein operating the processor according to the one or more parameters includes: operating a first processing core of the processor according to the one or more parameters to transfer the data from the volatile storage device to the non-volatile storage device; and disabling a second processing core of the processor according to the one or more parameters while the data is being transferred from the volatile storage device to the non-volatile storage device.

[0107] Example 27. An apparatus includes: components for performing the method described in any one of Examples 24-26 or any other example.

[0108] Example 28. An apparatus includes: components for detecting an event; components for accessing one or more parameters in response to detecting the event; components for causing data to be transferred from a volatile storage device to a non-volatile storage device in response to detecting the event; and components for operating the processor according to the one or more parameters while the data is being transferred.

[0109] Example 29. The apparatus described in Example 28 or any other example further includes: components for transferring a first subset of the data to the volatile storage device after detecting the event and before transferring the data from the volatile storage device to the non-volatile storage device.

[0110] Example 30. The apparatus according to any one of Examples 28 - 29 or any other example, wherein the component for operating the processor according to the one or more parameters comprises: a first processing core for operating the processor according to the one or more parameters to transfer the data from the volatile storage device to the non-volatile storage device; and a component for disabling a second processing core of the processor according to the one or more parameters while the data is being transferred from the volatile storage device to the non-volatile storage device.

[0111] An abstract is provided that will allow the reader to ascertain the nature and gist of the technical disclosure. The abstract is submitted with the understanding that it will not be used to limit the scope or meaning of the claims. The appended claims are hereby incorporated into the detailed description, where each claim stands on its own as a separate embodiment.

Claims

1. An apparatus for configurable data refreshing from a volatile storage device to a non-volatile storage device, comprising: A first storage device for storing one or more parameters; A second storage device for storing data; And a third storage device; A first circuit for detecting a trigger event; A second circuit for, in response to the trigger event, causing the data to be transferred from the second storage device to the third storage device, while one or more components of the apparatus are operative according to the one or more parameters; And A third circuit for configuring the one or more parameters, the one or more parameters indicating corresponding operation modes of the apparatus when, in response to the trigger event, the data is caused to be transferred from the second storage device to the third storage device, the operation modes being associated with the number of processing cores in the apparatus that are operative to transfer the data from the second storage device to the third storage device, Wherein the second storage device is a volatile storage device and the third storage device is a non-volatile storage device.

2. The device according to claim 1, wherein The one or more parameters include one or more of the following items: An indication of a first number of processing cores that are operative when the data is being transferred; An indication of a second number of processing cores that are in a low power state or non-operative when the data is being transferred; An indication of one or both of an operating voltage or an operating frequency of the processing cores associated with the transfer of the data; An indication of a first mode among a plurality of modes, wherein, when the data is being transferred, one or more components of the apparatus are operative according to the first mode; Or An identification of one or more components that, when the data is being transferred, are not used for transferring data and are operative in a low power state or a non-operating state.

3. The apparatus according to claim 1, wherein the third circuit is operative to configure the one or more parameters based on one or more of the following: a charge level of a battery of the apparatus, a type of the trigger event, or an amount of data to be transferred.

4. The device according to claim 3, wherein The third circuit is operative to: In response to the charge level of the battery being higher than a threshold, configure the one or more parameters to have a first value; and In response to the charge level of the battery being lower than the threshold, configure the one or more parameters to have a second value, Wherein the first value is different from the second value.

5. The device according to claim 3, wherein, The third circuit is operative to: In response to the trigger event being of a first type, configure the one or more parameters to have a first value, the first value corresponding to a first number of processing cores in the apparatus that are operative to transfer the data; And In response to the trigger event being of a second type, configure the one or more parameters to have a second value, the second value corresponding to a second number of processing cores in the apparatus that are operative to transfer the data, Wherein the first number is different from the second number.

6. The apparatus according to claim 5, wherein: The first type of trigger event includes the loss of power from an alternating current (AC) to direct current (DC) adapter that is used to supply AC power to the device; The second type of trigger event includes an error in the device that causes the device to start or reset; and The first quantity is lower than the second quantity.

7. The apparatus according to claim 3, wherein The third circuit is configured to: In response to the data volume being higher than a threshold, configure the one or more parameters to have a first value that corresponds to a first quantity of processing cores operable in the device to transfer the data; and In response to the data volume being lower than a threshold, configure the one or more parameters to have a second value that corresponds to a second quantity of processing cores operable in the device to transfer the data, wherein the first quantity is higher than the second quantity.

8. The device according to any one of claims 1-6, wherein, The trigger event includes one or both of the following: The loss of power from an alternating current (AC) to direct current (DC) adapter that is used to supply AC power to the device; or An error in the device that causes the device to start or reset.

9. The device according to any one of claims 1-7, wherein: The first storage device includes one or more registers; The second storage device includes volatile memory; and The third storage device includes non-volatile memory.

10. The device according to any one of claims 1-7, wherein: After detecting the trigger event and in response, a first subset of the data is stored in the second storage device; and Before detecting the trigger event, a second subset of the data is stored in the second storage device.

11. The device according to claim 10, wherein: The first subset of the data is stored in the second storage device from one or more of the following: a cache, a processor, a write queue, or an input / output (IO) path.

12. A system for configurable data refreshing from a volatile storage device to a non-volatile storage device, comprising: A memory for storing data; A processor coupled to the memory, the processor including a plurality of processing cores; A non-volatile storage device; A first circuit for causing the data to be transferred from the memory to the non-volatile storage device in response to a trigger event; A second circuit for configuring the operation of individual processing cores among the plurality of processing cores according to one or more parameters while the data is being transferred; A third circuit for configuring the one or more parameters, the one or more parameters indicating a corresponding operation mode of the system when the data is caused to be transferred from the memory to the non-volatile storage device in response to the trigger event, the operation mode being associated with the quantity of processing cores operable in the processor to transfer the data from the memory to the non-volatile storage device; and A wireless interface for allowing the processor to communicate with another device.

13. The system according to claim 12, wherein, The one or more parameters include one or both of the following: An indication of a first quantity of processing cores that are operable while the data is being transmitted; or An indication of a second quantity of processing cores that are in a disabled state while the data is being transmitted.

14. The system according to claim 12, wherein, The one or more parameters include: An indication of one or both of an operating voltage or an operating frequency of a processing core associated with the transmission of the data.

15. The system according to claim 12, wherein, The one or more parameters include: An indication of a first mode among a plurality of modes, wherein the plurality of processing cores are configured to operate according to the first mode while the data is being transmitted.

16. The system according to claim 12, wherein, The second circuit is further configured to configure the operation of individual processing cores among the plurality of processing cores based on one or more of: a charge level of a battery of the system, a type of the trigger event, or an amount of data to be transmitted.

17. The system according to any one of claims 12-16, wherein, The non-volatile storage device is one of: a read-only memory (ROM), a flash memory, a flash drive, a magnetic computer storage device, a hard disk drive, a solid state drive, an optical disc, or an external hard drive.

18. An apparatus for configurable data refreshing from a volatile storage device to a non-volatile storage device, comprising: A first storage device for storing one or more parameters; A second storage device for storing data; And a third storage device; A first circuit for configuring the one or more parameters to have a first value corresponding to a first mode and a second value corresponding to a second mode; A second circuit for detecting a trigger event and determining a mode of the apparatus based on a type of the trigger event; And A third circuit for performing the following operations in response to the trigger event: Based on the determined mode of the apparatus, selecting one of the first value or the second value for the one or more parameters, and Causing the data to be transmitted from the second storage device to the third storage device while one or more components of the apparatus are configured to operate according to one of the first value or the second value selected for the one or more parameters, wherein the first mode and the second mode are associated with different quantities of processing cores operable in the apparatus to transmit the data from the second storage device to the third storage device, wherein the second storage device is a volatile storage device and the third storage device is a non-volatile storage device.

19. The apparatus according to claim 18, wherein: In response to a selection of the first value, a first quantity of processing cores of the apparatus are operable to transmit the data; and In response to a selection of the second value, a second quantity of processing cores of the apparatus are operable to transmit the data, the first quantity being different from the second quantity.

20. The apparatus according to claim 19, wherein: A first type of trigger event includes a loss of power from an alternating current (AC) to direct current (DC) adapter that is used to supply AC power to the apparatus; A second type of trigger event includes an error in the apparatus that causes the apparatus to start or reset; The third circuit is configured to select the first value for the one or more parameters based on determining that the trigger event is of the first type; The third circuit is configured to select the second value for the one or more parameters based on determining that the trigger event is of the second type; and The first quantity is lower than the second quantity.

21. A method for configurable data refreshing from a volatile storage device to a non-volatile storage device, comprising: Detecting an event; In response to detecting the event, accessing one or more parameters; In response to detecting the event, causing data to be transferred from the volatile storage device to the non-volatile storage device; And While the data is being transferred, operating a processor according to the one or more parameters, Wherein the one or more parameters indicate a corresponding operating mode of the processor when causing the data to be transferred from the volatile storage device to the non-volatile storage device in response to detecting the event, and the operating mode is associated with the number of processing cores in the processor operable to transfer the data from the volatile storage device to the non-volatile storage device.

22. The method according to claim 21, further comprising: After detecting the event and before transferring the data from the volatile storage device to the non-volatile storage device, transferring a first subset of the data to the volatile storage device.

23. The method according to any one of claims 21-22, wherein, Operating the processor according to the one or more parameters includes: Operating a first processing core of the processor according to the one or more parameters to transfer the data from the volatile storage device to the non-volatile storage device; and According to the one or more parameters, disabling a second processing core of the processor while the data is being transferred from the volatile storage device to the non-volatile storage device.

24. One or more non-transitory computer-readable storage media for storing instructions that, when executed by a processor, cause the processor to perform the method according to any one of claims 21 - 23.

25. A device for configurable data refreshing from a volatile storage device to a non-volatile storage device, comprising: Means for performing the method according to any one of claims 21 - 23.

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