A sample-and-hold ultra-low power bandgap reference circuit

Abstract

The present invention discloses a sample-and-hold ultra-low power bandgap reference circuit, which includes a sample-and-hold reference circuit, an error amplifier, a power stage circuit, an ultra-low static voltage and current reference, and a low-voltage protection module. The ultra-low static voltage and current reference and the low-voltage protection module are used to provide a reference voltage. The voltage input end of the error amplifier is connected to the voltage output end of the sample-and-hold reference circuit to obtain a reference voltage for rapid startup. Another interface of the voltage input end of the error amplifier is connected to a feedback network of the output voltage. The voltage output end of the error amplifier is connected to the power stage circuit. The voltage output end of the feedback network is connected to the voltage output end of the power stage circuit to output a stable voltage. The present invention can accelerate the circuit startup speed through the sample-and-hold reference circuit. During the period when the bandgap reference is closed, the reference voltage can be kept within a voltage accuracy range of 1.5%, taking into account voltage accuracy and static current, and is suitable for ultra-low power consumption design.

Description

Technical Field

[0001] The invention relates to the field of integrated circuit design, and in particular to a sampling and holding ultra-low power consumption bandgap reference circuit. Background Art

[0002] In an era when handheld devices are becoming more and more advanced and convenient, low power consumption is a crucial research topic in chip design. Bandgap reference, as the reference source of the chip, generally needs to be turned on in low power mode, so ultra-low power bandgap reference circuit is of great significance.

[0003] In the power management system of the chip, the accuracy of the output voltage is required to be high, and a high-precision voltage reference is required. The ultra-low power voltage reference has poorer accuracy than the ordinary power voltage reference. Under high temperature conditions, the leakage of the transistor increases sharply to the nanoampere level, so that the leakage current seriously affects the accuracy of the ultra-low power voltage reference. Under high temperature conditions, the accuracy of the ultra-low power voltage reference is difficult to guarantee. Another problem with the ultra-low power voltage reference is its weak noise resistance. For example, a typical voltage reference with a quiescent current of 100nA has a loop unit gain bandwidth of approximately several kHz, and the power management system has a large noise due to the periodic power switching action. For example Figure 1 As shown in the figure, the voltage reference is connected to the error amplifier input of the power supply system, and the other end of the error amplifier input is connected to the feedback network of the output voltage. Due to the influence of the error amplifier input on the parasitic capacitance of the tube, the disturbance of the feedback voltage will bring greater noise interference. For ultra-low power voltage reference or ultra-low power voltage buffer circuit, due to the limited loop bandwidth and adjustment capability, the interference noise will bring greater voltage fluctuations. This kick-back noise will affect the voltage reference accuracy and other circuit modules. Summary of the invention

[0004] In order to solve the defects of the above-mentioned technology, the present invention provides a sample-and-hold ultra-low power consumption bandgap reference circuit, which can obtain a reference voltage with higher accuracy and reduce the average static current.

[0005] The technical solution adopted by the present invention to achieve the above technical effects is:

[0006] A sampling and holding ultra-low power consumption bandgap reference circuit comprises: a sampling and holding reference circuit, an error amplifier, a power stage circuit, an ultra-low static voltage and current reference and a low voltage protection module, wherein the ultra-low static voltage and current reference and the low voltage protection module are used to provide a reference voltage, a voltage input terminal of the error amplifier is connected to a voltage output terminal of the sampling and holding reference circuit to obtain a reference voltage for quick startup, another interface of the voltage input terminal of the error amplifier is connected to a feedback network of an output voltage, a voltage output terminal of the error amplifier is connected to the power stage circuit, and a voltage output terminal of the feedback network is connected to a voltage output terminal of the power stage circuit to output a stable voltage.

[0007] Preferably, in the above-mentioned sample-and-hold ultra-low power bandgap reference circuit, the sample-and-hold reference circuit includes a sample-and-hold circuit and a fast-start bandgap reference circuit, the fast-start bandgap reference circuit is connected to the sample-and-hold circuit, and the sample-and-hold circuit is connected to the voltage input terminal of the error amplifier.

[0008] Preferably, in the above-mentioned sample-and-hold ultra-low power bandgap reference circuit, the bandgap reference output by the fast-start bandgap reference circuit wakes up once every 20 ms to refresh the reference voltage on the holding capacitor Chold in the sample-and-hold circuit.

[0009] Preferably, in the above-mentioned sample-and-hold ultra-low power bandgap reference circuit, during the period when the bandgap reference is turned off, the holding capacitor Chold in the sample-and-hold circuit uses a 20pF capacitor to maintain the reference voltage within a 1.5% voltage accuracy range.

[0010] Preferably, in the above-mentioned sample-and-hold ultra-low power consumption bandgap reference circuit, when the voltage of the capacitor Cc in the fast-start bandgap reference circuit is too low, the gate of the transistor MN1 in the fast-start bandgap reference circuit is pre-charged through the ultra-low static voltage current reference, and the transistor MN1 quickly pulls up the capacitor Cc at startup through the transistor MN3 in the fast-start bandgap reference circuit.

[0011] Preferably, in the above-mentioned sample-and-hold ultra-low power bandgap reference circuit, after the output voltage is stabilized, the sample-and-hold circuit uses a sampling time of 5 us to refresh the reference voltage on the holding capacitor Chold in the sample-and-hold circuit.

[0012] The beneficial effects of the present invention are as follows: the present invention can accelerate the circuit startup speed through the sampling and holding reference circuit, and the output bandgap reference will wake up once every 20ms to refresh the reference voltage on the capacitor Chold in the sampling and holding reference circuit. During the period when the bandgap reference is closed, the capacitor Chold can be kept using a 20pF capacitor to keep the reference voltage within the voltage accuracy range of 1.5%, taking into account both voltage accuracy and static current, and is suitable for ultra-low power consumption design. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 A schematic diagram of the kick-back noise interference path for connecting a common voltage reference to a power system;

[0014] Figure 2 It is a module structure diagram of the present invention;

[0015] Figure 3 The circuit diagram of the sample-and-hold reference circuit of the present invention is shown in FIG. DETAILED DESCRIPTION

[0016] In order to provide a further understanding of the present invention, the present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0017] In the description of the present invention, it is necessary to understand that the terms "upper", "lower", "front", "back", "left", "right", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0018] like Figure 2 As shown, an ultra-low power bandgap reference circuit for sampling and holding proposed in an embodiment of the present invention includes: a sampling and holding reference circuit, an error amplifier, a power stage circuit, an ultra-low static voltage and current reference, and a low voltage protection module. The ultra-low static voltage and current reference and the low voltage protection module are used to provide a reference voltage. The voltage input terminal of the error amplifier is connected to the voltage output terminal of the sampling and holding reference circuit to obtain a reference voltage for quick startup. Another interface of the voltage input terminal of the error amplifier is connected to a feedback network of the output voltage, and the voltage output terminal of the error amplifier is connected to the power stage circuit. The voltage output terminal of the feedback network is connected to the voltage output terminal of the power stage circuit to output a stable voltage.

[0019] Further, in a preferred embodiment of the present invention, Figure 2As shown, the sample-and-hold reference circuit includes a sample-and-hold circuit and a fast-start bandgap reference circuit, the fast-start bandgap reference circuit is connected to the sample-and-hold circuit, and the sample-and-hold circuit is connected to the voltage input terminal of the error amplifier. Figure 3 As shown, the bandgap reference output by the fast-start bandgap reference circuit wakes up once every 20ms to refresh the reference voltage on the holding capacitor Chold in the sample-and-hold circuit. During the period when the bandgap reference is off, the holding capacitor Chold in the sample-and-hold circuit uses a 20pF capacitor to maintain the reference voltage within a 1.5% voltage accuracy range. When the voltage of the capacitor Cc in the fast-start bandgap reference circuit is too low, the gate of the transistor MN1 in the fast-start bandgap reference circuit is precharged through the ultra-low static voltage current reference. The transistor MN1 tube quickly pulls up the capacitor Cc at startup through the transistor MN3 in the fast-start bandgap reference circuit. After the output voltage stabilizes, the sample-and-hold circuit uses a sampling time of 5us to refresh the reference voltage on the holding capacitor Chold in the sample-and-hold circuit.

[0020] like Figure 2 As shown in the figure, the reference voltage of the error amplifier uses the voltage reference output by the fast-start bandgap reference circuit. When the voltage reference is stable, the sample-and-hold circuit is used to sample the voltage reference to the holding capacitor Chold. After the voltage reference sampling is completed, the voltage reference is turned off to save power. The reference voltage of the error amplifier uses the sample-and-hold voltage to eliminate the influence of kick-back noise. The ultra-low quiescent current voltage reference only provides a reference voltage to the relatively "quiet" low-voltage protection module. By using the stable voltage reference output by the sample-and-hold reference circuit, a higher-precision reference voltage can be obtained and the average quiescent current can be reduced.

[0021] Furthermore, if Figure 3 As shown in the figure, the sample-and-hold reference circuit is used to generate the output reference voltage of the PMF comparator. Since the reference voltage needs to be used in the sleep state, the reference voltage needs to be kept in existence all the time. Although the static current of the ordinary structure bandgap reference can also reach the nanoampere level, the layout area is large and the accuracy is not high. Figure 3The sample-and-hold reference circuit shown takes into account both voltage accuracy and quiescent current, and is suitable for ultra-low power design. The bandgap reference output by the fast-start bandgap reference circuit wakes up once every 20ms to refresh the reference voltage on the holding capacitor Chold. During the period when the bandgap reference is off, the holding capacitor Chold uses a 20pF capacitor to maintain the reference voltage within the 1.5% voltage accuracy range. When the 20ms timer is triggered, the bandgap reference circuit starts. In order to speed up the startup of the circuit, when the voltage of the capacitor Cc is too low, the circuit pre-charges the gate of MN1, and the MN1 tube quickly pulls up Cc through MN3 at startup, thereby speeding up the startup speed. The fast-start bandgap reference can achieve an output voltage accuracy of 1.5% within t1=20us. When the output voltage is stable, the reference voltage on the holding capacitor Chold is refreshed using a sampling time of t2=5us.

[0022] In summary, the present invention can speed up the circuit startup speed through the sampling and holding reference circuit. The output bandgap reference will wake up once every 20ms to refresh the reference voltage on the capacitor Chold in the sampling and holding reference circuit. During the period when the bandgap reference is closed, the capacitor Chold can be kept using a 20pF capacitor to keep the reference voltage within the voltage accuracy range of 1.5%, taking into account both voltage accuracy and static current, and is suitable for ultra-low power consumption design.

[0023] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments, and the above embodiments and descriptions only describe the principles of the present invention. The present invention may have various changes and improvements without departing from the spirit and scope of the present invention, and these changes and improvements fall within the scope of the present invention to be protected, and the scope of protection claimed by the present invention is defined by the attached claims and their equivalents.

Claims

1. A sample-and-hold ultra-low power bandgap reference circuit, It is characterized in that include: A sampling and holding reference circuit, an error amplifier, a power stage circuit, an ultra-low static voltage and current reference and a low voltage protection module, wherein the ultra-low static voltage and current reference and the low voltage protection module are used to provide a reference voltage, the voltage input terminal of the error amplifier is connected to the voltage output terminal of the sampling and holding reference circuit to obtain a reference voltage for quick startup, another interface of the voltage input terminal of the error amplifier is connected to a feedback network of the output voltage, the voltage output terminal of the error amplifier is connected to the power stage circuit, the voltage output terminal of the feedback network is connected to the voltage output terminal of the power stage circuit to output a stable voltage; The sample-and-hold reference circuit comprises a sample-and-hold circuit and a fast-start bandgap reference circuit, the fast-start bandgap reference circuit is connected to the sample-and-hold circuit, and the sample-and-hold circuit is connected to a voltage input terminal of the error amplifier; When the voltage of the capacitor Cc in the fast-start bandgap reference circuit is too low, the gate of the transistor MN1 in the fast-start bandgap reference circuit is precharged by the ultra-low static voltage current reference, and the transistor MN1 quickly pulls up the capacitor Cc at startup through the transistor MN3 in the fast-start bandgap reference circuit; After the output voltage is stabilized, the sample-and-hold circuit uses a sampling time of 5 us to refresh the reference voltage on the holding capacitor Chold in the sample-and-hold circuit.

2. The ultra-low power bandgap reference circuit of the sampling and holding method according to claim 1, It is characterized in that The bandgap reference output by the fast-start bandgap reference circuit wakes up once every 20 ms to refresh the reference voltage on the holding capacitor Chold in the sample-and-hold circuit.

3. The ultra-low power bandgap reference circuit of the sampling and holding method according to claim 1, It is characterized in that During the period when the bandgap reference is turned off, the holding capacitor Chold in the sample-and-hold circuit uses a 20 pF capacitor to maintain the reference voltage within a 1.5% voltage accuracy range.

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