Printed Circuit Board

Abstract

The present invention provides a printed circuit board, which includes: a first insulating material; a metal layer, which is arranged on a first surface of the first insulating material; a second insulating material, which is arranged on the first surface of the first insulating material; a cavity, which penetrates the second insulating material in a region of the second insulating material corresponding to the metal layer; and an insulating film, which is arranged on the surface of the metal layer exposed by the cavity.

Description

[0001] This application claims the benefit of Korean Patent Application No. 10-2019-0015495, filed on February 11, 2019, entitled “PRINTED CIRCUIT BOARD,” the entire disclosure of which is incorporated herein by reference for all purposes. Technical Field

[0002] The following description relates to a printed circuit board. Background Art

[0003] In order to realize various functions, electronic devices are required to manage larger amounts of data. Therefore, electronic devices require more electronic components and various electronic components. The more electronic components included in an electronic device, the more passive components the electronic components require. Summary of the invention

[0004] This summary is provided to introduce selected concepts in a simplified form, and the concepts are further described in the following detailed description. This summary is neither intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0005] In one general aspect, a printed circuit board includes: a first insulating material; a metal layer disposed on a first surface of the first insulating material; a second insulating material disposed on the first surface of the first insulating material; a cavity penetrating the second insulating material in a region of the second insulating material corresponding to the metal layer; and an insulating film disposed on a surface of the metal layer exposed by the cavity.

[0006] The insulating film may be continuously formed from the surface of the metal layer exposed through the cavity to an inner side surface of the cavity.

[0007] The insulating film may be continuously formed from the surface of the metal layer exposed through the cavity to a first surface of the second insulating material facing away from the first surface of the first insulating material.

[0008] The thickness of the insulating film may be smaller than the thickness of the second insulating material.

[0009] The printed circuit board may include an electronic component disposed on the insulating film and located in the cavity.

[0010] The electronic component may include an external electrode in contact with the insulating film.

[0011] The printed circuit board may include an insulating layer disposed on a first surface of the second insulating material facing away from the first surface of the first insulating material.

[0012] The insulating layer may fill a portion of the cavity where the electronic component is not disposed.

[0013] The printed circuit board may include a via hole penetrating the insulating layer and electrically connected to the electronic component.

[0014] The width of the cavity may be equal to or smaller than the width of the metal layer.

[0015] The second insulating material may cover side surfaces of the metal layer.

[0016] No circuit may be formed on the first insulating material.

[0017] In another general aspect, a printed circuit board includes: a first insulating material; a second insulating material disposed on the first insulating material and including a cavity formed therein; a metal layer disposed at an interface between the first insulating material and the second insulating material; an insulating film disposed along an inner surface of the cavity and a surface of the metal layer adjacent to the cavity; and an electronic component disposed in the cavity and located on the insulating film.

[0018] Other features and aspects will be apparent from the following detailed description and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a diagram illustrating a printed circuit board according to an example.

[0020] Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 and Figure 7 is a diagram illustrating a method of manufacturing a printed circuit board according to an example.

[0021] Figure 8 is a diagram illustrating a printed circuit board according to an example.

[0022] Throughout the drawings and detailed description, like reference numerals denote like elements. The drawings may not be drawn to scale, and the relative sizes, proportions, and depictions of elements in the drawings may be exaggerated for clarity, illustration, and convenience. DETAILED DESCRIPTION

[0023] The following specific embodiments are provided to help the reader obtain a comprehensive understanding of the methods, devices and / or systems described herein. However, various changes, modifications and equivalents of the methods, devices and / or systems described herein will be apparent after understanding the disclosure of the present application. For example, the order of operations described herein is only an example and is not limited to the order set forth herein, but in addition to the operations that must occur in a specific order, changes that will be apparent after understanding the disclosure of the present application may be made. In addition, in order to improve clarity and brevity, the description of features known in the art may be omitted.

[0024] The features described herein may be implemented in different forms and shall not be construed as being limited to the examples described herein. Rather, the examples described herein are provided only to illustrate some of the many possible ways to implement the methods, devices and / or systems described herein that will be apparent after understanding the disclosure of the present application.

[0025] Here, note that use of the term "may" with respect to an example or embodiment (e.g., with respect to what an example or embodiment may include or implement) means that there is at least one example or embodiment that includes or implements such features, but all examples and embodiments are not limited thereto.

[0026] Throughout the specification, when an element (such as a layer, a region, or a substrate) is described as being “on”, “connected to”, or “coupled to” another element, the element may be directly “on”, “connected to”, or “coupled to” another element, or one or more other elements may be present between them. In contrast, when an element is described as being “directly on”, “directly connected to”, or “directly coupled to” another element, there may be no other elements present between them.

[0027] As used herein, the term "and / or" includes any one of the associated listed items and any combination of any two or more items.

[0028] Although terms such as "first", "second" and "third" may be used herein to describe various members, components, regions, layers or parts, these members, components, regions, layers or parts are not limited to these terms. More specifically, these terms are only used to distinguish one member, component, region, layer or part from another member, component, region, layer or part. Therefore, without departing from the teachings of the examples described herein, the first member, first component, first region, first layer or first part referred to in the examples may also be referred to as the second member, second component, second region, second layer or second part.

[0029] For ease of description, spatially relative terms such as "above", "above", "below", and "below" may be used herein to describe the relationship of one element to another element as shown in the accompanying drawings. Such spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientations depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, an element described as being "above" or "above" relative to another element will then be "below" or "below" relative to the other element. Therefore, the term "above" includes both above and below orientations depending on the spatial orientation of the device. The device may also be positioned in other ways (e.g., rotated 90 degrees or in other orientations), and the spatially relative terms used herein will be interpreted accordingly.

[0030] The terms used herein are only used to describe various examples and are not intended to limit the present disclosure. Unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. The terms "include", "comprises", and "have" list the existence of the stated features, quantities, operations, components, elements, and / or combinations thereof, but do not exclude the existence or addition of one or more other features, quantities, operations, components, elements, and / or combinations thereof.

[0031] Variations in the shapes shown in the drawings may occur due to manufacturing techniques and / or tolerances. Therefore, the examples described herein are not limited to the specific shapes shown in the drawings but include variations in shapes that occur during manufacturing.

[0032] The features of the examples described herein can be combined in various ways that will be apparent after understanding the disclosure of the present application. In addition, although the examples described herein have various configurations, other configurations that will be apparent after understanding the disclosure of the present application are feasible.

[0033] Figure 1 and Figure 8 is a diagram illustrating a printed circuit board according to an example.

[0034] Reference Figure 1 , the printed circuit board may include a first insulating material 100 , a second insulating material 200 , a cavity 210 , and an insulating film 300 .

[0035] The first insulating material 100 may be formed using a non-conductive material and have a plate-like structure. The first insulating material 100 may be formed using a material including a resin, and the resin included in the first insulating material 100 may be selected from various thermosetting resins, thermoplastic resins, etc. For example, the resin included in the first insulating material 100 may be selected from epoxy resin, polyimide (PI) resin, bismaleimide-triazine (BT) resin, liquid crystal polymer (LCP), etc., but is not limited to these materials. The specific material of the first insulating material 100 may be a prepreg (PPG) or ABF (Ajinomoto build-up film).

[0036] The first insulating material 100 may include a fiber reinforced material or a filler. The fiber reinforced material may include a glass fiber material, and the glass fiber material may be at least one of glass filaments, glass fibers, and glass fabrics classified according to thickness. The prepreg may have a structure in which the glass fiber material is impregnated in epoxy resin. The filler may be an inorganic filler or an organic filler. The inorganic filler may include at least one selected from the group consisting of silicon dioxide (SiO2), aluminum oxide (Al2O3), silicon carbide (SiC), barium sulfate (BaSO4), talc, clay, mica powder, aluminum hydroxide (Al(OH)3), magnesium hydroxide (Mg(OH)2), calcium carbonate (CaCO3), magnesium carbonate (MgCO3), magnesium oxide (MgO), boron nitride (BN), aluminum borate (AlBO3), barium titanate (BaTiO3), and calcium zirconate (CaZrO3).

[0037] The metal layer 110 may be formed on the first insulating material 100. The metal layer 110 may include a metal such as copper (Cu) as a main component, and function as a barrier in a process of forming a cavity 210 described below.

[0038] The area of ​​the metal layer 110 may be smaller than the area of ​​the entire upper surface of the first insulating material 100. The metal layer 110 may have an island shape on the upper surface of the first insulating material 100.

[0039] The second insulating material 200 may be stacked on the first insulating material 100 and cover the metal layer 110. The second insulating material 200 may cover a side surface of the metal layer 110 or both an upper surface and a side surface.

[0040] The second insulating material 200 may be formed using a material including a resin, and the resin forming the second insulating material 200 may be selected from various thermosetting resins, thermoplastic resins, etc. For example, the resin included in the second insulating material 200 may be selected from epoxy resin, polyimide (PI) resin, bismaleimide-triazine (BT) resin, liquid crystal polymer (LCP), etc., but is not limited to these materials. The specific material of the second insulating material 200 may be a prepreg (PPG) or ABF (Ajinomoto build-up film).

[0041] The second insulating material 200 may include the above-mentioned fiber-reinforced material or the above-mentioned filler. The second insulating material 200 may be formed using the same or different material as the first insulating material 100. The thickness of the second insulating material 200 may be substantially the same as the thickness of the first insulating material 100.

[0042] A cavity 210 may be formed in the second insulating material 200. The cavity 210 may penetrate the second insulating material 200 and be positioned on (above or adjacent to) the metal layer 110. The upper surface of the metal layer 110 may be exposed through the bottom surface of the cavity 210. The metal layer 110 may be used as a stopper in the laser machining process of forming the cavity 210, so that the process of forming the cavity 210 may stop at the upper surface of the metal layer 110. The metal layer 110 may protect the first insulating material 100 from the laser machining process of forming the cavity 210.

[0043] The width of the cavity 210 may be equal to or less than the width of the metal layer 110. The cross-sectional area of ​​the cavity 210 may be equal to or less than the cross-sectional area of ​​the metal layer 110. Preferably, the width of the cavity 210 may be equal to or less than the width of the metal layer 110, and the cross-sectional area of ​​the cavity 210 may be equal to or less than the cross-sectional area of ​​the metal layer 110. Here, the width and cross-sectional area of ​​the cavity 210 may refer to the width and area of ​​the bottom surface of the cavity 210. The width and cross-sectional area of ​​the metal layer 110 may refer to the width and area of ​​the upper surface of the metal layer 110.

[0044] like Figure 1 As shown in , only the metal layer 110 may be formed at the interface a between the first insulating material 100 and the second insulating material 200, and no circuit may be formed at the interface a. However, it is not excluded that a circuit may be formed at the interface between the first insulating material 100 and the second insulating material 200. When a circuit is formed at the interface between the first insulating material 100 and the second insulating material 200, the circuit may be spaced apart from the metal layer 110 to be electrically insulated from the metal layer 110, or the circuit may be connected to the metal layer 110 if necessary.

[0045] The insulating film 300 may be formed on the metal layer 110 located on the bottom surface of the cavity 210. The insulating film 300 may be formed on the metal layer 110 to insulate the metal layer 110 from the conductor mounted on the metal layer 110.

[0046] The insulating film 300 may be formed using a resin such as an epoxy resin, a polyimide resin, etc., but the material is not limited thereto.

[0047] The thickness of the insulating film 300 may be smaller than the thickness of the first insulating material 100. The thickness of the insulating film 300 may also be smaller than the thickness of the second insulating material 200.

[0048] The insulating film 300 may be formed by a method such as sputtering, chemical vapor deposition (CVD), spin coating, etc., and may have a uniform thickness.

[0049] The insulating film 300 may extend to the inner side surface of the cavity 210 and cover the entire inner side surface of the cavity 210. The insulating film 300 may be continuously formed from the bottom surface of the cavity 210 to the inner side surface of the cavity 210.

[0050] The insulating film 300 may be formed to also cover the upper surface of the second insulating material 200. That is, the insulating film 300 may be continuously formed from the bottom surface of the cavity 210 to the inner side surface of the cavity 210 and the upper surface of the second insulating material 200. The insulating film 300 may cover the entire upper surface of the second insulating material 200. The insulating film 300 may have a uniform thickness on all of the above surfaces.

[0051] The printed circuit board may further include electronic components 400 .

[0052] The electronic component 400 may be inserted into the cavity 210 and contact the insulating film 300. The electronic component 400 may be one of various electronic components such as an active component, a passive component, etc. At both ends of the electronic component 400, a pair of external electrodes 420 may be placed, and the pair of external electrodes 420 may contact the insulating film 300. The external electrodes 420 may be conductive, but insulated from the metal layer 110 by the insulating film 300.

[0053] The electronic component 400 may be a passive component and include a dielectric layer 410 having an inner electrode, and an outer electrode 420 may be formed on the surface of the dielectric layer 410 and electrically connected to the inner electrode. A pair of outer electrodes 420 may be located at both ends of the electronic component 400, respectively. The outer electrodes 420 may be spaced apart from each other and electrically insulated from each other. If the insulating film 300 is not provided, the outer electrodes 420 of the electronic component 400 may be contacted with the metal layer 110, and then the outer electrodes 420 may be short-circuited to each other. However, in the example disclosed here, the outer electrodes 420 may be insulated from each other by the insulating film 300.

[0054] like Figure 1As shown in FIG. 1 , the upper surface of the electronic component 400 may be located at the same plane height as the upper surface of the second insulating material 200. Optionally, the upper surface of the electronic component 400 may be arranged to be lower than the upper surface of the second insulating material 200 (see FIG. 1 ). Figure 6 ).

[0055] The printed circuit board may further include a first insulating layer 510 and a second insulating layer 520, build-up layers 511 and 521 (see Figure 8 ) and solder resists 710 and 720 (see Figure 8 ).

[0056] The first insulating layer 510 may be stacked on an upper surface of the second insulating material 200 , and the second insulating layer 520 may be stacked on a lower surface of the first insulating material 100 .

[0057] The first insulating layer 510 may fill the cavity 210. For example, the first insulating layer 510 may fill a portion of the cavity 210 where the electronic component 400 is not disposed. That is, after the electronic component 400 is installed in the cavity 210, the first insulating layer 510 may fill the space in the cavity 210. Therefore, the electronic component 400 may be fixed in the cavity 210.

[0058] The first insulating layer 510 may be formed using a material including a resin, and the resin included in the first insulating layer 510 may be selected from various thermosetting resins, thermoplastic resins, and the like. For example, the resin included in the first insulating layer 510 may be selected from epoxy resin, polyimide (PI) resin, bismaleimide-triazine (BT) resin, liquid crystal polymer (LCP), and the like, but is not limited to these materials. A specific material of the first insulating layer 510 may be a prepreg (PPG) or ABF (Ajinomoto build-up film). The first insulating layer 510 may include the above-mentioned fiber-reinforced material or the above-mentioned filler.

[0059] The first insulating layer 510 may be formed using the same material as the first insulating material 100 and / or the second insulating material 200 .

[0060] The first circuit 610 may be formed on the first insulating layer 510. The first circuit 610 may be formed using at least one of copper (Cu), silver (Ag), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), and platinum (Pt). The first circuit 610 may be formed using the same metal as the second circuit 620 and may be an inner layer circuit.

[0061] A via hole V may be formed in the first insulating layer 510 to electrically connect the first circuit 610 and the electronic element 400 to each other. The via hole V may penetrate the first insulating layer 510 and may contact the external electrode 420 of the electronic element 400.

[0062] The second insulating layer 520 may cover the lower surface of the first insulating material 100 and may be thicker than the first insulating layer 510. The second insulating layer 520 may be formed using the same material as the first insulating layer 510.

[0063] The second circuit 620 may be formed on the lower surface of the second insulating layer 520. The second circuit 620 may be formed using at least one of copper (Cu), silver (Ag), palladium (Pd), aluminum (Al), nickel (Ni), titanium (Ti), gold (Au), and platinum (Pt). The second circuit 620 may be formed using the same metal as the first circuit 610. The first circuit 610 and the second circuit 620 may be inner layer circuits.

[0064] The first insulating material 100, the second insulating material 200, the insulating film 300, the first insulating layer 510 and the second insulating layer 520 may form a core layer together. In this case, the electronic component 400 may be embedded in the core layer and deviate upward or downward from the center of the core layer. In addition, only the metal layer 110 may be formed at the interface a between the first insulating material 100 and the second insulating material 200, and no circuit may be formed at the interface a. The core layer may have a thickness of 0.4 mm or more.

[0065] The core layer may include a through via PV that penetrates the first insulating material 100, the second insulating material 200, the insulating film 300, the first insulating layer 510, and the second insulating layer 520. Figure 1 As shown in , the through via PV may include a plating layer formed on the inner surface of the via hole VH. Alternatively, the through via PV may be a via hole VH filled with plating. Alternatively, as shown in Figure 8 As shown in , a plating layer may be formed on the inner surface of the via hole VH, and then the inside of the via hole VH may be filled with an insulating material or a conductive plugging PG material. The plugging material may include ink, solder resist, and the like.

[0066] The accumulation layers may be stacked on the first insulation layer 510 and the second insulation layer 520, respectively. The accumulation layers may be formed using the same material as the first insulation layer 510 and / or the second insulation layer 520.

[0067] The first build-up layer 511 may be stacked on an upper surface of the first insulating layer 510. The third circuit 611 may be formed on the first build-up layer 511. The first circuit 610 and the third circuit 611 may be electrically connected to each other through the inner via IV.

[0068] The second buildup layer 521 may be stacked on the lower surface of the second insulating layer 520. A fourth circuit 621 may be formed on the lower surface of the second buildup layer 521. The second circuit 620 and the fourth circuit 621 may be electrically connected to each other through the inner via IV. The third circuit 611 and the fourth circuit 621 may be outer layer circuits.

[0069] Solder resists 710 and 720 may be stacked on the outer surfaces of the first accumulation layer 511 and the second accumulation layer 521, respectively. Solder resists 710 and 720 may partially expose the third circuit 611 and the fourth circuit 621, respectively. In particular, in a state where the electronic component 400 is positioned to deviate from the center of the core layer, the solder resist 710 may expose the third circuit 611, and a bonding member SB such as a solder ball may be formed on the exposed third circuit 611. The bonding member SB may be mounted with an electronic component such as a chip (integrated chip (IC), central processing unit (CPU), graphics processing unit (GPU), application processor (AP), etc.). Optionally, the bonding member SB may be bonded to an external board. Another bonding member may also be formed on the fourth circuit 621 exposed by the relative solder resist 720, and the fourth circuit 621 may be connected to the mainboard through the bonding member.

[0070] Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 and Figure 7 is a diagram illustrating a method of manufacturing a printed circuit board according to an example.

[0071] Reference Figure 2 (a), a first insulating material 100 may be prepared, and metal foils M may be stacked on the upper and lower surfaces of the first insulating material 100. The metal foils M may be copper foils.

[0072] Reference Figure 2 (b), the metal layer 110 may be formed by completely removing the metal foil M on the lower surface and patterning the metal foil M on the upper surface. The metal foil M may be removed and patterned by etching.

[0073] Reference Figure 3 , the second insulating material 200 may be stacked on the first insulating material 100 on which the metal layer 110 is formed. The second insulating material 200 may cover both the upper surface and the side surface of the metal layer 110.

[0074] Reference Figure 4 , a cavity 210 may be formed in the second insulating material 200 .

[0075] The cavity 210 may be formed by performing laser processing, and the metal layer 110 may be used as a barrier. In this case, the second insulating material 200 may be partially removed by performing laser processing, but the first insulating material 100 may be protected from the laser processing by the metal layer 110 .

[0076] Reference Figure 5The insulating film 300 may be continuously formed from the bottom surface of the cavity 210 to the inner side surface of the cavity 210 and the upper surface of the second insulating material 200. The insulating film 300 may be formed by a method such as sputtering, chemical vapor deposition (CVD), spin coating, etc., and may have a uniform thickness.

[0077] Reference Figure 6 , the electronic component 400 may be inserted into the cavity 210 and contact the insulating film 300. The electronic component 400 may include a dielectric layer 410 and an external electrode 420.

[0078] Reference Figure 7 , a first insulating layer 510 and a second insulating layer 520 may be stacked on the upper surface of the second insulating material 200 and the lower surface of the first insulating material 100, respectively, and an inner layer circuit may be formed on the first insulating layer 510 and the second insulating layer 520. A through via PV may be formed to penetrate the first insulating material 100, the second insulating material 200, the insulating film 300, the first insulating layer 510, and the second insulating layer 520. The through via PV may be formed by forming a via hole VH and then forming a plating layer on the inner surface of the via hole VH or by sealing after forming the plating layer.

[0079] Reference Figure 8 , first build-up layer 511 and second build-up layer 521 may be stacked on the upper surface of first insulating layer 510 and the lower surface of second insulating layer 520, respectively, and outer layer circuits may be formed on the outer surfaces of first build-up layer 511 and second build-up layer 521. Solder resists 710 and 720 may be stacked on the outer surfaces of first build-up layer 511 and second build-up layer 521, respectively, and solder resists 710 and 720 may be partially opened. A bonding member such as a solder ball may be formed on each of the outer layer circuits exposed through partially opened solder resists 710 and 720.

[0080] Although the present disclosure includes specific examples, it will be apparent after understanding the disclosure of the present application that various changes in form and detail may be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein will be considered as descriptive meanings only, and not for limiting purposes. The description of the features or aspects in each example will be considered applicable to similar features or aspects in other examples. If the described techniques are performed in different orders, and / or if the components in the described systems, architectures, devices, or circuits are combined in different ways, and / or the components in the described systems, architectures, devices, or circuits are replaced or supplemented by other components or their equivalents, appropriate results may be obtained. Therefore, the scope of the present disclosure is not limited by specific embodiments, but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents will be interpreted as included in the present disclosure.

Claims

1. A printed circuit board, comprising: a first insulating material; A metal layer is disposed on the first surface of the first insulating material; a second insulating material, disposed on the first surface of the first insulating material; a cavity penetrating the second insulating material in a region of the second insulating material corresponding to the metal layer; an insulating film disposed on a surface of the metal layer exposed through the cavity; an electronic component disposed in the cavity and on the insulating film; as well as an insulating layer, a portion of which is filled between the insulating film and the electronic component in a direction perpendicular to the thickness direction of the printed circuit board, wherein the insulating film is continuously formed from the surface of the metal layer exposed through the cavity to the first surface of the second insulating material facing away from the first surface of the first insulating material, and a portion of the insulating film located on the first surface of the second insulating material is covered by the insulating layer and the insulating film is spaced apart from the side surface of the metal layer.

2. The printed circuit board according to claim 1, wherein: Each of the first insulating material and the second insulating material is formed using a material including a resin.

3. The printed circuit board according to claim 1, wherein: The insulating film is formed over the entire interface between the insulating layer and the second insulating material.

4. The printed circuit board according to claim 1, wherein: The thickness of the insulating film is smaller than the thickness of the second insulating material.

5. The printed circuit board according to claim 1, wherein The width of the cavity is equal to or smaller than the width of the metal layer.

6. The printed circuit board according to claim 5, wherein: The electronic component includes an external electrode in contact with the insulating film.

7. The printed circuit board according to claim 6, wherein: The printed circuit board further includes a via hole penetrating the insulating layer and contacting the external electrode.

8. The printed circuit board according to claim 5, wherein: The insulating film is formed using resin. 9 . The printed circuit board according to claim 5 , further comprising a via hole penetrating the insulating layer and electrically connected to the electronic component.

10. The printed circuit board according to claim 1, wherein The metal layer is formed at an interface between the first insulating material and the second insulating material, and no circuit is formed at the interface.

11. The printed circuit board according to claim 1, wherein: The second insulating material covers the side surface of the metal layer.

12. The printed circuit board according to claim 1, wherein: No circuit is formed on the first insulating material.

13. A printed circuit board, comprising: a first insulating material; a second insulating material disposed on the first surface of the first insulating material and comprising a cavity formed in the second insulating material; a metal layer, disposed at an interface between the first insulating material and the second insulating material; an insulating film disposed on the second insulating material and further disposed along an inner surface of the cavity and a surface of the metal layer adjacent to the cavity; an electronic component disposed in the cavity and located on the insulating film; as well as An insulating layer is disposed on the insulating film and fills at least a portion between the insulating film and the electronic component in the cavity, wherein the insulating film is continuously formed from the surface of the metal layer exposed through the cavity to the first surface of the second insulating material facing away from the first surface of the first insulating material, and a portion of the insulating film located on the first surface of the second insulating material is covered by the insulating layer, and the insulating film is spaced apart from the side surface of the metal layer.

14. The printed circuit board according to claim 13, further comprising: A via hole penetrates the insulating layer and contacts the electronic component.

15. The printed circuit board according to claim 13, wherein: No circuit is formed at the interface between the insulating layer and the second insulating material, and the insulating film is formed over the entire interface between the insulating layer and the second insulating material.

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