Semiconductor package structure and electronic device

Abstract

A semiconductor package structure includes a package substrate and a semiconductor die. The package substrate includes a plurality of hollow vias extending through the package substrate. The semiconductor die is electrically connected to the package substrate. The hollow vias are disposed under the semiconductor die.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims the benefit of and priority to U.S. Provisional Application No. 62 / 806,563, filed February 15, 2019, and U.S. Non-Provisional Application No. 16 / 717,929, filed December 17, 2019, the contents of which are incorporated by reference herein in their entirety. TECHNICAL FIELD

[0003] The present disclosure relates to a semiconductor package structure and an electronic device including the same, and to a semiconductor package structure including a package substrate having a plurality of hollow vias and an electronic device including the same. BACKGROUND

[0004] Specifications of semiconductor package structures can include high-speed data transmission capacity, high data capacity, and small footprint. Heat dissipation is also an issue for such semiconductor package structures. During operation, high-speed data transmission can cause a large amount of heat to be generated and can cause the temperature of the semiconductor package structure to increase. Due to the small size of the semiconductor package structure, it can be difficult to dissipate the heat. If the heat is not effectively dissipated, the performance of the semiconductor package structure can be reduced, or the semiconductor package structure can be damaged or rendered inoperable. SUMMARY

[0005] In some embodiments, a semiconductor package structure includes a package substrate and a semiconductor die. The package substrate includes a plurality of hollow vias extending through the package substrate. The semiconductor die is electrically connected to the package substrate. The hollow vias are disposed below the semiconductor die.

[0006] In some embodiments, an electronic device includes a semiconductor package structure, a host substrate, and a heat dissipation device. The semiconductor package structure includes a package substrate and a semiconductor die. The package substrate includes a plurality of first hollow vias extending through the package substrate. The semiconductor die is electrically connected to the package substrate. The first hollow vias are disposed below the semiconductor die. The host substrate is electrically connected to the package substrate. The host substrate includes a plurality of second hollow vias extending through the host substrate, and the second hollow vias are aligned with the first hollow vias. The heat dissipation device is used to dissipate heat generated by the semiconductor die. The heat is transmitted through the second hollow vias and the first hollow vias. BRIEF DESCRIPTION OF DRAWINGS

[0007] Aspects of some embodiments of the disclosure can be appreciated upon consideration of the following detailed description together with the accompanying drawings. It should be noted that the various structures can not be drawn to scale and the dimensions of the various structures can be arbitrarily increased or decreased for the sake of clarity in discussion.

[0008] Figure 1 An exploded perspective view of an electronic device according to some embodiments of the disclosure is illustrated.

[0009] Figure 2 An exploded perspective view of Figure 1 a semiconductor package structure is illustrated.

[0010] Figure 3 A partially enlarged cross-sectional view of Figure 2 a package substrate and cap structure is illustrated.

[0011] Figure 4 A cross-sectional view of Figure 1 a semiconductor package structure is illustrated.

[0012] Figure 5 A perspective view of Figure 1 a first elastic layer, an intermediate block, and a second layer is illustrated.

[0013] Figure 6 A partially enlarged perspective cross-sectional view of Figure 1 an assembly of a first elastic layer, an intermediate block, a second layer, and a main substrate is illustrated.

[0014] Figure 7 A combined cross-sectional view of Figure 1 a heat dissipation device is illustrated.

[0015] Figure 8 A perspective view of Figure 1 a U-shaped tube is illustrated.

[0016] Figure 9 A perspective cross-sectional view of Figure 1 an assembly of a U-shaped tube and a main substrate is illustrated.

[0017] Figure 10 A combined cross-sectional view of Figure 1 an electronic device is illustrated.

[0018] Figure 11 An exploded perspective view of an electronic device according to some embodiments of the disclosure is illustrated.

[0019] Figure 12 A perspective view of Figure 11 a U-shaped tube is illustrated.

[0020] Figure 13 A combined perspective cross-sectional view of Figure 11 a U-shaped tube, a main substrate, and a semiconductor package structure is illustrated.

[0021] Figure 14 Description Figure 11 A combined cross-sectional view of the heat spreading device, the U-shaped tube, and the main substrate.

[0022] Figure 15 Description Figure 11 A combined cross-sectional view of the electronic device.

[0023] Figure 16 Description of an exploded perspective view of an electronic device according to some embodiments of the present disclosure.

[0024] Figure 17 Description Figure 16 A perspective view of the top U-shaped tube.

[0025] Figure 18 Description Figure 16 A perspective view of the semiconductor package structure.

[0026] Figure 19 Description Figure 16 A combined cross-sectional view of the top U-shaped tube, the semiconductor package structure, the main substrate, and the heat spreading plate.

[0027] Figure 20 Description Figure 16 An exploded perspective view of the heat spreading plate and the bottom U-shaped tube.

[0028] Figure 21 Description Figure 16 A combined cross-sectional view of the electronic device.

[0029] Figure 22 Description of an exploded perspective view of an electronic device according to some embodiments of the present disclosure.

[0030] Figure 23 Description Figure 22 An exploded perspective view of the top connecting element.

[0031] Figure 24 Description Figure 22 A cross-sectional view of the semiconductor package structure.

[0032] Figure 25 Description Figure 22 A perspective view of the straight tube.

[0033] Figure 26 Description Figure 22 A combined cross-sectional view of the main substrate, the semiconductor package structure, and the straight tube.

[0034] Figure 27 Description Figure 22 A bottom exploded perspective view of the bottom connecting element.

[0035] Figure 28 Description Figure 27a combined sectional view of the bottom connecting element of the electronic device.

[0036] Figure 29 DETAILED DESCRIPTION Figure 22 a combined sectional view of the electronic device. DETAILED DESCRIPTION

[0037] Common reference numbers are used throughout the drawings and detailed description to indicate the same or similar components. Embodiments of the present application will be readily understood by the following detailed description in conjunction with the accompanying drawings.

[0038] The following disclosure provides many different embodiments, or examples, for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, in the following description, the formation of a first feature over or on a second feature can include embodiments in which the first and second features are formed in direct contact, and can also include embodiments in which additional features can be formed between the first and second features, such that the first and second features do not directly contact. In addition, the present disclosure can repeat reference numerals and / or letters in various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and / or configurations discussed.

[0039] To comply with the specification of increasing functionality, the number of devices integrated in a semiconductor package structure should be increased. Accordingly, the power density and the number of heat sources are increased, and the thermal resistance is relatively large. In addition, it is difficult to dissipate heat generated by the devices at the center of the semiconductor package structure. To solve the above problems, in some comparative embodiments, a fan is provided. The fan is attached to the semiconductor package structure to dissipate heat at the periphery of the semiconductor package structure through air flow. However, such a fan can not be able to dissipate heat generated by the devices at the center of the semiconductor package structure. In some comparative embodiments, a thermal interface material (TIM) is interposed between the devices and the package substrate. However, the temperature of the devices at the center of the semiconductor package structure can not be greatly reduced.

[0040] At least some embodiments of the present disclosure provide a semiconductor package structure having a highly improved heat dissipation efficiency. In some embodiments, the semiconductor package structure includes a package substrate having a plurality of hollow through-holes for dissipating heat generated by semiconductor dies in the semiconductor package structure.

[0041] Figure 1An exploded perspective view of an electronic device 1 according to some embodiments of the disclosure is illustrated. The electronic device 1 includes a semiconductor package structure 2, a first elastic layer 12, an intermediate block 14, a second layer 16, a main substrate 18, a heat dissipation device 3, and a plurality of U-shaped tubes 4.

[0042] Figure 2 An exploded perspective view of a semiconductor package structure 2 is illustrated. Figure 1 An exploded perspective view of a semiconductor package structure 2 is illustrated. Figure 3 An exploded perspective view of a semiconductor package structure 2 is illustrated. Figure 2 A partially enlarged cross-sectional view of a package substrate 20 and a cap structure 23 is illustrated. Figure 4 A partially enlarged cross-sectional view of a package substrate 20 and a cap structure 23 is illustrated. Figure 1 A cross-sectional view of a semiconductor package structure 2 is illustrated. The semiconductor package structure 2 includes a package substrate 20, a plurality of cap structures 23, a solder paste 24, a semiconductor die 26, a plurality of internal connection elements 27 (e.g., solder bumps), and a plurality of external connection elements 28 (e.g., solder bumps).

[0043] The package substrate 20 has a first surface 201 and a second surface 202 opposite to the first surface 201, and includes a plurality of passivation layers 204 and at least one circuit layer 205. The circuit layer 205 (e.g., a redistribution layer (RDL)) is inserted between the passivation layers 204. The package substrate 20 defines a plurality of first hollow through-holes 203, and further includes a plurality of inner layers 206. The first hollow through-holes 203 extend between the first surface 201 and the second surface 202, and through the package substrate 20. The inner layers 206 are disposed on inner surfaces of the first hollow through-holes 203 to form a plurality of first hollow vias 207. In one embodiment, the inner layers 206 are electroplated layers electroplated on the inner surfaces of the first hollow through-holes 203. The material of the inner layers 206 can be metal, such as copper, aluminum, stainless steel, oxygen-free copper, or other suitable metal. The inner layers 206 do not fill the first hollow through-holes 203 so as to define a plurality of center holes (i.e., the first hollow vias 207). The center holes (i.e., the first hollow vias 207) can be empty and can not be filled by any other material. Thus, the package substrate 20 includes the first hollow vias 207 extending through the package substrate 20. It is noted that the function and size of the first hollow vias 207 are different from those of a conductive via (not shown). The diameter of the first hollow vias 207 can be greater than 100 pm or more, greater than 150 pm or more, or greater than 200 pm or more. The first hollow vias 207 are used for fluid flow or vapor flow for heat dissipation. That is, the first hollow vias 207 are part of a heat dissipation path. In one embodiment, the circuit layer 205, the internal connection elements 27, and the external connection elements 28 can not contact and be electrically isolated from the inner layers 206. Thus, the first hollow vias 207 are not electrically connected to the circuit layer 205, the internal connection elements 27, and the external connection elements 28.

[0044] In contrast, conductive vias can be formed by filling with a conductive material or by electroplating a metal layer followed by filling with an insulating material. That is, conductive vias can be solid vias. The diameter of a conductive via can be less than 100 μm, 80 μm, or 60 μm or smaller. Conductive vias are used for electrical connections. That is, conductive vias can be part of a conductive path. In one embodiment, circuit layer 205, internal connection element 27, and / or external connection element 28 can contact the conductive via. Therefore, the conductive via can be electrically connected to circuit layer 205, internal connection element 27, and / or external connection element 28.

[0045] However, in some embodiments, the first hollow via 207 may be electrically connected to the circuit layer 205, the internal connection element 27, and / or the external connection element 28. Additionally, the inner layer 206 may be omitted, and the inner surface of the first hollow via 203 defines the first hollow via 207.

[0046] like Figure 3 As shown, a portion of the inner layer 206 may extend to the first surface 201 of the packaging substrate 20 to form a plurality of base regions 208. Two first hollow vias 207 may be disposed within one base region 208. A cap structure 23 is disposed between the packaging substrate 20 and the semiconductor die 26, and each of the cap structures 23 defines a cavity 231. The cap structure 23 includes an outer peripheral wall portion 21 and a top cap portion 22. The outer peripheral wall portion 21 and the top cap portion 22 may be made of metal, such as copper, aluminum, stainless steel, oxygen-free copper, or other suitable materials. The outer peripheral wall portion 21 is disposed on the outer periphery of the base region 208 to define the cavity 231. The outer peripheral wall portion 21 may be electroplated on the base region 208. Alternatively, the outer peripheral wall portion 21 and the base region 208 may be formed simultaneously and integrally. The top cap portion 22 covers the outer peripheral wall portion 21, such that the cavity 231 becomes a closed space. In some embodiments, the top cover portion 22 and the outer peripheral wall portion 21 may be formed simultaneously and integrally, such that the cap structure 23 may be a monolithic structure having a cavity 231. The cap structure 23 is then attached to the base region 208 of the packaging substrate 20 to cover both in the first hollow via 207. Therefore, both in the first hollow via 207 are connected to each other through the cavity 231 of the cap structure 23. In some embodiments, solder paste 24 is disposed on the top surface of the top cover portion 22.

[0047] like Figure 4As shown, the semiconductor die 26 is electrically connected to the first surface 201 of the package substrate 20, and the cap structure 23 and the first hollow via 207 are disposed underneath the semiconductor die 26. The semiconductor die 26 has a first surface 261 and a second surface 262 (e.g., an active surface) opposite the first surface 261, and includes internal connection elements 27 (e.g., solder bumps) disposed adjacent to the second surface 262. The semiconductor die 26 is electrically connected to the first surface 201 of the package substrate 20 by the internal connection elements 27 (e.g., solder bumps) with flip-chip bonding. After the first reflow process, the height of the internal connection elements 27 can be substantially equal to the height of the cap structure 23, and the cap structure 23 can be attached to the second surface 262 of the semiconductor die 26 by the solder paste 24. However, the solder paste 24 can be omitted, and the top surface of the top cap portion 22 of the cap structure 23 can directly contact the second surface 262 of the semiconductor die 26. In addition, an underfill 29 (or a molding compound) can be further included to cover and protect the internal connection elements 27 and the cap structure 23. Further, external connection elements 28 (e.g., solder bumps) are disposed adjacent to the second surface 202 of the package substrate 20.

[0048] Figure 5 DESCRIPTION Figure 1 A perspective view of a first elastic layer 12, a middle block 14, and a second layer 16 of the semiconductor package 10 of FIG. 1. The materials of the first elastic layer 12 and the second layer 16 can be rubber or plastic materials. The first elastic layer 12 can define a plurality of through-holes 121, and the second layer 16 can define a plurality of through-holes 161. The material of the middle block 14 can be metal, such as copper, aluminum, stainless steel, oxygen-free copper, or other suitable materials. The middle block 14 can have a uniform thickness and can define a plurality of through-holes 141. The first elastic layer 12 can be disposed on a top surface of the middle block 14, and the second layer 16 can be disposed on a bottom surface of the middle block 14. The through-holes 121 of the first elastic layer 12 and the through-holes 161 of the second layer 16 are aligned with the through-holes 141 of the middle block 14. The first elastic layer 12 and the second layer 16 can increase the sealing effect to prevent fluid or vapor leakage.

[0049] Figure 6 DESCRIPTION Figure 1FIG. 6 is a partially enlarged perspective cross-sectional view of the assembly of the first elastic layer 12, the middle block 14, the second layer 16, and the main substrate 18. The main substrate 18 has a first surface 181 and a second surface 182 opposite the first surface 181, and includes a plurality of passivation layers 184 and at least one circuit layer 185. The circuit layer 185 (e.g., a redistribution layer (RDL)) is interposed between the passivation layers 184. The main substrate 18 defines a plurality of second hollow through-holes 183 and further includes a plurality of inner layers 186. The second hollow through-holes 183 extend between the first surface 181 and the second surface 182 and through the main substrate 18. The inner layers 186 are disposed on inner surfaces of the second hollow through-holes 183 to form a plurality of second hollow vias 187. In one embodiment, the inner layers 186 are electroplated layers electroplated on the inner surfaces of the second hollow through-holes 183. The material of the inner layers 186 can be metal, such as copper, aluminum, stainless steel, oxygen-free copper, or other suitable metal. The inner layers 186 can not fill the second hollow through-holes 183 so as to define a plurality of center holes (i.e., the second hollow vias 187). The center holes (i.e., the second hollow vias 187) can be empty and can not be filled by any other material. Thus, the main substrate 18 includes the second hollow vias 187 extending through the main substrate 18. It is noted that the function and size of the second hollow vias 187 are different from those of the conductive vias (not shown). The diameter of the second hollow vias 187 can be greater than 100 pm or more, greater than 150 pm or more, or greater than 200 pm or more. The second hollow vias 187 are used for fluid flow or vapor flow for heat dissipation. That is, the second hollow vias 187 are part of a heat dissipation path. In one embodiment, the circuit layer 185 and the external connection elements 28 can not contact the inner layers 186 and can be electrically insulated from the inner layers 186. Thus, the second hollow vias 187 can not be electrically connected to the circuit layer 185 and the external connection elements 28. However, in some embodiments, the second hollow vias 187 can be electrically connected to the circuit layer 185 and / or the external connection elements 28. In addition, the inner layers 186 can be omitted, and the inner surfaces of the second hollow through-holes 183 define the second hollow vias 187. As shown, the second hollow vias 187 are aligned with the through-holes 141 of the middle block 14. Thus, the middle block 14 is disposed or inserted between the package substrate 20 and the main substrate 18. The through-holes 141 of the middle block 14 are aligned with and in communication with the second hollow vias 187 and the first hollow vias 207. Figure 6

[0050] Figure 7 DETAILED DESCRIPTION Figure 1 ​A cross-sectional view of an assembly of the heat dissipating device 3. The heat dissipating device 3 includes a condenser structure 30, a first connecting pipe 35, a first channel 37, a second connecting pipe 36, and a second channel 38. The condenser structure 30 includes a cap housing 31 and a bottom wall 32. The cap housing 31 defines an open cavity 33 and includes at least a top wall 311, a first wall 312, and a second wall 313. As shown in Figure 10 , when the bottom wall 32 covers the bottom of the cap housing 31, the open cavity 33 can become a closed chamber 33', that is, the condenser structure 30 can define the closed chamber 33' to contain the second working fluid 34. As shown in Figure 7 , the top wall 311 can define a plurality of through holes 3111 corresponding to the second hollow through holes 187 of the main substrate 18. The first wall 312 can define a through hole 3121, and the first connecting pipe 35 is inserted into the through hole 3121. The first channel 37 is fixed to the first connecting pipe 35. The second wall 313 can define a through hole 3131, and the second connecting pipe 36 is inserted into the through hole 3131. The second channel 38 is fixed to the second connecting pipe 36. Thus, the first channel 37 and the second channel 38 are in communication with the closed chamber 33' (or the open cavity 33) of the condenser structure 30.

[0051] Figure 8 Description Figure 1 A perspective view of the U-shaped tube 4. Each of the U-shaped tubes 4 includes two end portions 41 and a connecting portion 42 connecting the two end portions 41. Each of the end portions 41 includes a main portion 411 and a joint head portion 412. The outer diameter of the joint head portion 412 is smaller than the outer diameter of the main portion 411 so as to form a shoulder portion 43. A first working fluid 44 Figure 9 may be disposed in each of the U-shaped tubes 4.

[0052] Figure 9 Description Figure 1 A combined perspective cross-sectional view of the U-shaped tube 4 and the main substrate 18. The U-shaped tube 4 is disposed under the second surface 182 of the main substrate 18. As shown in Figure 9 , the top wall 311 of the cap housing 31 of the condenser structure 30 is attached (e.g., adhered) to the second surface 182 of the main substrate 18, and the through holes 3111 of the top wall 311 are aligned with the second hollow through holes 187 of the main substrate 18. It is noted that a waterproof material (e.g., an elastic layer) can be inserted or sandwiched between the top wall 311 of the cap housing 31 and the second surface 182 of the main substrate 18. Subsequently, the two end portions 41 of each of the U-shaped tubes 4 pass through (penetrate) the through holes 3111 of the top wall 311 and are respectively connected to two of the second hollow through holes 187, such that the two of the second hollow through holes 187 are in communication with each other through the U-shaped tube 4. As shown in Figure 9As shown in FIG. 6, the joint head portion 412 of the U-tube 4 is inserted into the second hollow through-hole 187 by a tight fit, and the shoulder portion 43 of the U-tube 4 contacts and abuts against the second surface 182 of the main substrate 18. Meanwhile, the bottom portion of each of the U-tubes 4 is disposed or positioned in the cavity 33 of the open cap housing 31. In one embodiment, a solder material 46 can be coated to the bottom surface of the top wall 311 to cover the U-tube 4 in order to improve joint quality and prevent fluid or vapor leakage. Subsequently, the bottom wall 32 of the condenser structure 30 covers the bottom of the cap housing 31, such that the open cavity 33 can become a closed chamber 33' (FIG. 7). Figure 10 Thus, the bottom portion of each of the U-tubes 4 is disposed or positioned in the closed chamber 33' of the condenser structure 30, and the U-tube 4 is thermally connected to the heat spreader 3.

[0053] Figure 10 Description Figure 1 of the electronic device 1. After the semiconductor package structure 2 and the intermediate block 14 (with the first elastic layer 12 and the second layer 16) are placed on the main substrate 18, a second reflow process is performed. Thus, the package substrate 20 of the semiconductor package structure 2 is bonded or attached to the first surface 181 of the main substrate 18 by the external connection elements 28. Meanwhile, the intermediate block 14 (with the first elastic layer 12 and the second layer 16) is sandwiched by the second surface 202 of the package substrate 20 of the semiconductor package structure 2 and the first surface 181 of the main substrate 18. The height of the external connection elements 28 can be substantially equal to the sum of the thicknesses of the intermediate block 14, the first elastic layer 12, and the second layer 16. However, the first elastic layer 12 and the second layer 16 can be omitted, so the top surface of the intermediate block 14 can directly contact the second surface 202 of the package substrate 20, and the bottom surface of the intermediate block 14 can directly contact the first surface 181 of the main substrate 18. Subsequently, the U-tube 4 and the condenser structure 30 are attached or connected to the second surface 182 of the main substrate 18, as shown in FIG. 6. Figure 9

[0054] As Figure 10 ​As shown in FIG. 1, the two U-shaped tubes 4, the four second hollow through holes 187, the four through holes 141 of the middle block 14, the four first hollow through holes 207 and the two cap structures 23 form a closed loop. The closed loop is a closed space for containing the first working fluid 44 and is for a heat dissipation path. The material of the first working fluid 44 can be water, ethanol, acetone, isopropyl alcohol, chlorofluorocarbon (CFC) or other suitable material. In addition, the second working fluid 34 flows in the first channel 37, the closed chamber 33' and the second channel 38, and contacts a portion of each of the U-shaped tubes 4 in the closed chamber 33'. The material of the second working fluid 34 can be water, ethanol, acetone, isopropyl alcohol, chlorofluorocarbon (CFC) or other suitable material. During the operation of the semiconductor die 26, the heat generated by the semiconductor die 26 will be absorbed by the top cover portion 22 of the cap structure 23 to heat the air at the top portion 2071 of the first hollow through hole 207, and then the hot air will move downward to the bottom of the U-shaped tube 4, as shown in the first path 51. Then, the first working fluid 44 of the U-shaped tube 4 will be pressurized to move upward to the top portion 2071 of the first hollow through hole 207 to contact the top cover portion 22 of the cap structure 23, as shown in the second path 52. The first working fluid 44 will absorb the heat generated by the semiconductor die 26 and will become high-temperature fluid or high-temperature vapor. Then, the high-temperature fluid or high-temperature vapor will move downward along the first path 51 to the bottom of the U-shaped tube 4. Then, the high-temperature fluid or high-temperature vapor in the bottom of the U-shaped tube 4 will be cooled by the second working fluid 34 to become liquid, and then will move upward along the second path 52. Therefore, the circulation of the first working fluid 44 and its vapor forms a loop of heat convection. At the same time, the low-temperature second working fluid 34 flows through the first channel 37 into the closed chamber 33' of the condenser structure 30 of the heat dissipation device 3, as shown in the third path 53, and contacts the bottom portion of each of the U-shaped tubes 4 in the closed chamber 33'. Then, the low-temperature second working fluid 34 cools the high-temperature fluid or high-temperature vapor in the bottom of the U-shaped tube 4. Then, the second working fluid 34 becomes high-temperature fluid and flows out of the closed chamber 33' of the condenser structure 30 through the second channel 38, as shown in the fourth path 54. Therefore, the heat generated by the semiconductor die 26 is carried away by the first working fluid 44 and the second working fluid 34. Since the cap structure 23 is very close to the second surface 262 of the semiconductor die 26, i.e., the heat convection loop is very close to the hot spot of the semiconductor die 26, the heat dissipation efficiency is relatively high.

[0055] Figure 11 An exploded perspective view of the electronic device 1a according to some embodiments of the present disclosure is illustrated. The electronic device 1a is similar to the electronic device 1 of FIG. 1, and thus the same reference numerals are used to denote the same components. Figure 1electronic device 1 and the differences are described below. The electronic device 1a includes a semiconductor package structure 2, a first elastic layer 12, an intermediate block 14, a main substrate 18, a plurality of U-shaped tubes 4a, a thermally conductive adhesive material 48, and a heat dissipation device 3a. Figure 11 The semiconductor package structure 2, the first elastic layer 12, the intermediate block 14, and the main substrate 18 of the electronic device 1a are similar to those of the electronic device 1 and the differences are described below. The electronic device 1a includes a semiconductor package structure 2, a first elastic layer 12, an intermediate block 14, a main substrate 18, a plurality of U-shaped tubes 4a, a thermally conductive adhesive material 48, and a heat dissipation device 3a. Figure 1 The semiconductor package structure 2, the first elastic layer 12, the intermediate block 14, and the main substrate 18 of the electronic device 1a are similar to those of the electronic device 1 and the differences are described below. The electronic device 1a includes a semiconductor package structure 2, a first elastic layer 12, an intermediate block 14, a main substrate 18, a plurality of U-shaped tubes 4a, a thermally conductive adhesive material 48, and a heat dissipation device 3a.

[0056] Figure 12 Description Figure 11 A perspective view of the U-shaped tubes 4a of the electronic device 1a. Each of the U-shaped tubes 4a includes two end portions 41 and a connecting portion 42 connecting the two end portions 41. Each of the end portions 41 includes a main portion 411 and a joint head portion 412. The outer diameter of the joint head portion 412 is smaller than the outer diameter of the main portion 411 so as to form a shoulder portion 43. Figure 12 The length of the main portion 411 of the U-shaped tubes 4a of the electronic device 1a is greater than the length of the main portion 411 of the U-shaped tubes 4 of the electronic device 1. Figure 8 The length of the main portion 411 of the U-shaped tubes 4 of the electronic device 1 is greater than the thickness of the main substrate 18. The first working fluid 44 can be disposed in each of the U-shaped tubes 4. In addition, the O-ring 45 can be disposed on the joint head portion 412 and contact the shoulder portion 43. Furthermore, portions of the U-shaped tubes 4a are encased by the thermally conductive adhesive material 48. That is, portions of the U-shaped tubes 4a are embedded in the thermally conductive adhesive material 48, and the main portions 411 of the U-shaped tubes 4a extend through the thermally conductive adhesive material 48. The material of the thermally conductive adhesive material 48 can be a thermally conductive gel, AB glue, or other suitable material.

[0057] Figure 13 Description Figure 11 A combined perspective cross-sectional view of the U-shaped tubes 4a, the main substrate 18, and the semiconductor package structure 2 of the electronic device 1a. The U-shaped tubes 4a are disposed below the second surface 182 of the main substrate 18. The two end portions 41 of each of the U-shaped tubes 4a pass through (penetrate) two of the second hollow through-holes 187 of the main substrate 18 and are respectively connected to the intermediate block 14, so the first hollow through-hole 207 communicates with the U-shaped tubes 4a through the through-holes 141 of the intermediate block 14. As shown in FIG. 6, the joint head portions 412 of the U-shaped tubes 4a are inserted into the through-holes 141 of the intermediate block 14 by a tight fit, and the shoulder portions 43 and / or the O-rings 45 of the U-shaped tubes 4a contact and abut against the bottom surface of the intermediate block 14 to prevent leakage. Figure 13

[0058] Description Figure 14 A combined perspective cross-sectional view of the U-shaped tubes 4a, the main substrate 18, and the semiconductor package structure 2 of the electronic device 1a. The U-shaped tubes 4a are disposed below the second surface 182 of the main substrate 18. The two end portions 41 of each of the U-shaped tubes 4a pass through (penetrate) two of the second hollow through-holes 187 of the main substrate 18 and are respectively connected to the intermediate block 14, so the first hollow through-hole 207 communicates with the U-shaped tubes 4a through the through-holes 141 of the intermediate block 14. As shown in FIG. 6, the joint head portions 412 of the U-shaped tubes 4a are inserted into the through-holes 141 of the intermediate block 14 by a tight fit, and the shoulder portions 43 and / or the O-rings 45 of the U-shaped tubes 4a contact and abut against the bottom surface of the intermediate block 14 to prevent leakage. Figure 11A combined cross-sectional view of the heat dissipating device 3a, the U-shaped tubes 4a, and the main substrate 18. The heat dissipating device 3a includes the heat sink 6 and the thermally conductive adhesive material 48. The heat sink 6 includes a base plate 61 and a plurality of heat dissipating fins 62 disposed on the base plate 61. The base plate 61 defines an opening 63. The opening 63 can extend through the base plate 61 and can be disposed between two heat dissipating fins 62. The size of the opening 63 can be equal to the size of the thermally conductive adhesive material 48, such that the opening 63 can accommodate the thermally conductive adhesive material 48. The portions of the U-shaped tubes 4a and the thermally conductive adhesive material 48 are disposed in the opening 63 of the base plate 61. Thus, the portions of each of the U-shaped tubes 4a are thermally and physically connected to the heat sink 6 by the thermally conductive adhesive material 48.

[0059] Figure 15 Description Figure 11 A combined cross-sectional view of the electronic device 1a. The two U-shaped tubes 4a, the four through holes 141 of the middle block 14, the four first hollow through holes 207, and the two cap structures 23 form a closed loop. The closed loop is a closed space for accommodating the first working fluid 44 and for a heat dissipation path. In addition, the U-shaped tubes 4a are thermally and physically connected to the heat sink 6 by the thermally conductive adhesive material 48. During the operation of the semiconductor die 26, the heat generated by the semiconductor die 26 will be absorbed by the first working fluid 44 in the U-shaped tubes 4a, such that the first working fluid 44 can become a high-temperature fluid or a high-temperature vapor. Subsequently, the high-temperature fluid or the high-temperature vapor in the bottom of the U-shaped tubes 4a will be cooled by the heat sink 6 to become a liquid. Thus, the circulation of the first working fluid 44 and its vapor forms a heat convection loop similar to the heat convection as shown in Figure 10

[0060] Figure 16 An exploded perspective view of the electronic device 1b according to some embodiments of the present disclosure is illustrated. The electronic device 1b is similar to the electronic device 1 of Figure 1 and the differences are described as follows. The electronic device 1b includes a semiconductor package structure 2b, a plurality of top U-shaped tubes 4b, the main substrate 18, a thermal plate 64, a plurality of bottom U-shaped tubes 4c, and a heat dissipating device 3b. The first elastic layer 12, the middle block 14, and the second layer 16 of the electronic device 1 are omitted. Figure 1

[0061] Figure 17 Description Figure 16 A perspective view of the top U-shaped tube 4b is illustrated. Each of the top U-shaped tubes 4b includes two end portions 41 and a connecting portion 42 connecting the two end portions 41. Each of the end portions 41 includes a main portion 411 and a joint head portion 412. The outer diameter of the joint head portion 412 is smaller than the outer diameter of the main portion 411, so as to form a shoulder portion 43. The top surface of the connecting portion 42 can be flat.

[0062] ​​Figure 18 illustrate Figure 16 A perspective view of the semiconductor package structure 2b. The semiconductor package structure 2b includes a package substrate 20, a semiconductor die 26, a top U-shaped channel 4b, and multiple internal connection elements 27 (e.g., solder bumps). Figure 19 ) and multiple external connecting elements 28 (e.g., solder bumps) Figure 19 The end 41 of the top U-shaped tube 4b is pressurized to pass through or extend through the first hollow via 207 of the packaging substrate 20, and the connecting portion 42 of the top U-shaped tube 4b can be disposed on the first surface 201 of the packaging substrate 20. It should be noted that the inner layer 206 on the first hollow via 203 of the packaging substrate 20 can be omitted. Therefore, the first hollow via 207 is defined only by the inner surface of the first hollow via 203. Subsequently, the semiconductor die 26 is attached to the packaging substrate 20 via an internal connection element 27. The second surface 202 of the semiconductor die 26 can directly or via solder paste contact the top surface of the connecting portion 42 of the top U-shaped tube 4b. The connecting portion 42 of the top U-shaped tube 4b is disposed between the packaging substrate 20 and the semiconductor die 16.

[0063] Figure 19 illustrate Figure 16 The diagram shows a combined cross-sectional view of the top U-shaped tube 4b, the semiconductor package structure 2b, the main substrate 18, and the heat dissipation plate 64. The end 41 of the top U-shaped tube 4b extends further through or through (through) the second hollow via 187 of the main substrate 18 to connect to the through-hole 641 of the heat dissipation plate 64. It should be noted that the inner layer 186 on the second hollow via 183 of the main substrate 18 can be omitted. Therefore, the second hollow via 187 is defined only by the inner surface of the second hollow via 183. Additionally, the top surface of the heat dissipation plate 64 can be attached to the second surface 182 of the main substrate 18. The connector head portion 412 of the top U-shaped tube 4b is inserted into the top portion of the through-hole 641 of the heat dissipation plate 64 by a tight fit, and the shoulder portion 43 of the top U-shaped tube 4b contacts and abuts against the top surface of the heat dissipation plate 64. Therefore, the end 41 of the top U-shaped tube 4b connects to the through-hole 641 of the heat dissipation plate 64.

[0064] Figure 20 illustrate Figure 16exploded perspective view of the heat sink plate 64 and the bottom U-tubes 4c. The heat sink plate 64 is disposed below the main substrate 18 and defines a plurality of through holes 641. The material of the heat sink plate 64 can be metal, for example, copper, aluminum, stainless steel, oxygen-free copper, or other suitable material. In addition, the bottom U-tubes 4c are disposed below the heat sink plate 64. Each of the bottom U-tubes 4c includes two end portions 41 and a connecting portion 42 connecting the two end portions 41. Each of the end portions 41 includes a main portion 411 and a joint head portion 412. The outer diameter of the joint head portion 412 is smaller than the outer diameter of the main portion 411 so as to form a shoulder portion 43.

[0065] Figure 21 DESCRIPTION Figure 16 a combined sectional view of the electronic device lb. The joint head portions 412 of the bottom U-tubes 4c are inserted into the bottom portions of the through holes 641 of the heat sink plate 64 by a tight fit, and the shoulder portions 43 of the bottom U-tubes 4c contact and abut against the bottom surface of the heat sink plate 64. Thus, the end portions 41 of the bottom U-tubes 4c connect the through holes 641 of the heat sink plate 6, and the bottom U-tubes 4c communicate with the top U-tubes 4b. In addition, the first working fluid 44 is disposed in the bottom U-tubes 4c. In addition, the heat dissipation device 3b includes the heat sink 7 and a heat pipe 66. The heat sink 7 includes a bottom plate 71 and a plurality of heat sink bars 72 disposed on the bottom plate 71. One end (e.g., a bottom surface) of the heat pipe 66 is connected to the bottom plate 71 of the heat sink 7, and the other end (e.g., a top surface) of the heat pipe 66 is connected to the bottom surface of the heat sink plate 64.

[0066] As shown in Figure 21 the two top U-tubes 4b, the four through holes 641 of the heat sink plate 64, and the two bottom U-tubes 4c form a closed loop. The closed loop is a closed space for containing the first working fluid 44 and for a heat dissipation path. In addition, the heat sink plate 64 is thermally and physically connected to the heat sink 7 by the heat pipe 66. During the operation of the semiconductor die 26, the heat generated by the semiconductor die 26 will be absorbed by the first working fluid 44 in the top U-tubes 4b and the bottom U-tubes 4c, such that the first working fluid 44 can become a high-temperature fluid or high-temperature vapor. Subsequently, the high-temperature fluid or high-temperature vapor in the top U-tubes 4b and the bottom U-tubes 4c will be cooled by the heat sink 7 to become liquid. Thus, the circulation of the first working fluid 44 and its vapor forms a heat convection loop similar to the heat convection shown in Figure 10 .

[0067] Figure 22 An exploded perspective view of an electronic device lc according to some embodiments of the present disclosure is illustrated. The electronic device lc is similar to the electronic device lb shown in Figure 1The electronic device 1c is described below with differences. The electronic device 1c includes a semiconductor package structure 2c, a top connection element 85, a main substrate 18, a plurality of straight tubes 81, a bottom connection element 88, and a heat dissipation device 3c. (Omitted) Figure 1 The first elastic layer 12, the intermediate block 14 and the second layer 16.

[0068] Figure 23 illustrate Figure 22 An exploded perspective view of the top connection element 85. The top connection element 85 is disposed between the package substrate 20 and the semiconductor die 26, and includes a top substrate 83 and a top cover 84. The top substrate 83 has a top surface 831 and a bottom surface 832 opposite to the top surface 831. The top substrate 83 defines a plurality of top recesses 833 recessed from the top surface 831 of the top substrate 83, and a plurality of top holes 834 recessed from the bottom surface 832 of the top substrate 83. At least two top holes 834 communicate with a top recess 833, and the top cover 84 covers the top surface 831 of the top substrate 83. Figure 23 As shown, the top recess 833 does not extend through the top base block 83, and the depth of the top recess 833 may be half the thickness of the top base block 83. Additionally, the top hole 834 may extend through the top base block 83 in the top recess 83. The depth of the top hole 834 may be half the thickness of the top base block 83. Figure 23 As shown, the top base block 83 defines eight top recesses 833 and sixteen top holes 834.

[0069] Figure 24 illustrate Figure 22A cross-sectional view of a semiconductor package structure 2c. The semiconductor package structure 2c includes a package substrate 20, a top connecting element 85, a semiconductor die 26, internal connecting elements 27 (e.g., solder bumps), and external connecting elements 28 (e.g., solder bumps). The top connecting element 85 is attached to the first surface 201 of the package substrate 20 to cover the first hollow through holes 207. Thus, each of the first hollow through holes 207 is in communication with each of the top holes 834 of the top base block 83, and two of the first hollow through holes 207 are in communication with each other through the top recess 833 of the top connecting element 85. It is noted that the inner layer 206 on the first hollow through holes 203 of the package substrate 20 can be omitted. Thus, the first hollow through holes 207 are bounded only by the inner surfaces of the first hollow through holes 203. In some embodiments, solder paste can be disposed on the top surface of the top cap 84. The semiconductor die 26 is electrically connected to the first surface 201 of the package substrate 20, and the top connecting element 85 is disposed under the semiconductor die 26. The semiconductor die 26 is electrically connected to the first surface 201 of the package substrate 20 with flip-chip bonding through the internal connecting elements 27 (e.g., solder bumps). After the first reflow process, the height of the internal connecting elements 27 can be substantially equal to the height of the top connecting element 85, and the top connecting element 85 can be attached to the second surface 262 of the semiconductor die 26 through the solder paste. However, the top surface of the top cap 84 of the top connecting element 85 can directly contact the second surface 262 of the semiconductor die 26.

[0070] Figure 25 DESCRIPTION Figure 22 A perspective view of the straight tubes 81. Each of the straight tubes 81 includes a main portion 811, a top joint head portion 812, and a bottom joint head portion 813. The outer diameter of the top joint head portion 812 is smaller than the outer diameter of the main portion 811, and the outer diameter of the bottom joint head portion 813 is smaller than the outer diameter of the main portion 811.

[0071] Figure 26 DESCRIPTION Figure 22 A combined cross-sectional view of the main substrate 18, the semiconductor package structure 2c, and the straight tubes 81. The semiconductor package structure 2c is electrically and physically connected to the main substrate 18 through the external connecting elements 28. The first hollow through holes 207 of the package substrate 20 are aligned with the second hollow through holes 187 of the main substrate 18. It is noted that the inner layer 186 on the second hollow through holes 183 of the main substrate 18 can be omitted. Thus, the second hollow through holes 187 are bounded only by the inner surfaces of the second hollow through holes 183. Each of the straight tubes 81 passes through (penetrates) each of the second hollow through holes 187 of the main substrate 18 and the first hollow through holes 207 of the package substrate 20. As shown in FIG. 2C, the top connecting element 85 is disposed under the semiconductor die 26, and the top surface of the top cap 84 of the top connecting element 85 directly contacts the second surface 262 of the semiconductor die 26. Figure 26As shown in FIG. 8, the top joint head portion 812 of the straight tube 81 is inserted into the top hole 834 of the top base block 83 by a tight fit. Thus, the top joint head portion 812 of the straight tube 81 connects the top hole 834 of the top base block 83, and the two top joint head portions 812 of the straight tube 81 communicate with each other through the top recess 833 of the top connecting element 85.

[0072] Figure 27 DETAILED DESCRIPTION Figure 22 A bottom exploded perspective view of the bottom connecting element 88 of FIG. 1. Figure 28 DETAILED DESCRIPTION Figure 27 A combined cross-sectional view of the bottom connecting element 88 of FIG. 1. The bottom connecting element 88 is disposed below the main substrate 18 and includes a bottom base block 86, a bottom cover 87, and an extension portion 89. The bottom base block 86 has a first side 861 and a second surface 862 opposite the first side 861, and defines a plurality of bottom recesses 863 recessed from the second surface 862 of the bottom base block 86 and a plurality of bottom holes 864 recessed from the first side of the bottom base block 86. At least two bottom holes 864 communicate with one bottom recess 863, and the bottom cover 87 covers the second surface 862 of the bottom base block 86. As shown in FIG. 1, the bottom cover 87 is disposed on the second surface 862 of the bottom base block 86. Figure 27 and Figure 28 As shown in FIG. 8, the top joint head portion 812 of the straight tube 81 is inserted into the top hole 834 of the top base block 83 by a tight fit. Thus, the top joint head portion 812 of the straight tube 81 connects the top hole 834 of the top base block 83, and the two top joint head portions 812 of the straight tube 81 communicate with each other through the top recess 833 of the top connecting element 85. Figure 27 As shown in FIG. 8, the top joint head portion 812 of the straight tube 81 is inserted into the top hole 834 of the top base block 83 by a tight fit. Thus, the top joint head portion 812 of the straight tube 81 connects the top hole 834 of the top base block 83, and the two top joint head portions 812 of the straight tube 81 communicate with each other through the top recess 833 of the top connecting element 85.

[0073] Figure 29 DETAILED DESCRIPTION Figure 22A cross-sectional view of the electronic device 1c. The bottom connector head portion 813 of the straight tube 81 is inserted into the bottom hole 864 of the bottom base block 86 by a tight fit. Thus, the bottom connector head portion 813 of the straight tube 81 connects to the bottom hole 864 of the bottom base block 86, and the two bottom connector head portions 813 of the straight tube 81 communicate with each other through the bottom recess 863 of the bottom connecting element 88. In addition, a first working fluid 44 is disposed in each of the straight tube 81 and the bottom recess 863. In addition, the heat dissipation device 3c includes a heat sink 9. The heat sink 9 includes a base plate 91 and a plurality of heat dissipation fins 92 disposed on the base plate 91. The base plate 91 defines a recess portion 911 for receiving the bottom connecting element 88.

[0074] like Figure 29 As shown, two straight tubes 81, a top recess 833, and a bottom recess 863 form a closed loop. The closed loop is an enclosed space for containing the first working fluid 44 and serves as a heat dissipation path. Additionally, the bottom connecting element 88 is thermally and physically connected to the heat sink 9. During operation of the semiconductor die 26, the heat generated by the semiconductor die 26 is absorbed by the first working fluid 44 in the straight tubes 81, causing the first working fluid 44 to become a high-temperature fluid or high-temperature vapor. Subsequently, the high-temperature fluid or high-temperature vapor in the straight tubes 81 is cooled by the heat sink 9 to become liquid. Therefore, the circulation of the first working fluid 44 and its vapor is formed... Figure 10 The thermal convection shown is similar to a thermal convection loop.

[0075] Unless otherwise specified, spatial descriptions such as “above,” “below,” “up,” “left,” “right,” “lower,” “top,” “bottom,” “vertical,” “horizontal,” “side,” “above,” “below,” “upper part,” “above,” “below,” etc., indicate relative to the orientation shown in the figures. It should be understood that the spatial descriptions used herein are for illustrative purposes only, and actual embodiments of the structures described herein can be arranged in space in any orientation or manner, provided that the advantages of the embodiments of this disclosure are not deviated from by such arrangement.

[0076] As used herein, the terms“about,”“substantially,”“generally,” and“approximately” are used to describe and account for small variations. When used in connection with an event or circumstance, the terms can refer to instances in which the event or circumstance occurs exactly, and instances in which the event or circumstance occurs in close proximity to. For example, when used in connection with a numerical value, the terms can refer to a range of variation of less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, a first numerical value can be considered“substantially” the same as or equal to a second numerical value if the first numerical value is within a range of variation of less than or equal to ±10% of the second numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example,“substantially” vertical can refer to a range of angular variation of less than or equal to ±10° from 90°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°.

[0077] Two surfaces can be considered coplanar or substantially coplanar if the displacement between the two surfaces does not exceed 5 pm, does not exceed 2 pm, does not exceed 1 pm, or does not exceed 0.5 pm. A surface can be considered substantially flat if the displacement between the highest point and the lowest point of the surface does not exceed 5 pm, does not exceed 2 pm, does not exceed 1 pm, or does not exceed 0.5 pm.

[0078] As used herein, the singular terms“a,”“an,” and“the” can include plural referents unless the context clearly dictates otherwise.

[0079] As used herein, the terms“conductive,”“electrically conductive,” and“conductivity” refer to the ability to transport an electric current. Conductive materials generally indicate those materials that exhibit little or no opposition to the flow of electric current. One measure of conductivity is Siemens per meter (S / m). Generally, conductive materials are those having an electrical conductivity greater than about 10 4 S / m, for example, at least 10 5 S / m, or at least 10 6 S / m. The conductivity of a material can sometimes vary with temperature. Unless otherwise specified, the conductivity of a material is measured at room temperature.

[0080] Additionally, amounts, ratios, and other numerical values are sometimes presented herein in a range format. It is to be understood that such range format is used for convenience and brevity and should be understood as having been preceeded by the words "comprising at least one of" and followed by the words "consisting of' or "consisting essentially of' so as to render equally valid the inference that not only can the numerical limits included in the range be actual values but that any intervening value or values are also contemplated.

[0081] While the disclosure has been described and illustrated with reference to specific embodiments thereof, these descriptions and illustrations are not intended to be limiting. Those skilled in the art will appreciate that various modifications can be made to the processes described and substitutions of equivalent elements can be made without departing from the true spirit and scope of the disclosure as defined by the appended claims. The drawings can not be to scale. Differences between process reproductions and actual equipment in the disclosure can exist due to manufacturing processes and tolerances. Other embodiments of the disclosure can exist that are not specifically illustrated. The specification and drawings are, accordingly, to be regarded as illustrative rather than a restriction on the scope of the disclosure. Modifications can be made to adapt a specific situation, material, composition of matter, method, or process to the objective, spirit and scope of the disclosure. All such modifications are intended to be within the scope of the claims. Although the methods disclosed herein have been described with reference to particular operations performed in a particular order, it will be understood that these operations can be combined, sub-divided, or re-ordered to form equivalent methods without departing from the teachings of the present disclosure. Accordingly, unless specifically indicated otherwise, the order and grouping of operations is not a limitation of the present disclosure.

Claims

1. An electronic device comprising: a semiconductor package structure comprising: a package substrate including a plurality of first hollow vias extending through the package substrate; a semiconductor die electrically connected to the package substrate; and a plurality of cap structures disposed between the package substrate and the semiconductor die, wherein each of the cap structures defines a cavity; a host substrate electrically connected to the package substrate, wherein the host substrate includes a plurality of second hollow vias extending through the host substrate; an intermediate block disposed between the package substrate and the host substrate and defining a plurality of through-holes; a plurality of U-shaped tubes disposed below the host substrate, two ends of each of the U-shaped tubes being connected to two of the second hollow vias, respectively, wherein the plurality of U-shaped tubes, the plurality of second hollow vias, the plurality of through-holes of the intermediate block, the plurality of first hollow vias, and the plurality of cap structures form a closed loop; and a first working fluid disposed in the closed loop.

2. The electronic device of claim 1, further comprising: a heat dissipation device for dissipating heat of the first working fluid.

3. The electronic device of claim 2, wherein the heat dissipation device includes a condenser structure, a first channel, a second channel, and a second working fluid, the condenser structure defining an enclosed chamber, a portion of each of the U-shaped tubes being disposed in the enclosed chamber of the condenser structure, the first channel and the second channel being in communication with the enclosed chamber of the condenser structure, and the second working fluid flowing in the first channel, the enclosed chamber, and the second channel and contacting the portion of each of the U-shaped tubes in the enclosed chamber.

4. The electronic device of claim 3, further comprising: a solder material disposed within the enclosed chamber and coated to a bottom surface of a top wall of the condenser structure to cover the U-shaped tubes.

5. The electronic device of claim 2, wherein the heat dissipation device includes a heat sink and a thermally conductive adhesive material, a portion of each of the U-shaped tubes being connected to the heat sink by the thermally conductive adhesive material.

6. The electronic device of claim 5, wherein the heat sink includes a base plate and a plurality of heat dissipation fins disposed on the base plate, the base plate defining an opening, and the portion of the U-shaped tubes and the thermally conductive adhesive material being disposed in the opening of the base plate.

7. An electronic device comprising: a semiconductor package structure comprising: a package substrate including a plurality of first hollow vias extending through the package substrate; and a semiconductor die electrically connected to the package substrate; a host substrate electrically connected to the package substrate, wherein the host substrate includes a plurality of second hollow vias extending through the host substrate; a heat spreader plate disposed below the host substrate and defining a plurality of through-holes; a plurality of top U-shaped tubes extending through the first hollow vias of the package substrate and the second hollow vias of the main substrate to connect the through holes of the heat spreader and connection portions of the top U-shaped tubes are disposed between the package substrate and the semiconductor die; a plurality of bottom U-shaped tubes disposed below the heat spreader and connecting the through holes of the heat spreader and the bottom U-shaped tubes are in communication with the top U-shaped tubes, wherein the plurality of top U-shaped tubes, the plurality of through holes of the heat spreader and the plurality of bottom U-shaped tubes form a closed loop; and a first working fluid disposed in the closed loop.

8. The electronic device of claim 7, further comprising a heat sink and a heat pipe connecting the heat sink and the heat spreader.

9. The electronic device of claim 8, wherein the heat sink includes a base plate and a plurality of heat sink bars disposed on the base plate, the heat pipe connecting the base plate of the heat sink.

10. An electronic device comprising: a semiconductor package structure comprising: a package substrate including a plurality of first hollow vias extending through the package substrate; and a semiconductor die electrically connected to the package substrate; and a top connecting element disposed between the package substrate and the semiconductor die and defining a plurality of top grooves; a main substrate electrically connected to the package substrate, wherein the main substrate includes a plurality of second hollow vias extending through the main substrate; a bottom connecting element disposed below the main substrate and defining a plurality of bottom grooves; and a plurality of straight tubes extending through the first hollow vias of the package substrate and the second hollow vias of the main substrate and connecting the top connecting assembly and the bottom connecting assembly, wherein the plurality of straight tubes, the top grooves and the bottom grooves form a closed loop; and a first working fluid disposed in the closed loop.

11. The electronic device of claim 10, wherein each of the straight tubes includes a main portion, a top junction head portion and a bottom junction head portion, two top junction head portions of the straight tubes are in communication with each other by a top connecting element and two bottom junction head portions of the straight tubes are in communication with each other by a bottom connecting element.

12. The electronic device of claim 11, wherein the top connecting element includes a top base block and a top cover, the top base block defining a plurality of top recesses recessed from a top surface of the top base block and a plurality of top holes recessed from a bottom surface of the top base block, at least two top holes communicating with one top recess, the top cover covering the top surface of the top base block, and the top joint head portion of the straight tube connecting the top holes of the top base block; the bottom connecting element includes a bottom base block and a bottom cover, the bottom base block defining a plurality of bottom recesses recessed from a bottom surface of the bottom base block and a plurality of bottom holes recessed from a top side of the bottom base block, at least two bottom holes communicating with one bottom recess, the bottom cover covering the bottom surface of the bottom base block, and the bottom joint head portion of the straight tube connecting the bottom holes of the bottom base block.

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