A data synchronization solid state hard disk system

Abstract

The present invention discloses a data synchronization solid-state hard disk system, including a plurality of solid-state hard disks, an Ethernet network switch and a control unit, each solid-state hard disk includes a solid-state hard disk control chip, a data processing unit, a Nand Flash storage chip, a computer power switch controller, a DDR data storage device and an Ethernet network chip, the solid-state hard disk is divided into a main disk and a plurality of sub-disks, and the main disk also includes a control panel. A software system for realizing a fast copy of a main disk by a sub-disk through a proprietary Ethernet network realizes a one-to-many high-speed data copy from the main disk to the sub-disk, the whole process is transparent to the terminal host and the operating system, and is directly completed at the read-write access level of the Nand Flash chip at the bottom of the data storage.

Description

Technical Field

[0001] The present invention relates to a data synchronization solid state hard disk system, in particular to a solid state hard disk system that realizes a sub-disk to quickly and automatically copy a main disk software system, and belongs to an efficient management device for a teaching and training room software system. Background Art

[0002] In education and training computer rooms, dozens of student computers often have the same hardware and software configurations. How to share a set of software configurations to reduce the workload of computer room software installation and maintenance? There are two main existing technologies:

[0003] 1) In Chinese patent 200910140726.4, the ISCSI protocol, also known as IP-SAN, is used to encapsulate the external interface of the solid-state drive into an Ethernet network interface to realize a network storage hard disk. The terminal computer can access the content of this network storage hard disk through the Ethernet network, and several terminal computers can share a software system.

[0004] Similarly, a computer can be used to run the ISCSI protocol, and the terminal computer can access the storage content specified by this computer through the Ethernet network, so that several terminal computers can share a software system.

[0005] 2) Use the tool software of the network simultaneous interpretation software system, that is, first install the software system on the hard disk of a computer as the master copy, and then guide all student computers to synchronously load specific tool software through the network, and transmit the master copy data to other computers. Other computers receive the data and copy the data to their own hard disks. After the copying is completed, other computers will get the software system that is exactly the same as the master copy.

[0006] The existing technical solutions using the ISCSI protocol have the following main defects:

[0007] 1) The external data interface of the disk is encapsulated into Ethernet data packets. When the terminal computer accesses the disk through the network, it needs to perform a large number of Ethernet data packet unpacking and encapsulation operations, which consumes the terminal computer's CPU computing power and causes the terminal computer's performance to decline.

[0008] 2) The external data interface of the disk is encapsulated into an Ethernet network. According to the 1000M Ethernet commonly used in terminal computers at this stage, the theoretical bandwidth of Ethernet for each terminal computer is about 100MB, and the actual bandwidth is about 30MB, which is much lower than the current bandwidth of solid-state hard disks of about hundreds to thousands of MB, resulting in slow startup of terminal computers and poor disk performance.

[0009] 3) When a terminal computer accesses an ISCSI disk, the essence of this is to convert the terminal computer network card data into disk data through software, which inevitably leads to some compatibility issues. For example, running some software will restart the network card, which will cause disk data interruption and may cause software failure.

[0010] The existing technical solutions using tool software of network simultaneous interpretation software system have the following main defects:

[0011] 1) A software system often contains tens to hundreds of GB of data. If the terminal computer is configured with a 1000M Ethernet card with a good performance-price ratio at this stage, the theoretical maximum data transmission speed is about 100MB per second, but in reality it can only reach about 30MB. It takes about 2000 seconds to transmit a 60GB software system, which is very time-consuming.

[0012] 2) The operation process of the tool software of the network simultaneous interpretation software system is relatively complicated. First, the master disk needs to be installed on a computer, and then a network server is manually set up. All computers that need the simultaneous interpretation software system are manually set to network startup mode. The tool software of the simultaneous interpretation software system is loaded from the network server through the network startup mode. The computer with the master disk is set as the master end, and the rest are slaves. After all the slaves log in to the master end, data transmission begins. After the simultaneous interpretation is completed, the network server is closed, and all computers are manually set to local hard disk startup mode. It has high requirements for operators and is time-consuming and labor-intensive. Summary of the invention

[0013] In order to improve the efficiency of updating the software system of a teaching and training computer room, the present invention provides a data synchronization solid state hard disk system.

[0014] The technical solution adopted by a data synchronization solid-state hard disk of the present invention is as follows: a data synchronization solid-state hard disk system, characterized in that it includes a plurality of solid-state hard disks, an Ethernet switch and a control unit, each solid-state hard disk includes a solid-state hard disk control chip, a data processing unit, a Nand Flash storage chip, a computer power switch controller, a DDR data storage device and an Ethernet chip, and the solid-state hard disk is divided into a main disk and a plurality of sub-disks;

[0015] The solid state drive control chip is connected to the first interface of the data processing unit, the second interface of the data processing unit is connected to the Nand Flash storage chip, the third interface of the data processing unit is connected to the DDR data storage device, the fourth interface of the data processing unit is connected to the Ethernet chip, and the fifth interface of the data processing unit is connected to the computer power switch controller;

[0016] A software system that quickly copies data from a master disk to a slave disk through a proprietary Ethernet network. This allows for one-to-many high-speed data copying from the master disk to the slave disks. The entire process is transparent to the terminal host and operating system, and is completed directly at the read-write access level of the NandFlash chip at the bottom of the data storage layer.

[0017] Furthermore, the main disk also includes a control panel, and the sixth interface of the data processing unit of the main disk is connected to the control panel.

[0018] The solid state drives are each connected to a computer hard disk interface and a power supply, and the computer hard disk interface includes SATA, mSATA, M.2 SATA, SAS, PCIE, and M.2 Nvme.

[0019] The solid-state hard disk control chip is a universal solid-state hard disk control chip, which is used for reading and writing data of a standard hard disk interface, including a SATA or PCIE or NVME solid-state hard disk control chip. The solid-state hard disk control chip can be integrated into a data processing unit.

[0020] The data processing unit is a data processing circuit composed of FPGA, CPLD or ASIC, which receives commands from the control unit, enters the corresponding working mode according to functional requirements, and sends, receives and processes data from the solid state drive control chip, Nand Flash, and Ethernet.

[0021] When a computer starts a software system, it needs to read data from the hard disk. Although the software system generally has dozens of GB, the data that the computer actually needs to read from the startup to the software system is about a few hundred MB to 1GB. If the data that the main disk computer actually needs to read from the startup to the software system is copied to the sub-disk, then only a small amount of data of about 1GB needs to be copied, and the sub-disk computer can start normally, realizing the rapid copying of the main disk software system; in the process of starting the software system, the main disk computer will read the hard disk data (data that exists before startup, static data), and will also write some data (data generated after startup, dynamic data). The data copied to the sub-disk must all be static data to achieve 1:1 copying of the mother disk data; in order to distinguish dynamic data, a main disk data address mapping list 1 is set up to record and redirect the written data, redirect the writing to the reserved blank area of ​​the main disk, and by querying the main disk data address mapping list 1, it is realized that only static data is passed to the sub-disk for copying;

[0022] The sub-disk quickly copies the software system of the main disk, and only copies a small amount of data necessary to start the software system. At the same time, due to the characteristics of Nand Flash, there are some limitations on random bad blocks and write order, so it is impossible to achieve 1:1 physical location corresponding replication. Therefore, the address mapping list 2 of the sub-disk data is established to record the original address and actual write address of the data copied to the sub-disk. When the sub-disk solid state drive control chip reads data at the original address, the data processing unit obtains the actual write address by looking up the table, obtains data from the actual write address and returns it to the sub-disk solid state drive control chip, so as to realize the transparency of the actual data of the sub-disk to the sub-disk solid state drive control chip. If the data processing unit cannot obtain the actual write address by looking up the table, then the local Nand Flash of the sub-disk does not contain these data, and then a real-time request is made to the main disk through the network. The main disk data processing unit reads data from the main disk Nand Flash in real time and transmits the data to the sub-disk. The sub-disk receives data in two ways. One way sends the data to the sub-disk solid state drive control chip to meet the needs of the sub-disk computer program running, and the other way writes the data to the local blank area. At the same time, the original address and the actual write address and their mapping relationship are recorded in the second address mapping list of the sub-disk data. Then, the next time the same data is read, there is no need to request the main disk, but it can be directly read locally according to the list, and then the second address mapping list of the sub-disk data is saved in the designated area of ​​the Nand Flash of the sub-disk in time. The address mapping list of the sub-disk data can be read into the DDR data memory in the designated area of ​​the Nand Flash of the sub-disk when the computer is turned on next time.

[0023] During normal boot, the master disk sets up an address mapping list 1 for the master disk data, records and redirects the written data, and redirects it to a reserved blank area. The next time you boot, the content of the list can be discarded or retained. If discarded, all operations of this boot will be ignored, which is usually called a restore boot. If retained, all operations of this boot will be inherited, which is usually called a non-restore boot. During normal boot, the sub-disk sets up an address mapping list 1 for the sub-disk data, records and redirects the written data, and redirects it to a reserved blank area. The next time you boot, the content of the list can be discarded or retained. If discarded, all operations of this boot will be ignored, which is usually called a restore boot. If retained, all operations of this boot will be inherited, which is usually called a non-restore boot.

[0024] The beneficial effects achieved by the present invention are:

[0025] The present invention adds a data processing unit, an independent DDR data storage device, and an Ethernet network circuit to an ordinary solid-state hard disk circuit, and is controlled by a control panel or a network. Through a proprietary Ethernet network, a software system for quickly copying a sub-disk to a master disk is implemented, and a one-to-many fast data copy from the master disk to the sub-disk is implemented. The entire process is transparent to the terminal host and the operating system, and is directly completed at the read-write access level of the Nand Flash chip at the bottom of the data storage. The response speed is fast and the compatibility is good. In application scenarios where the software systems of several computers are exactly the same, such as dozens of student computers in a training room of a school, as long as the system and software are installed on a student computer mounted with the master disk, it can be automatically synchronized to other student computers mounted with the sub-disks, which can greatly reduce the installation and maintenance workload of the software system. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Other features and advantages of the invention can be obtained from the description of the preferred embodiments of the invention and the claims in conjunction with the accompanying drawings. In this case, the individual features of the different embodiments shown in the drawings can be combined in any desired manner without exceeding the scope of the invention. In the drawings:

[0027] Figure 1 It is a structural principle block diagram of the present invention;

[0028] Figure 2 is a principle block diagram of embodiment 1 of the present invention;

[0029] Figure 3 This is a flow chart of Embodiment 2 of the present invention;

[0030] Figure 4 This is a flow chart of Embodiment 3 of the present invention;

[0031] Figure 5 This is a flow chart of Example 4 of the present invention.

[0032] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0034] Example 1

[0035] like Figure 2As shown, in this embodiment, the main disk 001 software system preparation mode: under the control of the control unit 9 or the control panel 8, the main disk 001 and the sub-disk 002 enter mode 1, the main disk 001 data processing unit 3 directly forwards the data between the solid state drive control chip and the Nand Flash storage chip 4, the solid state drive control chip 2 and the Nand Flash storage chip 4 are logically connected, the main disk 001 is equivalent to a general solid state drive, and the system can be started in a general way, and various operations such as software installation can be performed. After the required software system is installed, the main disk 001 computer is turned off through the computer power switch 5. The sub-disk 002 has no operation in this mode.

[0036] Example 2

[0037] like Figure 3 As shown, in this embodiment, the sub-disk 002 automatically copies the software system of the main disk 001: under the control of the control unit 9 or the control panel 8, the main disk 001 and the sub-disk 002 enter mode 2, the data processing unit 3 of the main disk 001 first creates an address mapping list 1 of the data of the main disk 001 in the DDR data memory 6 to record the write operation to the Nand Flash storage chip 4 at this startup; the data processing unit 3 of the sub-disk 002 first creates an address mapping list 2 of the data of the sub-disk 002 in the DDR data memory 6 to record the original address of the data received by the sub-disk from the Ethernet network and the actual address written to the Nand Flash and their mapping relationship; then the data processing unit 3 of the main disk 001 automatically starts the computer of the main disk 001, and the access of the solid state hard disk control chip 2 of the main disk 001 to the Nand Flash storage chip 4 will first be transmitted to the data processing unit 3 of the main disk 001;

[0038] If it is a write operation of the master disk 001 SSD controller to the Nand Flash storage chip 4, the master disk 001 data processing unit 3 will change the original address of the write operation, write it into the blank area reserved in advance in the master disk 001 Nand Flash storage chip 4, and save the original address and the actual write address and their mapping relationship in the address mapping list 1 of the master disk 001 data;

[0039] If it is a read operation on the Nand Flash storage chip 4, the main disk 001 data processing unit 3 first checks the address mapping list 1 of the main disk 001 data. If the address mapping list 1 of the main disk 001 data does not have a corresponding mapping address, the original address data of the Nand Flash storage chip 4 of the main disk 001 is read, and then the data is copied into two paths, one path is submitted to the main disk 001 solid state hard disk control chip, and the other path submits the data and its corresponding original address information to the sub-disk 002 through the Ethernet network. After receiving the data, the data processing unit 3 of the sub-disk 002 writes the data into the blank area of ​​the Nand Flash storage chip 4 of the sub-disk 002, and records the original address of the data and the actual address written to the Nand Flash storage chip 4 of the sub-disk 002 and their mapping relationship in the address mapping list 2 of the sub-disk 002 data; if the address mapping list 1 of the main disk 001 data has a corresponding mapping address, it means that the data at the address is dynamic data created instantly during this startup, not static data, and the data read from the mapping address can be transmitted to the main disk 001 solid state hard disk control chip 2 without being transmitted to the sub-disk 002.

[0040] After the computer on the main disk 001 starts to enter the software system, all the static data required by the computer on the main disk 001 to enter the software system is transferred to the sub-disk 002 and written into the Nand Flash storage chip 4 of the sub-disk 002, which means that the sub-disk 002 has copied all the data required to start the software system. The time spent on this process is basically the same as the time taken by an ordinary computer equipped with an SSD solid state drive to start the software system, which takes about 20 seconds.

[0041] Example 3

[0042] like Figure 4 As shown, in this embodiment, after the sub-disk 002 copies the software system of the main disk 001, it starts normally: under the control of the control unit 9 or the control panel 8, the main disk 001 and the sub-disk 002 enter mode three, the data processing unit 3 of the main disk 001 and the sub-disk 002 first creates the address mapping list 1 of the data of the main disk 001 and the sub-disk 002 in the DDR data memory 6 to record the write operation of the Nand Flash storage chip 4 at this startup, the data processing unit 3 of the sub-disk 002 transfers the address mapping list 2 of the data from the specified position of the Nand Flash storage chip 4 of the sub-disk 002 into the DDR data memory 6, and then the data processing unit 3 controls the main disk 001 computer and the sub-disk 002 computer to start, and the access of the solid state hard disk control chip to the Nand Flash storage chip 4 is first transmitted to the data processing unit 3;

[0043] If it is a write operation to the Nand Flash memory chip 4, the data processing unit 3 will change the original address of the write operation, write it into the blank area reserved in advance in the Nand Flash memory chip 4, and record the original address and the actual write address and their mapping relationship in the data address mapping list 1, and save the data address mapping list 1 in the designated area of ​​the Nand Flash memory chip 4 of the main disk 001 and the sub-disk 002;

[0044] If it is a read operation on the Nand Flash storage chip 4, the data processing unit 3 first checks the address mapping list 1 of the data to determine whether there is a mapping address. If so, the content corresponding to the mapping address is read and transmitted to the solid-state hard disk control chip. If not, the main disk 001 reads the original address content of Nand Flash and transmits it to the main disk 001 SSD controller. The sub-disk 002 checks the address mapping list 2 of the sub-disk 002 data to see if there is a mapping address. If so, the content of the sub-disk 002 Nand Flash storage chip 4 corresponding to the mapping address is read and transmitted to the solid-state hard disk control chip. If not, a request is made to the main disk 001 through the network. The main disk 001 data processing unit 3 will read the corresponding address content of the main disk 001 Nand Flash storage chip 4 and transmit it to the sub-disk 002. After receiving the data, the sub-disk 002 data processing unit 3 will copy it into two paths, one path is transmitted to the sub-disk 002 solid-state hard disk control chip, and the other path is written to the sub-disk 002 Nand The Flash storage chip 4 has a blank area, and saves the original address and the mapped address and their mapping relationship in the address mapping list 2 of the sub-disk 002 data, and then saves the address mapping list 2 of the sub-disk 002 data to the specified position of the sub-disk 002 Nand Flash storage chip 4 in time.

[0045] The next time you start up, the content of the data address mapping list 1 can be discarded or retained. If discarded, all write operations to the disk during this startup will be ignored, which is usually called a system restore startup; if retained, the system will continue to run based on the current operation, which is usually called a system non-restore startup.

[0046] Example 4

[0047] like Figure 5As shown, in this embodiment, a one-to-many high-speed data copy is performed between the main disk 001 and the sub-disks. Take the main disk 001 and the sub-disk 002 as an example: under the control of the control unit 9 or the control panel 8, the main disk 001 and the sub-disk 002 enter mode 4, the data processing unit 3 of the sub-disk 002 first erases the Nand Flash storage chip 4 of the sub-disk 002, and after the sub-disk 002 is erased, an address mapping list 2 of the sub-disk data is established in the DDR data memory 6 of the sub-disk 002, and then the main disk 001 is notified that the Nand Flash erasure of the sub-disk 002 is completed. After the main disk 001 receives the notification that all sub-disks have been erased, the main disk 001 reads the contents of the Nand Flash storage chip 4 in sequence and broadcasts it to the sub-disk 002 through the dedicated Ethernet network. After the data processing unit 3 of the sub-disk 002 receives the data, the data is written into the Nand Flash storage chip 4 of the sub-disk 002. The blank area of ​​the Flash storage chip 4 is recorded in the address mapping list 2 of the sub-disk 002 data, and the original address of the data in the main disk 001 and the address actually written into the sub-disk 002 Nand Flash storage chip 4 and their mapping relationship are recorded, and then the mapping list information is promptly saved in the specified area of ​​the sub-disk 002 Nand Flash storage chip 4. After all the valid data of the main disk 001 are transmitted to the sub-disk 002, the sub-disk 002 logically copies all the data of the main disk 001 1:1 through the address mapping relationship recorded in the address mapping list 2 of the sub-disk 002 data; the network of the main disk 001 and the sub-disk 002 is controlled by the Ethernet network of the data processing unit 3 (FPGA, CPLD, ASIC) hardware logic unit, and its operating efficiency is higher than the usual software mode (CPU controls the network card data transmission and reception). The actual data transmission rate of the 1000M network card of the terminal computer in the usual software mode is only about 30MB / S, and it can be as high as about 100MB / S using the hardware logic unit control mode.

[0048] The switching of the four modes can be completed through the control panel 8 (control unit 9-1) or a network control host (control unit 9-2), and can be completed automatically and quickly with a single key selection. Compared with the traditional mode, it greatly reduces the complexity of operation and saves a lot of operation time.

[0049] The above are only preferred embodiments of the present invention, and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A data synchronization solid state hard disk system, characterized in that: It includes several solid-state hard disks, an Ethernet network switch and a control unit. Each solid-state hard disk includes a solid-state hard disk control chip, a data processing unit, a Nand Flash storage chip, a computer power switch controller, a DDR data storage device and an Ethernet network chip. The solid-state hard disk is divided into a main disk and several sub-disks. The solid state drive control chip is connected to the first interface of the data processing unit, the second interface of the data processing unit is connected to the Nand Flash storage chip, the third interface of the data processing unit is connected to the DDR data storage device, the fourth interface of the data processing unit is connected to the Ethernet chip, and the fifth interface of the data processing unit is connected to the computer power switch controller; The data processing unit is a data processing circuit composed of FPGA, CPLD or ASIC, which receives the command of the control unit, enters the corresponding working mode according to the functional requirements, and sends, receives and processes the data of the solid state drive control chip, Nand Flash and Ethernet; A software system that implements rapid replication of a master disk to a slave disk through a proprietary Ethernet network, and implements one-to-many high-speed data replication from a master disk to a slave disk. The entire process is transparent to the terminal host and the operating system, and is completed directly at the read-write access level of the Nand Flash chip at the bottom layer of data storage. The rapid replication of a master disk to a slave disk specifically includes: The master disk data processing unit creates an address mapping list 1 of the master disk data in the DDR data memory, recording the write operation to the NandFlash storage chip during this startup; The sub-disk data processing unit first creates the second sub-disk data address mapping list in the DDR data memory, recording the original address of the data received by the sub-disk from the Ethernet network and the actual address written into the NandFlash and their mapping relationship; then the main disk data processing unit automatically turns on the main disk computer, and the access of the main disk solid state hard disk control chip to the NandFlash storage chip will first be transmitted to the main disk data processing unit; If the main disk SSD controller writes to the NandFlash storage chip, the main disk data processing unit changes the original address of the write operation and writes it into the blank area reserved in advance in the main disk NandFlash storage chip, and saves the original address and the actual write address and their mapping relationship in the address mapping table 1 of the main disk data; If it is a read operation on the NandFlash storage chip, the data processing unit of the main disk first checks the address mapping list 1 of the main disk data. If there is no corresponding mapping address in the address mapping list 1 of the main disk data, the original address data of the NandFlash storage chip of the main disk is read, and then the data is copied into two paths, one of which is submitted to the main disk solid state hard disk control chip, and the other path submits the data and its corresponding original address information to the sub-disk through the Ethernet network. After receiving the data, the data processing unit of the sub-disk writes the data into the blank area of ​​the NandFlash storage chip of the sub-disk, and records the original address of the data and the actual address written into the NandFlash storage chip of the sub-disk and their mapping relationship in the address mapping list 2 of the sub-disk data; If the address mapping list of the main disk data has a corresponding mapping address, it means that the data at the address is dynamic data created immediately during this startup, not static data. The data at the mapping address is read and transmitted to the main disk solid state drive control chip without being transmitted to the sub-disk.

2. A data synchronization solid state hard disk system according to claim 1, characterized in that: The main disk also includes a control panel, and a sixth interface of the data processing unit of the main disk is connected to the control panel.

3. The data synchronization solid state hard disk system according to claim 1, characterized in that: The solid state drives are each connected to a computer hard disk interface and a power supply, and the computer hard disk interface includes SATA, mSATA, M.2 SATA, SAS, PCIE, and M.2 Nvme.

4. The data synchronization solid state hard disk system according to claim 1, characterized in that: The solid-state hard disk control chip is a universal solid-state hard disk control chip, which is used for reading and writing data of a standard hard disk interface, including a SATA or PCIE or NVME solid-state hard disk control chip. The solid-state hard disk control chip is integrated in a data processing unit.

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