Transparent display device

Abstract

A transparent display device is provided, comprising: a base substrate; a plurality of pixels arranged on the base substrate, each pixel having an emission region and a transmission region transparent to external light; a circuit element layer arranged on the base substrate; a first electrode arranged on the circuit element layer and corresponding to the emission region; a pixel defining layer arranged on the circuit element layer, the pixel defining layer comprising a first side wall defining the emission region and a second side wall defining the transmission region; an emission layer arranged on the first electrode and corresponding to the emission region; and a second electrode arranged on the emission layer and comprising an opening corresponding to the transmission region, wherein the first side wall is inclined at a first angle, and the second side wall is inclined at a second angle greater than the first angle.

Description

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0021366, filed on February 22, 2019, which is hereby incorporated by reference for all purposes as if fully set forth herein. Technical Field

[0002] Exemplary embodiments of the invention relate generally to a transparent display device, and more particularly, to a transparent display device having improved transmittance. Background Art

[0003] A display device is a device that displays an image, and organic light emitting display devices have recently been receiving attention. The organic light emitting display devices have excellent characteristics such as lower power consumption, higher brightness, and faster response speed than conventional display devices.

[0004] The organic light emitting display device may include a transparent light emitting display panel and have a transparent property. The transparent light emitting display panel may include pixels, each pixel having a transmission area that allows light to pass through. In this way, a user can recognize an image displayed by the pixels of the display panel and perceive an object or image behind the display panel through light passing through the transmission area.

[0005] The above information disclosed in this Background section is only for understanding the background of the inventive concept and therefore it may contain information that does not constitute the prior art. Summary of the invention

[0006] A transparent display device constructed according to an exemplary embodiment of the invention has improved transmittance.

[0007] Additional features of the inventive concepts will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the inventive concepts.

[0008] A transparent display device according to an exemplary embodiment includes a base substrate and a plurality of pixels arranged on the base substrate, each pixel having an emission area and a transmission area transparent to external light. Each pixel includes: a circuit element layer arranged on the base substrate; a first electrode arranged on the circuit element layer and corresponding to the emission area; a pixel defining layer arranged on the circuit element layer, the pixel defining layer including a first side wall defining the emission area and a second side wall defining the transmission area; an emission layer arranged on the first electrode and corresponding to the emission area; and a second electrode arranged on the emission layer and including an opening corresponding to the transmission area. The first side wall is inclined at a first angle, and the second side wall is inclined at a second angle greater than the first angle.

[0009] A method for manufacturing a transparent display device according to an exemplary embodiment, which includes a plurality of pixels each having an emission area and a transmission area transparent to external light, includes the following steps: forming a circuit element layer on a top surface of a base substrate; forming a first electrode corresponding to the emission area on the circuit element layer; forming a pixel defining layer defining the emission area and the transmission area on the circuit element layer; forming an initial organic layer corresponding to the emission area and the transmission area on the first electrode; forming an electrode layer covering the initial organic layer; heating a portion of the initial organic layer disposed in the transmission area to separate the portion of the initial organic layer from the circuit element layer; and removing the portion of the initial organic layer separated from the circuit element layer and a portion of the electrode layer to form an organic layer and a second electrode, each of the organic layer and the second electrode having an opening corresponding to the transmission area.

[0010] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The accompanying drawings illustrate exemplary embodiments of the invention and together with the description serve to explain the inventive concept, wherein the accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification.

[0012] Figure 1 is a front view of a transparent display device according to an exemplary embodiment.

[0013] Figure 2 is a cross-sectional view exemplarily illustrating a transparent display device according to an exemplary embodiment.

[0014] Figure 3 is a plan view of a pixel structure of a transparent display panel according to an exemplary embodiment.

[0015] Figure 4 It is along Figure 3 The line I-I' is taken to show Figure 3 A cross-sectional view of a display element layer of a transparent display panel.

[0016] Figure 5 It is shown Figure 4 An enlarged view of part II.

[0017] Figure 6 is a cross-sectional view of a transparent display panel according to an exemplary embodiment.

[0018] Figure 7 yes Figure 6 Magnified view of part III.

[0019] Figure 8is a plan view illustrating a circuit configuration of each pixel of a transparent display panel according to an exemplary embodiment.

[0020] Fig.9A , Fig. 9B , Fig. 9C , Fig.9D , Fig.9E , Fig.9F and Figure 9G is a cross-sectional view illustrating a method of manufacturing a transparent display device according to an exemplary embodiment.

[0021] Fig. 10A , Fig. 10B and Fig. 10C They are shown respectively FIG. 9D to FIG. 9F An enlarged cross-sectional view of section IV.

[0022] Fig.11A , Fig. 11B and Fig. 11C It is shown that the formation Fig. 9C A cross-sectional view of a method of forming a pixel defining layer. DETAILED DESCRIPTION

[0023] In the following description, for the purpose of explanation, many specific details are set forth to provide a thorough understanding of various exemplary embodiments or implementations of the invention. "Embodiment" and "implementation" as used herein are interchangeable words as non-limiting examples of devices or methods using one or more inventive concepts disclosed herein. However, it is apparent that various exemplary embodiments can be implemented without these specific details or with one or more equivalent arrangements. In other cases, well-known structures and devices are shown in block diagram form to avoid making various exemplary embodiments unnecessarily obscure. In addition, various exemplary embodiments may be different, but need not be exclusive. For example, without departing from the inventive concept, the specific shape, construction and characteristics of the exemplary embodiment may be used or implemented in another exemplary embodiment.

[0024] Unless otherwise specified, the illustrated exemplary embodiments will be understood as providing exemplary features of different details of some ways in which the inventive concept can actually be implemented. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter, individually or collectively referred to as "elements") of the various embodiments may be further combined, separated, interchanged and / or rearranged without departing from the inventive concept.

[0025] The use of cross hatching and / or shading in the drawings is generally provided to make the boundaries between adjacent elements clear. Thus, unless otherwise specified, the presence or absence of cross hatching or shading does not convey or indicate any preference or requirement for the specific material, material properties, size, ratio, commonality between the elements shown, and / or any other characteristics, attributes, properties, etc. of the elements. In addition, in the drawings, the size and relative size of the elements may be exaggerated for clarity and / or descriptive purposes. When the exemplary embodiments may be implemented differently, a specific process sequence may be performed in a sequence different from that described. For example, two processes described in succession may be performed substantially simultaneously or in an order opposite to that described. In addition, the same reference numerals represent the same elements.

[0026] When an element or layer is referred to as being "on" another element or layer, "connected to" or "bonded to" another element or layer, the element or layer may be directly on, directly connected to or directly bonded to the other element or layer, or there may be an intermediate element or layer. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to" or "directly bonded to" another element or layer, there is no intermediate element or layer. For this reason, the term "connection" may refer to a physical connection, an electrical connection and / or a fluid connection with or without an intermediate element. In addition, the D1 axis, the D2 axis and the D3 axis are not limited to three axes of a rectangular coordinate system such as an x-axis, a y-axis and a z-axis, but may be interpreted in a broader sense. For example, the D1 axis, the D2 axis and the D3 axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ for example. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0027] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the disclosed teachings, the first element discussed below may be referred to as the second element.

[0028] For descriptive purposes, spatially relative terms such as "under," "below," "below," "down," "above," "up," "above," "higher," "side" (e.g., as in "sidewall"), etc., may be used herein and thereby describe the relationship of one element to another (or multiple) elements as shown in the accompanying drawings. Spatially relative terms are intended to include different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, elements described as "under" or "beneath" other elements or features would then be positioned as "above" the other elements or features. Thus, the exemplary term "under" can include both above and below orientations. In addition, the device can be positioned otherwise (e.g., rotated 90 degrees or at other orientations), and as such, the spatially relative descriptors used herein are interpreted accordingly.

[0029] The terms used here are for the purpose of describing specific embodiments, and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "one (kind / person)" and "said / the" as used here are also intended to include plural forms. In addition, when the terms "comprise", "include" and / or its variations are used in this specification, it is explained that there are described features, integral bodies, steps, operations, elements, components and / or their groups, but it is not excluded that there are or add one or more other features, integral bodies, steps, operations, elements, components and / or their groups. It is also noted that, as used here, the terms "substantially", "approximately" and other similar terms are used as approximate terms and not as degree terms, and are used to explain the inherent deviations of measured values, calculated values ​​and / or provided values ​​that will be recognized by those of ordinary skill in the art.

[0030] Various exemplary embodiments are described herein with reference to cross-sectional illustrations and / or exploded illustrations that are schematic illustrations of idealized exemplary embodiments and / or intermediate structures. As such, variations from the illustrated shapes, such as due to manufacturing techniques and / or tolerances, are to be expected. Therefore, the exemplary embodiments disclosed herein should not necessarily be interpreted as limitations on the shapes of the specifically illustrated regions, but rather will include shape deviations, such as due to manufacturing. In this manner, the regions shown in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of regions of the device, and therefore are not necessarily intended to be limiting.

[0031] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which this disclosure is a part. Unless explicitly defined as such herein, terms such as those defined in general dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an ideal or overly formal sense.

[0032] Figure 1 is a front view of a transparent display device according to an exemplary embodiment. Figure 2 is a cross-sectional view exemplarily illustrating a transparent display device according to an exemplary embodiment. Figure 3 is a plan view of a pixel structure of a transparent display panel according to an exemplary embodiment.

[0033] Reference Figure 1 , the transparent display device DD may have a display area DA and a non-display area NDA defined thereon. The display area DA on which the image IM is displayed may be parallel to a plane defined by a first direction DR1 and a second direction DR2 crossing the first direction DR1. In some exemplary embodiments, the first direction DR1 may be parallel to a short side of the transparent display device DD, and the second direction DR2 may be parallel to a long side of the transparent display device DD.

[0034] The user may recognize the image IM displayed on the display area DA, and may also recognize an object or an image behind the transparent display device DD. Figure 1 It is exemplarily shown that the transparent display device DD displays the user's hand UH positioned on the back side thereof.

[0035] The transparent display device DD can be used for large electronic devices such as televisions, monitors, and outdoor billboards, and can also be used for small and medium-sized electronic devices such as personal computers, laptop computers, personal digital terminals, car navigation units, game consoles, portable electronic devices, and cameras. However, the inventive concept is not limited thereto, and the transparent display device DD can be used for various other electronic devices.

[0036] The non-display area NDA is an area adjacent to the display area DA and may not display the image IM. The non-display area NDA may define a frame area of ​​the transparent display device DD. An object or image behind the non-display area NDA of the transparent display device DD may not be recognized.

[0037] The non-display area NDA may surround the display area DA. Alternatively, the non-display area NDA may be partially adjacent to an edge of the display area DA or may be omitted. However, the inventive concept is not limited thereto.

[0038] Reference Figure 1 and Figure 2 , the transparent display device DD may include a transparent display panel DP. The transparent display panel DP may be a flexible display panel. For example, the transparent display panel DP may be flexible, and thus its shape may be changed by bending, folding, winding, etc. In some exemplary embodiments, the transparent display panel DP may be an organic light emitting display panel including an organic light emitting device.

[0039] The transparent display panel DP may include a base substrate BS and a display unit DU disposed on the base substrate BS. The display unit DU may include a light emitting layer that emits internal light. The light emitting layer may be disposed to correspond to the emission area EA. In this way, the transparent display panel DP may display an image through a plurality of emission areas EA. The transparent display panel DP may allow external light to pass through the transmission area TA. Therefore, the transparent display panel DP may show an object or image located on its back side while displaying an image through the emission area EA.

[0040] The display unit DU may be provided with various devices and connection lines corresponding to the emission area EA, and therefore, external light incident on the emission area EA may have extremely low transmittance or may hardly pass through the emission area EA. However, the various devices and connection lines may not correspond to the transmission area TA, which may increase the transmittance of external light in the transmission area TA.

[0041] Although Figure 2 1 shows a structure in which the transmission area TA is disposed directly adjacent to the emission area EA, but in some exemplary embodiments, a non-emission area (eg, Figure 3 of NEA).

[0042] Reference Figure 3 , the transparent display panel DP may include a plurality of pixels. Each of the plurality of pixels may include an emission area EA, a non-emission area NEA, and a transmission area TA. Figure 3 Two adjacent pixels PX1 and PX2 among the plurality of pixels are shown. The two pixels PX1 and PX2 may have substantially the same configuration as each other. In addition, each of the pixels may have substantially the same configuration.

[0043] Each of the pixels PX1 and PX2 may include a plurality of sub-pixels. The emission area EA may include a plurality of emission areas EA1, EA2, and EA3 corresponding to the plurality of sub-pixels, respectively. The transmission area TA may be disposed adjacent to the plurality of emission areas EA1, EA2, and EA3.

[0044] According to the exemplary embodiment shown, each pixel may include a first sub-pixel displaying red R, a second sub-pixel displaying green G, and a third sub-pixel displaying blue B. The first to third sub-pixels may have substantially the same size, or at least one of the first to third sub-pixels may have a size different from that of the other sub-pixels. Figure 3 As shown in , the third subpixel may have a size larger than that of the first subpixel and the second subpixel. In this case, the third emission area EA3 corresponding to the third subpixel may have a size larger than that of the first emission area EA1 and the second emission area EA2 corresponding to the first subpixel and the second subpixel, respectively.

[0045] The transmission area TA may have a size larger than the sum of sizes of the first to third subpixels. However, the inventive concept is not limited thereto, and in some exemplary embodiments, the size of the transmission area TA may be variously changed based on a desired transmittance of the transparent display device DD.

[0046] Figure 3 It is shown that each of the pixels PX1 and PX2 has one transmission area TA, however, the inventive concept is not limited thereto. In some exemplary embodiments, each of the pixels PX1 and PX2 may have a plurality of transmission areas TA. For example, each pixel may include two or more transmission areas TA corresponding to the first to third sub-pixels, respectively.

[0047] Figure 3 Each of the emission areas EA1, EA2, and EA3 is shown to have a substantially rectangular shape defined by the first direction DR1 and the second direction DR2. However, the inventive concept is not limited thereto. For example, each of the emission areas EA1, EA2, and EA3 may have a substantially rhombus shape. The transmission area TA is also shown to have a substantially rectangular shape defined by the first direction DR1 and the second direction DR2, but the shape of the transmission area TA may be changed based on each shape of the emission areas EA1, EA2, and EA3.

[0048] Figures 1 to 3The transparent display device DD shown in the figure is shown to have a structure in which each of the pixels PX1 and PX2 is provided with a transmission area TA, but the inventive concept is not limited thereto. For example, the display area DA of the transparent display device DD in some exemplary embodiments may be partially configured as a transparent display area. In this case, the transmission area TA may be provided on the pixels arranged in the transparent display area, and the pixels provided in the area other than the transparent display area may not be included in the transmission area TA. In this way, in the transparent display area, the emission area EA may display an image and the transmission area TA may display an object or an external image behind the transparent display device DD, while in other display areas, only the emission area EA may display an image.

[0049] Figure 4 It is along Figure 3 The line I-I' is taken to show Figure 3 A cross-sectional view of a display element layer of a transparent display panel. Figure 5 Shows Figure 4 An enlarged view of part II.

[0050] Reference Figure 4 and Figure 5 The transparent display panel DP may include a base substrate BS and a display unit DU, and the display unit DU may include a circuit element layer CL, a display element layer DPL, and an encapsulation layer TFE. In some exemplary embodiments, the display unit DU may further include one or more of a touch sensor, an anti-reflection layer, and a window.

[0051] The base substrate BS may be a silicon substrate, a plastic substrate, a glass substrate, a dielectric film, or a stacked structure including a plurality of dielectric layers.

[0052] The circuit element layer CL may include a sub-pixel circuit disposed on each sub-pixel and a plurality of signal lines SL connected to the sub-pixel circuit. The sub-pixel circuit may include a plurality of transistors TR and capacitors. Figure 4 One transistor TR is exemplarily shown, but the inventive concept is not limited to a specific number and structure of transistors TR. The circuit element layer CL may include a barrier layer BR, an active layer ACT, a gate insulating layer GI, a gate electrode GE, an interlayer insulating layer ILD, an input electrode SE, an output electrode DE, and an intermediate insulating layer VLD.

[0053] The barrier layer BR may be disposed on the base substrate BS and may prevent foreign substances from penetrating into the barrier layer BR. In some exemplary embodiments, the display unit DU may further include a buffer layer on the barrier layer BR. The buffer layer may increase the bonding strength between the base substrate BS and the layer disposed on the base substrate BS. The barrier layer BR and the buffer layer may be optionally disposed or omitted.

[0054] The active layer ACT may be disposed on the barrier layer BR. The active layer ACT may be used as a channel region of the transistor TR. The active layer ACT may include one selected from amorphous silicon, polycrystalline silicon, and an oxide semiconductor.

[0055] A gate insulating layer GI may be disposed on the active layer ACT. The gate insulating layer GI may insulate the gate electrode GE from the active layer ACT.

[0056] The gate electrode GE may be disposed on the gate insulating layer GI. The gate electrode GE may be positioned to overlap the active layer ACT. The first conductive layer forming the signal line SL may be disposed at the same level as that of the gate electrode GE.

[0057] The interlayer insulating layer ILD may be disposed on the gate electrode GE. The interlayer insulating layer ILD may electrically insulate the gate electrode GE from the input electrode SE and the output electrode DE. The interlayer insulating layer ILD may include an inorganic material. The inorganic material may include silicon nitride, silicon oxynitride, silicon oxide, or the like.

[0058] The input electrode SE and the output electrode DE may be disposed on the interlayer insulating layer ILD. Each of the input electrode SE and the output electrode DE may be electrically connected to the active layer ACT through a corresponding one of the first contact hole CH1 and the second contact hole CH2 disposed in the interlayer insulating layer ILD and the gate insulating layer GI. The second conductive layer forming the signal line SL may be disposed at the same level as that of the input electrode SE and the output electrode DE.

[0059] The transparent display panel DP according to the illustrated exemplary embodiment is described as having a top gate structure in which the gate electrode GE is disposed above the active layer ACT, but the inventive concept is not limited thereto. In some exemplary embodiments, the transparent display panel DP may have a bottom gate structure in which the gate electrode GE is disposed below the active layer ACT. In still other exemplary embodiments, the transparent display panel DP may include one of the plurality of transistors TR having a top gate structure and another of the plurality of transistors TR having a bottom gate structure.

[0060] The intermediate insulating layer VLD may be disposed on the input electrode SE and the output electrode DE. The intermediate insulating layer VLD may provide a planarized surface. The intermediate insulating layer VLD may include an organic material. The organic material may include one or more of an acryl resin, a methacryl resin, a vinyl resin, an epoxy resin, a urethane resin, a cellulose resin, a siloxane resin, a polyimide resin, a polyamide resin, and a perylene resin.

[0061] The display element layer DPL may be disposed on the intermediate insulating layer VLD. The display element layer DPL may include a pixel defining layer PDL and a plurality of display elements OLED. The plurality of display elements OLED may be correspondingly disposed on a plurality of sub-pixels and may be connected to corresponding sub-pixel circuits or signal lines SL. In some exemplary embodiments, the display element OLED may be an organic light emitting diode. The display element OLED may include a first electrode AE, a first organic layer ECL, an emission layer EML, a second organic layer HCL, and a second electrode CE.

[0062] The first electrode AE ​​may be disposed on the intermediate insulating layer VLD. The first electrode AE ​​may be connected to the output electrode DE through a third contact hole CH3 penetrating the intermediate insulating layer VLD. The first electrode AE ​​may be a reflective electrode, without limitation thereto. For example, in some exemplary embodiments, the first electrode AE ​​may be a transmissive electrode or a transflective electrode. When the first electrode AE ​​is a transflective electrode or a reflective electrode, the first electrode AE ​​may include Ag, Mg, Cu, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, LiF / Ca, LiF / Al, Mo, Ti, or any composite or mixture thereof (e.g., a mixture of Ag and Mg). Alternatively, the first electrode AE ​​may have a multilayer structure including a reflective layer or a transflective layer formed of the above-mentioned materials and a transparent conductive layer formed of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO), etc. For example, the first electrode AE ​​may be a multilayer metal layer having a stacked structure of ITO / Ag / ITO.

[0063] In particular, when the first electrode AE ​​is formed as a reflective electrode, the first electrode AE ​​may prevent external light from passing through the emission area EA, thereby suppressing image distortion caused by the external light.

[0064] The pixel defining layer PDL may include an organic material. The pixel defining layer PDL is provided with a first opening OP1 defined corresponding to the emission area EA. The first opening OP1 of the pixel defining layer PDL exposes at least a portion of the first electrode AE. The pixel defining layer PDL is provided with a second opening OP2 defined corresponding to the transmission area TA. The second opening OP2 of the pixel defining layer PDL partially exposes the top surface of the circuit element layer CL.

[0065] The transparent display panel DP may be provided with an emission area EA and a non-emission area NEA adjacent to the emission area EA. The non-emission area NEA may surround the emission area EA. In some exemplary embodiments, the emission area EA may correspond to a portion of the first electrode AE ​​exposed by the first opening OP1.

[0066] The first organic layer ECL may be an electron control layer. The first organic layer ECL may be commonly disposed in the emission area EA and the non-emission area NEA. In some exemplary embodiments, a common layer such as the first organic layer ECL may be commonly formed on a plurality of display elements OLED. In some exemplary embodiments, the first organic layer ECL may include one or more of an electron injection layer and an electron transport layer.

[0067] The emission layer EML is disposed on the first organic layer ECL. The emission layer EML may be disposed in a region corresponding to the first opening OP1. For example, the emission layer EML may be formed separately on each of the plurality of display elements OLED. The emission layer EML may include an organic material known in the art. For example, the emission layer EML may be formed of one or more of a material emitting red light, a material emitting green light, and a material emitting blue light, and may include a fluorescent material or a phosphorescent material.

[0068] Figure 4 The patterned emission layer EML is exemplarily shown, but the emission layer EML can be commonly provided on a plurality of display elements OLED. When the emission layer EML is commonly provided on a plurality of display elements OLED, the emission layer EML can generate white light. The emission layer EML can have a single-layer structure made of a single material, a single-layer structure including a plurality of different materials, or a multilayer structure including a plurality of layers made of different materials.

[0069] The second organic layer HCL may be disposed on the emission layer EML. In some exemplary embodiments, the second organic layer HCL may be commonly formed on a plurality of display elements OLED. The second organic layer HCL may be a hole control layer. The second organic layer HCL may include one or more of a hole injection layer and a hole transport layer.

[0070] The second electrode CE is disposed on the second organic layer HCL. The second electrode CE is commonly placed on the plurality of display elements OLED. The second electrode CE may be formed of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, or Ca, etc., but may preferably be formed of Mg or an alloy thereof. The second electrode CE may have a thickness of about to about Thickness.

[0071] Each of the first organic layer ECL and the second organic layer HCL has an opening structure corresponding to the transmission area TA. In addition, the second electrode CE may have a shape of an opening structure corresponding to the transmission area TA. For example, the first organic layer ECL and the second organic layer HCL may be removed from a position corresponding to the transmission area TA, and the second electrode CE may be removed from a position corresponding to the transmission area TA. In this way, in the transmission area TA, the top surface of the circuit element layer CL may not be covered by the first organic layer ECL and the second organic layer HCL and the second electrode CE but may be exposed by the first organic layer ECL and the second organic layer HCL and the second electrode CE.

[0072] The encapsulation layer TFE encapsulates the display element layer DPL. The encapsulation layer TFE is disposed on the second electrode CE. The encapsulation layer TFE is commonly placed on a plurality of display elements OLED. In some exemplary embodiments, the encapsulation layer TFE directly covers the second electrode CE. In other exemplary embodiments, a cover layer covering the second electrode CE may be disposed between the encapsulation layer TFE and the second electrode CE. In this case, the encapsulation layer TFE may directly cover the cover layer. The encapsulation layer TFE may directly cover the top surface of the circuit element layer CL exposed in the transmission area TA.

[0073] The encapsulation layer TFE includes at least one inorganic layer (hereinafter, referred to as an encapsulation inorganic layer). The encapsulation layer TFE may also include at least one organic layer (hereinafter, referred to as an encapsulation organic layer). The encapsulation inorganic layer protects the display element layer DPL from moisture / oxygen, and the encapsulation organic layer protects the display element layer DPL from impurities such as dust particles. The encapsulation inorganic layer may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer, etc. The encapsulation organic layer may include an acryl organic layer, but is not limited thereto.

[0074] like Figure 4 and Figure 5As shown in , the non-emission area NEA is defined between the emission area EA and the transmission area TA, and the pixel definition layer PDL is located in the non-emission area NEA. The pixel definition layer PDL may include a first side wall SW1 defining the emission area EA and a second side wall SW2 defining the transmission area TA. For example, the first side wall SW1 is disposed adjacent to the emission area EA, and the second side wall SW2 is disposed adjacent to the transmission area TA. Each of the first side wall SW1 and the second side wall SW2 has an inclined structure. For example, the first side wall SW1 has an inclined structure inclined at a first angle θ1, and the second side wall SW2 has an inclined structure inclined at a second angle θ2. The first angle θ1 and the second angle θ2 have different sizes from each other. In some exemplary embodiments, the first angle θ1 may have a size greater than 0° and equal to or less than about 30°, and the second angle θ2 may have a size greater than about 30° and less than about 90°.

[0075] Among the multiple layers forming the display element OLED, each of the first electrode AE ​​and the emission layer EML can be individually disposed in the corresponding emission area EA. However, each of the first organic layer ECL, the second organic layer HCL, and the second electrode CE can be commonly disposed in the emission area EA and the non-emission area NEA. In some exemplary embodiments, each of the first organic layer ECL, the second organic layer HCL, and the second electrode CE can be commonly formed in multiple emission areas EA, for example, in the first emission area EA1, the second emission area EA2, and the third emission area EA3 (see Figure 3 Hereinafter, the layers ECL, HCL, and CE commonly formed in the plurality of emission areas EA may be collectively referred to as a common layer.

[0076] The first electrode AE ​​and the emission layer EML may be disposed to overlap the first side wall SW1, and the common layers ECL, HCL, and CE may be disposed to overlap the first side wall SW1 and the second side wall SW2. Since the first side wall SW1 is inclined at a first angle θ1 and the second side wall SW2 is inclined at a second angle θ2 greater than the first angle θ1, the thickness of the portion of the common layers ECL, HCL, and CE overlapping the first side wall SW1 may be different from the thickness of the portion of the common layers ECL, HCL, and CE overlapping the second side wall SW2. For example, the thickness of the portion of the common layers ECL, HCL, and CE overlapping the second side wall SW2 may be smaller than the thickness of the portion of the common layers ECL, HCL, and CE overlapping the first side wall SW1.

[0077] In some exemplary embodiments, the common layers ECL, HCL, and CE may not overlap the transmission area TA. For example, the common layers ECL, HCL, and CE may be formed to have an opening structure in the transmission area TA. Specifically, since the second electrode CE in the common layers ECL, HCL, and CE has a low transmittance, removing the common layers ECL, HCL, and CE from the transmission area TA may improve the transmittance of the transparent display panel DP.

[0078] Figure 6 is a cross-sectional view of a transparent display panel according to an exemplary embodiment. Figure 7 yes Figure 6 Magnified view of part III. Figure 6 and Figure 7 The transparent display panel shown in Figure 4 and Figure 5 The transparent display panels shown in are substantially the same, and thus, repeated description of substantially the same elements will be omitted to avoid redundancy.

[0079] Reference Figure 6 and Figure 7 , the transparent display panel DP2 according to the exemplary embodiment may have a display element layer DPL further provided with a third electrode TE on the second electrode CE. The third electrode TE may include a material having a transmittance of about 50% or more. The third electrode TE may include a transparent conductive oxide, graphene, or nanofiber, etc. For example, the third electrode TE may include ITO, IZO, ZnO, and In 2 O 3 One or more of .

[0080] The third electrode TE is electrically connected to the second electrode CE. The third electrode TE may be a compensation electrode for compensating for a voltage drop (eg, IR drop) caused by a reduction in thickness and area of ​​the second electrode CE. In some exemplary embodiments, the third electrode TE may have a thickness of about 100 mm. to about Thickness.

[0081] When the third electrode TE includes a material such as a transparent conductive oxide having a high transmittance, the third electrode TE may be arranged to extend toward the transmission area TA. For example, the third electrode TE may be formed in common in the emission area EA, the non-emission area NEA, and the transmission area TA. In this way, the area of ​​the third electrode TE may be increased to improve the compensation effect on the voltage drop. In addition, since the third electrode TE has a high transmittance, even when the third electrode TE is formed to extend toward the transmission area TA, the transmittance of the transparent display panel DP2 may not be reduced.

[0082] like Figure 6 and Figure 7As shown in , the common layers ECL, HCL and CE and the third electrode TE may be disposed to overlap the first side wall SW1 and the second side wall SW2. Since the first side wall SW1 is inclined at a first angle θ1 and the second side wall SW2 is inclined at a second angle θ2 greater than the first angle θ1, the thickness of the portion of the common layers ECL, HCL and CE overlapping the second side wall SW2 may be smaller than the thickness of the portion of the common layers ECL, HCL and CE overlapping the first side wall SW1. Similarly, the thickness of the portion of the third electrode TE overlapping the second side wall SW2 may be smaller than the thickness of the portion of the third electrode TE overlapping the first side wall SW1.

[0083] In addition, the common layers ECL, HCL, and CE do not overlap the transmission area TA. For example, the common layers ECL, HCL, and CE may have an open structure in the transmission area TA.

[0084] When the second side wall SW2 has a steep angle or the third electrode TE has a small thickness, the third electrode TE may be removed at a boundary between the transmission area TA and the non-emission area NEA. When the third electrode TE is formed of a material having poor step coverage, the third electrode TE may be cut at a boundary between the transmission area TA and the non-emission area NEA.

[0085] Figure 8 is a plan view of a circuit configuration of each pixel of a transparent display panel according to an exemplary embodiment.

[0086] Reference Figure 8 , each of the pixels PX1 and PX2 includes a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3. Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may include a sub-pixel circuit SPC and a display element OLED. The display element OLED may be an organic light emitting diode, and emission areas EA1, EA2, and EA3 may be defined in the sub-pixels SPX1, SPX2, and SPX3, respectively. The sub-pixel circuit SPC may be arranged to overlap a corresponding one of the emission areas EA1, EA2, and EA3. The sub-pixel circuit SPC may overlap the non-emission area NEA. However, the sub-pixel circuit SPC does not overlap the transmission area TA.

[0087] In some exemplary embodiments, the sub-pixel circuit SPC may include two transistors TR1 and TR2 and one capacitor Cst. However, the inventive concept is not limited to the specific structure of the sub-pixel circuit SPC, and in some exemplary embodiments, the number of transistors and capacitors provided in the sub-pixel circuit SPC may be variously changed.

[0088] The signal line SL may be electrically connected to the sub-pixel circuit SPC of each of the sub-pixels SPX1, SPX2, and SPX3. In some exemplary embodiments, the signal line SL may include gate lines GL1, GL2, and GL3, data lines DL1 and DL2, and a power voltage line PL. Various signal lines other than the above-mentioned signal lines may be provided based on the configuration of the sub-pixel circuit SPC.

[0089] Since the sub-pixel circuits SPC of the first, second, and third sub-pixels SPX1, SPX2, and SPX3 have the same circuit configuration, the sub-pixel circuit SPC will be described with reference to the sub-pixel circuit SPC included in the first sub-pixel SPX1 of the first pixel PX1.

[0090] The sub-pixel circuit SPC of the first sub-pixel SPX1 includes a first thin film transistor TR1 connected to the first gate line GL1 and the first data line DL1, a second thin film transistor TR2 connected to the first thin film transistor TR1 and the power voltage line PL, and a capacitor Cst connected to the first thin film transistor TR1 and the second thin film transistor TR2. The first thin film transistor TR1 is used as a switching transistor, and the second thin film transistor TR2 is used as a driving transistor. The second thin film transistor TR2 is electrically connected to the first electrode AE ​​discussed above. Figure 8 , the first thin film transistor TR1 and the second thin film transistor TR2 are illustrated as P-type, but the inventive concept is not limited thereto. For example, one or more of the first thin film transistor TR1 and the second thin film transistor TR2 may be formed as N-type. In addition, the number of thin film transistors and capacitors in the sub-pixel circuit SPC is not specifically limited, and in some exemplary embodiments, the sub-pixel circuit SPC may include two or more thin film transistors and one or more capacitors.

[0091] like Figure 8 As shown in FIG, the first gate line GL1 connected to the first subpixel SPX1 extends in the first direction DR1 and is disposed to overlap the non-emission area NEA. However, the inventive concept is not limited thereto, and in some exemplary embodiments, a portion of the first gate line GL1 may overlap the emission area EA. However, the first gate line GL1 may not overlap the transmission area TA.

[0092] The second gate line GL2 connected to the second sub-pixel SPX2 extends in the first direction DR1 and is disposed adjacent to the first gate line GL1. The second gate line GL2 may be disposed in the non-emission area NEA. The second gate line GL2 does not overlap the transmission area TA. For example, the second gate line GL2 may be disposed not to overlap the transmission area TA but to bypass the transmission area TA. In some exemplary embodiments, the second gate line GL2 may have a curved shape to bypass the transmission area TA. In other exemplary embodiments, the second gate line GL2 may not be curved but may be substantially parallel to the first gate line GL1, such as Figure 8 In this case, the transparent display panel DP may further include a bridge line BL for electrical connection between the second gate line GL2 and the second sub-pixel SPX2. The bridge line BL may not overlap the transmission area TA but overlap the non-emission area NEA and the emission area EA.

[0093] The third gate line GL3 connected to the third subpixel SPX3 may extend in the first direction DR1 and be disposed to be spaced apart from the first and second gate lines GL1 and GL2 across the transmission area TA in the second direction DR2. The third gate line GL3 overlaps the non-emission area NEA but does not overlap the transmission area TA.

[0094] The first data line DL1 may be commonly connected to the first subpixel SPX1 to the third subpixel SPX3 of the first pixel PX1, and the second data line DL2 may be commonly connected to the first subpixel SPX1 to the third subpixel SPX3 of the second pixel PX2. The first data line DL1 and the second data line DL2 overlap the non-emission area NEA, but do not overlap the transmission area TA. The power voltage line PL also overlaps the non-emission area NEA, but does not overlap the transmission area TA. As discussed above, since the signal lines GL1 to GL3, DL1, DL2, and PL are set to neither penetrate the transmission area TA nor overlap the transmission area TA, the external light introduced into the transmission area TA is not reflected by the signal lines GL1 to GL3, DL1, DL2, and PL, and thus the transmittance of the transparent display panel DP may not be reduced. Therefore, the user can clearly recognize the object or image behind the transparent display panel DP.

[0095] FIG. 9A to FIG. 9G is a cross-sectional view illustrating a method of manufacturing a transparent display device according to an exemplary embodiment. FIG. 10A to FIG. 10C They are FIG. 9D to FIG. 9F An enlarged cross-sectional view of section IV.

[0096] Reference Fig.9A A circuit element layer CL is formed on the top surface of the base substrate BS. The circuit element layer CL may include a sub-pixel circuit SPC (see FIG. Figure 8 ) and a plurality of signal lines SL connected to the sub-pixel circuit SPC. A third contact hole CH3 may be formed in the circuit element layer CL to expose the output electrode DE of the transistor TR.

[0097] Fig.9A The circuit element layer CL is exemplarily shown in which the circuit element layer CL is formed in the emission area EA, the non-emission area NEA and the transmission area TA (see FIG. Fig.9E ), but the inventive concept is not limited thereto. For example, in some exemplary embodiments, at least some layers included in the circuit element layer CL may be removed from the transmission area TA.

[0098] Reference Fig. 9B On the circuit element layer CL, a first electrode AE ​​is formed corresponding to the emission area EA. The first electrode AE ​​can contact the output electrode DE of the transistor TR through the third contact hole CH3. The first electrode AE ​​may include ITO, IZO, ZnO, In 2 O 3 At least one of a transparent conductive material formed of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, etc. and a reflective electrode material formed of the first electrode AE ​​may partially overlap the non-emission area NEA.

[0099] Reference Fig. 9C , a pixel defining layer PDL is formed on the circuit element layer CL, and the pixel defining layer PDL defines an emission area EA and a transmission area TA. The pixel defining layer PDL may include a first opening OP1 corresponding to the emission area EA and a second opening OP2 corresponding to the transmission area TA. The first opening OP1 exposes at least a portion of the first electrode AE. The area where the first electrode AE ​​is exposed may be defined as the emission area EA. The second opening OP2 partially exposes the top surface of the circuit element layer CL. When the circuit element layer CL is completely removed from the transmission area TA, the layer below the circuit element layer CL may be exposed, or when a portion of the circuit element layer CL is removed, the layer below the removed portion of the circuit element layer CL may be exposed.

[0100] Reference Fig.9D and Fig. 10A, forming an initial organic layer P_OL, the initial organic layer P_OL may include an emission layer EML corresponding to the emission area EA and disposed on the first electrode AE. The initial organic layer P_OL also includes a first initial organic layer P_ECL and a second initial organic layer P_HCL. The emission layer EML overlaps the emission area EA and the first electrode AE, while the first initial organic layer P_ECL and the second initial organic layer P_HCL overlap the emission area EA, the non-emission area NEA and the transmission area TA. The first initial organic layer P_ECL and the second initial organic layer P_HCL may also overlap the emission area EA of an adjacent sub-pixel.

[0101] An electrode layer P_CE is formed on the initial organic layer P_OL. The electrode layer P_CE is formed to cover the top surface of the second initial organic layer P_HCL. The electrode layer P_CE may include a metal material such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, or Ca. In some exemplary embodiments, the electrode layer P_CE may be formed of Mg or an alloy thereof. For example, the electrode layer P_CE may have a thickness of about 100 nm. to about Thickness.

[0102] Reference Fig.9E and Fig. 10B The base substrate BS is provided with heat energy at its back side. The process for supplying heat energy may be performed using a laser induced thermal imaging process, a flash mask transfer lithography process, an induction heating process, or the like.

[0103] like Fig.9E As shown in , when the laser induced thermal imaging process is performed after the laser device LD is disposed under the back side of the base substrate BS, the laser device LD may provide high-temperature light of about 300° C. to about 350° C. to the initial organic layer P_OL while moving in the first direction DR1. The high-temperature light may be supplied in a scanning irradiation mode in which light is irradiated from the moving laser device LD every several microseconds (μs).

[0104] In the emission area EA and the non-emission area NEA, the initial organic layer P_OL does not receive the high temperature light from the laser device LD because the high temperature light is reflected by the signal line SL, the element (e.g., transistor TR) of the sub-pixel circuit SPC, or the first electrode AE. However, since the transmission area TA is not provided with a layer capable of reflecting the high temperature light, the initial organic layer P_OL can receive the high temperature light without reflecting the high temperature light. The high temperature light supplied in the scanning irradiation mode briefly heats the initial organic layer P_OL located in the transmission area TA.

[0105] The initial organic layer P_OL includes an organic material having a lower melting point than that of the inorganic material. In this way, the organic material can be heated by the instantaneously supplied high-temperature light, but other layers made of inorganic materials will not be heated due to their high melting points. The heated portion of the initial organic layer P_OL can be lifted from the top surface of the circuit element layer CL. In this way, an air gap AG can be formed between the top surface of the circuit element layer CL and the heated initial organic layer P_OL. In this way, the portion of the initial organic layer P_OL heated by the thermal energy process can be easily separated from the circuit element layer CL.

[0106] In other exemplary embodiments, the organic material layer of the circuit element layer CL under the initial organic layer P_OL may be removed from the transmission area TA. For example, the intermediate insulating layer VLD may be opened at a portion corresponding to the transmission area TA. The process of opening the intermediate insulating layer VLD at a portion corresponding to the transmission area TA may be performed simultaneously with the formation of the third contact hole CH3 discussed above.

[0107] In still other exemplary embodiments, when the intermediate insulating layer VLD remains in the transmission area TA, the intermediate insulating layer VLD may be formed of an organic material having a higher melting point than that of the initial organic layer P_OL.

[0108] Reference Fig.9F and Fig. 10C , a transfer substrate TS may be placed on the electrode layer P_CE. The transfer substrate TS may be a substrate on which an adhesive layer AL is formed in an area corresponding to the transmission area TA. When the adhesive layer AL is disposed to correspond to the transmission area TA, a heated portion of the initial organic layer P_OL disposed in the transmission area TA may be attached to a top surface of the adhesive layer AL and then separated from a top surface of the circuit element layer CL as the transfer substrate TS rises. In this way, the heated portion of the initial organic layer P_OL may be transferred to the transfer substrate TS.

[0109] Therefore, if Figure 9G As shown in , the display element layer DPL may be formed in the emission area EA and the non-emission area NEA, and may be removed from the transmission area TA. Therefore, the display element layer DPL may be provided with a transmission portion exposing the top surface of the circuit element layer CL in the transmission area TA.

[0110] Return to reference Figure 6 and Figure 7 , a third electrode TE may be further formed on the second electrode CE. The third electrode TE may include a material having a transmittance of 50% or more. The third electrode TE may include a transparent conductive oxide, graphene, or nanofiber, etc. For example, the third electrode TE may include ITO, IZO, ZnO, and In 2 O3 One or more of .

[0111] The third electrode TE is electrically connected to the second electrode CE. The third electrode TE may be a compensation electrode for compensating for a voltage drop (eg, IR drop) caused by a reduction in thickness and area of ​​the second electrode CE. In some exemplary embodiments, the third electrode TE may have a thickness of about 100 mm. to about Thickness.

[0112] When the third electrode TE is made of a material such as a transparent conductive oxide having high transmittance, the third electrode TE may be disposed to extend toward the transmission area TA. For example, the third electrode TE may be commonly formed in the emission area EA, the non-emission area NEA, and the transmission area TA.

[0113] FIG. 11A to FIG. 11C Shows the formation Fig. 9C A cross-sectional view of a method of forming a pixel defining layer.

[0114] Reference Fig.11A , an initial pixel defining layer P_PDL is formed on the circuit element layer CL on which the first electrode AE ​​is formed. The initial pixel defining layer P_PDL may include a polymer resin. For example, the initial pixel defining layer P_PDL may include a polyacrylate resin or a polyimide resin. In addition to the polymer resin, the initial pixel defining layer P_PDL may also include an inorganic material.

[0115] Reference Fig. 11B , a photomask MS may be disposed on the preliminary pixel defining layer P_PDL. The photomask MS may include a light transmitting portion FTA, a light shielding portion FBA, and a slit portion HTA.

[0116] The light-transmitting portion FTA is positioned to correspond to the emission area EA (see Figure 4 ) and the transmissive area TA (see Figure 4 ), and allows the provided light to pass therethrough in an exposure process using the photomask MS. In this way, the exposure process may expose a portion of the initial pixel defining layer P_PDL corresponding to the light-transmitting portion FTA. As described above, when the initial pixel defining layer P_PDL is directly exposed relative to the exposure process, the initial pixel defining layer P_PDL may include a photosensitive material.

[0117] The light shielding portion FBA is positioned to correspond to the non-emission area NEA (see Figure 4 The initial pixel defining layer P_PDL may be formed by forming a light shielding portion FBA and shielding the light provided during the exposure process. In this way, the exposure process may not expose a portion of the initial pixel defining layer P_PDL corresponding to the light shielding portion FBA.

[0118] The slit portion HTA is disposed between the light shielding portion FBA and the light transmitting portion FTA. The slit portion HTA is a region including a slit pattern, which allows light provided during the exposure process to have a lower transmittance than light passing through the light transmitting portion FTA. In this way, the exposure process may partially expose a portion of the initial pixel defining layer P_PDL corresponding to the slit portion HTA.

[0119] Then, when the exposure process and the development process remove the exposed portion of the initial pixel defining layer P_PDL, as shown in FIG. Fig. 11C The pixel defining layer PDL is formed as shown in . The pixel defining layer PDL has a first side wall SW1 having a gentle inclination angle through the local exposure of the slit portion HTA. For example, the first side wall SW1 may have an inclined structure inclined at a first angle θ1 greater than 0° and equal to or less than about 30°. The pixel defining layer PDL may have a second side wall SW2 at a portion directly corresponding to the light-transmitting portion FTA and the light-shielding portion FBA except the slit portion HTA, and the second side wall SW2 has an inclination angle greater than the inclination angle of the first side wall SW1. In some exemplary embodiments, the second side wall SW2 may have an inclined structure inclined at a second angle θ2 greater than about 30° and less than about 90°.

[0120] According to exemplary embodiments, the common layer may be removed from a position corresponding to the transmission area, thereby improving transmittance in the transmission area of ​​the transparent display device.

[0121] In addition, the inclination angle of the sidewall of the pixel defining layer may be adjusted to simplify the process of removing the common layer from a position corresponding to the transmission area.

[0122] Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to such embodiments, but rather to the broader scope of the appended claims and various obvious modifications and equivalent arrangements as will be apparent to those of ordinary skill in the art.

Claims

1. A transparent display device, comprising a base substrate and a plurality of pixels arranged on the base substrate, each pixel having an emission area and a transmission area transparent to external light, each pixel comprising: A circuit element layer is disposed on the base substrate; A first electrode, disposed on the circuit element layer and corresponding to the emission area; A pixel defining layer, disposed on the circuit element layer, the pixel defining layer comprising a first side wall defining the emission area and a second side wall defining the transmission area; an emission layer, disposed on the first electrode and corresponding to the emission region; a second electrode disposed on the emission layer and comprising an opening corresponding to the transmission area; a first organic layer disposed between the first electrode and the emission layer, corresponding to the emission region, and having an opening in the transmission region; as well as a second organic layer disposed between the emission layer and the second electrode, corresponding to the emission region, and having an opening in the transmission region, wherein the first side wall is inclined at a first angle, wherein the second side wall is inclined at a second angle greater than the first angle, and The first organic layer, the second organic layer and the second electrode are stacked on the second side wall.

2. The transparent display device according to claim 1, wherein: The first angle of the first side wall is greater than 0° and equal to or less than 30°; and The second angle of the second side wall is greater than 30° and less than 90°.

3. The transparent display device according to claim 1, wherein: The second electrode has a thickness of 35 Å to 80 Å. 4 . The transparent display device according to claim 1 , further comprising a third electrode disposed on the second electrode and corresponding to the emission area.

5. The transparent display device according to claim 4, wherein: The third electrode includes a material having a transmittance of at least 50%, and is disposed to extend toward the transmission area.

6. The transparent display device according to claim 5, wherein: The third electrode has a thickness of 50 Å to 500 Å.

7. The transparent display device according to claim 1, wherein: Each pixel has a plurality of sub-pixels; and The emission region includes a plurality of emission regions respectively corresponding to the plurality of sub-pixels.

8. The transparent display device according to claim 7, wherein: The circuit element layer comprises: a sub-pixel circuit disposed in the plurality of emission regions; and A plurality of signal lines are connected to the sub-pixel circuits.

9. The transparent display device according to claim 8, wherein: The plurality of signal lines do not overlap the transmission area.

Images