Display panel

Abstract

A display panel includes a substrate having a first region, a second region, and a third region disposed between the first region and the second region. A plurality of display elements is disposed in the second region. The plurality of display elements includes two display elements spaced apart from each other with the first region disposed between the two display elements. Each of the plurality of display elements includes a pixel electrode, a counter electrode, and an intermediate layer disposed between the pixel electrode and the counter electrode. A partition is located in the third region and includes at least one inverted taper sloped surface. An inorganic layer is disposed on the partition. At least one sub-layer included in the intermediate layer is discontinuous across the partition.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2019-0025859, filed on March 6, 2019, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates to display panels, and more specifically, to display panels including dividers. Background Technology

[0004] A display device is an electronic device configured to display images. Display devices are currently used in a wide variety of devices. In addition to being configured to display images, modern display devices often include additional sensing devices (such as touch sensors, light sensors) and other functional modules. As the thickness and weight of display devices have decreased, and specifically, the area of ​​the bezel surrounding the display area has decreased, many sensors that were often located within the bezel area have been moved to the display area itself. Summary of the Invention

[0005] Exemplary embodiments of this disclosure include a display panel having a first region and a display region. Various components may be located in the display region. The display panel may be incorporated into a display device.

[0006] According to one or more exemplary embodiments of this disclosure, a display panel includes a substrate comprising a first region, a second region, and a third region disposed between the first and second regions. A plurality of display elements are located in the second region. The plurality of display elements includes two display elements spaced apart from each other, wherein the first region is disposed between the two display elements. Each of the plurality of display elements includes a pixel electrode, a counter electrode, and an intermediate layer disposed between the pixel electrode and the counter electrode. A separator is located in the third region and includes at least one tapered inclined surface. An inorganic layer is located on the separator. At least one sublayer included in the intermediate layer is separated by the separator.

[0007] At least one sublayer may include organic materials.

[0008] Inorganic materials may cover at least a portion of the top surface of the separator and / or the side surface of the separator.

[0009] At least one sublayer may be located above the inorganic layer, and the separator may be located below the inorganic layer.

[0010] The separator may include a photosensitive material.

[0011] At least one sublayer may include a hole transport layer, a hole injection layer, an electron transport layer, and / or an electron injection layer.

[0012] The inorganic layer can include a hole corresponding to the top surface of the spacer.

[0013] The display panel can further include a metal layer in the third area. The spacer can be located on the metal layer.

[0014] A width of the metal layer can be equal to or greater than a width of the top surface of the spacer.

[0015] The inorganic layer can at least partially cover the metal layer and extend to an upper surface of the insulating layer below the metal layer.

[0016] The display panel can further include an organic layer in the third area. The spacer can be located on the organic layer.

[0017] The inorganic layer can at least partially cover the organic layer and extend to an upper surface of the insulating layer below the organic layer.

[0018] An inclination angle between the inclined surface of the at least one inverted taper and the top surface of the substrate can be equal to or less than 30°.

[0019] The display panel can further include at least one insulating layer between the substrate and the spacer. The at least one insulating layer can include a groove corresponding to the spacer.

[0020] The display panel can include an opening corresponding to the first area.

[0021] According to one or more exemplary embodiments of the disclosure, a display panel includes a substrate including a first area, a second area, and a third area disposed between the first area and the second area. A plurality of display elements is located in the second area and includes two display elements spaced apart from each other to define the first area. A spacer is located in the third area and extends along an edge of the first area. At least one insulating layer is located between the substrate and the spacer. The spacer includes a plurality of inclined surfaces. At least one inclined surface of the plurality of inclined surfaces is an inclined surface of an inverted taper. A sub-layer includes an organic material provided in the plurality of display elements. The sub-layer is broken by the spacer.

[0022] An inclination angle of the inclined surface of the at least one inverted taper with respect to the top surface of the substrate can be equal to or less than 30°.

[0023] Inclination angles of the plurality of inclined surfaces of the inverted taper can be different from each other.

[0024] The spacer can include a photosensitive resin.

[0025] The at least one insulating layer can include an inorganic insulating layer.

[0026] The at least one insulating layer can include a groove. The spacer can be located in the groove.

[0027] The display panel can further include a metal layer between the at least one insulating layer and the spacer. The spacer can contact the metal layer.

[0028] A width of the metal layer can be equal to or greater than a width of the top surface of the spacer.

[0029] The display panel can further include an organic layer between the at least one insulating layer and the spacer. The spacer can contact the organic layer.

[0030] A width of a top surface of the organic layer can be equal to or greater than a width of a bottom surface of the spacer.

[0031] The display panel can further include an inorganic layer on the spacer. The inorganic layer covers side surfaces of the spacer and extends to the at least one insulating layer.

[0032] The inorganic layer can directly contact the at least one insulating layer.

[0033] The inorganic layer can have a hole corresponding to the top surface of the spacer.

[0034] The inorganic layer can include a metal or an inorganic insulating material.

[0035] The inorganic layer can extend to the second area. BRIEF DESCRIPTION OF DRAWINGS

[0036] A more complete appreciation of the present disclosure and its attendant aspects will be readily understood by reference to the following detailed description, taken in conjunction with the accompanying drawings, wherein:

[0037] Figure 1 FIG. 1 is a perspective view illustrating a display apparatus according to an exemplary embodiment of the present disclosure.

[0038] Figure 2A FIG. 2 is a cross-sectional view illustrating a display apparatus according to an exemplary embodiment of the present disclosure. Figure 2B

[0039] FIG. 3 is a cross-sectional view illustrating a display panel according to an exemplary embodiment of the present disclosure. Figures 3A-3D

[0040] FIG. 4 is a cross-sectional view illustrating a display panel according to an exemplary embodiment of the present disclosure. Figures 4A-4D

[0041] FIG. 5 is a plan view illustrating a display panel according to an exemplary embodiment of the present disclosure. Figure 5

[0042] FIG. 6 is an equivalent circuit diagram illustrating a pixel of a display panel according to an exemplary embodiment of the present disclosure. Figure 6

[0043] FIG. 7 is a flowchart illustrating a method of manufacturing a display apparatus according to an exemplary embodiment of the present disclosure.Figure 7 is a plan view showing a portion of a display panel according to an exemplary embodiment of the present disclosure.

[0044] Figure 8 is a cross-sectional view showing a display panel according to an exemplary embodiment of the present disclosure.

[0045] Figure 9A and Figure 9B is a cross-sectional view showing a process of manufacturing a spacer of a display panel according to an exemplary embodiment of the present disclosure.

[0046] Figure 10 is a cross-sectional view showing a spacer and a structure around the spacer according to an exemplary embodiment of the present disclosure.

[0047] Figure 11 is a cross-sectional view showing a spacer and a structure around the spacer according to an exemplary embodiment of the present disclosure.

[0048] Figures 12A-12C is a cross-sectional view showing a spacer according to an exemplary embodiment of the present disclosure.

[0049] Figures 13-15 is a cross-sectional view showing a portion of a display panel according to an exemplary embodiment of the present disclosure.

[0050] Figure 16 is a cross-sectional view showing a portion of a display panel according to an exemplary embodiment of the present disclosure.

[0051] Figure 17 is a cross-sectional view showing a display panel according to an exemplary embodiment of the present disclosure.

[0052] Figure 18 is a cross-sectional view showing a display panel according to an exemplary embodiment of the present disclosure.

[0053] Figure 19 is a cross-sectional view showing a display panel according to an exemplary embodiment of the present disclosure.

[0054] Figure 20 is a cross-sectional view showing a display panel according to an exemplary embodiment of the present disclosure.

[0055] Figure 21 is a cross-sectional view showing a display panel according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0056] In describing the exemplary embodiments of the present disclosure shown in the drawings, specific terminology is employed for the sake of clarity. However, the present disclosure is not intended to be limited to the selected specific terminology, and it is to be understood that every specific element includes all technical equivalents that operate in a similar manner.

[0057] Reference will now be made in detail to the exemplary embodiments of the present disclosure. In the drawings, the same and similar elements can be labeled with the same reference numerals and if a detailed description of an element is omitted, it can be assumed that the element is similar to the corresponding element already described elsewhere in the specification.

[0058] It should be understood that, although the terms "first", "second", etc. can be used herein to describe various elements, these elements should not be limited by these terms. These elements are only used to distinguish one element from another.

[0059] It should be further understood that the terms "comprises" and / or "comprising", when used herein, specify the presence of stated features or components, but do not preclude the presence or addition of one or more other features or components. However, the phrase "consisting of" as used herein can specify the presence of only the stated components.

[0060] It should be understood that when a layer, region or element is referred to as being "formed on" another layer, region or element, it can be directly or indirectly formed on the other layer, region or element. For example, intervening layers, regions or elements can be present.

[0061] For ease of explanation, the size of elements can be exaggerated. However, shapes, angles and relative sizes can be considered to show details of specific exemplary embodiments of the present disclosure.

[0062] It should be noted that the specific order in which steps are described in herein represents one way in which the present application can be implemented. However, in other implementations, the order can be changed. For example, two steps that are described consecutively can be performed substantially simultaneously or can be performed in the reverse order of the order described.

[0063] It should be understood that when a layer, region or element is referred to as being "connected" to another layer, region or element, it can be directly connected or can be indirectly connected with intervening layers, regions or elements therebetween. For example, when layers, regions or elements are electrically connected, they can be directly electrically connected or can be indirectly electrically connected with intervening layers, regions or elements therebetween.

[0064] Figure 1 is a perspective view showing a display apparatus 1 according to an exemplary embodiment of the present disclosure.

[0065] Referring to Figure 1 , the display apparatus 1 includes a first area OA and a display area DA. The display area DA is a second area at least partially surrounding the first area OA. The display apparatus 1 can provide a predetermined image by using light emitted by a plurality of pixels arranged in the display area DA. In Figure 1In the embodiment, one first area OA is located within the display area DA, and the first area OA can be completely surrounded by the display area DA. Alternatively, the first area OA is partially surrounded by the display area DA, for example, by occupying an area at an edge of the first area OA. The first area OA can be an area in which components described below with reference to FIGS. 2A and 2B are located. Figure 2A and Figure 2B

[0066] The intermediate area MA is a third area, which can be located between the first area OA and the display area DA, and the display area DA can be at least partially surrounded by a peripheral area PA, i.e., a fourth area. The intermediate area MA and the peripheral area PA can be non-display areas in which no pixels are positioned. The intermediate area MA can be completely surrounded by the display area DA, and the display area DA can be completely surrounded by the peripheral area PA.

[0067] According to an exemplary embodiment of the present disclosure, although an organic light emitting display apparatus will be described as a display apparatus 1, the display apparatus of the present disclosure is not limited thereto. For example, any various display apparatuses, such as an inorganic light emitting display (or inorganic electroluminescence (EL) display) or a quantum dot light emitting display, can be used.

[0068] Although Figure 1 one first area OA having a substantially circular shape is provided in the embodiment, the present disclosure is not limited thereto. There can be two or more first areas OA, and the shape of each of the first areas OA can be modified in various ways, such as a circular shape, an elliptical shape, a polygonal shape, a star shape, or a diamond shape. Furthermore, each of the two or more first areas OA can have a different shape. Although Figure 1 one first area OA is located in an upper side of the display area DA in the embodiment, the present disclosure is not limited thereto. The location of the first area OA can be modified in various ways, such as a center of the display area DA or a lower side of the display area DA.

[0069] Figure 2A and Figure 2B are cross-sectional views showing the display apparatus 1 according to an exemplary embodiment of the present disclosure taken along line II-II' of FIG. 1. Figure 1

[0070] Referring to Figure 2A , the display apparatus 1 can include a display panel 10, an input sensing layer 40 located on the display panel 10, and an optical function layer 50. The display panel 10, the input sensing layer 40, and the optical function layer 50 can be entirely covered by a window 60. The display apparatus 1 can be a mobile phone, a notebook, a smart watch, or other electronic device.

[0071] ​​The display panel 10 can display an image. The display panel 10 includes pixels arranged in a display area DA. The pixels can include display elements and pixel circuits connected to the display elements. The display elements can include organic light emitting diodes (OLEDs), inorganic light emitting diodes, and / or quantum dot light emitting diodes.

[0072] The input sensing layer 40 acquires coordinate information related to an external input (e.g., a touch event). The input sensing layer 40 can include sensing electrodes (or touch electrodes) and signal lines (e.g., trace lines) connected to the sensing electrodes. The input sensing layer 40 can be located on the display panel 10. The input sensing layer 40 can be configured to detect an external input by using a mutual capacitance method and / or a self-capacitance method.

[0073] The input sensing layer 40 can be directly formed on the display panel 10, or can be separately formed and then coupled to the display panel 10 using an adhesive layer such as an optically clear adhesive (OCA). For example, the input sensing layer 40 can be continuously formed after a process of forming the display panel 10, and in this case, the input sensing layer 40 can be a part of the display panel 10 and the adhesive layer can be omitted. Although Figure 2A The input sensing layer 40 is located between the display panel 10 and the optical functional layer 50, but alternatively, the input sensing layer 40 can be located above the optical functional layer 50.

[0074] The optical functional layer 50 can include an anti-reflection layer. The anti-reflection layer can reduce the reflectance of light (e.g., external light) incident on the display panel 10 through the window 60. The anti-reflection layer can include a phase retarder and a polarizer. The phase retarder can be of a film type or a liquid crystal coating type and can include a λ / 2 phase retarder and / or a λ / 4 phase retarder. The polarizer can also be of a film type or a liquid crystal coating type. The polarizer of the film type can include an elongated synthetic resin film. The polarizer of the liquid crystal coating type can include liquid crystals arranged in a predetermined initial orientation. The phase retarder and the polarizer can further include a protective film. The phase retarder and the polarizer or the protective film can be defined as a base layer of the anti-reflection layer.

[0075] According to an exemplary embodiment of the disclosure, the anti-reflection layer can include a black matrix and a color filter. The color filter can be arranged to define a color of light emitted by each pixel of the display panel 10. According to an exemplary embodiment of the disclosure, the anti-reflection layer can include a destructive interference structure. The destructive interference structure can include a first reflection layer and a second reflection layer located on a different layer. First reflected light and second reflected light reflected by the first reflection layer and the second reflection layer, respectively, can destructively interfere with each other, thereby reducing reflection of external light thereon.

[0076] The optical functional layer 50 can include a lens layer. The lens layer can improve light extraction efficiency of light emitted by the display panel 10 or can reduce color deviation. The lens layer can include a layer having a concave lens shape or a convex lens shape, and / or can include a plurality of layers each having a different refractive index. The optical functional layer 50 can include both an anti-reflection layer and a lens layer, or can include any one of an anti-reflection layer and a lens layer.

[0077] In an exemplary embodiment of the disclosure, the anti-reflection layer can be formed continuously after a process of forming the display panel 10 and / or the input sensing layer 40. In this case, the anti-reflection layer can be a part of the display panel 10 and an adhesive layer can be omitted.

[0078] The display panel 10, the input sensing layer 40, and the optical functional layer 50 can have an opening. In Figure 2A , the display panel 10, the input sensing layer 40, and the optical functional layer 50 have first to third openings 10H, 40H, and 50H, respectively, and the first to third openings 10H, 40H, and 50H can at least partially overlap each other. The first to third openings 10H, 40H, and 50H are formed to correspond to the first area OA. According to an exemplary embodiment of the disclosure, at least one of the display panel 10, the input sensing layer 40, and the optical functional layer 50 can not have an opening. For example, one or two selected from the display panel 10, the input sensing layer 40, and the optical functional layer 50 can not have an opening. Alternatively, the display panel 10, the input sensing layer 40, and the optical functional layer 50 can not have an opening, as Figure 2B indicated.

[0079] The first area OA can be a component area (for example, a sensor area, a camera area, or a speaker area) in which a component 20 for increasing various functions is located, as described above. The component 20 can be located in the first to third openings 10H, 40H, and 50H, as Figure 2A indicated. Alternatively, the component 20 can be located below the display panel 10, as Figure 2B indicated.

[0080] The assembly 20 can include an electronic element. For example, the assembly 20 can be an electronic element using light or sound. Examples of the electronic element that can be used can include a sensor for outputting and / or receiving light (e.g., an infrared sensor), a camera for receiving light and acquiring an image, a sensor for outputting and detecting light or sound to measure a distance or identify a fingerprint, a small light for outputting light, and / or a speaker for outputting sound. When the assembly 20 is an electronic element using light, the assembly 20 can use various wavebands of light, such as visible light, infrared light, and / or ultraviolet light. In some example embodiments of the disclosure, the first area OA can be a transmissive area through which light and / or sound output from the assembly 20 to the outside or light and / or sound proceeding from the outside toward the electronic element can be transmitted.

[0081] According to example embodiments of the disclosure, when the display apparatus 1 is used as a smart watch or a vehicle dashboard, the assembly 20 can be a component (e.g., a clock hand or a pointer) indicating predetermined information (e.g., a vehicle speed). When the display apparatus 1 includes a clock hand or a vehicle dashboard, the assembly 20 can pass through the window 60 and can be exposed to the outside, and the window 60 can have an opening corresponding to the first area OA.

[0082] The assembly 20 can include one element (or a plurality of elements) related to the function of the display panel 10 as described above or can include an element such as an accessory for enhancing the aesthetic appearance of the display panel 10. For example, a layer including an OCA can be located between the window 60 and the optically functional layer 50.

[0083] Figures 3A-3D is a cross-sectional view illustrating a display panel 10 according to example embodiments of the disclosure.

[0084] Referring to Figure 3A , the display panel 10 includes a display layer 200 on a substrate 100. The substrate 100 can include a glass material or a polymer resin. The substrate 100 can have a multi-layer structure. For example, the substrate 100 can include a first base layer 101, a first barrier layer 102, a second base layer 103, and a second barrier layer 104, for example, as shown in the enlarged view of Figure 3A .

[0085] Each of the first base layer 101 and the second base layer 103 can include a polymer resin. For example, each of the first base layer 101 and the second base layer 103 can include polyether sulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), cellulose triacetate (TAC), and / or cellulose acetate propionate (CAP). The polymer resin can be transparent.

[0086] Each of the first barrier layer 102 and the second barrier layer 104 (which are barrier layers for preventing the penetration of foreign objects) may have a single-layer or multi-layer structure including inorganic materials (such as silicon nitride or silicon oxide).

[0087] Display layer 200 includes a plurality of pixels. Display layer 200 may include display element layer 200A and pixel circuit layer 200B. Display element layer 200A includes display elements respectively positioned for pixels, and pixel circuit layer 200B includes insulating layers and pixel circuits positioned for pixels. Each pixel circuit may include a thin-film transistor (TFT) and a storage capacitor, and each display element may include an OLED.

[0088] The display elements of the display layer 200 can be covered by an encapsulation component (such as a thin-film encapsulation layer 300), and the thin-film encapsulation layer 300 can include at least one inorganic encapsulation layer and at least one organic encapsulation layer. When the display panel 10 includes a substrate 100 with a multilayer structure and a thin-film encapsulation layer 300, the flexibility of the display panel 10 can be improved.

[0089] The display panel 10 may have a first opening 10H passing through the display panel 10. The first opening 10H may be located in a first region OA, and in this case, the first region OA may be an opening region. The first opening 10H may be a through-hole passing through the display panel 10. Figure 3A In the display panel 100, the substrate 100 and the thin film encapsulation layer 300 respectively have through holes 100H and 300H corresponding to the first opening 10H of the display panel 10. The display layer 200 may also have a through hole 200H corresponding to the first region 0A.

[0090] According to exemplary embodiments of this disclosure, such as Figure 3B As shown, substrate 100 may not have a through-hole corresponding to the first region OA. Display layer 200 may have a through-hole 200H corresponding to the first region OA. Thin film encapsulation layer 300 may not have a through-hole corresponding to the first region OA. According to an exemplary embodiment of this disclosure, such as Figure 3C As shown, the display layer 200 may not have a through hole 200H corresponding to the first region OA and the display element layer 200A may not be located in the first region OA.

[0091] Despite Figures 3A-3C In this embodiment, the display element layer 200A is not located in the first region OA, but this disclosure is not limited thereto. According to an exemplary embodiment of this disclosure, the auxiliary display element layer 200C may be located in the first region OA, such as... Figure 3D As shown. The auxiliary display element layer 200C may include display elements having a structure and / or operation method different from that of the display elements in the display element layer 200A.

[0092] In the example embodiment of the present disclosure, each pixel of the display element layer 200A can include an active matrix OLED and each pixel of the auxiliary display element layer 200C can include a passive matrix OLED. When the auxiliary display element layer 200C includes a display element of an active matrix OLED, there can be no element constituting a pixel circuit below the passive matrix OLED. For example, a portion of the pixel circuit layer 200B below the auxiliary display element layer 200C does not include a transistor and a storage capacitor.

[0093] According to the example embodiment of the present disclosure, the auxiliary display element layer 200C can include a display element of the same type as the type of the display element of the display element layer 200A (e.g., an active matrix OLED), and the structure of the pixel circuit below the auxiliary display element layer 200C can be different from the structure of the pixel circuit below the display element layer 200A. For example, the pixel circuit below the auxiliary display element layer 200C (e.g., a pixel circuit including a shielding film between the substrate 100 and a transistor) can have a structure different from the structure of the pixel circuit below the display element layer 200A. Alternatively, the display element of the auxiliary display element layer 200C and the display element of the display element layer 200A can operate according to different control signals. Components (e.g., an infrared sensor) that do not require relatively high transmittance can be positioned in the first area OA in which the auxiliary display element layer 200C is positioned. In this case, the first area OA can be a component area or an auxiliary display area.

[0094] Figures 4A-4D is a cross-sectional view illustrating a display panel 10 according to an example embodiment of the present disclosure. As in Figures 3A-3D the display panel 10 including a thin film encapsulation layer 300 in Figures 4A-4D the display panel 10 of FIG. 1A can include an encapsulation substrate 300A and a sealant 340.

[0095] As Figures 4A-4C illustrated, one or more of the substrate 100, the display layer 200, and the encapsulation substrate 300A can have a through-hole 100H, 200H, and 300AH corresponding to the first area OA. The display element layer 200A can not be positioned in the first area OA, or the auxiliary display element layer 200C can be positioned in the first area OA, as Figure 4D illustrated. The auxiliary display element layer 200C can be at least similar to the auxiliary display element layer 200C described with reference to Figure 3D .

[0096] Figure 5 is a plan view illustrating a display panel 10 according to an example embodiment of the present disclosure. Figure 6is an equivalent circuit diagram showing a pixel of a display panel 10 according to an example embodiment of the present disclosure.

[0097] Referring to Figure 5 , the display panel 10 can include a display area DA, a first area OA, an intermediate area MA, and a peripheral area PA. Figure 5 A substrate 100 of the display panel 10 is shown. For example, the substrate 100 can be understood to include the display area DA, the first area OA, the intermediate area MA, and the peripheral area PA.

[0098] The display panel 10 includes a plurality of pixels P arranged in the display area DA. Each pixel P includes a pixel circuit PC and an OLED, which is a display element connected to the pixel circuit PC, as shown in Figure 6 The pixel circuit PC can include a first TFT T1, a second TFT T2, and a storage capacitor Cst. Each pixel P can emit, for example, red, green, or blue light or can emit red, green, blue, or white light through the OLED.

[0099] The second TFT T2, which is a switching TFT, can be connected to a scan line SL and a data line DL and can transfer a data voltage input from the data line DL to the first TFT T1 according to a switching voltage input from the scan line SL. The storage capacitor Cst can be connected to the second TFT T2 and a driving voltage line PL and can store a voltage corresponding to a difference between a voltage received from the second TFT T2 and a first power voltage ELVDD supplied to the driving voltage line PL.

[0100] The first TFT T1, which is a driving TFT, can be connected to the driving voltage line PL and the storage capacitor Cst and can control a driving current flowing from the driving voltage line PL to the OLED in response to a voltage stored in the storage capacitor Cst. The OLED can emit light having a predetermined brightness as determined by the driving current. A counter electrode (e.g., a cathode) of the OLED can receive a second power voltage ELVSS.

[0101] Although in Figure 6 , the pixel circuit PC is shown to include two TFTs and one storage capacitor, the present disclosure is not limited thereto. The number of TFTs and the number of storage capacitors can vary in various ways according to the design of the pixel circuit PC.

[0102] Referring again to Figure 5The middle area MA can surround at least the first area OA. The middle area MA is an area where display elements (e.g., OLEDs for emitting light) are not positioned, and signal lines for applying signals to the pixels P arranged around the first area OA can pass through the middle area MA. A scan driver 1100 for applying a scan signal to each of the pixels P, a data driver 1200 for applying a data signal to each of the pixels P, and main power supply lines for supplying a first power supply voltage and a second power supply voltage can be located in the peripheral area PA. Although Figure 5 The data driver 1200 is located on one side of the substrate 100, but according to an exemplary embodiment of the present disclosure, the data driver 1200 can be located on a flexible printed circuit board (FPCB) electrically connected to pads located on one side of the display panel 10.

[0103] Figure 7 is a plan view showing a portion of the display panel 10 according to an exemplary embodiment of the present disclosure.

[0104] Referring to Figure 7 The pixels P are located in a display area DA near the first area OA. Some of the pixels P can be spaced apart from each other near the first area OA, and the first area OA can be defined between the pixels P. For example, in the plan view, the pixels P can be located above and below the first area OA and can be located left and right of the first area OA.

[0105] Signal lines from among the signal lines for applying signals to the pixels P, which are adjacent to the first area OA, can bypass (or bypass around) the first area OA. In the plan view, Figure 7 In the plan view, at least one data line DL from among the data lines passing through the display area DA can extend in the y direction to apply a data signal to the pixels P located above and below the first area OA and can bypass in the middle area MA along an edge of the first area OA. In the plan view, at least one scan line SL from among the scan lines passing through the display area DA can extend in the x direction to apply a scan signal to the pixels P located left and right of the first area OA and can bypass in the middle area MA along an edge of the first area OA.

[0106] The bypass portion SL-D and the extension portion SL-L of the scan line SL across the display area DA can be located on the same layer and can be integrally formed. The bypass portion DL-D1 and the extension portion DL-L1 of the at least one data line DL across the display area DA can be formed on different layers, and the bypass portion DL-D1 and the extension portion DL-L1 of the at least one data line DL can be connected to each other through the contact hole CNT. The bypass portion DL-D2 and the extension portion DL-L2 from the at least one data line DL of the data line DL can be located on the same layer and can be integrally formed.

[0107] One or more spacers SP can be located in the middle area MA. For example, one or more spacers SP can be located between the first area OA and the portion of the middle area MA in which the scan lines SL and the data lines DL are bypassed. Each spacer SP can have a loop shape at least partially surrounding the first area OA in a plan view, and the spacers SP can be spaced apart from each other.

[0108] Figure 8 is a cross-sectional view illustrating the display panel 10 according to an exemplary embodiment of the present disclosure taken along a line VIII-VIII’ of Figure 7 . Figure 9A and Figure 9B are cross-sectional views illustrating a process of manufacturing the spacer SP of the display panel 10 according to an exemplary embodiment of the present disclosure.

[0109] Referring to Figure 8 the display area DA, the substrate 100 can include a glass material or a polymer resin, and, in an exemplary embodiment of the present disclosure, the substrate 100 can have a multi-layer structure as described with reference to Figure 3A .

[0110] A buffer layer 201 for preventing impurities from penetrating into a semiconductor layer Act of a TFT can be formed on the substrate 100. The buffer layer 201 can include an inorganic insulating material such as silicon nitride, silicon oxynitride, and / or silicon oxide, and can have a single-layer or multi-layer structure including the inorganic insulating material.

[0111] A pixel circuit PC can be located on the buffer layer 201. The pixel circuit PC includes a TFT and a storage capacitor Cst. The TFT can include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. Figure 8 The TFT of Figure 6The data line DL is electrically connected to a driving TFT, and the data line DL is electrically connected to a switching TFT included in the pixel circuit PC. Although in this embodiment, the TFT is a top-gate TFT in which the gate electrode GE is positioned above the semiconductor layer Act with the gate insulating layer 203 therebetween, the TFT can be a bottom-gate TFT according to an example embodiment of the present disclosure.

[0112] The semiconductor layer Act can include polysilicon. Alternatively, the semiconductor layer Act can include amorphous silicon, oxide semiconductor, and / or organic semiconductor. The gate electrode GE can include a low-resistance metal material. The gate electrode GE can include a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), and / or titanium (Ti) and can have a single-layer or multi-layer structure including the conductive material.

[0113] The gate insulating layer 203 between the semiconductor layer Act and the gate electrode GE can include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, and / or hafnium oxide. The gate insulating layer 203 can have a single-layer or multi-layer structure including the inorganic insulating material.

[0114] The source electrode SE and the drain electrode DE can each be positioned on the same layer as the data line DL. Each of the source electrode SE, the drain electrode DE, and the data line DL can include a material having high conductivity. Each of the source electrode SE and the drain electrode DE can include a conductive material including Mo, Al, Cu, or Ti and can have a single-layer or multi-layer structure including the conductive material. In an example embodiment of the present disclosure, each of the source electrode SE, the drain electrode DE, and the data line DL can have a multi-layer structure formed of a three-layer structure of Ti / Al / Ti.

[0115] The storage capacitor Cst includes a lower electrode CE1 and an upper electrode CE2 overlapping each other with a first interlayer insulating layer 205 between the lower electrode CE1 and the upper electrode CE2. The storage capacitor Cst can at least partially overlap the TFT. In this regard, in the embodiment, the gate electrode GE of the TFT is the lower electrode CE1 of the storage capacitor Cst. According to an example embodiment of the present disclosure, the storage capacitor Cst can not overlap the TFT. The storage capacitor Cst can be covered by a second interlayer insulating layer 207. The upper electrode CE2 of the storage capacitor Cst can include a conductive material including Mo, Al, Cu, and / or Ti and can have a single-layer or multi-layer structure including the conductive material. Figure 8

[0116] ​Each of the first interlayer insulating layer 205 and the second interlayer insulating layer 207 can include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, and / or hafnium oxide. Each of the first interlayer insulating layer 205 and the second interlayer insulating layer 207 can have a single-layer or multi-layer structure including the inorganic insulating material.

[0117] The pixel circuit PC including the TFT and the storage capacitor Cst can be covered by the first organic insulating layer 209. The first organic insulating layer 209 can have a substantially flat (e.g., planar) top surface.

[0118] The pixel circuit PC can be electrically connected to the pixel electrode 221. For example, as shown in FIG. 2A, a contact metal CM can be further located between the TFT and the pixel electrode 221. The contact metal CM can contact the TFT through a contact hole formed in the first organic insulating layer 209, and the pixel electrode 221 can contact the contact metal CM through a contact hole formed in the second organic insulating layer 211 on the contact metal CM. The contact metal CM can include a conductive material including Mo, Al, Cu, and / or Ti, and can have a single-layer or multi-layer structure including the conductive material. In an exemplary embodiment of the disclosure, the contact metal CM can have a multi-layer structure formed of Ti / Al / Ti. Figure 8

[0119] Each of the first organic insulating layer 209 and the second organic insulating layer 211 can include an organic insulating material such as a general-purpose polymer (e.g., polymethyl methacrylate (PMMA) or polystyrene (PS)), a polymer derivative having a phenolic group, an acryl-based polymer, an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, or a mixture thereof. In an exemplary embodiment of the disclosure, each of the first organic insulating layer 209 and the second organic insulating layer 211 can include PI.

[0120] The pixel electrode 221 can be formed on the second organic insulating layer 211. Although Figure 8 the contact metal CM and the second organic insulating layer 211 are included in FIG. 2A, according to an exemplary embodiment of the disclosure, the contact metal CM and the second organic insulating layer 211 can be omitted. In this case, the pixel electrode 221 can be located on the first organic insulating layer 209, and the pixel electrode 221 can be electrically connected to the TFT through a contact hole formed in the first organic insulating layer 209.

[0121] ​The pixel electrode 221 can include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and / or aluminum zinc oxide (AZO). According to an exemplary embodiment of the present disclosure, the pixel electrode 221 can include a reflective film including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), and / or a compound thereof. According to an exemplary embodiment of the present disclosure, the pixel electrode 221 can further include a film formed of ITO, IZO, ZnO, or In2O3 above and / or below the reflective film.

[0122] The pixel-defining film 215 can be formed on the pixel electrode 221. The pixel-defining film 215 can have an opening and can cover edges of the pixel electrode 221, a top surface of the pixel electrode 221 being exposed through the opening. The pixel-defining film 215 can include an organic insulating material. Alternatively, the pixel-defining film 215 can include an inorganic insulating material such as silicon nitride, silicon oxynitride, or silicon oxide. Alternatively, the pixel-defining film 215 can include an organic insulating material and / or an inorganic insulating material.

[0123] The intermediate layer 222 includes an emission layer 222b. The intermediate layer 222 can include a first functional layer 222a positioned below the emission layer 222b and / or a second functional layer 222c positioned above the emission layer 222b. The emission layer 222b can include a high molecular weight or low molecular weight organic material that emits light of a predetermined color.

[0124] The first functional layer 222a can have a single layer or a multi-layer structure. For example, when the first functional layer 222a is formed of a high molecular weight material, the first functional layer 222a is a hole transport layer (HTL) having a single layer structure, and can be formed of poly(3,4-ethylenedioxythiophene) (PEDOT) or polyaniline (PANI). When the first functional layer 222a is formed of a low molecular weight material, the first functional layer 222a can include a hole injection layer (HIL) and / or a hole transport layer (HTL).

[0125] The second functional layer 222c can be omitted. For example, when each of the first functional layer 222a and the emission layer 222b is formed of a high molecular weight material, the second functional layer 222c is formed. The second functional layer 222c can have a single layer or a multi-layer structure. The second functional layer 222c can include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0126] The emission layer 222b of the intermediate layer 222 can be positioned for each pixel in the display area DA. The emission layer 222b can be patterned to correspond to the pixel electrode 221 exposed through the opening of the pixel-defining film 215. Unlike the emission layer 222b, the first functional layer 222a and the second functional layer 222c of the intermediate layer 222 can be in the intermediate area MA as well as the display area DA.

[0127] The counter electrode 223 can be formed of a conductive material having a low work function. As used herein, the phrase "low work function" can be intended to mean a material having a work function lower than that of silicon. The counter electrode 223 can include a (semi-)transparent layer including Ag, Mg, Al, Nd, Ir, Cr, lithium (Li), calcium (Ca), and / or alloys thereof. For example, the counter electrode 223 can include Li, Ca, LiF / Ca, LiF / Al, Al, Mg, or alloys thereof. Alternatively, the counter electrode 223 can further include a layer formed of ITO, IZO, ZnO, and / or In2O3, which is on the (semi-)transparent layer including the aforementioned materials. The counter electrode 223 can also be formed in the intermediate area MA as well as the display area DA. The first functional layer 222a, the second functional layer 222c, and the counter electrode 223 can be formed by using thermal evaporation.

[0128] A capping layer 230 can be on the counter electrode 223. For example, the capping layer 230 can include LiF, and can be formed by using thermal evaporation. In some example embodiments of the disclosure, the capping layer 230 can be omitted.

[0129] A spacer 217 can be formed on the pixel-defining film 215. The spacer 217 can include an organic insulating material such as PI. Alternatively, the spacer 217 can include an inorganic insulating material such as silicon nitride or silicon oxide, or can include an organic insulating material and an inorganic insulating material.

[0130] The spacer 217 and the pixel-defining film 215 can include the same material or different materials. For example, the pixel-defining film 215 and the spacer 217 can be formed together by using a mask process with a half-tone mask. In example embodiments of the disclosure, the pixel-defining film 215 and the spacer 217 can each include PI.

[0131] The OLED is covered by a thin film encapsulation layer 300. The thin film encapsulation layer 300 can include at least one organic encapsulation layer and at least one inorganic encapsulation layer. In Figure 8In the embodiment, the thin film encapsulation layer 300 includes a first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330, and an organic encapsulation layer 320 between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330. According to exemplary embodiments of the present disclosure, the number of organic encapsulation layers and the number of inorganic encapsulation layers, and the order of stacking the organic encapsulation layers and the inorganic encapsulation layers can vary.

[0132] Each of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can include one or more inorganic materials from among aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride. Each of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can have a single layer or a multi-layer structure including the one or more inorganic materials. The organic encapsulation layer 320 can include a polymer-based material. Examples of the polymer-based material can include an acrylic resin, an epoxy-based resin, PI, and / or polyethylene.

[0133] The thicknesses of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can be different from each other. The thickness of the first inorganic encapsulation layer 310 can be greater than the thickness of the second inorganic encapsulation layer 330. For example, the thickness of the first inorganic encapsulation layer 310 can be about 1 µm, and the thickness of the second inorganic encapsulation layer 330 can be about 0.7 µm. Alternatively, the thickness of the second inorganic encapsulation layer 330 can be greater than the thickness of the first inorganic encapsulation layer 310, or the thicknesses of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can be the same.

[0134] Referring to FIG. 2A, Figure 8 The intermediate area MA can include a first sub-intermediate area SMA1 relatively far from the first area OA and a second sub-intermediate area SMA2 relatively close to the first area OA. The spacer SP and the line bypassing the first area OA can be located in the intermediate area MA.

[0135] The data line DL can be located in the first sub-intermediate area SMA1. Figure 8 The data line DL of the first sub-intermediate area SMA1 corresponds to Figure 7 the bypass portion (e.g., DL-D1 and DL-D2) of FIG. 2A. The first sub-intermediate area SMA1 can be a bypass area or a line area in which a line (e.g., the data line DL) is bypassed.

[0136] The data lines DL can be alternately arranged with an insulating layer therebetween. For example, adjacent data lines DL are alternately positioned such that one of the adjacent data lines DL is located under an insulating layer (e.g., the first organic insulating layer 209) and the other is located above the insulating layer (e.g., the first organic insulating layer 209). When the data lines DL are alternately positioned with the insulating layer therebetween, the distance (e.g., the pitch Δd) between the data lines DL can be reduced. Although in the embodiment of FIG. 2A, the data lines DL are alternately positioned with the insulating layer therebetween, the data lines DL can be arranged in a single layer or a multi-layer structure.Figure 8 The middle data line DL is located in the first sub-middle area SMA1, but the bypass portion of the scan line SL (e.g., the scan line SL of FIG. 6) can also be located in the first sub-middle area SMA1. Figure 7 The bypass portion of the scan line SL (e.g., the scan line SL of FIG. 6) can also be located in the first sub-middle area SMA1.

[0137] One or more spacers SP can be located in the second sub-middle area SMA2. In the second sub-middle area SMA2 in which the spacers SP are located, the organic layer included in the middle layer 222 can be broken (or divided) by the spacers SP. The second sub-middle area SMA2 can be a spacer area or an organic layer breaking (dividing) area.

[0138] In the second sub-middle area SMA2, the spacers SP can be located on the insulating layer (e.g., the second interlayer insulating layer 207). The spacers SP can break and / or divide at least one organic layer of the OLED. For example, the spacers SP can break and / or divide the first functional layer 222a and / or the second functional layer 222c extending to the middle area MA. The counter electrode 223 and / or the capping layer 230 can also be broken, as with the first functional layer 222a and / or the second functional layer 222c.

[0139] The first functional layer 222a, the second functional layer 222c, and / or the counter electrode 223 can be all formed on the substrate 100 by using thermal evaporation. The spacers SP can be formed before the process of forming the first functional layer 222a, the second functional layer 222c, and the counter electrode 223. The first functional layer 222a, the second functional layer 222c, and / or the counter electrode 223 deposited after the spacers SP are formed can have a broken (divided) structure due to the shape of the spacers SP. The capping layer 230 including LiF can also have a broken (divided) structure due to the shape of the spacers SP.

[0140] The broken (divided) structure of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 due to the spacers SP will be described as follows.

[0141] Figure 9A is a cross-sectional view illustrating a state before the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 are deposited. Figure 9B is a cross-sectional view illustrating a state after the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 are deposited.

[0142] Referring to Figure 9AThe spacer SP has a shape in which a width Wt of the top surface SP-T is greater than a width Wb of the bottom surface SP-B. A side surface SP-L of the spacer SP connecting the top surface SP-T and the bottom surface SP-B can include an inverse taper inclined surface. In this regard, in Figure 9A the side surface SP-L of the spacer SP includes an inverse taper inclined surface and the spacer SP has an inverse trapezoidal cross-sectional shape. An angle a formed between the inverse taper inclined surface and the top surface 100t of the substrate can be equal to or less than 30°. A thickness SP-H of the spacer SP can be equal to or greater than about 3 pm.

[0143] The spacer SP can include an organic material. The spacer SP can include an organic material different from materials of the first organic insulating layer 209 and the second organic insulating layer 211. The spacer SP can include a photosensitive resin, for example, a negative photoresist.

[0144] The spacer SP can be covered by an inorganic layer PSV, and the inorganic layer PSV can include at least one hole PSV-h corresponding to the top surface SP-T of the spacer SP. The hole PSV-h can be a path through which a gas generated by the spacer SP including an organic material is released during and / or after a process of manufacturing the display panel 10. The hole PSV-h can be a degassing path.

[0145] A main body of the inorganic layer PSV other than the hole PSV-h can cover a portion of the top surface SP-T of the spacer SP and the side surface SP-L of the spacer SP. The main body of the inorganic layer PSV can extend from the top surface SP-T of the spacer SP to cover the side surface SP-L and can contact a top surface of an insulating layer (for example, the second interlayer insulating layer 207) located below the spacer SP.

[0146] Referring to Figure 9B after the spacer SP and the inorganic layer PSV are formed, the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can be formed as described above. Each of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can be integrally formed in the display area DA and the middle area MA. Because the spacer SP is located in the middle area MA, the first functional layer 222a and / or the second functional layer 222c can be broken by the spacer SP. Also, the counter electrode 223 can be broken by the spacer SP, and the capping layer 230 including a material such as LiF can be broken by the spacer SP.

[0147] A layer including an organic material among the layers formed on the substrate 100 can be a path through which a foreign substance such as moisture penetrates. A foreign substance such as moisture can damage an OLED. According to an exemplary embodiment of the present disclosure, because the first functional layer 222a and / or the second functional layer 222c including an organic material are disconnected by the spacer SP, moisture penetration can be minimized in a direction parallel to a top surface of the first functional layer 222a and / or the second functional layer 222c (e.g., in a lateral direction or x-direction).

[0148] In an exemplary embodiment of the present disclosure, a shadow area can exist around the spacer SP having an inclined surface of an inverse taper. The shadow area can be formed by the inclined surface of the inverse taper of the spacer SP. The first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can be difficult to deposit in the shadow area around the spacer SP. In and / or around the shadow area, the end portions of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can have any various cross-sectional shapes according to deposition conditions. For example, the end portions of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can have a small thickness around the spacer SP. The position and cross-sectional shape of the end portions of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can vary according to deposition conditions (e.g., time, deposition direction, and material).

[0149] In one comparative example, when the inorganic layer PSV does not exist on the spacer SP, the end portions of the first functional layer and / or the second functional layer including an organic material can contact a side surface (i.e., the inclined surface of the inverse taper) of the spacer including an organic material according to deposition conditions (e.g., deposition time or incident angle of a deposition material). The first functional layer (including an organic material) and the spacer (including an organic material) contacting each other and / or the second functional layer (including an organic material) and the spacer (including an organic material) contacting each other can form a path through which new moisture penetrates. However, according to an exemplary embodiment of the present disclosure, because the inorganic layer PSV located on the spacer SP covers the side surface SP-L of the spacer SP, the end portions of the first functional layer 222a and / or the second functional layer 222c can be prevented from contacting the spacer SP. Thus, the first functional layer 222a and / or the second functional layer 222c formed of an organic material can be prevented from contacting the spacer SP formed of an organic material and forming a moisture penetration path.

[0150] Because the spacer SP is located under the inorganic layer PSV and the first functional layer 222a and / or the second functional layer 222c is located above the inorganic layer PSV, the spacer SP can be spaced apart from the first functional layer 222a and / or the second functional layer 222c by the inorganic layer PSV in the lateral direction (x-direction). The lateral surface of the spacer SP can not contact the first functional layer 222a and / or the second functional layer 222c. Likewise, the counter electrode 223 and / or the capping layer 230 can also be spaced apart from the spacer SP by the inorganic layer PSV and can not contact the spacer SP.

[0151] The inorganic layer PSV can include a metal or an inorganic insulating material. For example, the inorganic layer PSV can include a transparent conductive oxide (TCO) such as ITO and / or a metal layer. Alternatively, the inorganic layer PSV can include an inorganic insulating layer such as silicon oxide, silicon nitride, or silicon oxynitride.

[0152] Referring again to FIG. 1, Figure 8 When a plurality of spacers SP are located on the substrate 100, the spacers SP can be spaced apart from each other, and the partition wall PW can be located between the spacers SP. The height of the spacer SP with respect to the substrate 100 can be equal to or less than the height of the partition wall PW with respect to the substrate 100. For example, the height of the spacer SP can be obtained by measuring the vertical distance from the top surface of the substrate 100 to the top surface of the spacer SP, and the height of the partition wall PW can be obtained by measuring the vertical distance from the top surface of the substrate 100 to the top surface of the partition wall PW.

[0153] The organic encapsulation layer 320 can be formed by applying a monomer to the substrate 100 and then curing the monomer. The partition wall PW can control the flow of the monomer, and can adjust the thickness of the monomer, for example, the thickness of the organic encapsulation layer 320. The end portion of the organic encapsulation layer 320 can be located at the side of the partition wall PW. The partition wall PW can include the same material as the material of the first organic insulating layer 209, the second organic insulating layer 211, and / or the pixel defining film 215.

[0154] The spacer SP located relatively close to the display area DA, for example, the spacer SP located between the partition wall PW and the OLED of the display area DA, can be covered by the organic encapsulation layer 320.

[0155] The first inorganic encapsulation layer 310 located under the organic encapsulation layer 320 can be formed by using chemical vapor deposition (CVD). Because the first inorganic encapsulation layer 310 has a relatively good step coverage, the first inorganic encapsulation layer 310 can be continuously formed without being disconnected, unlike the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230. For example, the first inorganic encapsulation layer 310 can be continuously formed to cover the top surface and the side surface of the spacer SP. The first inorganic encapsulation layer 310 can cover the stack of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 disconnected by the spacer SP.

[0156] The second inorganic encapsulation layer 330 is located on the organic encapsulation layer 320. The second inorganic encapsulation layer 330 can cover the entire substrate 100, like the first inorganic encapsulation layer 310. A portion of the second inorganic encapsulation layer 330 can directly contact the first inorganic encapsulation layer 310 in the second sub-middle area SMA2. For example, the second inorganic encapsulation layer 330 can directly contact the first inorganic encapsulation layer 310 in an area between the first area OA and the end portion of the organic encapsulation layer 320.

[0157] The planarization layer 410 can be located on the thin film encapsulation layer 300. The planarization layer 410 can improve the flatness of the display panel 10 by covering a portion of the middle area MA in which the organic encapsulation layer 320 is not present. Accordingly, it can be possible to prevent the input sensing layer 40 and / or the optical functional layer 50, which are directly formed on the display panel 10 or coupled to the display panel 10 with an adhesive layer, from being separated from the display panel 10. A portion of the planarization layer 410 can overlap a portion of the organic encapsulation layer 320.

[0158] The planarization layer 410 can include an organic insulating material. In an exemplary embodiment of the disclosure, the planarization layer 410 can be formed by applying a photoresist (e.g., a negative or a positive photoresist) or a polymer-based organic material to the thin film encapsulation layer 300 and patterning the photoresist or the polymer-based organic material. In an exemplary embodiment of the disclosure, the planarization layer 410 can be located only in the middle area MA. In a plan view, the planarization layer 410 can have a loop shape at least partially surrounding the first area OA.

[0159] The first upper insulating layer 420 and the second upper insulating layer 430 can be formed on the planarization layer 410. The first upper insulating layer 420 can include an inorganic insulating layer, and the second upper insulating layer 430 can include an organic insulating layer. In an exemplary embodiment of the disclosure, when the input sensing layer 40 (see FIG. 1) is formed on the planarization layer 410, the first upper insulating layer 420 can be formed to cover a portion of the planarization layer 410 directly contacting the input sensing layer 40. Figure 2AWhen formed directly on the display panel 10, the first upper insulating layer 420 and the second upper insulating layer 430 can be integrally formed with the insulating layer included in the input sensing layer 40. For example, each of the first upper insulating layer 420 and the second upper insulating layer 430 can be an insulating layer included in the input sensing layer 40.

[0160] The display panel 10 may have a first opening 10H corresponding to the first region OA. The first opening 10H may be formed by forming the above-mentioned elements on the substrate 100 and then performing a cutting or dicing process along the first line SCL. The side surface of the first opening 10H may include the side surface of the substrate 100 and the side surface of the layers stacked on the substrate 100 exposed through the first opening 10H.

[0161] although Figure 8 The separator SP is located directly on the second interlayer insulating layer 207 (which is an inorganic insulating layer), but this disclosure is not limited thereto. According to exemplary embodiments of this disclosure, elements having any of various structures can be located below the separator SP, as shown in reference... Figure 10 and Figure 11 As described below.

[0162] Figure 10 This is a cross-sectional view showing the separator SP and the structure surrounding the separator SP according to an exemplary embodiment of the present disclosure. Figure 10 In the middle, the components above the cover layer 230 (e.g., Figure 8 (The thin film encapsulation layer 300 and the components above the thin film encapsulation layer 300 are not shown for ease of explanation.)

[0163] See Figure 10 The metal layer ML can be located below the separator SP. The metal layer ML is located between the inorganic insulating layer (e.g., the second interlayer insulating layer 207) and the separator SP. The separator SP can directly contact the top surface of the metal layer ML. The adhesive force between the metal layer ML and the separator SP can be greater than the adhesive force between the inorganic insulating layer (e.g., the second interlayer insulating layer 207) and the separator SP.

[0164] Metal layer ML can include with Figure 8 The source electrode SE and drain electrode DE of the pixel circuit PC, as well as the data line DL, are made of the same material. Alternatively, the metal layer ML may include materials similar to those used in the pixel circuit PC. Figure 8 The material of the contact metal CM is the same as that of the material.

[0165] The spacer SP can include a photosensitive material such as a negative photoresist, and a process of forming the spacer SP including the photosensitive material can include exposure, development, and baking. In the exposure process of forming the spacer SP, light can be reflected by the metal layer ML. Considering the light reflection by the metal layer ML, the width W1 of the metal layer ML can be equal to or greater than the width Wt of the top surface SP-T of the spacer SP (Wb < Wt ≤ W1).

[0166] The inorganic layer PSV can cover a portion of the top surface SP-T and the side surface SP-L of the spacer SP, and can cover the metal layer ML. The inorganic layer PSV can cover the spacer SP and the metal layer ML and can extend to an inorganic insulating layer (e.g., the second interlayer insulating layer 207) located below the metal layer ML. The inorganic layer PSV can contact a portion of the top surface SP-T and the side surface SP-L of the spacer SP, can contact a portion of the top surface ML-T and the side surface ML-L of the metal layer ML, and can contact the second interlayer insulating layer 207. The portion of the top surface SP-T of the spacer SP not covered by the inorganic layer PSV corresponds to the location of the hole PSV-h for degassing.

[0167] Figure 11 is a cross-sectional view illustrating a spacer SP and a structure around the spacer SP according to an exemplary embodiment of the present disclosure. In Figure 11 , elements (e.g., Figure 8 The thin film encapsulation layer 300 and elements above the thin film encapsulation layer 300 of

[0168] Referring to Figure 11 , the organic layer OL can be located below the spacer SP. The organic layer OL is located between the inorganic insulating layer (e.g., the second interlayer insulating layer 207) and the spacer SP. The spacer SP can directly contact the top surface OL-T of the organic layer OL. The adhesion between the organic layer OL and the spacer SP can be greater than the adhesion between the inorganic insulating layer (e.g., the second interlayer insulating layer 207) and the spacer SP.

[0169] The organic layer OL can include the same material as the material of the first organic insulating layer 209 or the second organic insulating layer 211 of Figure 8 The organic layer OL can be formed by using the same process as the process of the first organic insulating layer 209 or the second organic insulating layer 211. The organic layer OL can be patterned to be located below the spacer SP. In a plan view, as referred to Figure 7As described, the spacer SP can have a loop shape that at least partially surrounds the first area OA. In a plan view, the organic layer OL can also have a loop shape that at least partially surrounds the first area OA, just like the spacer SP. The width W2 of the top surface OL-T of the organic layer OL can be equal to or greater than the width Wb of the bottom surface SP-B of the spacer SP.

[0170] The inorganic layer PSV can cover a portion of the top surface SP-T and the side surface SP-L of the spacer SP, and can cover the organic layer OL. The inorganic layer PSV can cover the spacer SP and the organic layer OL, and can extend to an inorganic insulating layer (e.g., the second interlayer insulating layer 207) located below the organic layer OL. The inorganic layer PSV can contact a portion of the top surface SP-T and the side surface SP-L of the spacer SP, can contact a portion of the top surface OL-T and the side surface OL-L of the organic layer OL, and can contact the second interlayer insulating layer 207. The portion of the top surface SP-T of the spacer SP that is not covered by the inorganic layer PSV corresponds to the location of the hole PSV-h for degassing.

[0171] Because the inorganic layer PSV covers the organic layer OL, the end portions of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can be prevented from contacting the organic layer OL. In a comparative example, when the end portions of the first functional layer 222a and the second functional layer 222c, which are formed of an organic material, contact the organic layer OL, a penetration path can be formed. However, according to the exemplary embodiments of the present disclosure, the inorganic layer PSV is located between the organic layer OL and the first functional layer 222a and the second functional layer 222c, and thus a penetration path can be prevented from being formed.

[0172] Although in Figures 8-11 , the side surface SP-L of the spacer SP has a shape of an inverted taper having one inclined surface, i.e., an inclined surface of an inverted taper, the present disclosure is not limited thereto. According to the exemplary embodiments of the present disclosure, the side surface SP-L of the spacer SP can include a plurality of inclined surfaces having different inclination angles.

[0173] Figures 12A-12C is a cross-sectional view of a spacer SP according to the exemplary embodiments of the present disclosure. Referring to Figure 12A , the spacer SP can include a side surface SP-L, and a portion (e.g., a sub-side surface) of the side surface SP-L can include an inclined surface of an inverted taper having an angle formed between the top surface of the substrate and the portion of the side surface SP-L. In some embodiments, the angle can be an acute angle.

[0174] Referring to Figure 12AThe width Wt of the top surface SP-T of the spacer SP can be greater than the width Wb of the bottom surface SP-B of the spacer SP, and the side surface SP-L can include a plurality of sub side surfaces. For example, the side surface SP-L of the spacer SP can include a first sub side surface SP-L1, a second sub side surface SP-L2, and a third sub side surface SP-L3. The first sub side surface SP-L1, the second sub side surface SP-L2, and the third sub side surface SP-L3 having different inclination angles can be formed in a direction of the spacer SP from the top surface SP-T to the bottom surface SP-B.

[0175] In an exemplary embodiment of the present disclosure, the inclination angle a of the second sub side surface SP-L2 can be less than the inclination angle of the first sub side surface SP-L1, and the inclination angle of the third sub side surface SP-L3 can be greater than the inclination angle of the second sub side surface SP-L2. The inclination angles of the first sub side surface SP-L1, the second sub side surface SP-L2, and the third sub side surface SP-L3 can be angles formed between the top surface 100t of the substrate and the first sub side surface SP-L1, the second sub side surface SP-L2, and the third sub side surface SP-L3.

[0176] At least one of the first sub side surface SP-L1, the second sub side surface SP-L2, and the third sub side surface SP-L3 can be an inverse tapered inclined surface. At least one of the first sub side surface SP-L1, the second sub side surface SP-L2, and the third sub side surface SP-L3 can be equal to or less than about 30°. In an embodiment, Figure 12A It is shown that the second sub side surface SP-L2 can be an inverse tapered inclined surface, and the inclination angle a of the second sub side surface SP-L2 can be equal to or less than 30°. In another embodiment, Figure 12B It is shown that the first sub side surface SP-L1 and the second sub side surface and SP-L2 can be inverse tapered inclined surfaces. In other embodiments, Figure 12C It is shown that the first sub side surface SP-L1 can be an inverse tapered inclined surface.

[0177] Although the inclination angle of the first sub side surface SP-L1 is about 90° in Figure 12A , according to an exemplary embodiment of the present disclosure, as shown in Figure 12B , the inclination angle of the first sub side surface SP-L1 can be an acute angle with respect to the top surface 100t of the substrate.

[0178] Although the side surface SP-L of the spacer SP includes one or more inverse tapered inclined surfaces in Figure 12A and Figure 12B , the present disclosure is not limited thereto. In some embodiments, the side surface SP-L of the spacer SP can include positive tapered sub side surfaces. As Figure 12CAs shown, the side surface SP-L of the spacer SP can include a first sub-side surface SP-L1 having a reverse-tapered shape and a second sub-side surface SP-L2 having a forward-tapered shape. The inclination angle a of the inclined surface (which is the first sub-side surface SP-L1) of the reverse taper can be equal to or less than 30°. The length of the first sub-side surface SP-L1 can be greater than the length of the second sub-side surface SP-L2.

[0179] According to Figures 12A-12C the structure of the spacer SP of the embodiments or the embodiments derived therefrom can be applied to Figures 8-11 the embodiments and the embodiments derived therefrom, and can also be applied to Figures 13-15 the embodiments and the embodiments derived therefrom.

[0180] Figures 13-15 is a cross-sectional view showing a portion of a display panel 10 according to an exemplary embodiment of the present disclosure.

[0181] The spacer SP can have any desired shape. For example, the side surface SP-L of the spacer SP can include a plurality of inclined surfaces, can have a relatively small inclination angle (e.g., equal to or less than 20° or equal to or less than 15°), and / or can include alternately formed inclined surfaces of a reverse taper and inclined surfaces of a forward taper.

[0182] When a large range of the shadow area is formed due to the shape of the spacer SP, as Figure 13 shown, the end portions of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can be spaced apart from each other by a predetermined interval due to the spacer SP.

[0183] For example, the first inorganic encapsulation layer 310 can be formed on the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230, which are disconnected (partitioned) by the spacer SP. The first inorganic encapsulation layer 310 can directly contact the side surface SP-L of the spacer SP. Also, the first inorganic encapsulation layer 310 can directly contact the second interlayer insulating layer 207, which is an inorganic insulating layer in the first partition area RA between the spacer SP and the end portions of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230.

[0184] Referring to Figure 14 , a metal layer ML can be located under the spacer SP. The width of the metal layer ML can be equal to or greater than the width Wt of the top surface of the spacer SP, as referred to Figure 10The first inorganic encapsulation layer 310 can contact the metal layer ML in the first separation region RA between the separator SP and the end portions of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the cap layer 230.

[0185] Referring to Figure 15 The organic layer OL can be located under the separator SP. The width of the organic layer OL can be less than the width Wt of the top surface of the separator SP. The organic layer OL can be formed such that a second separation region RA' is formed between the organic layer OL and the end portions of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the cap layer 230. The width of the second separation region RA' can be less than the width of the first separation region RA, or can be greater than or equal to 0.7, 0.8, or 0.9 times the width of the first separation region RA.

[0186] Figure 16 is a cross-sectional view showing a portion of the display panel 10 according to an exemplary embodiment of the present disclosure. In Figure 16 In the display panel 10, the thin film encapsulation layer 300 and elements above the thin film encapsulation layer 300 are not shown for convenience of explanation.

[0187] The at least one insulating layer located under the separator SP can include a slot (or trench). In this regard, in Figure 16 In the display panel 10, the second interlayer insulating layer 207 under the separator SP includes a slot 207G. The second interlayer insulating layer 207 can have a single layer structure or a multi-layer structure including a silicon nitride layer and a silicon oxide layer. The depth d of the slot 207G can be less than the thickness t of the second interlayer insulating layer 207. The slot 207G can be formed by using a half-tone mask or the like.

[0188] The top surface 270t of the second interlayer insulating layer 207 and the bottom surface 207Gb of the slot 207G form a stepped structure due to the slot 207G. Due to the stepped structure, the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the cap layer 230 can be more effectively disconnected. For example, the end portions of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the cap layer 230 can be located at the edge 207te of the top surface 207t of the second interlayer insulating layer 207, and the remainder RD can be located in the slot 207G.

[0189] The deposition material obliquely incident in the deposition process of forming the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can be located in the groove 207G to form the remainder RD. Due to the stepped structure of the second interlayer insulating layer 207, the remainder RD can be spaced apart from the ends of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 from each other. According to the exemplary embodiment of the disclosure, even if the remainder RD including the organic material contacts the spacer SP including the organic material, the ends of the spacer SP and the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can be maintained spaced apart from each other, thereby effectively preventing damage to the organic light emitting device due to moisture penetration.

[0190] When at least one of the following conditions is satisfied, moisture penetration can be more effectively prevented.

[0191] The side surface SP-L of the spacer SP can include an inclined surface having an angle equal to or less than 30° (condition 1). The sum (I1+Wb) of the first separation distance I1 between the adjacent spacers SP and the width Wb of the bottom surface of the spacer SP can be equal to or greater than about 6 µm (condition 2). The thickness SP-H of the spacer SP can be equal to or greater than about 3 µm (condition 3), and / or the second separation distance I2 between the inner surface of the second interlayer insulating layer 207 defining the groove 207G and the side surface SP-L of the spacer SP facing the inner surface of the second interlayer insulating layer 207 can be equal to or greater than about 2 µm (condition 4).

[0192] When all the conditions are satisfied, the ends of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can be spaced apart from the spacer SP without being affected by the conditions of the deposition process of forming the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230, and moisture penetration can be effectively prevented. The above conditions can be modified and applied to Figures 8-15 the embodiments explained and derived therefrom, and also to Figures 17-20 the embodiments of FIGS. 1A to 1C and derived therefrom.

[0193] Figure 17 is a cross-sectional view illustrating a display panel 10 according to an exemplary embodiment of the disclosure. Although Figure 8 the partition wall PW of FIGS. 1A to 1C is located between the adjacent spacers SP and the end of the organic encapsulation layer 320 is located on one side of the partition wall PW in the display panel 10, Figure 17 the spacer SP of FIGS. 1A to 1C can perform Figure 8 the function of the partition wall PW of FIGS. 1A to 1C. The end of the organic encapsulation layer 320 can be located on one side of one spacer SP.

[0194] Reference is made to Figure 17 The described features can be applied to Figures 8-16 embodiments of Figures 18-21 embodiments of

[0195] Figure 18 is a cross-sectional view illustrating a display panel 10 according to an exemplary embodiment of the present disclosure.

[0196] Referring to Figure 18 , the inorganic layer PSV can include the same material as that of the pixel electrode 221. For example, as shown in the enlarged view of Figure 18 , the inorganic layer PSV can include a first sub-inorganic layer PSV-1, a second sub-inorganic layer PSV-2, and a third sub-inorganic layer PSV-3.

[0197] As described with reference to Figure 8 , the pixel electrode 221 can include a first sub-pixel electrode layer 221-1 and a third sub-pixel electrode layer 221-3 positioned below and above a second sub-pixel electrode layer 221-2, which is a reflective film. For example, the second sub-pixel electrode layer 221-2 can include Ag, and each of the first sub-pixel electrode layer 221-1 and the third sub-pixel electrode layer 221-3 can include a TCO such as ITO. The first sub-inorganic layer PSV-1, the second sub-inorganic layer PSV-2, and the third sub-inorganic layer PSV-3 of the inorganic layer PSV can include the same material as that of the first sub-pixel electrode layer 221-1, the second sub-pixel electrode layer 221-2, and the third sub-pixel electrode layer 221-3, respectively.

[0198] Although the spacer SP is positioned on the second interlayer insulating layer 207 in Figure 18 , the present disclosure is not limited thereto. As described with reference to Figure 10 and Figure 11 , the metal layer ML or the organic layer OL can be positioned below the spacer SP. Figure 18 The spacer SP of Figures 12A-12C may have a shape or a shape derived therefrom. Figure 18 The second interlayer insulating layer 207 of Figure 16 may include a groove in which the spacer SP is positioned, as described with reference to

[0199] Figure 19 is a cross-sectional view illustrating a display panel 10 according to an exemplary embodiment of the present disclosure.

[0200] Referring to Figure 19The spacer SP can be located on the first interlayer insulating layer 205, and the inorganic layer PSV covering a portion of the top surface and the side surface of the spacer SP can include the second interlayer insulating layer 207. For example, the second interlayer insulating layer 207 can be the inorganic layer PSV. Alternatively, the inorganic layer PSV can include the second interlayer insulating layer 207. The inorganic layer PSV can include an insulating material, for example, an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. The inorganic layer PSV can have a multi-layer structure of the insulating material.

[0201] The inorganic layer PSV can be formed integrally on the substrate 100, and can cover a portion of the top surface and the side surface of the spacer SP. The inorganic layer PSV can have a hole PSV-h corresponding to the top surface of the spacer SP.

[0202] The metal layer ML can be located below the spacer SP, and the width and other characteristics of the metal layer ML can be the same as those described with reference to Figure 10 The metal layer ML can include the same material as an electrode including metal from the storage capacitor Cst and the TFT of the pixel circuit PC. For example, the metal layer ML and the upper electrode CE2 of the storage capacitor Cst can include the same material and can be formed by using the same process.

[0203] As described above, since the inorganic layer PSV covers the spacer SP, the end portion of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can not contact the spacer SP. The partition wall PW and the spacer SP can be located on different layers.

[0204] Although Figure 19 the metal layer ML is located below the spacer SP, according to an exemplary embodiment of the disclosure, the metal layer ML can be omitted. Alternatively, an organic layer can be positioned instead of the metal layer ML, as described with reference to Figure 11 Figure 19 The spacer SP can have a shape or a shape derived from Figures 12A-12C the shape of the second interlayer insulating layer 207 of the display panel 10, and / or the first interlayer insulating layer 205 can include a groove having the same structure as the structure of the groove formed in the second interlayer insulating layer 207 of the display panel 10. Figure 16

[0205] Figure 20 FIG. 1 is a cross-sectional view showing a display panel 10 according to an exemplary embodiment of the disclosure.

[0206] Referring to Figure 20 ​​The spacer SP can be located on the second interlayer insulating layer 207, and can be at least partially covered by the inorganic layer PSV having a hole PSV-h corresponding to the top surface of the spacer SP. The inorganic layer PSV can cover a portion of the top surface and the side surface of the spacer SP, and can extend to the display area DA. For example, the inorganic layer PSV can be integrally formed on the substrate 100, and the inorganic layer PSV can cover the data line DL and the source electrode SE and / or the drain electrode DE of the TFT located in the display area DA and the first sub-middle area SMA1. The inorganic layer PSV can contact the data line DL in the display area DA and the first sub-middle area SMA1. The inorganic layer PSV can include an inorganic insulating material.

[0207] The metal layer ML can be located under the spacer SP, and the width and other characteristics of the metal layer ML can be the same as those described with reference to Figure 10 The metal layer ML can include the same material as that of the storage capacitor Cst of the pixel circuit PC and one of the electrodes of the TFT. For example, the metal layer ML can include the same material as that of the data line DL and the source electrode SE and / or the drain electrode DE of the TFT included in the pixel circuit PC.

[0208] As described above, since the inorganic layer PSV covers the spacer SP, the end portion of the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and / or the capping layer 230 can not contact the spacer SP. The partition wall PW and the spacer SP can be located on different layers. For example, the partition wall PW can be located on the inorganic layer PSV.

[0209] Although Figure 20 the metal layer ML is located under the spacer SP, according to an exemplary embodiment of the disclosure, the metal layer ML can be omitted. Alternatively, an organic layer can be positioned instead of the metal layer ML, as described with reference to Figure 11 . Figure 20 The spacer SP according to an exemplary embodiment of the disclosure can have a shape or a shape derived from Figures 12A-12C the shape of the second interlayer insulating layer 207, and / or Figure 20 The second interlayer insulating layer 207 according to an exemplary embodiment of the disclosure can include a groove. Figure 16

[0210] Figure 21 is a cross-sectional view illustrating a display panel 10 according to an exemplary embodiment of the disclosure.

[0211] Referring to Figure 21 , the organic layer OL can be located under the spacer SP. The organic layer OL can include the same material as that of the first organic insulating layer 209. The organic layer OL and the first organic insulating layer 209 can be formed by using the same process.

[0212] ​The separator SP may be covered by an inorganic layer PSV having holes PSV-h corresponding to the top surface of the separator SP. The inorganic layer PSV may include a conductive inorganic material (such as a metal) or an inorganic insulating material (such as a silicon nitride).

[0213] When the organic layer OL is located below the separator SP, the thickness of the organic layer OL can be greater than the thickness of the inorganic layer PSV or the metal layer, thus allowing the separator SP to function. Figure 8 The function of the partition wall PW (see Figure 8 As described above, since the inorganic layer PSV covers the separator SP, the ends of the first functional layer 222a, the second functional layer 222c, the counter electrode 223 and / or the capping layer 230 may not contact the separator SP.

[0214] although Figure 21 The organic layer OL is located below the separator SP; however, according to an exemplary embodiment of this disclosure, the organic layer OL may be omitted. Alternatively, a metal layer may be positioned in place of the organic layer OL, as referenced... Figure 10 As described. Figure 21 The separator SP can have Figures 12A-12C The shape or the shape derived from it.

[0215] According to one or more embodiments of this disclosure, the display panel can prevent foreign impurities (such as moisture) around the first area from damaging the display area.

[0216] In some cases, unless otherwise specifically indicated, the features, characteristics and / or elements described in connection with the specific embodiments may be used alone and / or in combination with features, characteristics and / or elements described in connection with other embodiments.

[0217] Although one or more embodiments have been described herein with reference to the accompanying drawings, those skilled in the art will understand that various changes in form and detail may be made herein without departing from the spirit and scope of this disclosure.

Claims

1. A display panel, comprising: a substrate comprising a first area, a second area, and a third area between the first area and the second area; a plurality of display elements disposed in the second area, the plurality of display elements comprising two display elements spaced apart from each other, wherein the first area is disposed between the two display elements, wherein each of the plurality of display elements comprises a pixel electrode, a counter electrode, and an intermediate layer disposed between the pixel electrode and the counter electrode; a separator disposed in the third area and comprising at least one inversely tapered inclined surface; and an inorganic layer disposed on the separator, wherein at least one sub-layer comprised in the intermediate layer is discontinuous across the separator, wherein the display panel further comprises a metal layer disposed in the third area, the separator is disposed on the metal layer, and a width of the metal layer is greater than a width of a bottom surface of the separator, and wherein the separator is made of an organic material.

2. The display panel of claim 1, wherein, The at least one sub-layer comprises an organic material.

3. The display panel of claim 1, wherein, An inorganic material covers at least a portion of a top surface of the separator and / or a side surface of the separator.

4. The display panel of claim 1, wherein, The at least one sub-layer is disposed above the inorganic layer, and the separator is disposed below the inorganic layer.

5. The display panel of claim 1, wherein, The separator comprises a photosensitive material.

6. The display panel of claim 1, wherein, The at least one sub-layer comprises a hole transport layer, a hole injection layer, an electron transport layer, and / or an electron injection layer.

7. The display panel of claim 1, wherein, The inorganic layer comprises a hole corresponding to a top surface of the separator.

8. The display panel of claim 1, wherein, The width of the metal layer is greater than or equal to the width of the top surface of the separator.

9. The display panel of claim 1, wherein, The inorganic layer at least partially covers a top surface of the metal layer and extends to an upper surface of an insulating layer disposed below the metal layer.

10. The display panel of claim 1, further comprising an organic layer disposed in the third area, wherein the separator is disposed on the organic layer.

11. The display panel of claim 10, wherein, The inorganic layer at least partially covers the organic layer and extends to an upper surface of an insulating layer disposed below the organic layer.

12. The display panel of claim 1, wherein an inclination angle between the at least one inversely tapered inclined surface and a top surface of the substrate is less than or equal to 30°.

13. The display panel of claim 1, further comprising at least one insulating layer disposed between the substrate and the separator, wherein the at least one insulating layer comprises a slot corresponding to the separator.

14. The display panel of claim 1, wherein, The display panel comprises an opening corresponding to the first area.

15. A display panel, comprising: a substrate comprising a first area, a second area, and a third area disposed between the first area and the second area; a plurality of display elements disposed in the second area, the plurality of display elements comprising two display elements spaced apart from each other to define the first area; a separator disposed in the third area and extending along an edge of the first area; and at least one inorganic insulating layer disposed between the substrate and the spacer, wherein the spacer is directly on the at least one inorganic insulating layer, wherein the spacer has a plurality of inclined surfaces including a first inclined surface and a second inclined surface having different inclined angles, wherein at least one inclined surface of the plurality of inclined surfaces is an inverted tapered inclined surface, and wherein a sub-layer comprising an organic material disposed within the plurality of display elements is discontinuous across the spacer, wherein the spacer is made of an organic material, and wherein the inclined angle of the inverted tapered inclined surface relative to a top surface of the substrate is less than or equal to 30°.

16. The display panel of claim 15, wherein, The spacer includes a photosensitive resin.

17. The display panel of claim 15, wherein, The at least one inorganic insulating layer includes a groove, and the spacer is disposed within the groove.

18. The display panel of claim 15, further comprising an inorganic layer disposed on the spacer, wherein the inorganic layer covers a side surface of the spacer and extends to the at least one inorganic insulating layer.

19. The display panel of claim 18, wherein, The inorganic layer directly contacts the at least one inorganic insulating layer.

20. The display panel of claim 18, wherein, The inorganic layer has a hole corresponding to a top surface of the spacer.

21. The display panel of claim 18, wherein, The inorganic layer includes a metal or an inorganic insulating material.

22. The display panel of claim 18, wherein, The inorganic layer extends to the second area.

23. An electronic device comprising: the display panel of any one of claims 1 to 22; and a component corresponding to the first area of the display panel, wherein the component includes a camera, a sensor, or a speaker.

Images