Optoelectronic semiconductor component and method for manufacturing an optoelectronic semiconductor component

Abstract

In one embodiment, the optoelectronic semiconductor component (1) comprises at least two lead frame parts (21, 22) and an optoelectronic semiconductor chip (3) disposed on one of the lead frame parts (21) in the mounting area (24). The lead frame parts (21, 22) are mechanically connected to each other via a potting body (4). The semiconductor chip (3) is embedded in the potting body (4). In the mounting area (24), the lead frame part (21) involved has a reduced thickness (D1). The electrical line (5) is guided from the semiconductor chip (3) over the potting body (4) to the connection area (25) of the other lead frame part (22). In the connection area (25), the lead frame part (22) involved has a full thickness (D2). From the connection area (25) to the semiconductor chip (3), the line (5) overcomes an insignificant height difference.

Description

Field of Technology

[0001] An optoelectronic semiconductor component is described. Furthermore, a method for manufacturing an optoelectronic semiconductor component is described. Summary of the Invention

[0002] The task to be solved is to describe an optoelectronic semiconductor component in which the semiconductor chip is effectively electrically contacted.

[0003] This task is solved in particular by a semiconductor component having the features of claim 1. Preferred developments are the subject matter of the remaining claims.

[0004] According to at least one embodiment, the semiconductor component includes two or more lead frame parts. These lead frame parts together form the lead frame of the semiconductor component. Preferably, the lead frame parts are made from the same semi-finished product. The semi-finished product is in particular a metal sheet, such as a copper sheet. Thus, the lead frame parts are the metal-containing parts of the semiconductor component, and these parts are electrically conductive.

[0005] According to at least one embodiment, the semiconductor component includes one or more optoelectronic semiconductor chips. At least one semiconductor chip is disposed in a mounting area on one of the lead frame parts. If there are multiple semiconductor chips, they can be disposed individually or in groups on a single lead frame part or multiple lead frame parts.

[0006] The at least one semiconductor chip is preferably a light-emitting diode chip, abbreviated as an LED chip. Alternatively, the semiconductor chip can be a detector chip, such as a photodiode or a CCD field. In the case of multiple semiconductor chips, the semiconductor chips emitting radiation can also be combined with the semiconductor chips detecting radiation.

[0007] According to at least one embodiment, the semiconductor component includes a potting body. The potting body mechanically connects the lead frame parts to each other. That is to say, without the potting body, the semiconductor component would be mechanically unstable.

[0008] According to at least one embodiment, the at least one semiconductor chip is embedded in the potting body. This particularly means that the side surfaces of the semiconductor chip are completely or mostly covered by the potting body, and the potting body is in form-fit and / or direct connection with the semiconductor chip. Seen in a plan view, the potting body preferably surrounds the semiconductor chip in a closed track.

[0009] According to at least one embodiment, the semiconductor component includes one or more electrical circuits. The at least one electrical circuit is designed to be in electrical contact with the at least one semiconductor chip. The electrical circuit is preferably a metal-containing circuit, for example including copper, aluminum, gold, and / or silver as main components.

[0010] According to at least one embodiment, the semiconductor chip has a chip upper side. The chip upper side faces away from the mounting area and can be oriented parallel to the mounting area. The chip upper side is preferably the main radiation side of the semiconductor chip. That is to say, if the semiconductor chip is a radiation-emitting semiconductor chip, all or most of the radiation generated in the semiconductor chip falls on the chip upper side. Otherwise, in the case of a detector chip for the semiconductor chip, the chip upper side is the radiation incident surface or the detection side.

[0011] According to at least one embodiment, the lead frame part on which the semiconductor chip is laid has a reduced thickness in the mounting area. That is to say, the mounting area is thinner relative to at least one other area of the lead frame part.

[0012] According to at least one embodiment, the circuit leads from the semiconductor chip over the potting body to a connection area of another lead frame part in the lead frame part. An electrical connection between the semiconductor chip and the other lead frame part is achieved via the circuit. Thus, the semiconductor chip is electrically connected via at least two lead frame parts. Here, the circuit is preferably directly located on the potting body, and in particular along the entire path that the circuit passes over the potting body.

[0013] According to at least one embodiment, the lead frame part having the connection area has a full thickness, especially in the connection area. In other words, the thickness of the lead frame part is not reduced in the connection area. It is possible to have a full thickness only in at least one connection area.

[0014] The connection area can be the thickest area of the lead frame part. In particular, there is no thinning starting from the emission side of the semiconductor component in the connection area. On the contrary, in principle, the thickness can be reduced starting from the bottom side, which is opposite to the mounting area in the case of the lead frame part having the semiconductor chip; however, this is suboptimal.

[0015] According to at least one embodiment, the line from the connection region to the semiconductor chip overcomes an insignificant height difference. This specifically means that, in a direction perpendicular to the mounting region, in particular at the upper side of the potting body, the height difference is at most 50 μm or 30 μm or 20 μm or 10 μm or 5 μm, or there is no height difference. Preferably, that is, the upper side of the chip and the connection region are in the same plane or approximately in the same plane. This plane is preferably oriented parallel to the mounting region. Preferably, the entire path through which the line passes does not exceed the height difference. That is to say, the maximum height difference overcome by the line is lower than the above value.

[0016] In at least one embodiment, the optoelectronic semiconductor component includes at least two lead frame parts and at least one optoelectronic semiconductor chip laid on one of the lead frame parts in the mounting region. The lead frame parts are mechanically connected to each other via a potting body. The semiconductor chip is embedded in the potting body. The semiconductor chip has an upper side of the chip facing away from the mounting region. In the mounting region, the lead frame part involved has a reduced thickness. At least one electrical line is guided from the semiconductor chip over the potting body to a connection region of another lead frame part among the lead frame parts. In the connection region, at least when viewed from the emission side, the lead frame part involved has a full thickness. From the connection region to the semiconductor chip, the line overcomes a height difference of at most 20 μm in a direction perpendicular to the mounting region.

[0017] Planar electrical connections (also known as planar interconnections) are generally used to contact semiconductor chips such as light-emitting diode chips or silicon detectors. Here, generally, relatively long or deep electrical vias, also known as via contacts, are required to reach the surface of a substrate such as a printed circuit board, a ceramic carrier, or a lead frame from the height of the upper side of the chip. These vias are complex to manufacture and relatively sensitive.

[0018] In the case of the semiconductor component described here, such vias can be avoided or at least the height of the vias can be significantly reduced. This is achieved in particular by etching back one of the lead frame parts to accommodate the semiconductor chip, and the etching back preferably corresponds to the chip height. Thereby, the electrical contact surface of the semiconductor chip is actually in the same plane as the upper side of the solid material of the lead frame. After casting or extrusion molding of the semiconductor chip and the lead frame part, in particular by film-assisted spraying (also known as Film Assisted Molding), a planar contact part in the form of an electrical line without vias can be created.

[0019] Due to the height tolerance of the chip and the etch-back tolerance of the lead frame, not all surfaces are usually at the same height. Thus, when creating the potting body, grooves and indentations are obtained in the potting body and / or on the upper side of the semiconductor component. In the case of planar interconnections, this can lead to a short circuit between the upper side and the side surfaces of the semiconductor chip or associated lead frame components. This situation can be avoided or at least mitigated by having the semiconductor chip below the upper side of the lead frame or at the same height as the upper side of the lead frame.

[0020] Since the upper side of the chip and the lead frame contact for the lines are at approximately the same height, deep vias can be avoided. The laborious via manufacturing, such as creating drill holes and coating the via walls, is eliminated. Thereby, especially in the case of thermal loads, the susceptibility to cracks at the conductor lines and at the edges of the vias is also reduced or avoided.

[0021] Furthermore, after creating the potting body and before processing the planar interconnections, both the semiconductor chip and the lead frame components can be contacted from above, for example, by test needles. This allows the functional test to be performed already before separating the components. Defective components can be removed from the process before other process steps, such as applying the luminescent substance.

[0022] If multiple semiconductor chips are connected as a module by planar interconnections, the circuit can be adapted by prior testing if necessary, for example, by bypassing defective semiconductor chips in a laser lithography step instead of creating short circuits or broken contacts. Thereby, the yield during manufacturing can be increased.

[0023] In addition, the following design of the semiconductor component is made possible, in which surfaces of any size of the lead frame components can be exposed at the upper side of the component. Besides electrical contact, these surfaces can also be used, for example, to apply markings via laser scribing, such as individual component codes, customer-specific markings, brightness grouping, and / or chromaticity coordinate grouping.

[0024] In particular, test data can be laid down. Since the components can still be tested in the composite, the testing and the description of the components based on the testing, using, for example, brightness grouping or chromaticity coordinate grouping, are simpler than after separation. This offers the possibility of saving the final test after separation.

[0025] In particular, the components are also characterized in the composite in a machine-readable form corresponding to the respective grouping according to chromaticity coordinates and / or brightness, where optionally a final measurement can be carried out afterwards.

[0026] Markings such as DMC codes or OCR codes can be much smaller in metal than in potting materials such as epoxy resins or silicone resins. Such markings in metal are also easier to read due to the higher contrast. Since the surface of the lead frame is exposed at the corresponding positions throughout the process chain, the code can already be applied at the beginning, so that the component can be traced throughout the process chain. The NMF code and the individual component markings can be applied in the same step. The separate scribing of the individual markings can be dispensed with.

[0027] Furthermore, the upper sides of the component composite and the component are largely flat. Therefore, a luminescent substance can be applied to the semiconductor chip for wavelength conversion by exposure techniques or by spraying, for example in the form of an adhesive plate. Similarly, optical elements such as Fresnel optics or lenses can be applied to the upper side of the chip, for example by means of adhesion or by spraying techniques or printing techniques.

[0028] Furthermore, the lead frame can also be used as a reflector, in particular by placing the semiconductor chip in an etch-back and / or using a transparent potting material. Short-circuiting of the electrical lines on the reflector wall can be avoided by etching back the reflector at the corresponding positions or by routing the planar interconnections, i.e. the electrical lines, through electrical insulation.

[0029] According to at least one embodiment, the connection area is higher than the upper side of the chip. Here, the height in particular represents the distance from the bottom side of the semiconductor component. The semiconductor component can be mounted at the bottom side, in particular by surface mounting, abbreviated as SMT.

[0030] According to at least one embodiment, the mounting area is located in a groove of the semiconductor component in question. The groove preferably forms a reflector for the radiation generated during operation.

[0031] According to at least one embodiment, a wall of the semiconductor component in question is formed around the groove. The wall preferably has recesses in the area of the electrical lines. Due to the recesses, the distance between the lines and the semiconductor component in question is increased by the recesses. As an alternative to the recesses, an electrical insulation layer can also be present on or at the wall.

[0032] According to at least one embodiment, a luminescent substance body is applied to the upper side of the chip. The luminescent substance body is, for example, a ceramic or silicon plate. The luminescent substance body has one or more luminescent substances. During operation of the semiconductor chip, the radiation generated is partially or completely converted via at least one luminescent substance into preferably long-wave radiation.

[0033] According to at least one embodiment, the light-emitting body is flush with the potting body in the direction away from the mounting area. That is to say, the light-emitting body and the potting body may have the same height. In this case, the light-emitting body preferably has an electrical through-contact portion that extends from a line along the upper side of the potting body and thus along the upper side of the light-emitting body all the way to the upper side of the chip. In other words, the through-contact portion passes through the light-emitting body and connects the electrical line to the upper side of the chip. The through-contact portion preferably only passes through the light-emitting body.

[0034] According to at least one embodiment, the upper side of the chip is flush with the potting body in the direction away from the mounting area. Thereby, it is possible that a possible light-emitting body protrudes beyond the potting body and / or is partially laid on the potting body. This enables the semiconductor component to be without electrical through-contact portions.

[0035] According to at least one embodiment, the reduced thickness is at least 10% or 20% of the full thickness and / or at most 55% or 40% or 35%. That is to say, the reduced thickness is relatively small.

[0036] According to at least one embodiment, the full thickness of the lead frame part is at least 50 μm or 70 μm or 100 μm and / or at most 1 mm or 0.5 mm or 0.26 mm. Alternatively or additionally, the minimum distance between adjacent lead frame parts is at least 50 μm or 0.1 mm or 0.18 mm and / or at most 1 mm or 0.5 mm or 0.2 mm. Thus, the lead frame parts can be arranged relatively close to each other.

[0037] According to at least one embodiment, the minimum distance between adjacent lead frame parts is at least 50% or 60% or 90% of the full thickness of the lead frame part and / or at most 110% or 100% or 90%.

[0038] According to at least one embodiment, in a cross-section view, the upper side of the potting body facing away from the mounting area is curved. Alternatively, in a cross-section view, the upper side can extend straight, especially from the upper side of the chip to the lead frame part. The upper side of the potting body can steadily rise from the upper side of the chip to the connection area. Alternatively, the upper side of the potting body can first descend from the upper side and then continuously rise to the connection area. The upper side of the potting body preferably extends smoothly, especially like a differentiable curve.

[0039] According to at least one embodiment, the semiconductor chip projects laterally beyond the lead frame part having the mounting area, in particular in a direction parallel to the mounting area. For the lateral projection P of the semiconductor component beyond the lead frame part in question, in particular when viewed in cross-section, depending on the full thickness D2 and the reduced thickness D1, the following applies:

[0040] 0.3 * (D2 - D1) P 2 * (D2 - D1) or

[0041] 0.4 * (D2 - D1) P 1.5 * (D2 - D1). Alternatively or additionally, the following applies to the average edge length E of the upper side of the chip: P 0.4 * E or P 0.3 * E. Additionally, the following may also apply: 0.1 * E P.

[0042] According to at least one embodiment, the potting body is light-impermeable. For example, the potting body is black to increase the contrast, or has a high diffuse reflectance and appears white to the viewer. Alternatively, the potting body is penetrable for the radiation generated during operation, in particular transparent or milky.

[0043] According to at least one embodiment, the lead frame part is partially or completely provided with a reflective coating. Such a coating includes, for example, silver or aluminum, specifically for reflecting blue light. As an alternative to the metal-containing coating, a dielectric mirror and / or a Bragg mirror may also be present. Such a coating may be limited to the grooves.

[0044] According to at least one embodiment, the semiconductor component includes two or more different types of semiconductor chips. One or more semiconductor chips may be provided for each type. For example, semiconductor chips for generating red, green, and blue light may be present. The semiconductor component may be an RGB component. Preferably, different types of semiconductor chips can be electrically controlled independently of each other. Similarly, semiconductor chips of the same type can be electrically controlled independently of each other or can also be combined together.

[0045] Furthermore, a method for manufacturing an optoelectronic semiconductor component is described. Using this method, a semiconductor component as described in connection with one or more of the above embodiments is manufactured. Therefore, the features of the semiconductor component are also disclosed for this method, and vice versa.

[0046] In at least one embodiment, the method includes the following steps, preferably performed in the order described:

[0047] A) Providing a semi-etched lead frame composite having a plurality of lead frames, wherein each lead frame has a plurality of lead frame parts and is provided for one of the finished semiconductor components,

[0048] B) Mounting semiconductor chips on the lead frames,

[0049] C) Creating a potting body,

[0050] D) Generating electrical circuits and electrical wirings between the lead frames, wherein the wirings electrically connect the platforms of adjacent lead frames to each other, and

[0051] E) Cutting the connection bars between the lead frames such that electrical connections between adjacent lead frames are provided only via the wirings.

[0052] As an alternative to semi-etching, the lead frames can also be stamped.

[0053] Before cutting the connection bars, the individual lead frames in the lead frame composite are electrically shorted to each other. Thus, effective electrical testing of the individual semiconductor chips cannot yet be carried out before the cutting. By generating the wirings, testing can also be carried out in the lead frame composite as long as the potting body has not been cut and the lead frame parts are mechanically firmly connected to each other.

[0054] Here, the wirings can be designed corresponding to the electrical circuits, i.e., as planar interconnections. Thus, by appropriately designing the lead frame parts and appropriately connecting the semiconductor chips in a matrix, effective electrical testing can also be carried out in the lead frame composite. The term "wiring" in particular does not refer to connections via wires such as bonding wires.

[0055] The electrical connections, in particular the wirings, can be crossed by using solid material regions of the lead frame parts as vias in order to establish a connection from the planar interconnection lines to the other side of the lead frame parts involved. In particular, by sawing the lead frame composite, the superfluous and / or interfering electrical connections on the other side of the lead frame parts are interrupted, wherein the potting body remains intact as a mechanical unit. Thus, the components can be electrically tested before separation, and optionally the components can also be pre-sorted or grouped, for example for a display device such as a display.

[0056] According to at least one embodiment, the method includes step F) after step E). In step F), the semiconductor chips and / or the lead frames are tested.

[0057] According to at least one embodiment, the method includes step G). In step G), separation into semiconductor components is carried out, where the potting body and the wiring are cut off. Here, a grouping of a plurality of lead frames can be retained.

[0058] According to at least one embodiment, in step F), the circuit is created together with the wiring. The circuit and the wiring can be implemented identically.

[0059] According to at least one embodiment, in step F), apart from the lead frame components and the semiconductor chip itself, the electrical circuit and the wiring are the only electrical connections in the lead frame composite. In particular, there are no electrical through-contacts.

[0060] According to at least one embodiment, the platform on which the wiring is laid has the full thickness of the lead frame component. The platform can have no function in the completed semiconductor component. Alternatively or additionally, the platform can be used to test the semiconductor component in the non-separated state, for example for contact pins. Furthermore, the platform can serve as a contact surface for bonding wires or strip contacts in the completed semiconductor component.

[0061] According to at least one embodiment, the width of the circuit and / or the wiring is respectively at least 10 μm or 20 μm or 30 μm, and alternatively or additionally at most 200 μm or 150 μm or 100 μm or 80 μm. The thickness of the circuit and / or the wiring is preferably respectively at least 1 μm or 2 μm or 4 μm and / or at most 100 μm or 40 μm or 20 μm or 10 μm.

[0062] According to at least one embodiment, step C) is carried out by means of film-assisted molding (FAM). Thereby, when filling the material of the potting body, the upper side of the chip and the connection area are covered with a spraying film. The spraying film can compensate for a small height difference between the connection area and the upper side of the chip. After the potting body has been produced, the spraying film is preferably completely removed. Description of the Drawings

[0063] The optoelectronic semiconductor component described herein and the method described herein will be explained in detail below based on embodiments with reference to the drawings. Here, in the respective drawings, the same reference numerals denote the same elements. However, no scale reference is shown here, and the individual elements can be shown exaggerated for better understanding.

[0064] Figure 1 A schematic cross-sectional view of an embodiment of the optoelectronic semiconductor component described herein is shown

[0065] Figure 2 A, Figure 3 A, Figure 4 A, Figure 5 and Figure 6 A shows a schematic perspective plan view of an embodiment of the optoelectronic semiconductor component described herein,

[0066] Figure 2 B, Figure 3 B, Figure 4 B and Figure 6 B shows a schematic perspective bottom view of an embodiment of the optoelectronic semiconductor component described herein,

[0067] Figure 7 shows a schematic cross-sectional view of an embodiment of the optoelectronic semiconductor component described herein,

[0068] Figure 8 A shows a schematic plan view of an embodiment of the optoelectronic semiconductor component described herein,

[0069] Figure 8 B, Figure 9 , Figure 10 , Figure 11 C, Figure 12 , Figure 13 A and Figure 13 B and Figure 16 A, Figure 16 B and Figure 16 C shows a schematic cross-sectional view of an embodiment of the optoelectronic semiconductor component described herein,

[0070] Figure 11 A and Figure 11 B show schematic cross-sectional views of method steps of a manufacturing method for an embodiment of the optoelectronic semiconductor component described herein, and

[0071] Figure 14 A, Figure 14 B, Figure 14 C and 14D show schematic plan views of method steps of a manufacturing method for an embodiment of the optoelectronic semiconductor component described herein, and

[0072] Figure 15 shows a schematic cross-sectional view of a lead frame composite for manufacturing an embodiment of the optoelectronic semiconductor component described herein. Detailed Description

[0073] In Figure 1An embodiment of the optoelectronic semiconductor component 1 is shown. The semiconductor component 1 includes a lead frame 20 composed of a first lead frame part 21 and a second lead frame part 22. The first lead frame part 21 has a region with a reduced thickness. This region forms the mounting region 24. A semiconductor chip 3, preferably a light-emitting diode chip, is laid in the mounting region 24. The chip upper side 30 of the semiconductor chip 3 faces away from the mounting region 24. The semiconductor chip 3 is electrically contacted via the first lead frame part 21 and by means of an electrical line 5 leading to the second lead frame part 22. The semiconductor component 1 can be surface-mounted, for example by soldering, at the bottom side 11.

[0074] The semiconductor chip 3 is embedded in a potting body 4. The potting body 4 firmly connects the lead frame parts 21, 22 to each other. Preferably, the upper side 40 of the potting body 4 is flush with the chip upper side 30 and with the connection region 25 at the second lead frame part 22. Thus, the electrical line 5 can extend substantially parallel to the mounting region 24. Thus, in order to electrically contact the semiconductor chip 3, an electrical through-contact can be dispensed with.

[0075] At the mounting region 24, the first lead frame part 21 has a relatively small reduced thickness D1. The total thickness D2 of the lead frame parts 21, 22 is approximately three times the reduced thickness D1.

[0076] At the edge and / or in the corner region on the bottom side 11 of the semiconductor component 1, the lead frame parts 21, 22 can each have a recess 8. The recess 8 can be without the potting body 4. The bottom side 11 is opposite the emission side 12, where the chip upper side 30 is preferably located in the emission side 12.

[0077] In Figure 2 's embodiment, three semiconductor chips 3 are located on the first lead frame part 21. One of the semiconductor chips 3 is preferably designed to generate red light, another semiconductor chip 3 is designed to generate green light, and the third semiconductor chip 3 is designed to generate blue light. Preferably, all of these semiconductor chips 3 have the same height. For the sake of simplicity of illustration, the potting body in which the semiconductor chips 3 are embedded is not shown in Figure 2 '.

[0078] These semiconductor chips 3 are each connected to one of all three electrical lines 5 and are conductively connected via these lines 5 to the lead frame parts 22, 23, 23'. Seen from the emission side 12, the lead frame parts 21, 22, 23, 23' together form a trough-shaped region in which the semiconductor chips 3 are located, see Figure 2 A.

[0079] In Figure 2As can be seen in Fig. B, the semiconductor component 21 with the semiconductor chip 3 is approximately square-shaped at the bottom side 11. The other lead frame parts 22, 23, 23' are designed as L-shaped or rectangular and are located at the corners of the bottom side 11. In addition, the lead frame parts 21, 22, 23, 23' are also partially etched starting from the bottom side 11 and are thus partially thinned starting from the bottom side 11.

[0080] In Figure 3 the embodiment of, different from the Figure 2 triangular arrangement of, the semiconductor chip 3 is in a linear arrangement. As Figure 3 shown in Fig. A, the first lead frame part 21 can surround the semiconductor chip 3 in a U-shape. Seen in a plan view, the other lead frame parts 22, 23, 23' are shaped as L-shaped or approximately rectangular and are connected to the associated semiconductor chip 3 via the lines 5, see Figure 3 Fig. A.

[0081] Starting from the bottom side 11, see Figure 3 Fig. B, the lead frame part 21 is designed as rectangular, and the remaining smaller lead frame parts 22, 23, 23' each have a square shape.

[0082] As in all other embodiments, preferably there are markings 35 at the emission side 12 and / or at the bottom side 11 of the lead frame parts 21, 22, 23, 23'. The markings 35 are produced, for example, by means of etching, stamping or laser scribing. With the markings 35, even during the manufacturing process, the semiconductor component 1 can still be tracked individually and the characteristic data on the semiconductor component 1 can be stated. The characteristic data is, for example, one of the produced chromaticity coordinates.

[0083] In Figure 3 it is also shown that adjacent lead frames 20 are connected to each other via the connecting bars 26 during manufacturing. A lead frame complex 2 can be constructed via the connecting bars 26, see also Figure 14 . In the completed semiconductor component 1, preferably there is no longer the Figure 3 connecting bar 26 shown in, so that the lead frame parts 21, 22, 23, 23' and thus the lead frame 20 are flush with the side surfaces of the potting body 4 respectively. Therefore, the lead frame 20 preferably does not protrude beyond the potting body 4.

[0084] The lateral extent x of the semiconductor component 1 is, for example, at least 0.5 mm or 0.8 mm and / or at most 4 mm or 3 mm or 1.5 mm. The longitudinal extent y is, for example, at least 0.8 mm or 1 mm and / or at most 8 mm or 5 mm or 2 mm. The corresponding values can apply to all other embodiments.

[0085] The semiconductor chip 3 (which can also be a mixture of a light-emitting semiconductor chip and a detector chip) is fixed, for example, by soldering or conductive adhesive, at the first lead frame part 21. The electrical circuit 5 is produced, for example, by lithography, for example by structuring a seed layer and subsequently electroplating the deposition of the metal for the circuit 5.

[0086] According to Figure 4 , the potting body 4 is light-transmissive. The semiconductor chip 3 is arranged in the center of the semiconductor component 1. The lead frame parts 21, 22, 23, 23' are respectively located at the corners of the semiconductor component 1. Seen from the bottom side 11, the first lead frame part 21 is L-shaped, and the remaining lead frame parts 22, 23, 23' are approximately square and significantly smaller.

[0087] In Figure 5 , a plurality of semiconductor chips 3 are shown arranged in a matrix via only two lead frame parts 21, 22. The semiconductor chips 3 are electrically connected in parallel. The circuit 5 is connected to the L-shaped second lead frame part 22. For the sake of simplicity of the illustration, the potting body is not shown in Figure 5 .

[0088] In Figure 6 's embodiment, three semiconductor chips 3 are electrically connected to the second lead frame part 22 via a single circuit 5. Similarly, Figure 6 does not show the potting body. For this purpose, the circuit 5 has two Y-shaped branches, but alternatively can also be designed as a star.

[0089] It can also be seen from Figure 6 that the lead frame parts 21, 22 become thinner starting from the bottom side 11 in the region of the connection strip 26, but can extend all the way to the emission side 12.

[0090] In Figure 7 , the semiconductor chip 3 protrudes beyond the mounting area 24 with a protrusion P. Thus, overall, a space saving is achieved. Subject to manufacturing, the minimum distance between the lead frame parts 21, 22 should not be lower. Depending on the total thickness D2 of the lead frame parts 21, 22, the minimum distance is about 0.2 mm. The distance W between the semiconductor chip 3 and the second lead frame part 22 is, for example, only 50 μm, and is thus approximately one quarter of the minimum distance between the lead frame parts 21, 22. Therefore, the mounting area 24 can be made correspondingly smaller. The protrusion P is preferably at most 40% of the edge length E of the upper side 30 of the chip.

[0091] In Figure 8It is shown that the semiconductor chip 3 is located in a groove 28 designed as a reflector. The groove 28 is substantially surrounded by a wall 27 in a ring shape. The wall 27 has a full thickness D2. In order to prevent the first lead frame component 21 from being short-circuited with the circuit 5, the wall 27 has a recess 29 facing the second lead frame component 22. The recess 29 preferably extends all the way to the mounting area 24.

[0092] It is shown in Figure 9 that the semiconductor chip 3 can have all electrical connection terminals at the chip upper side 30. Electrical contact is made via a plurality of circuits in the circuit 5.

[0093] According to Figure 10 , semiconductor chips 3a, 3b are located on a plurality of first lead frame components 21, 21'. The semiconductor chip 3a is, for example, an LED chip. The semiconductor chip 3b can be a chip for protecting against electrostatic discharge damage, abbreviated as an ESD chip. In this case, the semiconductor chips 3a, 3b are connected, for example, via Figure 10 one of the circuits 5 shown by the dashed line in

[0094] It is shown in Figure 11 A, Figure 11 B the steps for manufacturing the potting body 4. According to Figure 11 A, the potting body 4 is produced by film-assisted spraying or extrusion molding. Here, the spraying film 44a seals the connection area 25 and the chip upper side 30. Here, the protruding height H of the lead frame components 21, 22 beyond the chip upper side 30 is at most 20 μm and as small as possible. The protruding height H is compensated by the spraying film 44a. Seen in cross-section, the upper side 40 of the potting body 4 extends exactly from the chip upper side 30 to the lead frame components 21, 22. Towards the bottom side 11, sealing is carried out via another spraying film 44b.

[0095] As in all embodiments, at least the first lead frame component 21 can be completely or partially provided with a reflective coating 43. Thereby, the reflectivity can be increased, especially for blue light, because the lead frame components 21, 22 are made of, for example, copper or copper alloy that only reflects blue light relatively poorly.

[0096] According to Figure 11 B, the potting body 4 is produced by casting. Due to the wetting and surface tension of the material of the potting body 4, small arc arches are formed at the upper side 40. Therefore, the potting body 4 can first become thinner starting from the chip upper side 30 and then be pulled upwards to the emission side 12 having the connection area 25.

[0097] It is shown in Figure 11In the embodiment of C, the upper side 40 is oriented parallel to the mounting area 24. As a result, a step in the line 5 can be constructed at the connection area 25 towards the second lead frame part 22. However, this step has only a very small height. However, since the side surfaces of the lead frame part 22 are also conductive, such a step usually does not endanger the electrical contact. In Figure 11 such steps are avoided in A and 11B respectively.

[0098] As in all embodiments, as an option, the side surfaces of the semiconductor chip 3 can be provided with a transparent potting 42. Through the transparent potting body 42, a directed radiation can be emitted away from the mounting area 24, especially in the case where the semiconductor chip 3 has a light-transmissive substrate. In this case, the potting body 4 is preferably designed to be reflective, for example white.

[0099] In Figure 12 it is shown that a luminescent material body 7 is applied at the upper side 30 of the chip. The luminescent material body 7 is flush with the potting body 40. Thus, the line 5 extends partly over the luminescent material body 7. The electrical contact with the semiconductor chip 3 is effected via an electrical through-contact 57 passing through the luminescent material body 7. However, the through-contact 57 is relatively short in the direction perpendicular to the mounting area 24 and can thus be manufactured relatively cost-effectively.

[0100] Optionally, as in all embodiments, an electrical insulation layer 75 is locally present at the first lead frame part 21. Such an insulation layer 75 can in particular replace Figure 8 the recess 29. Thus, the insulation layer 75 can cover the wall 27 partly or completely.

[0101] In contrast, Figure 13 the luminescent material body 7 of A protrudes beyond the potting body 4. Different from this illustration, the luminescent material body 7 can also extend onto the upper side 40 of the potting body 4. The luminescent material body 7 also protrudes beyond the line 5, and as in Figure 13 the illustration in B, the luminescent material body 7 can also extend onto the upper side 40 of the potting body 4. Optionally, the luminescent material body 7 covers the line 5 and / or the connection area 25, as shown by the dashed line in Figure 13 B.

[0102] In Figure 14 a manufacturing method is shown. According to Figure 14 A, a lead frame complex 2 is provided with a plurality of lead frames 20, each lead frame having for example two lead frame parts 21, 22. Each lead frame 20 includes a connection area 25 having a full thickness D2 and a plurality of platforms 62 also having the full thickness D2. Furthermore, for each lead frame 20 there is a mounting area 24 having a reduced thickness D1.

[0103] Adjacent lead frames 20 are connected to each other via connecting bars 26 and are thus mechanically integrated. Different from Figure 14 the illustration in Figure 14 A, there may also be diagonally distributed connecting bars 26', which are schematically shown as dashed lines in

[0104] According to Figure 14 , one of the platforms 62 is located on the first lead frame part 21, and two of the platforms 62 are located on the second lead frame part 22. In contrast, a plurality of the platforms 62 can also be laid at the first lead frame part 21.

[0105] In Figure 14 the method step of Figure 14 B, one of the semiconductor chips 3 is allocated and assembled to the lead frame 20. Subsequently, the potting body 4 is created, see

[0106] C. After the potting body 4 is created, the connecting bar 26 is cut off starting from the bottom side 11, thereby creating an interruption 59, and the lead frames 20 are electrically separated from each other. Figure 14 According to

[0107] In Figure 14 the step of

[0108] D, the circuit 5 and the electrical wiring 6 are created. This is carried out in a common step, and the circuit 5 is preferably constructed in exactly the same way as the wiring 6. The wiring 6 is located at the upper side 40 of the potting body 4 together with the circuit 5 and extends in a common plane with the circuit 5.

[0109] Thus, continuous electrical connections can be created together via the wiring 6 and the associated lead frame part 22 along rows and columns. Column-by-column connections can be made via the platforms 62 at the first lead frame part 21. Here, the platforms 62 at the first lead frame part 21 are located between the platforms 62 of the second lead frame part 22 in the left-right direction, thus avoiding short circuits. Then, individual tests are carried out on the lead frames 20 and the associated semiconductor chips 3 via the test contacts 91, 92 for rows and columns. Figure 14 Different from

[0110] In Figure 15 , it is shown that the wiring 6 for the row test contact 91 connects the second lead frame part 22. These wirings 6, 91 extend from left to right in Figure 14 the same way as in Figure 15 D. The wiring 6 for the column test contact 92 is inFigure 15 extends perpendicular to the drawing plane and extends downward from top to bottom in Figure 14 D.

[0111] Thus, by using the semi-etched lead frame in combination with the wiring 6, two wiring planes can be realized. On the one hand, it is realized via the lead frame components 21, 22 at the bottom side 11, and on the other hand, it is realized via the platform 62 together with the wiring 6 at the emission side 12. Thus, in particular, bonding wires can be omitted. Thus, the through-contact can be replaced by semi-etching and the creation of the platform 62 brought about by the semi-etching.

[0112] In Figure 16 A, the semiconductor chip 3 is connected through the light-emitting body 7. Here, the light-emitting body 7 and / or the potting body 4 at the emission side 12 can be flush with the conductor line 5. The through-contact 57 can reach different depths, where the through-contact 57 at the second lead frame component 22 is optional. The through-contact 57 to the upper side 30 of the chip passes through the light-emitting body 7.

[0113] In Figure 16 B, the through-contact 57 to the upper side 30 of the chip is located beside the light-emitting body 7 in the potting body 4. In addition, the conductor line 5 protrudes beyond the light-emitting body 7 and the potting body 4. It is also possible for the conductor line 5 to protrude beyond the light-emitting body 7 and the potting body 4 in Figure 16 the example of A.

[0114] In Figure 16 the example of C, the light-emitting body 7 is located above the conductor line 5, the semiconductor chip 3 and the potting body 4 as a preferably continuous layer. Optionally, there is a through-contact 57, especially through the potting body 4. In addition, different from what is shown in Figure 16 C, the light-emitting body 7 can be limited to the potting body 4, and the lead frame components 21, 22 can be completely or partially exposed.

[0115] Unless otherwise specified, the components shown in the drawings preferably directly follow each other in the order of illustration. Layers that do not touch in the drawings are preferably spaced apart from each other. As long as the lines are drawn parallel to each other, the corresponding planes are preferably also oriented parallel to each other. Similarly, unless otherwise specified, the relative positions of the drawn components to each other are also correctly reproduced in the drawings.

[0116] The present invention described herein is not limited by the description based on the embodiments. On the contrary, the present invention includes each new feature and each combination of features, especially including each combination of features in the patent claims, even if the feature or the combination itself is not explicitly stated in the patent claims or the embodiments.

[0117] This patent application claims the priority of German Patent Application 10 2018 101 813.4, the disclosure of which is incorporated herein by reference.

[0118] List of Reference Numerals

[0119] 1 optoelectronic semiconductor component

[0120] 11 bottom side

[0121] 12 emission side

[0122] 2 lead frame composite

[0123] 20 lead frame

[0124] 21 first lead frame part

[0125] 22 second lead frame part

[0126] 23 third lead frame part

[0127] 23' other lead frame part

[0128] 24 mounting area

[0129] 25 connection area

[0130] 26 connection bar

[0131] 27 wall

[0132] 28 groove

[0133] 29 recess

[0134] 3 optoelectronic semiconductor chip

[0135] 30 chip upper side

[0136] 35 mark

[0137] 4 potting body

[0138] 40 upper side of the potting body

[0139] 42 transparent potting

[0140] 43 reflective coating

[0141] 44 spray film

[0142] 5 electrical circuit

[0143] 57 electrical through-contact

[0144] 59 interruption

[0145] 6 electrical wiring between lead frames

[0146] 62 Platform for the wiring

[0147] 7 Luminescent body

[0148] 75 Electric insulation layer

[0149] 8 Depression

[0150] 91 Test contact for rows

[0151] 92 Test contact for columns

[0152] D1 Reduced thickness of the lead frame

[0153] D2 Full thickness of the lead frame

[0154] E Edge length of the upper side of the chip

[0155] H Protrusion height

[0156] P Lateral protrusion

[0157] W Distance

[0158] x Lateral extension

[0159] y Longitudinal extension.

Claims

1. An optoelectronic semiconductor component (1), comprising - a first lead frame part (21) and a second lead frame part (22), - at least one optoelectronic semiconductor chip (3), which is arranged in a mounting area (24) on the first lead frame part (21), - a potting body (4), which mechanically connects the first lead frame part (21) and the second lead frame part (22) to each other and in which the semiconductor chip (3) is embedded, and - at least one electrical circuit (5), wherein - the semiconductor chip (3) has a chip upper side (30) facing away from the mounting area (24), - the first lead frame part (21) has a reduced thickness (D1) in the mounting area (24), - the circuit (5) runs over the potting body (4) and is guided directly on the potting body (4) from the semiconductor chip (3) to a connection area (25) of the second lead frame part (22), - the second lead frame part (22) has a full thickness (D2) in the connection area (25), - the circuit (5) from the connection area (25) to the semiconductor chip (3) overcomes a height difference of at most 20 μm along the entire path of the circuit in a direction perpendicular to the mounting area (24), - the semiconductor chip (3) laterally projects beyond the first lead frame part (21) having the mounting area (24), - for the projection P of the semiconductor chip (3) laterally beyond the first lead frame part (21), the following applies depending on the full thickness D2 and the reduced thickness D1: 0.4*(D2 - D1) ≤ P ≤ 1.5*(D2 - D1), and - for the average edge length E of the chip upper side (30), the following applies: P ≤ 0.4*E.

2. The optoelectronic semiconductor component (1) according to claim 1, wherein the semiconductor chip (3) is a light-emitting diode chip for generating radiation.

3. The optoelectronic semiconductor component (1) according to claim 1, wherein a light-emitting substance body (7) is arranged on the chip upper side (30), wherein the light-emitting substance body (7) is flush with the potting body (4) in a direction away from the mounting area (24), and wherein the light-emitting substance body (7) has an electrical through-contact (57) reaching the chip upper side (30) from the circuit (5).

4. The optoelectronic semiconductor component (1) according to claim 1, wherein a light-emitting substance body (7) is arranged on the chip upper side (30), wherein the chip upper side (30) is flush with the potting body (4) in a direction away from the mounting area (24) such that the light-emitting substance body (7) projects beyond the potting body (4), and wherein the semiconductor component (1) has no electrical through-contact.

5. The optoelectronic semiconductor component (1) according to any one of the preceding claims, wherein the reduced thickness (D1) is between 20% and 55% of the full thickness (D2), including 20% and 55%, and wherein the full thickness (D2) is between 70 μm and 0.5 mm, including 70 μm and 0.5 mm, and wherein the minimum distance between the lead frame components (21, 22) is between 0.05 mm and 0.5 mm, including 0.05 mm and 0.5 mm.

6. The optoelectronic semiconductor component (1) according to any one of claims 1 to 4, wherein the upper side (40) of the potting body (4) facing away from the mounting area (24) extends in a curved manner in cross-section and steadily rises from the chip upper side (30) to the connection area (25).

7. The optoelectronic semiconductor component (1) according to any one of claims 1 to 4, wherein the connection area (25) is higher than the chip upper side (30), such that the distance from the connection area (25) to the bottom side (11) of the semiconductor component (1) is greater than the distance from the chip upper side (30) to the bottom side (11), and the bottom side (11) is suitable for surface mounting.

8. The optoelectronic semiconductor component (1) according to any one of claims 1 to 4, wherein the potting body (4) is light-impermeable, and / or wherein the first lead frame component (21) and the second lead frame component (22) are provided with a reflective coating (43).

9. The optoelectronic semiconductor component (1) according to any one of claims 1 to 4, the optoelectronic semiconductor component (1) comprising at least two different types of semiconductor chips (3), wherein the types of semiconductor chips (3) can be electrically controlled independently of one another.

10. A method for manufacturing an optoelectronic semiconductor component (1) according to any one of claims 1 to 4, having the following steps in the order described: A) Providing a semi-etched lead frame composite (2) having a plurality of lead frames (20), wherein each lead frame (20) has a first lead frame component (21) and a second lead frame component (22) and is provided for one of the finished semiconductor components (1), B) Mounting semiconductor chips (3) to the lead frames (20), C) Creating a potting body (4), D) Generating lines (5) and electrical wirings (6) between the lead frames (20), wherein the wirings (6) electrically connect the platforms (62) of adjacent lead frames (20) to one another, and E) Cutting the connection strips (26) between the lead frames (20) such that electrical connection between adjacent lead frames (20) is provided only via the wirings (6).

11. The method according to claim 10, further comprising steps F) and G) after step E), wherein in step F) the semiconductor chips (3) are tested, and wherein in the subsequent step G) the semiconductor components (1) are separated, and in the process the potting body (4) and the wirings (6) are cut.

12. The method according to claim 11, wherein in step F), the line (5) and the wiring (6) together are the only electrical connection in the lead frame composite, and wherein the platform (62) has a full thickness (D2) and has no function in the completed semiconductor component (1).

13. The method according to claim 11, wherein the widths of the line (5) and the wiring (6) are respectively between 20 μm and 150 μm, including 20 μm and 150 μm, and the thicknesses of the line (5) and the wiring (6) are respectively between 2 μm and 20 μm, including 2 μm and 20 μm, and wherein the line (5) and the wiring (6) are created simultaneously and are constructed identically.

14. The method according to claim 11, wherein step C) is carried out by means of film-assisted spraying such that when filling the material of the potting body (4), the connection area (25) and the upper side of the chip (30) are covered with a spraying film (44), wherein the spraying film (44) compensates for the height difference between the connection area (25) and the upper side of the chip (30).

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