Semiconductor device

Abstract

Disclosed is a semiconductor device, comprising a substrate and a bulk region located on the substrate, the upper surface of the bulk region comprising a collector region, a base region and an emitter region connected in sequence, a field oxide region included in the collector region and the base region region, and a field plate structure included on the field oxide region, the field plate structure being a stepped field plate structure. When the field plate structure of the semiconductor device of the present application is reverse biased at the PN junction between the collector region and the base region, the electric field of the collector region can be adjusted, the collector region is auxiliary depleted, the withstand voltage of the device is improved without affecting the size and doping concentration of the collector region, and the stepped field plate structure provides different specifications of the adjusted electric field in the collector region and the base region region, different adjusted electric fields are provided for different positions, the application effect of the field plate structure is improved, and the device performance is improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a semiconductor device. Background Technology

[0002] A BJT (Bipolar Junction Transistor) is a commonly used semiconductor device, consisting of a base, collector, and emitter. It typically operates under low voltage conditions, such as a 5V collector, a current source at the base, and an output current at the emitter. Sometimes, BJT devices need to be used in high-voltage applications, requiring an increase in the collector voltage. Increasing the collector voltage necessitates increasing the breakdown voltage between the collector and base, which is the common-base breakdown voltage BVcbo of the BJT device (the highest reverse voltage that the base and collector can withstand when the emitter is open).

[0003] In traditional technologies, increasing BVcbo is generally achieved by reducing the doping concentration of the collector region or by making a larger collector region. However, reducing the doping concentration of the collector region will affect the current capability of the BJT device, and making a larger collector region will increase the device size and occupy chip area. Summary of the Invention

[0004] In view of the above problems, the object of the present invention is to provide a semiconductor device that improves device performance without changing the doping concentration of the collector region and the chip area occupied.

[0005] According to one aspect of the present invention, a semiconductor device is provided, comprising:

[0006] A substrate and a body region located on the substrate, wherein the upper surface of the body region includes a collector region, a base region, and an emitter region connected in sequence, wherein,

[0007] The current collector region and the base region include a field oxygen region, and the field oxygen region includes a field plate structure, which is a stepped field plate structure, providing adjustable electric fields of different specifications in the current collector region and the base region.

[0008] Optionally, in the longitudinal section of the semiconductor device, the size of the collector region is larger than the size of the base region.

[0009] Optionally, in the longitudinal section of the semiconductor device, the size of the base region is larger than the size of the emitter region.

[0010] Optionally, in the longitudinal section of the semiconductor device, the collector region and the base region are nested in an L-shape, and the emitter region is nested in the L-shaped enclosing space of the base region.

[0011] Optionally, the base region is electrically connected to the base electrode, and the field plate structure is electrically connected to the base electrode.

[0012] Optionally, the transmitting region connecting wire is electrically led out as the emitter of the semiconductor device.

[0013] Optionally, the collector region includes a collector lead-out region located on the upper surface, the upper surface of the base region includes a base lead-out region, and the field oxygen region is located between the collector lead-out region and the base lead-out region, isolating the collector lead-out region and the base lead-out region.

[0014] Optionally, on the top view of the semiconductor device, the projected area of ​​the field plate structure intersects with both the base region and the collector region.

[0015] Optionally, the semiconductor device is an NPN bipolar junction transistor or a PNP bipolar junction transistor.

[0016] Optionally, the field oxygen region further includes an oxide region, the field plate structure is located on the oxide region, and the oxide region is a thick oxide layer.

[0017] The semiconductor device provided by this invention includes a substrate and a body region located on the substrate. The upper surface of the body region includes a collector region, a base region, and an emitter region connected in sequence. A field oxide region is included in the collector region and the base region. A field plate structure is included on the field oxide region. The field plate structure is a stepped field plate structure. When the PN junction between the collector region and the base region is reverse biased, the field plate structure provides regulated electric fields of different specifications in the collector region and the base region. Different regulated electric fields are provided at different locations to regulate the electric field of the collector region, which helps to improve the effect of the field plate structure in depleting the collector region, improve the breakdown voltage of the device, and improve performance.

[0018] Increasing the collector area size increases the carrier concentration in the collector area, thereby improving the device's current capability, reducing channel resistance, and enhancing voltage withstand capability.

[0019] Reducing the size of the emitter region provides room for size expansion of the collector region, ensuring the improvement of the collector region size and enhancing device performance.

[0020] The emitter region is directly used as the emitter electrode, reducing the space occupied by the electrical lead-out region and providing space for the expansion of other areas of the device, thereby improving performance.

[0021] Both the field plate structure and the base region are electrically connected to the base, meaning the voltage of the field plate structure is the same as the base voltage. This allows for self-adjustment of the electric field, eliminating the need for an additional power supply to the field plate structure and improving its practicality.

[0022] Setting an oxide region between the field plate structure and the field oxide region can further improve the device's withstand voltage.

[0023] The collector region is L-shaped in the longitudinal section of the semiconductor device. The projection of the field plate structure covers the turning area of ​​the L-shaped collector region, corresponding to the coverage of more of the PN junction surface formed by the collector region and the base region, thereby improving the application effect of the field plate technology and increasing the device's withstand voltage. Attached Figure Description

[0024] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0025] Figure 1 A schematic diagram of the structure of a semiconductor device according to an embodiment of the present invention is shown. Detailed Implementation

[0026] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0027] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples.

[0028] Figure 1 A schematic diagram of the structure of a semiconductor device according to an embodiment of the present invention is shown.

[0029] As shown in the figure Figure 1 This is a schematic diagram of a longitudinal cross-section. The semiconductor device 100 in this embodiment is a BJT device, including a substrate 110, a collector region 120, a base region 130, and an emitter region 140. The collector region 120 is located on the substrate 110, the base region 130 is located on the upper surface of the collector region 120, and the emitter region 140 is located on the upper surface of the base region 130. The upper surface of the collector region 120 includes a collector lead-out region 121 (connected to the collector C), and the upper surface of the base region 131 includes a base lead-out region 140. 31 (connected to base B), on the upper surface of the semiconductor device 100 (also the upper surface of the body region composed of collector region 120, base region 130 and emitter region 140), collector lead-out region 121, base lead-out region 131 and emitter region 140 are active regions and are distributed sequentially at intervals. Collector lead-out region 121 and base lead-out region 131 are isolated by a second isolation region 152, and base lead-out region 131 and emitter region 141 are isolated by a first isolation region 151. Among them, a field plate structure 160 is provided on the second isolation region 152 (corresponding to the field oxide region between collector lead-out region 121 and base lead-out region 131, and the field plate structure 160 can be directly disposed on the field oxide region). The field plate structure 160 is electrically connected to base B and electrically connected to base lead-out region 131 to obtain the same potential as the base.

[0030] Collector lead-out region 121, collector 120 and emitter region 140 are all doped with the first conductivity type. Emitter region 140 itself can be directly used as emitter lead-out region to form emitter E. The doping concentration of collector lead-out region 121 is different from that of collector region 120 to meet the structural requirements of BJT device.

[0031] The base region 130 and the base lead-out region 131 are doped with a second conductivity type, and their doping concentrations are different to meet the structural requirements of the BJT device. For an NPN type BJT device, the first conductivity type doping is N-type doping, and the second conductivity type doping is P-type doping; for a PNP type BJT device, the first conductivity type doping is P-type doping, and the second conductivity type doping is N-type doping. The substrate 110 can be a P-type silicon substrate or an N-type silicon substrate.

[0032] In the semiconductor device 100 of this embodiment, as shown in... Figure 1 In the longitudinal section shown, the collector region 120 and the base region 130 are nested in an L-shape, and the emitter region 140 is nested in the L-shaped enclosing space of the base region 130. The whole structure forms a homogeneous radial shape from the upper left corner to the lower right corner. Reducing the size of the emitter region 140, which has low requirements for charge carriers, can provide a larger collector region 120, providing more charge carriers and improving the current capability of the semiconductor device 100; or it can provide the same number of charge carriers with a larger size, while the overall doping concentration of the collector region is low, which can improve the breakdown voltage. At the same time, due to the auxiliary depletion effect of the field plate structure on the collector region, the current capability of the device can be guaranteed.

[0033] The first isolation region 151 (oxide region) and the second isolation region 152 (oxide region) are disposed on the body region of the semiconductor device 100. They are made of silicon oxide and can be used to isolate the emitter, base and collector. They can also be used as masks to align and implant corresponding doped impurities when fabricating the collector lead-out region 121, the base lead-out region 131 and the emitter region 140. The silicon oxide layer can be fabricated using silicon local oxidation isolation technology.

[0034] A field plate structure 160 is disposed on a second isolation region 152 between the collector lead-out region 121 and the base lead-out region 131. When the PN junction between the collector and base regions is reverse biased, the electric field between the collector lead-out region 121 and the base lead-out region 131 on the upper surface of the body region of the semiconductor device 100 is adjusted accordingly to assist in the depletion of the collector region 120 and improve the breakdown voltage between the collector C and the base B. This field plate structure 160 can improve the breakdown voltage between the collector and the base without adjusting the doping concentration and lateral dimensions of the collector region 120 of the original semiconductor device 100, thereby improving device performance. The field plate technology applied in the field plate structure 160 of this invention can be applied to thick oxide layers, i.e., the second isolation region 152 is a region composed of a thick oxide layer, the thickness of which can reach 20,000 angstroms, to improve breakdown voltage; or the second isolation region 152 can be a shallow trench isolation layer.

[0035] The field plate structure 160 includes a first field plate structure 161 and a second field plate structure 162. Both the first field plate structure 161 and the second field plate structure 162 include a lower field plate oxide layer and an upper polysilicon layer. The polysilicon layer is connected to an electrode to receive an electric field control voltage (in this embodiment, the polysilicon layer is electrically connected to the base outside the bulk region of the semiconductor device 100). The field plate oxide layer is in contact with the field oxide region of the semiconductor device 100, isolating the direct electrical connection between the polysilicon layer and the semiconductor bulk region, thereby achieving a field effect. This allows the electric field to modulate the electrical performance of the corresponding region of the semiconductor device 100, improving the device's durability. In this embodiment, the thickness of the first field oxide layer 11 of the first field plate structure 161 is less than the thickness of the second field oxide layer 21 of the second field plate structure 162, forming a stepped field plate structure. This creates adjustable electric fields of different specifications (including the distance from the field source to the upper surface of the bulk region, i.e., the distance from the lower surface of the polysilicon layer of the field plate structure to the upper surface of the bulk region) between the base region 130 (base lead-out region 131) and the collector region 120 (collector lead-out region 121). This provides different adjustable electric fields to different regions of the bulk region between the base and collector, improving the application effect of the field plate structure and enhancing device performance. In this embodiment, the field plate structure 160 is a two-stage stepped field plate structure, but the implementation of this invention is not limited to two stages and can include more stages.

[0036] In the top view of the semiconductor device 100, the projected area of ​​the field plate structure 160 intersects with both the base region 130 and the collector region 120, so that the electric field provided by the field plate structure 160 can directly control the base region 130 and the collector region 120 simultaneously, thereby improving the control effect on the PN junction formed by the base region and the collector region, improving the implementation effect of the field plate technology, and further improving the device withstand voltage. In this embodiment, the first field plate structure 161 is closer to the base region 130 than the second field plate structure 162, and the regulating electric field provided by the first field plate structure 161 corresponds to regulating the electric field of the junction surface region of the PN junction formed by the base region 130 and the collector region 120.

[0037] Meanwhile, the field plate structure 160 in the second isolation region 152 and the doping concentration and size design of the adjustment collector region 120 are independent of each other and can be implemented simultaneously, further improving the device's withstand voltage.

[0038] The semiconductor device of the present invention has a field plate structure set on the isolation region between the collector region and the base region, and adjusts the bulk electric field from the corresponding collector region to the base region to assist in the depletion of the collector region. Without adjusting the doping concentration and size of the collector region, the device breakdown voltage can be improved, the doping concentration of the collector region can be guaranteed, the carrier concentration can be guaranteed, and the current performance of the device can be guaranteed, resulting in a semiconductor device with excellent current performance and breakdown voltage performance.

[0039] As described above, these embodiments of the present invention do not exhaustively cover all details, nor do they limit the invention to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. A semiconductor device, characterized in that, include: A substrate and a body region located on the substrate, wherein the upper surface of the body region includes a collector region, a base region, and an emitter region connected in sequence, wherein, The region between the current collector region and the base region includes a field oxygen region, and a field plate structure is included on the field oxygen region; In the longitudinal section of the semiconductor device, the collector region and the base region are nested in an L-shape, and the emitter region is nested in the L-shaped enclosing space of the base region. In the top view of the semiconductor device, the projected area of ​​the field plate structure intersects with both the base region and the collector region. The field plate structure is a stepped field plate structure, including at least a first field plate structure and a second field plate structure. Both the first field plate structure and the second field plate structure include a lower field plate oxide layer and an upper polysilicon layer. The thickness of the first field plate oxide layer of the first field plate structure is less than the thickness of the second field plate oxide layer of the second field plate structure. This structure is used to provide adjustable electric fields of different specifications in the collector region and the base region when the PN junction between the collector region and the base region is reverse biased.

2. The semiconductor device according to claim 1, characterized in that, In the longitudinal section of the semiconductor device, the size of the collector region is larger than the size of the base region.

3. The semiconductor device according to claim 1 or 2, characterized in that, In the longitudinal section of the semiconductor device, the size of the base region is larger than the size of the emitter region.

4. The semiconductor device according to claim 1, characterized in that, The base region is electrically connected to the base electrode, and the field plate structure is electrically connected to the base electrode.

5. The semiconductor device according to claim 1, characterized in that, The conductor connecting the emitter region is electrically led out to serve as the emitter of the semiconductor device.

6. The semiconductor device according to claim 1, characterized in that, The collector region includes a collector lead-out region on its upper surface, and the upper surface of the base region includes a base lead-out region. The field oxygen region is located between the collector lead-out region and the base lead-out region, isolating the collector lead-out region from the base lead-out region.

7. The semiconductor device according to claim 1, characterized in that, The semiconductor device is an NPN bipolar junction transistor or a PNP bipolar junction transistor.

8. The semiconductor device according to claim 1, characterized in that, The field oxygen region also includes an oxide region, and the field plate structure is located on the oxide region, wherein the oxide region is a thick oxide layer.

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