Power switching circuit and smart door lock

Abstract

An embodiment of the present application provides a power switching circuit and a smart door lock, relating to the field of electronic equipment. The power switching circuit includes: an LDO power supply circuit, wherein a first terminal of the LDO power supply circuit is connected to a device to be powered; a DC-DC power supply circuit, wherein a first terminal of the DC-DC power supply circuit is connected to the device to be powered; an inverting circuit, wherein a first terminal of the inverting circuit is connected to a second terminal of the LDO power supply circuit; and a control circuit, wherein a second terminal of the inverting circuit is connected to the control circuit, and a second terminal of the DC-DC power supply circuit is connected to the control circuit. The present application utilizes a control circuit to implement switching between the LDO power supply circuit and the DC-DC power supply circuit, which can improve power efficiency to a certain extent.

Description

Technical Field

[0001] The present application relates to the technical field of electronic equipment, and in particular to a power switching circuit and a smart door lock. Background Art

[0002] With the rapid development of technology, more and more electronic devices are entering our lives. Currently, most electronic devices, especially low-power ones, can be powered by multiple power supplies, making them more convenient for users. However, when multiple power supplies are used to power electronic devices, power loss often increases due to the different supply voltages of each power supply. Summary of the Invention

[0003] The purpose of this application is to provide a power switching circuit and a smart door lock. The power switching circuit can not only improve the efficiency of power supply, but also make the power switching circuit simple, flexible and easier to implement.

[0004] In the first aspect, an embodiment of the present application provides a power switching circuit, which includes: an LDO power supply circuit, wherein a first terminal of the LDO power supply circuit is connected to a device to be powered; a DC-DC power supply circuit, wherein a first terminal of the DC-DC power supply circuit is connected to the device to be powered; an inverting circuit, wherein a first terminal of the inverting circuit is connected to a second terminal of the LDO power supply circuit; a control circuit, wherein a second terminal of the inverting circuit is connected to the control circuit, and a second terminal of the DC-DC power supply circuit is connected to the control circuit. When the device to be powered is in a sleep state, the control circuit sends a low-level signal to the inverting circuit, and uses the inverting circuit to switch the low-level signal to a high-level signal, so that the LDO power supply circuit supplies power to the device to be powered. When the device to be powered is in an awake state, the control circuit sends a high-level signal to the inverting circuit and the DC-DC power supply circuit respectively, and uses the inverting circuit to switch the high-level signal to a low-level signal, so that the LDO power supply circuit and the device to be powered are cut off, and the DC-DC power supply circuit is controlled to supply power to the device to be powered.

[0005] Furthermore, the LDO power supply circuit includes a first control unit, which is used to power the device to be powered when the LDO power supply circuit is connected to the device to be powered, and the DC-DC power supply circuit includes a second control unit, which is used to power the device to be powered when the DC-DC power supply circuit is connected to the device to be powered; the first terminal of the inverting circuit is connected to the enable terminal of the first control unit, and the enable terminal of the second control unit is connected to the control circuit.

[0006] Furthermore, the inversion circuit includes a transistor, a collector of the transistor is connected to the enable terminal of the first control unit, a base of the transistor is connected to the control circuit, and an emitter of the transistor is grounded.

[0007] Furthermore, the LDO power supply circuit further includes a first resistor, which is connected to the first power supply, and a second terminal of the first resistor is respectively connected to the enable terminal of the first control unit and the collector of the transistor.

[0008] Furthermore, the inversion circuit also includes a second resistor, a first terminal of the second resistor is respectively connected to the enable terminal of the first control unit and the second terminal of the first resistor, and the second terminal of the second resistor is connected to the collector of the transistor.

[0009] Furthermore, the inversion circuit also includes a diode, the anode of the diode is connected to the base of the transistor and the control circuit respectively, and the cathode of the diode is connected to the second power supply.

[0010] Furthermore, the DC-DC power supply circuit is connected to an anti-backflow circuit, and the anti-backflow circuit is used to prevent backflow current from occurring between the first power supply and the third power supply.

[0011] Furthermore, the backflow prevention circuit includes: a first MOS transistor and a second MOS transistor; the drain of the first MOS transistor is connected to the LDO power supply circuit or the DC-DC power supply circuit, the source of the first MOS transistor is connected to the source of the second MOS transistor, and the gate of the first MOS transistor is grounded; the source of the second MOS transistor is connected to the third power supply, and the gate of the second MOS transistor is grounded.

[0012] Furthermore, the DC-DC power supply circuit also includes an inductor and a first capacitor, the first terminal of the inductor is connected to the inductor current input terminal of the second control unit of the DC-DC power supply circuit, and the second terminal of the inductor is connected to the drain of the first MOS tube.

[0013] In a second aspect, an embodiment of the present application provides a smart door lock, wherein the smart door lock system includes a smart door lock and the power switching circuit of the first aspect, and the smart door lock is electrically connected to the power switching circuit.

[0014] The power switching circuit and smart door lock provided by the present application realize the switching between the LDO power supply circuit and the DC-DC power supply circuit by setting a control circuit and an inverting circuit. Among them, the first terminal of the LDO power supply circuit is connected to the device to be powered, the first terminal of the DC-DC power supply circuit is connected to the device to be powered, the first terminal of the inverting circuit is connected to the second terminal of the LDO power supply circuit, the second terminal of the inverting circuit is connected to the control circuit, and the second terminal of the DC-DC power supply circuit is connected to the control circuit. When the device to be powered is in a dormant state, the control circuit sends a low-level signal to the inverting circuit, and uses the inverting circuit to switch the low-level signal to a high-level signal, so that the LDO power supply circuit supplies power to the device to be powered. When the device to be powered is in an awake state, the control circuit sends a high-level signal to the inverting circuit and the DC-DC power supply circuit respectively, and uses the inverting circuit to switch the high-level signal to a low-level signal, so that the LDO power supply circuit and the device to be powered are cut off, and the DC-DC power supply circuit is controlled to supply power to the device to be powered. By introducing a control circuit, the present application can more quickly and effectively switch between the LDO power supply circuit and the DC-DC power supply circuit, thereby improving power utilization efficiency and reducing power waste. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0016] Figure 1 This is a principle block diagram of a power switching circuit provided by an embodiment of the present application;

[0017] Figure 2 This is a schematic diagram of an LDO power supply circuit in a power switching circuit provided by an embodiment of the present application;

[0018] Figure 3 This is a schematic diagram of a DC-DC power supply circuit in a power switching circuit provided by an embodiment of the present application;

[0019] Figure 4 This is a principle block diagram of a power switching circuit provided by another embodiment of the present application;

[0020] Figure 5 This is a schematic diagram of a DC-DC power supply circuit in a power switching circuit provided by another embodiment of the present application;

[0021] Figure 6 This is a structural diagram of a smart door lock system provided by an embodiment of the present application. DETAILED DESCRIPTION

[0022] To make the objectives, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Generally, the components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.

[0023] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for protection, but merely represents selected embodiments of the present application. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments in the present application without creative work are within the scope of protection of the present application.

[0024] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0025] In the description of this application, it should be noted that the terms "first", "second", "third", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0026] It should also be noted that, in the description of this application, unless otherwise expressly specified or limited, the terms "disposed," "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to internal connections between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0027] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0028] Currently, to improve the power efficiency of low-power devices, low-power LDOs (Low Dropout Regulators) are generally used for power supply. When in sleep mode, peripheral devices are disconnected; when awake, a DC-DC converter is added to power the peripheral devices. In sleep mode, the current consumed by the LDO is at the uA level. Although the efficiency is low, the energy consumption is low due to the small current. However, in the awake state, the current consumed by the LDO is at the mA level, which consumes a lot of energy. Especially when the input and output voltage difference is large, the loss will be further increased.

[0029] Therefore, in response to the above problems, the inventors proposed the power switching circuit and smart door lock in the embodiments of the present application. The embodiments of the present application will be described in detail below in conjunction with the accompanying drawings.

[0030] See Figure 1 , Figure 1 The schematic diagram shows a principle block diagram of a power switching circuit provided by an embodiment of the present application. The power switching circuit may include an LDO power supply circuit 110, a DC-DC power supply circuit 120, a control circuit 140, and a device to be powered 150. A first terminal of the LDO power supply circuit 110 is connected to the device to be powered 150, a second terminal of the LDO power supply circuit 110 is connected to the control circuit 140, a first terminal of the DC-DC power supply circuit 120 is connected to the device to be powered 150, and a second terminal of the DC-DC power supply circuit 120 is connected to the control circuit 140.

[0031] As a method, the first terminal of the inverter circuit 130 is connected to the second terminal of the LDO power supply circuit 110, and the second terminal of the inverter circuit 130 is connected to the control circuit 140. In the embodiment of the present application, the control circuit 140 is connected to the inverter circuit 130 and the DC-DC power supply circuit 120 respectively. When the device to be powered 150 is in a dormant state, the control circuit 140 sends a low-level signal to the inverter circuit 130, and uses the inverter circuit 130 to switch the low-level signal to a high-level signal, so that the LDO power supply circuit 110 supplies power to the device to be powered 150.

[0032] As a method, when the device to be powered 150 is in the awake state, the control circuit 140 sends a high-level signal to the inverting circuit 130 and the DC-DC power supply circuit 120 respectively, and uses the inverting circuit 130 to switch the high-level signal to a low-level signal, so that the LDO power supply circuit 110 and the device to be powered 150 are cut off. At the same time, the control circuit 140 can also control the DC-DC power supply circuit 120 to power the device to be powered 150, wherein the LDO model can be SGM2202 and the DC-DC can be SY8120. Optionally, the device to be powered 150 in the dormant state can be represented by a high level "0", and the device to be powered 150 in the awake state can be represented by a low level "1". If the state obtained by the control circuit 140 is different, the circuit providing power to the device to be powered 150 is also different.

[0033] As one approach, the device to be powered 150 may include at least one sub-device, each of which is configured with a voltage terminal. The control circuit 140 may detect whether the voltage at the voltage terminal of each sub-device is less than a voltage threshold. If the voltage at the voltage terminal of the sub-device is less than the voltage threshold, it indicates that the sub-device of the device to be powered 150 is in a dormant state, and the control circuit 140 may determine that the device to be powered 150 is in a dormant state. If the voltage at the voltage terminal of the sub-device of the device to be powered 150 is greater than the voltage threshold, it indicates that the device to be powered 150 is in a fully awake state.

[0034] As a method, an enable terminal can be configured on the sub-device of the device to be powered 150. When the voltage of the enable terminal is low, it indicates that the sub-device of the device to be powered 150 is in a sleep state, that is, the device to be powered 150 is in a sleep state. When the voltage of the enable terminal is high, it indicates that the sub-device of the device to be powered 150 is in an awake state, that is, the device to be powered 150 is in a whole-machine awake state.

[0035] As a method, the control circuit 140 can also determine the state of the device to be powered 150 based on the device parameters sent by the device to be powered 150, that is, when the device parameter sent by the device to be powered 150 is the first parameter, the device to be powered 150 is in a dormant state, and when the device parameter sent by the device to be powered 150 is the second parameter, the device to be powered 150 is in a whole-machine awake state. The first parameter and the second parameter can be parameters of the sub-devices of the device to be powered 150 in different states. For example, when the screen of a computer is in a dormant state, its parameter is the first parameter, and when the screen of the computer is in an awake state, its parameter is the second parameter. Since the voltage of the computer is different in the dormant and awake states, the first parameter and the second parameter are different. Therefore, the control circuit 140 can determine what state the device to be powered 150 is in based on the first parameter and the second parameter sent by the device to be powered 150, wherein the first parameter and the second parameter can be obtained by configuring electronic devices such as voltage or resistance.

[0036] In some embodiments, as Figure 2 As shown, the LDO power supply circuit 110 may include a first control unit U1, the input end of which is connected to a first power source V1, wherein the first power source V1 may be VCC_BAT, and the first control unit is mainly used to power the device to be powered 150 when the LDO power supply circuit 110 and the device to be powered 150 are connected. The enable end of the first control unit U1 may be connected to the inverting circuit 130, and the zero potential end of the first control unit U1 is grounded. In this application, the LDO power supply circuit 110 may be connected to the device to be powered 150 through a test point TP1. Figure 3 As shown, the DC-DC power supply circuit 120 may include a second control unit U2, the input end of the second control unit U2 is connected to the first power supply V1, the enable end of the second control unit U2 can be connected to the control circuit 140, and the zero potential end of the second control unit U2 is grounded. The second control unit U2 is used to power the device to be powered 150 when the DC-DC power supply circuit 120 is connected to the device to be powered 150. In this application, the DC-DC power supply circuit 120 can be connected to the device to be powered 150 through the test point TP2.

[0037] In some embodiments, the level state of the enable terminal of the first control unit U1 and the level state of the enable terminal of the second control unit U2 may be the same or different, that is, the enable terminal of the first control unit U1 may be an enable terminal with a high level active, and the enable terminal of the first control unit U1 may also be an enable terminal with a low level active. Similarly, the enable terminal of the second control unit U2 may be an enable terminal with a high level active, and the enable terminal of the second control unit U1 may also be an enable terminal with a low level active.

[0038] In an embodiment of the present application, when the level states of the enable ends of the first control unit U1 and the second control unit U2 are the same, the power switching circuit 100 may include an inversion circuit 130. At this time, the enable end of the first control unit U1 is a high-level valid enable end, and the enable end of the second control unit U2 is also a high-level valid enable end; or, the enable end of the first control unit U1 is a low-level valid enable end, and the enable end of the second control unit U2 is also a low-level valid enable end, that is, the enable end of the first control unit U1 is connected to the first terminal of the inversion circuit 130.

[0039] As one embodiment, the first control unit U1 may be a low-dropout linear regulator (LDO), and the second control unit U2 may be a DC-DC regulator. When the level state of the enable terminal of the first control unit U1 is the same as the level state of the enable terminal of the second control unit U2, the first control unit U1 may be connected to the inverter circuit 130. The inverter circuit 130 may include a transistor Q1, the collector of which is connected to the enable terminal of the first control unit U1, the base of which may be connected to the control circuit 140, and the emitter of the transistor Q1 is grounded.

[0040] As an approach, the LDO power supply circuit 110 may further include a first resistor R1, the first resistor R1 being connected to the first power source V1, and the second terminal of the first resistor R1 being connected to the enable terminal of the first control unit U1 and the collector of the transistor Q1, respectively. Furthermore, the inverter circuit 130 may further include a second resistor R2, the first terminal of the second resistor R2 being connected to the enable terminal of the first control unit U1 and the second terminal of the first resistor R1, respectively, and the second terminal of the second resistor R2 being connected to the collector of the transistor Q1.

[0041] As a way, the inverter circuit 130 further includes a diode D1, the anode of the diode D1 is connected to the base of the transistor Q1 and the control circuit 140 respectively, and the cathode of the diode D1 is connected to the second power supply V2, wherein the second power supply V2 can be VCC_3V3_DISCONTINUE.

[0042] It should be noted that when the level state of the enable terminal of the first control unit U1 and the level state of the enable terminal of the second control unit U2 are different, the enable terminal of the first control unit U1 is connected to the control circuit 140, and the enable terminal of the second control unit U2 is also connected to the control circuit 140. Specifically, when the enable terminal of the first control unit U1 is a high-level enable terminal and the enable terminal of the second control unit U2 is a low-level enable terminal, the high-level enable terminal of the first control unit U1 is connected to the control circuit 140, and the low-level enable terminal of the second control unit U2 is connected to the control circuit 140; when the enable terminal of the first control unit U1 is a low-level enable terminal and the enable terminal of the second control unit U2 is a high-level enable terminal, the low-level enable terminal of the first control unit U1 is connected to the control circuit 140, and the high-level enable terminal of the second control unit U2 is connected to the control circuit 140.

[0043] As a way, such as Figure 2 The LDO power supply circuit 110 shown may further include a second capacitor C2 and a third capacitor C3, wherein the first terminals of the second capacitor C2 and the third capacitor C3 are respectively connected to the first power supply V1, and the second terminals of the second capacitor C2 and the third capacitor C3 are respectively connected to the output terminal of the first control unit. Furthermore, the LDO power supply circuit 110 may further include a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6, wherein the first terminal of the fourth capacitor C4 is connected to the bypass terminal of the first control unit U1, the second terminal of the fourth capacitor C4 is connected to the output terminal of the first control unit, the first terminal of the fifth capacitor C5 and the first terminal of the sixth capacitor C6 are respectively connected to the output terminal of the first control unit U1, and the first terminal of the sixth capacitor C6 is connected to the fourth power supply V4. The fourth power supply V4 may be VCC_3V3_SGM2202.

[0044] As one approach, the inverter circuit 130 may further include a third resistor R3, a fourth resistor R4, and a fifth resistor R5. The first terminal of the third resistor R3 is connected to the base of the transistor Q1, the second terminal of the third resistor R3 is connected to the first terminal of the fifth resistor R5, the second terminal of the fifth resistor R5 is connected to the control circuit 140, and the first terminal of the fifth resistor R5 is also connected to the first terminal of the diode D1. The first terminal of the fourth resistor R4 is respectively connected to the base of the transistor Q1 and the first terminal of the third resistor R3, and the second terminal of the fourth resistor R4 is grounded. In addition, the inverter circuit 130 may further include a sixth capacitor C6. The first terminal of the sixth capacitor C6 is respectively connected to the base of the transistor Q1 and the first terminal of the third resistor R3, the second terminal of the sixth capacitor C6 is grounded, and the first terminal of the sixth capacitor C6 is also connected to the first terminal of the third resistor R3.

[0045] The power switching circuit provided in the embodiment of the application realizes the switching of the LDO power supply circuit and the DC-DC power supply circuit by setting a control circuit. Among them, the first terminal of the LDO power supply circuit is connected to the device to be powered, the first terminal of the DC-DC power supply circuit is connected to the device to be powered, the first terminal of the inverting circuit is connected to the second terminal of the LDO power supply circuit, the second terminal of the inverting circuit is connected to the control circuit, and the second terminal of the DC-DC power supply circuit is connected to the control circuit. When the device to be powered is in a dormant state, the control circuit sends a low-level signal to the inverting circuit, and uses the inverting circuit to switch the low-level signal to a high-level signal, so that the LDO power supply circuit supplies power to the device to be powered. When the device to be powered is in an awake state, the control circuit sends a high-level signal to the inverting circuit and the DC-DC power supply circuit respectively, and uses the inverting circuit to switch the high-level signal to a low-level signal, so that the LDO power supply circuit and the device to be powered are cut off, and the DC-DC power supply circuit is controlled to supply power to the device to be powered. By introducing a control circuit, the present application can realize the switching of the LDO power supply circuit and the DC-DC power supply circuit more quickly and effectively, while improving the power efficiency, it can reduce power waste. In addition, the present application introduces devices such as transistors, diodes, and resistors to make power switching more convenient and effective, and to a certain extent, can improve the stability of the power switching circuit.

[0046] See Figure 4 , Figure 4 A schematic diagram of a power switching circuit according to another embodiment of the present invention is shown. Figure 4 It can be seen that the power switching circuit 100 may include an anti-backflow circuit 160 , and the DC-DC power supply circuit 120 is connected to the anti-backflow circuit 160 . The anti-backflow circuit 160 is mainly used to prevent backflow current from occurring between the first power supply V1 and the third power supply V3 .

[0047] As one approach, the DC-DC power supply circuit 120 is connected to the backflow prevention circuit 160. The backflow prevention circuit 160 may include a first MOS transistor Q2 and a second MOS transistor Q3. The drain of the first MOS transistor Q2 is connected to the DC-DC power supply circuit 120, the source of the first MOS transistor Q2 is connected to the source of the second MOS transistor Q3, and the source of the second MOS transistor Q3 is connected to a third power supply V3. The third power supply V3 may be VCC_3V3_CONTINUE.

[0048] See also Figure 5The drain of the first MOS transistor Q2 of the anti-backflow circuit 160 is connected to the inductor current input terminal of the second control unit U2 of the DC-DC power supply circuit 120. In addition, the anti-backflow circuit 160 may further include a ninth resistor R9, a tenth resistor R10, and a transistor Q4, wherein a first terminal of the ninth resistor R9 is connected to the source of the first MOS transistor Q2, and a second terminal of the ninth resistor R9 is respectively connected to the gate of the first MOS transistor Q2 and the transistor Q4; a first terminal of the tenth resistor R10 is connected to the gate of the second MOS transistor Q3, and a second terminal of the tenth resistor R10 is respectively connected to the gate of the first MOS transistor Q2, the second terminal of the ninth resistor R9, and the transistor Q4; an emitter of the transistor Q4 is connected to the ground terminal of the second control unit U2, and a collector of the transistor is respectively connected to the gate of the first MOS transistor Q1, the second terminal of the tenth resistor R10, and the second terminal of the ninth resistor R9.

[0049] As one embodiment, the DC-DC power supply circuit 120 further includes an inductor L1 and a first capacitor C1. A first terminal of the inductor L1 is connected to the inductor current input terminal of the second control unit U2, and a second terminal of the inductor L1 is connected to the drain of the first MOS transistor Q2. The DC-DC power supply circuit 120 further includes a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8. A first terminal of the sixth resistor R6 is connected to the second terminal of the inductor L1 and the drain of the first MOS transistor Q2, respectively. A second terminal of the sixth resistor R6 is connected to the first terminal of the seventh resistor R7 and the feedback terminal of the second control unit U2, respectively. A first terminal of the seventh resistor R7 is connected to the feedback terminal of the second control unit U2, a second terminal of the seventh resistor R7 is connected to the second terminal of the emitter of the transistor Q4, a first terminal of the eighth resistor R8 is connected to the enable terminal of the second control unit U2 and the control circuit 140, respectively. A second terminal of the eighth resistor R8 is connected to the second terminal of the seventh resistor and the emitter of the transistor Q4, respectively.

[0050] As a mode, the DC-DC power supply circuit 120 further includes a seventh capacitor C7 and an eighth capacitor C8, wherein the first terminals of the seventh capacitor C7 and the eighth capacitor C8 are respectively connected to the first power supply V1, and the second terminal of the seventh capacitor C7 and the second terminal of the eighth capacitor C8 are respectively connected to the second terminal of the seventh resistor R7, the second terminal of the eighth resistor R8 and the emitter of the transistor Q4.

[0051] As one embodiment, the DC-DC power supply circuit 120 further includes a ninth capacitor C9, an eleventh resistor R11, and a twelfth resistor R12, wherein the first terminals of the ninth capacitor C9 and the eleventh resistor R11 are respectively connected to the second terminal of the inductor L1 and the drain of the first MOS transistor Q2, the first terminal of the eleventh resistor R11 is connected to the second power supply V2, and the second terminal of the eleventh resistor R11 is respectively connected to the first terminal of the twelfth resistor R12 and the base of the transistor Q4. The second terminals of the ninth capacitor C9 and the twelfth resistor are respectively connected to the second terminal of the seventh capacitor C7, the second terminal of the eighth capacitor C8, the second terminal of the seventh resistor R7, the second terminal of the eighth resistor R8, and the emitter of the transistor Q4, and the second terminal of the twelfth resistor R12 is grounded.

[0052] As an example, in the embodiment of the present application, the control circuit 140 may include a signal output terminal, through which the control circuit can output control signals to the LDO power supply circuit 110 and the DC-DC power supply circuit 120, respectively. The signal output terminal of the control circuit 140 may be EC_3V3_DISCONTINUE. In other words, the control circuit 140 can be connected to the LDO power supply circuit 110 and the DC-DC power supply circuit 120, respectively, through the signal output terminal.

[0053] As an example, when the 3.3V voltage output by the second control unit U2 is established and stable, the VCC_3V3_DISCONTINUE state is 1. Since EN_3V3_DISCONTINUE is also 1 in the awakened state, the transistor Q1 can be driven to turn on, and the enable terminal of the first control unit U1 is set low to avoid current loss in the first control unit U1; when the 3.3V voltage output by the second control unit U2 is not established and stable, the VCC_3V3_DISCONTINUE state is 0. Although EN_3V3_DISCONTINUE is also 1 in the awakened state, VCC_3V3_DISCONTINUE will be embedded in the transistor Q1. At this time, the transistor Q1 is cut off, and the first control unit U1 is powered normally to avoid system power failure.

[0054] The power switching circuit provided in the embodiment of the application realizes the switching of the LDO power supply circuit and the DC-DC power supply circuit by setting a control circuit. Among them, the first terminal of the LDO power supply circuit is connected to the device to be powered, the first terminal of the DC-DC power supply circuit is connected to the device to be powered, the second terminal of the LDO power supply circuit is connected to the control circuit, and the second terminal of the DC-DC power supply circuit is connected to the control circuit. The control circuit is used to control the LDO power supply circuit to supply power to the device to be powered when the device to be powered is in a dormant state, and the control circuit is used to control the DC-DC power supply circuit to supply power to the device to be powered when the device to be powered is in a wake-up state. The present application can more quickly and effectively realize the switching of the LDO power supply circuit and the DC-DC power supply circuit by introducing a control circuit, thereby improving the power efficiency and reducing power waste. In addition, the present application introduces an anti-backflow circuit, which can not only avoid the current backflow caused by the different potentials of multiple power supplies, but also save energy consumption and ensure high-efficiency charging of the device. At the same time, the present application can judge whether to completely cut off the first control unit based on the stability of the second control unit. The action is completely triggered by the hardware circuit, which has higher stability than software control.

[0055] See Figure 6 , Figure 6 A structural schematic diagram of a smart door lock system provided by an embodiment of the present application is shown. The smart door lock system includes a smart door lock and the above-mentioned power switching circuit, and the smart door lock is electrically connected to the power switching circuit.

[0056] The power switching circuit provided in the embodiment of the application realizes the switching of the LDO power supply circuit and the DC-DC power supply circuit by setting a control circuit. Among them, the first terminal of the LDO power supply circuit is connected to the device to be powered, the first terminal of the DC-DC power supply circuit is connected to the device to be powered, the first terminal of the inverting circuit is connected to the second terminal of the LDO power supply circuit, the second terminal of the inverting circuit is connected to the control circuit, and the second terminal of the DC-DC power supply circuit is connected to the control circuit. When the device to be powered is in a dormant state, the control circuit sends a low-level signal to the inverting circuit, and uses the inverting circuit to switch the low-level signal to a high-level signal, so that the LDO power supply circuit supplies power to the device to be powered. When the device to be powered is in an awake state, the control circuit sends a high-level signal to the inverting circuit and the DC-DC power supply circuit respectively, and uses the inverting circuit to switch the high-level signal to a low-level signal, so that the LDO power supply circuit and the device to be powered are cut off, and the DC-DC power supply circuit is controlled to supply power to the device to be powered. By introducing a control circuit, the present application can more quickly and effectively implement switching between the LDO power supply circuit and the DC-DC power supply circuit, thereby improving power utilization efficiency and reducing power waste. At the same time, the circuit connection between these devices is simple and easy to implement. That is, the power switching circuit proposed in the embodiment of the present application is simple in design, flexible and low in cost.

[0057] The above description is merely a preferred embodiment of the present application and is not intended to limit the present application. Various modifications and variations are possible for those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of the present application shall be included within the scope of protection of the present application.

Claims

1. A power switching circuit, characterized in that: The power switching circuit includes: An LDO power supply circuit (110), wherein a first terminal of the LDO power supply circuit (110) is connected to a device to be powered (150); the LDO power supply circuit (110) comprises a first control unit (U1), and the first control unit (U1) is used to supply power to the device to be powered (105) when the LDO power supply circuit (110) and the device to be powered (105) are connected; A DC-DC power supply circuit (120), wherein a first terminal of the DC-DC power supply circuit (120) is connected to the device to be powered (150); the DC-DC power supply circuit (120) comprises a second control unit (U2), and the second control unit (U2) is used to supply power to the device to be powered (105) when the DC-DC power supply circuit (120) and the device to be powered (105) are connected; An inversion circuit (130), wherein a first terminal of the inversion circuit (130) is connected to a second terminal of the LDO power supply circuit (110); the first terminal of the inversion circuit (130) is connected to an enable terminal of a first control unit (U1) of the LDO power supply circuit (110), and an enable terminal of a second control unit (U2) of the DC-DC power supply circuit (120) is connected to a control circuit (140); the inversion circuit (130) comprises a transistor (Q1) and a diode (D1), wherein a collector of the transistor (Q1) is connected to the enable terminal of the first control unit (U1), a base of the transistor (Q1) is connected to the control circuit (140), and an emitter of the transistor (Q1) is grounded; a positive electrode of the diode (D1) is connected to the base of the transistor (Q1) and the control circuit (140), respectively, and a negative electrode of the diode (D1) is connected to a second power supply (V2); The control circuit (140) is connected to the second terminal of the inverting circuit (130), and the second terminal of the DC-DC power supply circuit (120) is connected to the control circuit (140). When the device to be powered (150) is in a dormant state, the control circuit (140) sends a low-level signal to the inverting circuit (130), and uses the inverting circuit (130) to switch the low-level signal to a high-level signal, so that the LDO power supply circuit (110) is The device to be powered (150) is powered, and when the device to be powered (150) is in an awake state, the control circuit (140) sends a high-level signal to the inverting circuit (130) and the DC-DC power supply circuit (120), respectively, and uses the inverting circuit (130) to switch the high-level signal to a low-level signal, so that the LDO power supply circuit (110) and the device to be powered (150) are cut off, and the DC-DC power supply circuit (120) is controlled to power the device to be powered (150); The control circuit (140) further includes a signal output terminal, which outputs control signals to the LDO power supply circuit (110) and the DC-DC power supply circuit (120) respectively. When the second control unit (U2) outputs a 3.3V voltage that is not stable, the signal output terminal is embedded in the transistor (Q1) so that the transistor (Q1) is turned off, and the first control unit (U1) supplies power to the device to be powered (105).

2. The power switching circuit according to claim 1, wherein: The LDO power supply circuit (110) further comprises a first resistor (R1), the first resistor (R1) being connected to a first power source (V1), and a second terminal of the first resistor (R1) being respectively connected to an enable terminal of the first control unit (U1) and a collector of a transistor (Q1).

3. The power switching circuit according to claim 2, wherein: The inversion circuit (130) further includes a second resistor (R2), wherein a first terminal of the second resistor (R2) is respectively connected to an enable terminal of the first control unit (U1) and a second terminal of the first resistor (R1), and the second terminal of the second resistor (R2) is connected to the collector of the transistor (Q1).

4. The power switching circuit according to any one of claims 1 to 3, wherein: The DC-DC power supply circuit (120) is connected to an anti-backflow circuit (160), and the anti-backflow circuit (160) is used to prevent backflow current from occurring between the first power supply (V1) and the third power supply (V3).

5. The power switching circuit according to claim 4, wherein: The anti-backflow circuit (160) comprises: a first MOS tube (Q2) and a second MOS tube (Q3); The drain of the first MOS transistor (Q2) is connected to the LDO power supply circuit (110) or the DC-DC power supply circuit (120), the source of the first MOS transistor (Q2) is connected to the source of the second MOS transistor (Q3), and the gate of the first MOS transistor (Q2) is grounded; The source of the second MOS tube (Q3) is connected to a third power supply (V3), and the gate of the second MOS tube (Q3) is grounded.

6. The power switching circuit according to claim 5, wherein: The DC-DC power supply circuit (120) further comprises an inductor (L1) and a first capacitor (C1); a first terminal of the inductor (L1) is connected to an inductor current input terminal of a second control unit (U2) of the DC-DC power supply circuit (120); and a second terminal of the inductor (L1) is connected to a drain of the first MOS tube (Q2).

7. An intelligent door lock system, characterized in that: The smart door lock system (200) comprises a smart door lock (210) and a power switching circuit (100) according to any one of claims 1 to 6, wherein the smart door lock (210) is electrically connected to the power switching circuit (100).

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