Power tube driving method, driving circuit and switching circuit

Abstract

The present invention discloses a power tube driving method, a driving circuit and a switching circuit. When the power tube switches from off to on and the power tube current is less than a first current, a first current loop charges the driving electrode of the power tube; when the voltage of the power tube driving electrode is lower than a first ramp voltage, a first voltage loop pulls up the power tube driving electrode.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to a power tube driving method, a driving circuit and a switching circuit. Background Art

[0002] Power transistors are generally driven by current and voltage. Taking an NMOS transistor as an example, current drive uses a fixed or variable current to charge the gate of the power transistor, causing the gate-source voltage (VGS) of the NMOS to exceed the threshold voltage, turning on the switch. Voltage drive uses an op amp or voltage source to fix the gate voltage to a certain voltage, turning on the switch.

[0003] However, the on-time of different MOS tubes varies with the change of gate capacitance, resulting in an inability to achieve consistent MOS on-time. Summary of the Invention

[0004] In view of this, an object of the present invention is to provide a power tube driving method, a driving circuit and a switching circuit to solve the problem in the prior art that the on-time of different MOS tubes varies with the change of gate capacitance, resulting in the inability to achieve consistent MOS on-time.

[0005] The technical solution of the present invention is to provide a power tube driving method. When the power tube is NMOS, when the power tube switches from off to on, when the power tube current is less than the first current, the first current loop charges the driving electrode of the power tube; when the voltage of the driving electrode of the power tube is lower than the first ramp voltage, the first voltage loop pulls up the driving electrode of the power tube.

[0006] Optionally, the first current loop includes a first operational amplifier, which receives a power tube current sampling value, performs operational amplification on the power tube current sampling value and a first current limiting value, and outputs the amplified value to a driving electrode of the power tube.

[0007] Optionally, the power tube current sampling value and the first current limit value are operationally amplified, and the output is connected to the first capacitor; the first capacitor voltage is a first ramp voltage; the first voltage loop includes a third operational amplifier, the third operational amplifier receives the first capacitor voltage and the power tube drive pole voltage, operationally amplifies the first capacitor voltage and the power tube drive pole voltage, and the output is connected to the power tube drive pole.

[0008] Optionally, when the power tube switches from off to on and the power tube current is greater than the first current, the first current loop discharges the driving pole of the power tube, and the current of the first voltage loop is zero or drops below the first current threshold.

[0009] Optionally, the first operational amplifier and / or the second operational amplifier and / or the third operational amplifier are current-mode operational amplifiers.

[0010] Another technical solution of the present invention is to provide a driving circuit for a power tube. When the power tube is an NMOS, the driving circuit includes a first current loop and a first voltage loop. When the power tube switches from off to on and the power tube current is less than the first current, the first current loop charges the driving electrode of the power tube. When the voltage of the driving electrode of the power tube is lower than the first ramp voltage, the first voltage loop pulls up the driving electrode of the power tube.

[0011] Optionally, it also includes a second operational amplifier and a first capacitor; the first current loop includes the first operational amplifier; the first voltage loop includes a third operational amplifier; the first operational amplifier receives the power tube current sampling value, performs operational amplification on the power tube current sampling value and the first current limiting value, and the output is connected to the driving pole of the power tube; the second operational amplifier receives the power tube current sampling value, performs operational amplification on the power tube current sampling value and the first current limiting value, and the output is connected to the first capacitor; the first capacitor and the driving pole of the power tube are connected to the input end of the third operational amplifier, and operational amplification is performed, and the output is connected to the driving pole of the power tube.

[0012] Optionally, when the power tube switches from off to on, when the power tube current sampling value is greater than the first current, the first current loop discharges the driving pole of the power tube, and the current of the first voltage loop is zero or drops below the first current threshold.

[0013] Optionally, the maximum voltage of the outputs of the first operational amplifier and the second operational amplifier is a first driving voltage, and the voltage limit value of the first capacitor is greater than the first driving voltage.

[0014] Optionally, a first current source is further included, and the first current source pulls up the driving pole of the power tube with a first bias current.

[0015] The invention also provides a switch circuit.

[0016] Another technical solution of the present invention is to provide a power tube driving method. When the power tube is a PMOS, when the power tube switches from off to on, when the power tube current is less than the second current, the second current loop discharges the driving electrode of the power tube; when the voltage of the driving electrode of the power tube is higher than the second ramp voltage, the second voltage loop pulls down the driving electrode of the power tube.

[0017] Optionally, the second current loop includes a fourth operational amplifier, which receives a power tube current sampling value, performs operational amplification on the power tube current sampling value and the second current limiting value, and outputs the amplified value to be connected to the driving pole of the power tube.

[0018] Optionally, the power tube current sampling value and the second current limiting value are operationally amplified, and the output is connected to the second capacitor; the second capacitor voltage is a second ramp voltage; the second voltage loop includes a fifth operational amplifier, the fifth operational amplifier receives the second capacitor voltage and the power tube drive pole voltage, operationally amplifies the second capacitor voltage and the power tube drive pole voltage, and the output is connected to the power tube drive pole.

[0019] Optionally, when the power tube switches from off to on and the power tube current is greater than the second current, the second current loop charges the driving pole of the power tube, and the second voltage loop current is zero or drops below the second current threshold.

[0020] Optionally, the fourth operational amplifier and / or the fifth operational amplifier and / or the sixth operational amplifier are current-mode operational amplifiers.

[0021] Another technical solution of the present invention is to provide a driving circuit for a power tube, wherein the driving circuit includes a second current loop and a second voltage loop; when the power tube switches from off to on and the power tube current is less than the second current, the second current loop discharges the driving electrode of the power tube; when the voltage of the driving electrode of the power tube is higher than the second ramp voltage, the second voltage loop pulls down the driving electrode of the power tube.

[0022] Optionally, it also includes a sixth operational amplifier and a second capacitor; the second current loop includes a fourth operational amplifier; the second voltage loop includes a fifth operational amplifier; the fourth operational amplifier receives the power tube current sampling value, performs operational amplification on the power tube current sampling value and the second current limiting value, and the output is connected to the driving pole of the power tube; the sixth operational amplifier receives the power tube current sampling value, performs operational amplification on the power tube current sampling value and the second current limiting value, and the output is connected to the second capacitor; the second capacitor and the difference between the supply voltage and the power tube driving pole voltage are connected to the input end of the fifth operational amplifier, and operational amplification is performed, and the output is connected to the driving pole of the power tube.

[0023] Optionally, when the power tube switches from off to on, when the power tube current sampling value is greater than the second current, the second current loop charges the driving pole of the power tube, and the current of the first voltage loop is zero or drops below the second current threshold.

[0024] Optionally, the minimum voltage of the outputs of the fourth operational amplifier and the sixth operational amplifier is the second driving voltage, and the voltage limit value of the second capacitor is greater than the second driving voltage.

[0025] Optionally, a second current source is further included, and the second current source pulls down the driving pole of the power tube with a second bias current.

[0026] Compared with the prior art, the circuit structure and method of the present invention have the following advantages: during the conduction process, the start-up time of MOS tubes with different gate capacitances is basically consistent, and the conduction current of the MOS tube can be limited. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 This is a schematic diagram of the driving circuit when the power tube is NMOS;

[0028] Figure 2 This is a schematic diagram of the driving circuit when the power tube is PMOS. DETAILED DESCRIPTION

[0029] The preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments and covers any substitution, modification, equivalent method and solution made within the spirit and scope of the present invention.

[0030] In order to make the public have a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the present invention, but those skilled in the art can also fully understand the present invention without description of these details.

[0031] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. It should be noted that the drawings are simplified and not to exact proportions, and are only used for the purpose of conveniently and clearly illustrating the embodiments of the present invention.

[0032] The technical solution of the present invention is to provide a power tube driving method. When the power tube is NMOS, when the power tube switches from off to on, when the power tube current is less than the first current, the first current loop charges the driving electrode of the power tube; when the voltage of the driving electrode of the power tube is lower than the first ramp voltage, the first voltage loop pulls up the driving electrode of the power tube.

[0033] The present invention ensures that the start-up time of MOS tubes with different gate capacitances is substantially consistent during the conduction process of the power tube, and can limit the conduction current of the MOS tube.

[0034] In one embodiment, please refer to Figure 1 As shown, the first current loop includes a first operational amplifier U11, which receives the power tube current sampling value VSEN1, performs operational amplification on the power tube current sampling value VSEN1 and the first current limiting value VLIM1, and outputs the amplified value to be connected to the driving pole GATE1 of the power tube. Figure 1In the embodiment, the current sampling resistor RS01 is used to sample the current of the power tube M00, and the value representing the current of the power tube is obtained through the power tube current sampling value VSEN1; the first current limiting value VLIM1 represents the first current. Preferably, the first operational amplifier U11 is a current-type operational amplifier. When the current of the power tube M00 is less than the first current, that is, when the power tube current sampling value VSEN1 is less than the first current limiting value VLIM1, the first operational amplifier U11 charges the gate GATE1 of the power tube M00. When the first operational amplifier U11 is a current-type operational amplifier, the output current of the first operational amplifier U11 usually has an upper limit. When the upper limit is reached, the first operational amplifier U11 charges the gate GATE1 of the power tube M00 with a basically fixed upper limit current. The current of the sampling power tube M00 is not limited to Figure 1 The sampling resistor RS01 is used for sampling, and other methods can also be used to sample the power tube current.

[0035] In one embodiment, please refer to Figure 1 As shown, the power tube current sampling value VSEN1 and the first current limit value VLIM1 are operationally amplified, and the output is connected to the first capacitor C40; the first capacitor voltage SS1 is a first ramp voltage; the first voltage loop includes a third operational amplifier U13, which receives the first capacitor voltage SS1 and the power tube driver electrode voltage GATE1, operationally amplifies the first capacitor voltage SS1 and the power tube driver electrode voltage GATE1, and outputs the amplified voltage to the power tube driver electrode GATE1. One end of the first capacitor C40 is connected to an input end of the third operational amplifier U13, and the other end of the first capacitor C40 is connected to a reference ground or supply voltage VD.

[0036] In one embodiment, when the power tube switches from off to on and the power tube current is greater than the first current, the first current loop discharges the driving electrode of the power tube, and the current of the first voltage loop is zero or drops below the first current threshold. Figure 1 As shown, when the power tube current sampling value VSEN1 is greater than the first current limit value VLIM1, the first operational amplifier U11 discharges the gate GATE1 of the power tube M00; the output current of the third operational amplifier U13 is zero or drops below a certain current.

[0037] Optionally, the first operational amplifier and / or the second operational amplifier and / or the third operational amplifier are current-mode operational amplifiers.

[0038] Another technical solution of the present invention is to provide a driving circuit for a power tube. When the power tube is an NMOS, the driving circuit includes a first current loop and a first voltage loop. When the power tube switches from off to on and the power tube current is less than the first current, the first current loop charges the driving electrode of the power tube. When the voltage of the driving electrode of the power tube is lower than the first ramp voltage, the first voltage loop pulls up the driving electrode of the power tube.

[0039] In one embodiment, please refer to Figure 1 As shown, it also includes a second operational amplifier U12 and a first capacitor C40; the first current loop includes a first operational amplifier U11; the first voltage loop includes a third operational amplifier U13; the first operational amplifier U11 receives the power tube current sampling value VSEN1, performs operational amplification on the power tube current sampling value VSEN1 and the first current limiting value VLIM1, and the output is connected to the driving pole GATE1 of the power tube; the second operational amplifier U12 receives the power tube current sampling value VSEN1, performs operational amplification on the power tube current sampling value VSEN1 and the first current limiting value VLIM1, and the output is connected to the first capacitor C40; the first capacitor C40 and the driving pole GATE1 of the power tube are connected to the input end of the third operational amplifier U13, and operational amplification is performed, and the output is connected to the driving pole GATE1 of the power tube. Figure 1 In the embodiment, a current sampling resistor RS01 is used to sample the current of the power tube M00, and a value representing the current of the power tube is obtained through the power tube current sampling value VSEN1; the first current limit value VLIM1 represents the first current. Preferably, the first operational amplifier U11 is a current-type operational amplifier. When the current of the power tube M00 is less than the first current, that is, when the power tube current sampling value VSEN1 is less than the first current limit value VLIM1, the first operational amplifier U11 charges the gate GATE1 of the power tube M00. When the first operational amplifier U11 is a current-type operational amplifier, the output current of the first operational amplifier U11 generally has an upper limit. When the upper limit is reached, the first operational amplifier U11 charges the gate GATE1 of the power tube M00 with a substantially fixed upper limit current. One end of the first capacitor C40 is connected to an input end of the third operational amplifier U13, and the other end of the first capacitor C40 is connected to a reference ground or a supply voltage VD.

[0040] In one embodiment, when the power tube switches from off to on, when the power tube current sampling value is greater than the first current, the first current loop discharges the driving electrode of the power tube, and the current of the first voltage loop is zero or drops below the first current threshold. Figure 1 As shown, when the power tube current sampling value VSEN1 is greater than the first current limit value VLIM1, the first operational amplifier U11 discharges the gate GATE1 of the power tube M00; the output current of the third operational amplifier U13 is zero or drops below a certain current.

[0041] Please continue to refer to Figure 1 As shown, the maximum voltage output by the first operational amplifier U11 and the second operational amplifier U12 is the first driving voltage, and the voltage limit value of the first capacitor C40 is greater than the first driving voltage.

[0042] Please continue to refer to Figure 1 As shown, the first current source I01 is further included. The first current source I01 pulls up the driving electrode GATE1 of the power tube with a first bias current.

[0043] The above embodiment takes NMOS as an example. When the power tube is PMOS, when the power tube switches from off to on and the power tube current is less than the second current, the second current loop discharges the driving electrode of the power tube; when the driving electrode voltage of the power tube is higher than the second ramp voltage, the second voltage loop pulls down the driving electrode of the power tube.

[0044] Please refer to Figure 2 As shown, the second current loop includes a fourth operational amplifier U21, which receives the power tube current sampling value VSEN2, performs operational amplification on the power tube current sampling value VSEN2 and the second current limit value VLIM2, and outputs the amplified value to the driving gate GATE2 of the power tube. The PMOS drive scheme is similar to the NMOS drive scheme. For detailed description, please refer to the NMOS drive section and will not be repeated here.

[0045] Please continue to refer to Figure 2 As shown, the power tube current sampling value VSEN2 and the second current limit value VLIM2 are operationally amplified, and the output is connected to the second capacitor C50; the second capacitor voltage is a second ramp voltage SS2; the second voltage loop includes a fifth operational amplifier U23, and the fifth operational amplifier U23 receives the second capacitor voltage SS2 and the difference VD-GATE2 between the power supply voltage and the power tube drive pole voltage, and operationally amplifies the second capacitor voltage SS2 and the difference VD-GATE2 between the power supply voltage and the power tube drive pole voltage, and the output is connected to the power tube drive pole GATE2.

[0046] In one embodiment, when the power tube switches from off to on, and the power tube current is greater than the second current, the second current loop charges the driving electrode of the power tube, and the current of the second voltage loop is zero or drops below the second current threshold. Figure 2 As shown, when the power tube current sampling value VSEN2 is greater than the second current limiting value VLIM2, when the fourth operational amplifier U21 pulls up the gate GATE2 of the power tube M20, the output current of the fifth operational amplifier U23 is zero or drops below a certain current.

[0047] Optionally, the fourth operational amplifier and / or the fifth operational amplifier and / or the sixth operational amplifier are current-mode operational amplifiers.

[0048] Another technical solution of the present invention is to provide a driving circuit for a power tube, wherein the driving circuit includes a second current loop and a second voltage loop; when the power tube switches from off to on and the power tube current is less than the second current, the second current loop discharges the driving electrode of the power tube; when the voltage of the driving electrode of the power tube is higher than the second ramp voltage, the second voltage loop pulls down the driving electrode of the power tube.

[0049] In one embodiment, please refer to Figure 2 As shown, the circuit further includes a sixth op amp U22 and a second capacitor C50; the second current loop includes a fourth op amp U21; and the second voltage loop includes a fifth op amp U23. The fourth op amp U21 receives the power tube current sampling value VSEN2, performs operational amplification on the power tube current sampling value VSEN2 and the second current limit value VLIM2, and outputs the signal connected to the driver gate GATE2 of the power tube; the sixth op amp U22 receives the power tube current sampling value VSEN2, performs operational amplification on the power tube current sampling value VSEN2 and the second current limit value VLIM2, and outputs the signal connected to the second capacitor C50; the second capacitor C50 and the difference between the power supply voltage and the power tube driver voltage VD-GATE2 are connected to the input of the fifth op amp U23, perform operational amplification on the signal, and output the signal connected to the driver gate GATE2 of the power tube. One end of the second capacitor C50 is connected to an input of the fifth op amp U23, and the other end of the second capacitor C50 is connected to the reference ground or the power supply voltage VD.

[0050] In one embodiment, when the power tube switches from off to on, when the power tube current sampling value is greater than the second current, the second current loop charges the driving pole of the power tube, and the current of the first voltage loop is zero or drops below the second current threshold.

[0051] Please continue to refer to Figure 2 As shown, the minimum voltage output by the fourth operational amplifier U21 and the sixth operational amplifier U22 is the second driving voltage, and the voltage limit value of the second capacitor is greater than the second driving voltage.

[0052] Please continue to refer to Figure 2 As shown, a second current source I02 is also included, and the second current source I02 pulls down the driving pole of the power tube with a second bias current.

[0053] The present invention uses an NMOS drive embodiment to illustrate the driving scheme of an N-type power tube; and uses a PMOS drive embodiment to illustrate the driving scheme of a P-type power tube. The power tube is not limited to MOS, and other types of power tubes can also be used.

[0054] Another technical solution of the present invention is to provide a switching circuit, including the above-mentioned power tube driving circuit or adopting the above-mentioned power tube driving method.

[0055] Although the embodiments are described and explained separately above, some common technologies are involved. It is the opinion of ordinary technicians in this field that they can be replaced and integrated between the embodiments. If there is anything not clearly recorded in one of the embodiments, reference can be made to another recorded embodiment.

[0056] The above-described embodiments do not constitute a limitation on the scope of protection of this technical solution. Any modifications, equivalent replacements, and improvements made within the spirit and principles of the above-described embodiments shall be included in the scope of protection of this technical solution.

Claims

1. A power tube driving method, characterized in that: When the power tube is an NMOS, when the power tube switches from off to on and the power tube current is less than the first current, the first current loop charges the driving electrode of the power tube; when the voltage of the driving electrode of the power tube is lower than the first ramp voltage, the first voltage loop pulls up the driving electrode of the power tube; Among them, the power tube current sampling value and the first current limit value are operationally amplified by the second operational amplifier, and the output is connected to the first capacitor; the first capacitor voltage is the first ramp voltage; the first voltage loop includes a third operational amplifier, the third operational amplifier receives the first capacitor voltage and the power tube drive pole voltage, operationally amplifies the first capacitor voltage and the power tube drive pole voltage, and the output is connected to the power tube drive pole.

2. The driving method according to claim 1, wherein: The first current loop includes a first operational amplifier, which receives a power tube current sampling value, performs operational amplification on the power tube current sampling value and a first current limiting value, and outputs the amplified value to be connected to a driving electrode of the power tube.

3. The driving method according to claim 1, wherein: When the power tube switches from off to on and the power tube current is greater than the first current, the first current loop discharges the driving electrode of the power tube, and the current of the first voltage loop is zero or drops below the first current threshold.

4. The driving method according to claim 2, wherein: The first operational amplifier and / or the second operational amplifier and / or the third operational amplifier are current-mode operational amplifiers.

5. A driving circuit for a power tube, characterized in that: When the power tube is an NMOS, the driving circuit includes a first current loop and a first voltage loop; when the power tube switches from off to on and the power tube current is less than the first current, the first current loop charges the driving electrode of the power tube; when the voltage of the driving electrode of the power tube is lower than the first ramp voltage, the first voltage loop pulls up the driving electrode of the power tube; In which, the driving circuit also includes a second operational amplifier and a first capacitor; the first voltage loop includes a third operational amplifier; the second operational amplifier receives a power tube current sampling value, performs operational amplification on the power tube current sampling value and the first current limiting value, and the output is connected to the first capacitor, and the first capacitor voltage is the first ramp voltage; the first capacitor and the driving electrode of the power tube are connected to the input end of the third operational amplifier, and operational amplification is performed, and the output is connected to the driving electrode of the power tube.

6. The driving circuit according to claim 5, wherein: The first current loop includes a first operational amplifier; the first operational amplifier receives a power tube current sampling value, performs operational amplification on the power tube current sampling value and a first current limiting value, and outputs the amplified value to be connected to a driving electrode of the power tube.

7. The driving circuit according to claim 5, wherein: When the power tube switches from off to on, when the power tube current sampling value is greater than the first current, the first current loop discharges the driving pole of the power tube, and the current of the first voltage loop is zero or drops below the first current threshold.

8. The driving circuit according to claim 6, wherein: The maximum voltage of the outputs of the first operational amplifier and the second operational amplifier is a first driving voltage, and the voltage limit value of the first capacitor is greater than the first driving voltage.

9. A switching circuit, characterized in that: The method comprises the driving circuit according to any one of claims 5 to 8, or adopts the driving method according to any one of claims 1 to 4.

10. A power tube driving method, characterized in that: When the power tube is a PMOS, when the power tube switches from off to on and the power tube current is less than the second current, the second current loop discharges the driving electrode of the power tube; when the driving electrode voltage of the power tube is higher than the second ramp voltage, the second voltage loop pulls down the driving electrode of the power tube; Among them, the power tube current sampling value and the second current limit value are operationally amplified by a sixth operational amplifier, and the output is connected to the second capacitor; the second capacitor voltage is a second ramp voltage; the second voltage loop includes a fifth operational amplifier, the fifth operational amplifier receives the second capacitor voltage and the power tube drive pole voltage, operationally amplifies the second capacitor voltage and the power tube drive pole voltage, and the output is connected to the power tube drive pole.

11. The driving method according to claim 10, wherein: The second current loop includes a fourth operational amplifier, which receives a current sampling value of the power tube, performs operational amplification on the current sampling value of the power tube and a second current limiting value, and outputs the amplified value to be connected to a driving electrode of the power tube.

12. The driving method according to claim 10, wherein: When the power tube switches from off to on and the power tube current is greater than the second current, the second current loop charges the driving electrode of the power tube, and the second voltage loop current is zero or drops below the second current threshold.

13. The driving method according to claim 11, wherein: The fourth operational amplifier and / or the fifth operational amplifier and / or the sixth operational amplifier are current-mode operational amplifiers.

14. A power tube driving circuit, characterized in that: When the power tube is a PMOS, the driving circuit includes a second current loop and a second voltage loop; when the power tube switches from off to on and the power tube current is less than the second current, the second current loop discharges the driving electrode of the power tube; when the voltage of the driving electrode of the power tube is higher than the second ramp voltage, the second voltage loop pulls down the driving electrode of the power tube; In which, the drive circuit also includes a sixth operational amplifier and a second capacitor; the second voltage loop includes a fifth operational amplifier; the sixth operational amplifier receives a power tube current sampling value, performs operational amplification on the power tube current sampling value and the second current limiting value, and the output is connected to the second capacitor, and the second capacitor voltage is the second ramp voltage; the second capacitor and the difference between the supply voltage and the power tube drive pole voltage are connected to the input end of the fifth operational amplifier, and operational amplification is performed, and the output is connected to the drive pole of the power tube.

15. The driving circuit according to claim 14, wherein: The second current loop includes a fourth operational amplifier; the fourth operational amplifier receives a current sampling value of the power tube, performs operational amplification on the current sampling value of the power tube and a second current limiting value, and outputs the amplified value to be connected to a driving electrode of the power tube.

16. The driving circuit according to claim 14, wherein: When the power tube switches from off to on, when the power tube current sampling value is greater than the second current, the second current loop charges the driving pole of the power tube, and the current of the first voltage loop is zero or drops below the second current threshold.

17. The driving circuit according to claim 15, wherein: The minimum voltage output by the fourth operational amplifier and the sixth operational amplifier is the second driving voltage, and the voltage limiting value of the second capacitor is greater than the second driving voltage.

18. The driving circuit according to claim 14, wherein: It also includes a second current source, which pulls down the driving pole of the power tube with a second bias current.

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