A capacitor structure, a semiconductor device and a method for preparing a capacitor structure

Abstract

The present application discloses a capacitor structure, a semiconductor device and a method for preparing a capacitor structure. A support structure is arranged on the outer side wall of a lower electrode of a columnar structure, the support structure includes a top support structure supporting an upper region of the lower electrode, the top support structure includes at least a first support layer and a second support layer made of a material different from that of the first support layer, the lower surface of the first support layer is arranged to contact with the upper surface of the second support layer, and the contact interface between the first support layer and the second support layer is lower than the top of the lower electrode, and the upper surface of the first support layer is higher than the top of the lower electrode; a capacitor dielectric layer covering the lower electrode and the support structure and an upper electrode covering the capacitor dielectric layer are then formed, so that the leakage rate can be reduced while satisfying the height of the lower electrode extending in the vertical direction, and the support structure at a position to be retained can be prevented from being damaged during patterning of the top support structure of the lower electrode, thereby effectively improving the stability of the lower electrode and the performance of the capacitor structure.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a capacitor structure, a semiconductor device, and a method for preparing the capacitor structure. Background Art

[0002] As a semiconductor storage device, capacitors are constantly being miniaturized with the advancement of manufacturing processes and demand in the prior art. On the basis of miniaturization, in order to ensure the storage capacity of the capacitor, it is usually necessary to extend the electrode in a direction perpendicular to the substrate, such as setting a lower electrode with a columnar structure. However, the lower electrode extended in the vertical direction is prone to tilt or bend. Therefore, a support structure needs to be set outside the lower electrode to prevent the lower electrode from deforming.

[0003] In the prior art, carbon-containing materials are usually used as the support layer of the lower electrode, but the carbon-containing support layer will react during the subsequent deposition of the high-order dielectric layer, causing carbon pollution, resulting in a higher leakage rate of the capacitor. When non-carbon-containing materials are used as the support layer of the lower electrode, the etching solution has a relatively high etching rate for the non-carbon-containing support layer, so that in the process of patterning the top support structure of the lower electrode, the structure of the support layer will be damaged, affecting the structural stability of the capacitor. Summary of the invention

[0004] The technical problem to be solved by the present application is: how to improve the structural stability of the capacitor structure.

[0005] In order to solve the above technical problems, the present application provides a capacitor structure, a semiconductor device and a method for preparing the capacitor structure.

[0006] In a first aspect of the present application, a capacitor structure is provided, comprising:

[0007] A lower electrode having a columnar structure;

[0008] A support structure, the support structure is located on the outer side wall of the lower electrode, wherein the support structure includes a top support structure supporting the upper region of the lower electrode, the top support structure includes at least a first support layer and a second support layer made of a material different from that of the first support layer, the lower surface of the first support layer contacts the upper surface of the second support layer, and the contact interface between the first support layer and the second support layer is lower than the top of the lower electrode, and the upper surface of the first support layer is higher than the top of the lower electrode;

[0009] a capacitor dielectric layer, the capacitor dielectric layer covering the lower electrode and the support structure; and

[0010] An upper electrode covers the capacitor dielectric layer.

[0011] Optionally, the thickness of the second supporting layer is 3 to 7 times the thickness of the first supporting layer.

[0012] Optionally, the first supporting layer includes: silicon carbon nitride, silicon carbide or silicon carbon oxynitride; the second supporting layer includes: silicon oxide, silicon nitride or silicon oxynitride.

[0013] Optionally, the top supporting structure further includes a third supporting layer made of a material different from that of the second supporting layer, and an upper surface of the third supporting layer contacts a lower surface of the second supporting layer.

[0014] Optionally, the thickness of the third supporting layer is smaller than the thickness of the first supporting layer and the second supporting layer.

[0015] Optionally, the support structure further includes an intermediate support structure supporting the middle region of the lower electrode, wherein the intermediate support structure includes at least a fourth support layer.

[0016] Optionally, the fourth supporting layer includes silicon oxide, silicon nitride or silicon oxynitride.

[0017] Another aspect of the present application provides a semiconductor device, comprising:

[0018] substrate; and

[0019] As described above, the capacitor structure is disposed above the substrate.

[0020] Optionally, the substrate includes a cell array area and a peripheral circuit area, the cell array area is provided with cell array area transistors, and the peripheral circuit area is provided with peripheral circuit transistors; a dielectric layer is provided between the substrate and the capacitor structure, and a capacitor contact plug is provided in the dielectric layer for realizing electrical connection between the capacitor structure and the substrate.

[0021] The third aspect of the present application provides a method for preparing a capacitor structure, which comprises:

[0022] forming a stacked structure on a substrate, wherein the stacked structure comprises a dielectric structure, a second supporting layer and a first supporting layer sequentially formed on the substrate, and the first supporting layer and the second supporting layer are made of different materials;

[0023] Etching the stacked structure and stopping the etching until the upper surface of the substrate is exposed, so as to form a plurality of grooves in the stacked structure;

[0024] Conformally depositing a conductive layer covering at least the sidewalls and bottom of the trench;

[0025] Etching back the conductive layer to form a lower electrode, wherein the top of the lower electrode is higher than the contact interface between the first supporting layer and the second supporting layer and lower than the upper surface of the first supporting layer;

[0026] Etching the dielectric structure between adjacent lower electrodes;

[0027] Depositing a capacitor dielectric layer, wherein the capacitor dielectric layer conformally covers the upper surface of the lower electrode and the first supporting layer;

[0028] An upper electrode is formed on the capacitor dielectric layer.

[0029] Compared with the prior art, one or more embodiments of the above scheme may have the following advantages or beneficial effects:

[0030] The capacitor structure, semiconductor device and capacitor structure preparation method provided by the present application are provided by setting a support structure on the outer side wall of the lower electrode of the columnar structure, wherein the support structure includes a top support structure supporting the upper area of ​​the lower electrode, the top support structure includes at least a first support layer and a second support layer of a material different from the first support layer, the lower surface of the first support layer is set to contact with the upper surface of the second support layer, and the contact interface between the first support layer and the second support layer is lower than the top of the lower electrode, and the upper surface of the first support layer is higher than the top of the lower electrode; and then a capacitor dielectric layer covering the lower electrode and the support structure and an upper electrode covering the capacitor dielectric layer are formed. The capacitor structure and semiconductor device provided by the present application can reduce the leakage rate while satisfying the height of the lower electrode extending in the vertical direction. In addition, the first support layer and the second support layer of different materials are provided, and the contact surface of the first support layer and the second support layer is formed to be lower than the top of the lower electrode, which can avoid the support structure at the position to be retained during the patterning of the top support structure of the lower electrode from being damaged, and can effectively improve the stability of the lower electrode. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The scope of the present disclosure may be better understood by reading the following detailed description of exemplary embodiments in conjunction with the accompanying drawings. The drawings included are:

[0032] Figure 1 A schematic cross-sectional structure diagram of a capacitor structure provided in an embodiment of the present application is shown;

[0033] Figure 2 A schematic cross-sectional structure diagram of another capacitor structure provided in an embodiment of the present application is shown;

[0034] Figure 3 A schematic cross-sectional structure diagram of another capacitor structure provided in an embodiment of the present application is shown;

[0035] Figure 4A schematic cross-sectional structure diagram of an intermediate support structure provided in an embodiment of the present application is shown;

[0036] Figure 5 A schematic cross-sectional structure diagram of a semiconductor device provided in an embodiment of the present application is shown;

[0037] Figures 6 to 12 A schematic cross-sectional structure diagram corresponding to each step of the capacitor structure preparation method provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical solutions and advantages of the present application clearer, the implementation method of the present application will be described in detail below in conjunction with the accompanying drawings and embodiments, so that the implementation process of how the present application uses technical means to solve technical problems and achieve technical effects can be fully understood and implemented accordingly.

[0039] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in this application should be understood by people with ordinary skills in the field to which this application belongs. The "first", "second" and similar words used in this application do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and other similar words mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0040] In the prior art, carbon-containing materials are usually used as the support layer of the lower electrode of the capacitor, but the carbon-containing support layer will react with ozone during the subsequent deposition of the high-order dielectric layer, causing carbon pollution, resulting in a higher leakage rate of the capacitor. When non-carbon-containing materials are used as the support layer of the lower electrode, the etching solution has a relatively high etching rate for the non-carbon-containing support layer, so that in the process of patterning the top support structure of the lower electrode, the structure of the support layer will be damaged, affecting the structural stability of the capacitor.

[0041] In view of this, the present application provides a capacitor structure, a semiconductor device and a method for preparing a capacitor structure, by setting a support structure on the outer side wall of the lower electrode of the columnar structure, wherein the support structure includes a top support structure supporting the upper area of ​​the lower electrode, the top support structure includes at least a first support layer and a second support layer of a material different from the first support layer, the lower surface of the first support layer is set to contact the upper surface of the second support layer, and the contact interface between the first support layer and the second support layer is lower than the top of the lower electrode, and the upper surface of the first support layer is higher than the top of the lower electrode; and then a capacitor dielectric layer covering the lower electrode and the support structure and an upper electrode covering the capacitor dielectric layer are formed. The capacitor structure and semiconductor device provided by the present application can reduce the leakage rate while meeting the height of the lower electrode extending in the vertical direction. In addition, the first support layer and the second support layer of different materials are set, and the contact surface of the first support layer and the second support layer is formed to be lower than the top of the lower electrode, which can avoid the support structure at the position to be retained during the patterning of the top support structure of the lower electrode from being damaged, and can effectively improve the stability of the lower electrode.

[0042] Embodiment 1

[0043] See also Figure 1 As shown, Figure 1 A schematic cross-sectional structure diagram of a capacitor structure provided in an embodiment of the present application is shown, which includes:

[0044] A lower electrode 11, wherein the lower electrode 11 has a columnar structure;

[0045] A support structure 12, the support structure 12 is located on the outer side wall of the lower electrode 11, wherein the support structure 12 includes a top support structure supporting the upper region of the lower electrode 11, the top support structure includes at least a first support layer 121 and a second support layer 122 made of a material different from that of the first support layer 121, the lower surface of the first support layer 121 contacts the upper surface of the second support layer 122, and the contact interface between the first support layer 121 and the second support layer 122 is lower than the top of the lower electrode 11, and the upper surface of the first support layer 121 is higher than the top of the lower electrode 11;

[0046] A capacitor dielectric layer 13, the capacitor dielectric layer 13 covers the lower electrode 11 and the support structure 12; and

[0047] The upper electrode 14 covers the capacitor dielectric layer 13 .

[0048] In the embodiment of the present application, the capacitor structure can be arranged on a substrate, and the lower electrode 11 can be a columnar structure. Specifically, it can be a lower electrode 11 formed by a bottom surface and a side wall extending in a direction perpendicular to the substrate. The surface area of ​​the lower electrode 11 can be increased by extending in a direction perpendicular to the substrate, thereby effectively improving the storage capacity of the capacitor structure. It should be noted that the side wall of the lower electrode 11 can be arranged to be perpendicular to the substrate surface, or it can be arranged to have a certain inclination angle in a direction perpendicular to the substrate surface. In the embodiment of the present application, the side wall is taken as an example of a lower electrode extending in a direction perpendicular to the substrate.

[0049] As an example, the lower electrode 11 may be formed of at least one material selected from metal, metal nitride and metal silicide. As a specific example, titanium nitride may be used as the lower electrode 11 .

[0050] The support structure 12 may include a top support structure supporting the upper region of the lower electrode 11, and the top support structure may prevent the top of the lower electrode 11 from bending. In the embodiment of the present application, the top support structure includes at least a first support layer 121 and a second support layer 122 of a material different from that of the first support layer 121. Figure 1 The top support structure exemplarily shows that it only includes a first support layer 121 and a second support layer 122. Figure 1 The top support structure shown in the figure is used as an example for explanation, wherein the first support layer 121 can be selected from a material with a lower etching rate, and the second support layer can be selected from a carbon-free material. As an example, the first support layer 121 can include silicon carbon nitride, silicon carbide or silicon carbon oxynitride, and the second support layer 122 can include silicon oxide, silicon nitride or silicon oxynitride.

[0051] In addition, in order not to affect the structural stability of the capacitor structure, the lower surface of the first support layer 121 is in contact with the upper surface of the second support layer 122, and the contact interface between the first support layer 121 and the second support layer 122 is lower than the top of the lower electrode 11, and the upper surface of the first support layer 121 is higher than the top of the lower electrode 11. In this way, on the one hand, while satisfying the height of the lower electrode extending in the vertical direction, it is possible to reduce the carbon pollution caused by the reaction between the carbon-containing support structure and ozone to produce carbon atoms during the subsequent deposition of the capacitor dielectric layer 13 due to the exposure of the support structure 12 to the ozone environment, thereby The problem of high leakage rate of the capacitor structure caused by carbon pollution is effectively improved; on the other hand, by setting the lower surface of the first supporting layer 121 in contact with the upper surface of the second supporting layer 122, and making the contact interface lower than the top surface of the lower electrode 11, the upper surface of the first supporting layer 121 is higher than the top of the lower electrode 11, and the first supporting layer 121 protects the second supporting layer 122 to prevent the second supporting layer 122 from causing serious deformation of the supporting structure 12 due to its relatively weak etching resistance when etching the groove of the lower electrode 11 or etching the dielectric layer between adjacent lower electrodes 11, thereby seriously affecting the structural stability of the capacitor structure.

[0052] As an optional example, in order to improve the stability of the capacitor structure and the performance of the capacitor structure at the same time, the thickness of the second supporting layer 122 may be set to be 3 to 7 times the thickness of the first supporting layer 121 .

[0053] The capacitor dielectric layer 13 may include at least one of oxide, nitride or high-order dielectric material, and a conductive material may be deposited on the capacitor dielectric layer 13 as the upper electrode 14. It should be noted that the upper electrode 14 may be configured to conformally cover the capacitor dielectric layer 13 and fill the area between adjacent lower electrodes 11 provided with the support structure 12, wherein the upper electrode 14 is isolated from the lower electrode 11 and the support structure 12 by the capacitor dielectric layer 13. For details, please refer to Figure 1 shown.

[0054] The above is a capacitor structure provided in an embodiment of the present application. The top support structure of the outer side wall of the lower electrode 11 is set to include a first support layer 121 and a second support layer 122 of a material different from that of the first support layer 121. The lower surface of the first support layer 121 contacts the upper surface of the second support layer 122, and the contact interface between the first support layer 121 and the second support layer 122 is lower than the top of the lower electrode 11, and the upper surface of the first support layer 121 is higher than the top of the lower electrode 11. On the one hand, while meeting the height of the lower electrode extending in the vertical direction, the problem of high leakage rate of the capacitor structure caused by carbon pollution is effectively improved; on the other hand, the first support layer 121 protects the second support layer 122, thereby preventing the second support layer 122 from being easily etched due to its relatively weak etching resistance, causing serious deformation of the support structure, and can effectively improve the structural stability of the capacitor structure.

[0055] Based on the capacitor structure provided in Example 1, the support structure 12 for supporting the outer wall of the lower electrode 11 may include not only a top support structure located on the top of the lower electrode 11, but also a middle support structure located in the middle area of ​​the lower electrode 11. Please refer to Example 2 for details.

[0056] Embodiment 2

[0057] See also Figure 2 As shown, Figure 2 A schematic cross-sectional structure diagram of another capacitor structure provided in an embodiment of the present application is shown. Compared with the capacitor structure provided in the first embodiment of the present application, the top support structure further includes a third support layer 123 made of a material different from that of the second support layer 122, and the upper surface of the third support layer 123 contacts the lower surface of the second support layer 122. In addition, the support structure may further include an intermediate support structure supporting the middle region of the lower electrode 11, wherein the intermediate support structure includes at least a fourth support layer 124.

[0058] For the sake of brevity, the similarities between the capacitor structure provided in the second embodiment and the capacitor structure provided in the first embodiment will not be described in detail, and the differences between the second embodiment and the first embodiment will be mainly described below.

[0059] In the embodiment of the present invention, the third support layer 123 may include: silicon carbon nitride, silicon carbon oxide or silicon carbon nitride oxide. The thickness of the third support layer 123 is less than the thickness of the first support layer 121 and the second support layer 122. The third support layer 123 can protect the second support layer 122 to prevent the second support layer 122 from being etched when etching the dielectric structure between the adjacent lower electrodes 11, thereby effectively improving the stability of the top support layer and effectively improving the problem of high leakage rate of the capacitor structure caused by carbon pollution.

[0060] In addition, the intermediate support structure includes at least a fourth support layer 124. As an example, the intermediate support structure is configured to include only one fourth support layer 124, wherein the fourth support layer 124 may include silicon oxide, silicon nitride or silicon oxynitride. By providing the intermediate support structure, the overall stability of the capacitor structure is improved.

[0061] The above is another capacitor structure provided in Example 2 of the present application. On the basis of the capacitor structure provided in the first embodiment, the top support structure is further provided with a third support layer 123. In addition, the support structure is also provided with an intermediate support structure for supporting the middle area of ​​the lower electrode 11, wherein the third support layer 123 is made of a different material from the second support layer 122, and the thickness of the third support layer 123 is less than the thickness of the first support layer 121 and the second support layer 122. In addition, the intermediate support structure includes at least a fourth support layer 124, which can strengthen the support effect on the capacitor structure, improve the stability of the capacitor structure, and effectively improve the problem of high leakage rate of the capacitor structure caused by carbon pollution.

[0062] Embodiment 3

[0063] See also Figure 3 As shown, Figure 3 A schematic cross-sectional structure diagram of another capacitor structure provided in an embodiment of the present application is shown. Compared with the capacitor structure provided in the first embodiment of the present application, the support structure 12 may further include an intermediate support structure supporting the intermediate region of the lower electrode 11. For the sake of brevity, the similarities between the capacitor structure provided in the third embodiment and the capacitor structure provided in the first embodiment will not be described in detail, and the differences between the third embodiment and the first embodiment will be mainly described below.

[0064] In the third embodiment of the present application, the intermediate support structure includes at least a fourth support layer 124 and a fifth support layer 125 made of a material different from that of the fourth support layer 124 . The upper surface of the fourth support layer 124 contacts the lower surface of the fifth support layer 125 .

[0065] As an example, see Figure 3As shown, the intermediate support structure includes a fourth support layer 124 and a fifth support layer 125 made of a material different from that of the fourth support layer 124. The upper surface of the fourth support layer 124 contacts the lower surface of the fifth support layer 125. The fourth support layer 124 may include silicon carbonitride, silicon carbide or silicon carbonitride oxide, and the fifth support layer 125 may include silicon oxide, silicon nitride or silicon oxynitride. It should be noted that the fourth support layer 124 (fifth support layer 125) in the intermediate support structure may be made of the same material as the second support layer 122 (first support layer 121) in the top support structure, and the fourth support layer 124 (fifth support layer 125) in the intermediate support structure may also be made of a material different from that of the second support layer 122 (first support layer 121) in the top support structure, which will not be specifically limited in the embodiments of the present application.

[0066] By setting the intermediate support structure to be composed of the fourth support layer 124 and the fifth support layer 125 of different materials, the middle area of ​​the lower electrode 11 can be supported to strengthen the stability of the lower electrode 11. At the same time, the fourth support layer 124 is set to be made of a carbon-free material, which can reduce the problem of high leakage rate of the capacitor dielectric layer 13 caused by carbon pollution in the subsequent deposition process. In addition, the lower surface of the fifth support layer 125 is in contact with the upper surface of the fourth support layer 124, and the fifth support layer 125 can protect the fourth support layer 124 located therebelow, so as to prevent the fourth support layer 124 from being etched prematurely due to its relatively weak etching resistance, thereby affecting the structure of the intermediate support structure and further affecting the stability of the support.

[0067] As an optional example, in order to effectively avoid the problem of high leakage rate caused by carbon pollution, the thickness of the fifth supporting layer 125 can be set to be smaller than the thickness of the fourth supporting layer 124 to improve the performance of the capacitor.

[0068] As another example, see Figure 4 As shown, Figure 4 A schematic diagram of the cross-sectional structure of the intermediate support structure provided in an embodiment of the present application is shown. The intermediate support structure may also include a stacked structure formed by alternating stacking of a fourth support layer 124 and a fifth support layer 125, wherein the thickness of the stacked structure formed by alternating stacking of the fourth support layer 124 and the fifth support layer 125 may be set according to the height of the lower electrode 11 to ensure the stability of the lower electrode.

[0069] In the stacked structure formed by alternating stacking of the fourth support layer 124 and the fifth support layer 125, the thickness of the fifth support layer 125 can be set to be less than the thickness of the fourth support layer 124, the fifth support layer 125 can include silicon carbon nitride, silicon carbide or silicon carbon oxynitride, and the fourth support layer 124 can include silicon oxide, silicon nitride or silicon oxynitride.

[0070] It should be noted that, in the stacked structure composed of alternately stacked fourth support layers 124 and fifth support layers 125, each fourth support layer 124 (fifth support layer 125) can be set to the same material or different materials. In addition, the thickness of each fourth support layer 124 (fifth support layer 125) can be set to the same thickness or different thicknesses, which will not be specifically limited in the embodiments of the present application.

[0071] The above is another capacitor structure provided in Example 3 of the present application. On the basis of the capacitor structure provided in the first embodiment, an intermediate support structure supporting the middle area of ​​the lower electrode 11 is further provided, wherein the intermediate support structure includes at least a fourth support layer 124 and a fifth support layer 125 of a material different from that of the fourth support layer 124, the lower surface of the fifth support layer 125 is in contact with the upper surface of the fourth support layer 124, and the thickness of the fifth support layer 125 is set to be less than the thickness of the fourth support layer 124. This can strengthen the support effect on the capacitor structure, improve the stability of the capacitor structure, and effectively improve the problem of high leakage rate of the capacitor structure caused by carbon pollution. In addition, the fifth support layer 125 can protect the fourth support layer 124, and can avoid deformation of the intermediate support structure caused by the relatively weak etching resistance of the fourth support layer 124, thereby improving the stability and performance of the capacitor structure as a whole by setting the intermediate support layer.

[0072] In another aspect of the present application, a semiconductor device having a capacitor structure as described in the third embodiment is provided. For details, please refer to the fourth embodiment.

[0073] Embodiment 4

[0074] It should be noted that the fourth embodiment can be configured based on any one of the above-mentioned first to third embodiments. For the sake of brevity, this embodiment will be described based on the third embodiment as an example.

[0075] See also Figure 5 As shown, Figure 5 A schematic cross-sectional structure diagram of a semiconductor device provided in an embodiment of the present application is shown, which includes:

[0076] a substrate 10; and

[0077] As in the capacitor structure described in the third embodiment, the capacitor structure is disposed above the substrate 10 .

[0078] As an example, the substrate 10 includes a cell array area and a peripheral circuit area, the cell array area is provided with a cell array area transistor 15, the peripheral circuit area is provided with a peripheral circuit transistor 16, a dielectric layer 17 is provided between the substrate 10 and the capacitor structure, and a capacitor contact plug 18 is provided in the substrate 10 for realizing electrical connection between the capacitor structure and the substrate 10.

[0079] The substrate 10 may be a Si substrate, a Ge substrate, a SiGe substrate, SOI (Silicon On Insulator) or GOI (Germanium On Insulator), etc. In other embodiments, the substrate may also be a substrate including other element semiconductors or compound semiconductors, such as GaAs, InP or SiC, etc., may also be a stacked structure, such as Si / SiGe, etc., may also be other epitaxial structures, such as SGOI (Silicon Germanium On Insulator), etc.

[0080] The dielectric layer 17 may include borophosphosilicate glass, silicon dioxide, silicon nitride, silicon oxynitride, silicon carbide, a carbon-containing low-k dielectric, or the like.

[0081] In the embodiment of the present application, a cell array region transistor 15 and a peripheral circuit transistor 16 are also exemplarily provided, wherein the cell array region transistor 15 includes a source 151 and a drain 152 disposed in the substrate 10, and a gate structure 153 disposed in the dielectric layer 17 and disposed between the source 151 and the drain 152, wherein, as an example, the gate structure 153 may be configured to include a semiconductor layer 1531 disposed above the substrate 10, a barrier layer 1532 disposed on the semiconductor layer 1531, a metal layer 1533 disposed on the barrier layer 1532, and a mask layer 1534 disposed on the metal layer 1533. In addition, sidewalls may be further included on both sides of the gate structure to prevent the metal layer 1533 in the gate structure from being exposed.

[0082] The cell array region transistor 15 may be configured as an N-type or P-type transistor, which will not be specifically limited in the embodiment of the present application.

[0083] The semiconductor layer 1531 may be a semiconductor layer doped with N-type ions or P-type ions, for example, a polysilicon layer doped with N-type ions. It should be noted that an insulating layer is also provided between the semiconductor layer 1531 and the substrate 10, which is not shown in the figure.

[0084] The blocking layer 1532 may be a metal silicide layer, for example, tungsten silicide, the metal layer 1533 may include metal tungsten, and the mask layer 1534 may include insulating materials such as silicon nitride or silicon oxynitride.

[0085] The peripheral circuit transistor 16 can be configured to have the same structure as the unit array area transistor 15, and the peripheral circuit transistor 16 may include a source 161 and a drain 162 arranged in the substrate 10, and a gate structure 163 located in the dielectric layer 17 and arranged between the source 161 and the drain 162, wherein, as an example, the gate structure 163 can be configured to include a semiconductor layer 1631 located above the substrate 10, a blocking layer 1632 located on the semiconductor layer 1631, a metal layer 1633 located on the blocking layer 1632, and a mask layer 1634 located on the metal layer 1633.

[0086] The peripheral circuit transistor 16 may include an N-type or P-type transistor, which will not be specifically limited in the embodiment of the present application.

[0087] The semiconductor layer 1631 may be a semiconductor layer doped with N-type ions or P-type ions, for example, a polysilicon layer doped with N-type ions. It should be noted that an insulating layer is also provided between the semiconductor layer 1631 and the substrate 10, which is not shown in the figure.

[0088] The blocking layer 1632 may be a metal silicide layer, for example, tungsten silicide, the metal layer 1633 may include metal tungsten, and the mask layer 1634 may include insulating materials such as silicon nitride or silicon oxynitride.

[0089] It should be noted that the peripheral circuit transistor 16 can be configured to be made of the same material as the cell array region transistor 15 , or can be configured to be made of a material different from that of the cell array region transistor 15 , which will not be specifically limited in the embodiments of the present application.

[0090] The capacitor contact plug 18 may be filled with conductive materials such as doped polysilicon and metal silicide to achieve electrical connection between the capacitor structure and the substrate 10. As a specific example, the capacitor contact plug 18 may be arranged to contact the active area 1051 of the transistor 15 in the cell array region.

[0091] The above is a semiconductor device provided in an embodiment of the present application, which includes a substrate 10 and a capacitor structure as described in the above-mentioned embodiment three. By simultaneously providing a top support structure and an intermediate support structure in the capacitor structure, the semiconductor device in this embodiment can have the same beneficial effects as embodiment two, and improve the working performance of the semiconductor device as a whole.

[0092] In another aspect of the present application, a method for preparing a capacitor structure is provided. Please refer to Example 5 for details.

[0093] Embodiment 5

[0094] See also Figures 6 to 12 As shown, Figures 6 to 12A schematic cross-sectional structure diagram corresponding to each step of the capacitor structure preparation method provided in an embodiment of the present application is shown.

[0095] See also Figure 6 As shown, a stacked structure is formed on a substrate 10 , wherein the stacked structure includes a dielectric structure 19 , a second supporting layer 122 and a first supporting layer 121 sequentially formed on the substrate 10 , and the first supporting layer 121 and the second supporting layer 122 are made of different materials.

[0096] The stacked structure may be formed on the substrate 10 by sequentially depositing the dielectric structure 19 , the first supporting layer 121 , and the second supporting layer 122 on the substrate 10 using a chemical vapor deposition process or a physical vapor deposition process.

[0097] In the embodiment of the present application, the dielectric structure 19 may include at least one of silicon nitride, borophosphosilicate glass (BPSG), phosphosilicate glass (PSG), and plasma enhanced (PE)-tetraethylorthosilicate (TEOS).

[0098] As an example, the first supporting layer 121 may include silicon carbon nitride, silicon oxycarbide, or silicon oxycarbon nitride, and the second supporting layer 122 may include silicon oxide, silicon nitride, or silicon oxynitride.

[0099] See also Figure 7 As shown, the stacked structure is etched and the etching stops until the upper surface of the substrate 10 is exposed, so as to form a plurality of grooves in the stacked structure.

[0100] This step may specifically include selecting a suitable etching process to etch the stacked structure, so as to form a plurality of grooves in the stacked structure that expose the upper surface of the substrate 10. As an example, the etching process may be a dry etching process or a wet etching process.

[0101] See also Figure 8 As shown, a conductive layer 20 is conformally deposited to cover at least the sidewalls and bottom of the trench.

[0102] In the embodiment of the present application, a deposition process with good step coverage effect can be used to deposit the conductive layer 20. As an example, an atomic layer deposition process, a chemical vapor deposition process, or a physical vapor deposition process can be used to conformally deposit the conductive layer 20 that at least covers the sidewalls and the bottom of the trench. In some embodiments, in addition to covering the sidewalls and the bottom of the trench, the conductive layer 20 can also cover the upper surface of the first support layer 121.

[0103] The conductive layer 20 may include metal or metal nitride. As a specific example, the conductive layer 20 may be titanium nitride.

[0104] See also Fig. 9As shown, the conductive layer 20 is etched back to form a lower electrode 11 , the top of which is higher than the contact interface between the first supporting layer 121 and the second supporting layer 122 and lower than the upper surface of the first supporting layer 121 .

[0105] This step may specifically include etching back the conductive layer 20 using a dry etching process to form the lower electrode 11 .

[0106] See also Fig.10 As shown, the dielectric structure 19 between adjacent lower electrodes is etched.

[0107] In the embodiment of the present application, the dielectric structure 19 may be etched using a dry etching process or a wet etching process.

[0108] See also Fig.11 As shown, a capacitor dielectric layer 13 is deposited, and the capacitor dielectric layer 13 conformally covers the upper surfaces of the lower electrode 11 and the first supporting layer 121 .

[0109] See also Fig.12 As shown, an upper electrode 14 is formed on the capacitor dielectric layer 13 to obtain a capacitor structure.

[0110] In the embodiment of the present application, the capacitor dielectric layer 13 and the upper electrode 14 can be deposited separately by the same deposition process as that of depositing the conductive layer 20. In addition to conformally covering the capacitor dielectric layer 13, the upper electrode 14 can also fill the area between the adjacent lower electrodes 11 provided with the support structure 12. It should be noted that a capacitor dielectric layer 13 can also be formed on the lower surface of the second support layer 122, and the upper electrode 14 is isolated from the lower electrode 11 and the support structure 12 by the capacitor dielectric layer 13. Among them, the capacitor dielectric layer 13 can include at least one of oxide, nitride or high-order dielectric material, and the upper electrode 14 can be formed of a metal material or a metal nitride.

[0111] The above is a method for preparing a capacitor structure provided in an embodiment of the present application, wherein a stacking structure including a dielectric structure 19, a second supporting layer 122, and a first supporting layer 121 of a material different from that of the second supporting layer 122 is sequentially formed on a substrate 10, and the stacking structure is etched to etch a plurality of grooves that expose the upper surface of the substrate 10, and then a conductive layer 20 is conformally deposited to cover at least the sidewalls and bottom of the grooves. By back-etching the conductive layer 20, a lower electrode 11 is formed whose top is higher than the contact interface between the first supporting layer 121 and the second supporting layer 122 and lower than the upper surface of the first supporting layer 121, and then the dielectric structure 19 between adjacent lower electrodes 11 is etched away, and finally a capacitor dielectric layer 13 covering the upper surface of the lower electrode 11 and the first supporting layer 121 is deposited, and an upper electrode 14 covering the capacitor dielectric layer 13 is formed to form a capacitor structure. On the one hand, this method effectively improves the problem of high leakage rate of the capacitor structure caused by carbon pollution while satisfying the height of the lower electrode 11 extending in the vertical direction; on the other hand, the first support layer 121 protects the second support layer 122, preventing the second support layer 122 from being easily etched due to its relatively weak etching resistance, causing serious deformation of the support structure, and can effectively improve the structural stability of the capacitor structure.

[0112] Although the embodiments disclosed in this application are as above, the contents described are only embodiments adopted for facilitating the understanding of this application and are not intended to limit this application. Any technician in the technical field to which this application belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in this application, but the scope of protection of this application shall still be based on the scope defined in the attached claims.

Claims

1. A capacitor structure, characterized in that: include: A lower electrode having a columnar structure; A support structure, the support structure is located on the outer side wall of the lower electrode, wherein the support structure includes a top support structure supporting the upper region of the lower electrode, the top support structure includes at least a first support layer and a second support layer made of a material different from that of the first support layer, the lower surface of the first support layer contacts the upper surface of the second support layer, and the contact interface between the first support layer and the second support layer is lower than the top of the lower electrode, and the upper surface of the first support layer is higher than the top of the lower electrode; the top support structure also includes a third support layer made of a material different from that of the second support layer, the upper surface of the third support layer contacts the lower surface of the second support layer; The support structure further comprises an intermediate support structure supporting the middle region of the lower electrode, wherein the intermediate support structure comprises at least a fourth support layer; a capacitor dielectric layer, the capacitor dielectric layer covering the lower electrode and the support structure; and An upper electrode covers the capacitor dielectric layer.

2. The capacitor structure according to claim 1, characterized in that: The thickness of the second supporting layer is 3 to 7 times the thickness of the first supporting layer.

3. The capacitor structure according to claim 1, characterized in that: The first supporting layer includes: silicon carbonitride, silicon carbide or silicon carbonitride oxide; the second supporting layer includes: silicon oxide, silicon nitride or silicon nitride oxide.

4. The capacitor structure according to claim 1, characterized in that: The thickness of the third supporting layer is smaller than that of the first supporting layer and the second supporting layer.

5. The capacitor structure according to claim 1, characterized in that: The fourth supporting layer includes silicon oxide, silicon nitride or silicon oxynitride.

6. A semiconductor device, characterized in that: It includes: substrate; as well as The capacitor structure according to any one of claims 1 to 5, wherein the capacitor structure is arranged above the substrate.

7. The semiconductor device according to claim 6, characterized in that The substrate includes a cell array area and a peripheral circuit area, wherein the cell array area is provided with a cell array area transistor, and the peripheral circuit area is provided with a peripheral circuit transistor; a dielectric layer is provided between the substrate and the capacitor structure, and a capacitor contact plug is provided in the dielectric layer for realizing electrical connection between the capacitor structure and the substrate.

8. A method for preparing a capacitor structure, characterized in that: include: forming a stacked structure on a substrate, wherein the stacked structure comprises a dielectric structure, a second supporting layer and a first supporting layer sequentially formed on the substrate, and the first supporting layer and the second supporting layer are made of different materials; Etching the stacked structure and stopping the etching until the upper surface of the substrate is exposed, so as to form a plurality of grooves in the stacked structure; Conformally depositing a conductive layer covering at least the sidewalls and bottom of the trench; Etching back the conductive layer to form a lower electrode, wherein the top of the lower electrode is higher than the contact interface between the first supporting layer and the second supporting layer and lower than the upper surface of the first supporting layer; Etching the dielectric structure between adjacent lower electrodes; Depositing a capacitor dielectric layer, wherein the capacitor dielectric layer conformally covers the upper surface of the lower electrode and the first supporting layer; An upper electrode is formed on the capacitor dielectric layer.

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