Wafer-level packaging method for image sensor chips

Abstract

The present invention provides a wafer-level packaging method for image sensor chips. The packaging method first presses a wafer-level transparent substrate and a support dam arranged thereon onto a wafer, and then performs a process of cutting and etching the transparent substrate and the support dam. In the early stage of the packaging process, all image sensor chips on the wafer can be sealed and protected at the same time, thereby avoiding the operations of laminating the support dam and covering the transparent cover plate to the image sensor chips one by one, reducing the environmental cleanliness requirements in the subsequent process flow, thereby effectively improving the production yield and reducing the cost.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a wafer-level packaging method for an image sensor chip. Background Art

[0002] With the development of light and shadow technologies such as photography and videography, image sensor chips, which can convert received light signals into electrical signals, can be used in cameras of electronic products and have huge market demand.

[0003] At the same time, as electronic products further develop towards multifunctionality and miniaturization, the packaging technology of photosensitive image sensor chips has also begun to adopt wafer-level packaging technology, which is a technology that packages and tests the entire wafer and then cuts it to obtain a single finished image sensor chip. The size of a single finished image sensor chip packaged using this packaging technology is similar to the size of a single grain, which conforms to the market's requirements for increasingly light, small, short, thin and low-priced microelectronic products.

[0004] However, in the prior art, the process flow of attaching a transparent cover plate to a wafer is to attach the transparent cover plate and a supporting dam to the image sensor chip one by one. The image sensor chip is exposed to the environment for a long time. In addition, since wafer-level packaging processes the entire wafer and has a larger product process area, impurity particles in the production environment are more likely to contaminate the image sensor chip. In addition, the photosensitive area of ​​the image sensor chip has higher requirements on cleanliness than ordinary image sensor chips, resulting in low yield and high cost of image sensor chips made using wafer-level packaging technology. Summary of the invention

[0005] The object of the present invention is to provide a wafer-level packaging method for an image sensor chip.

[0006] The present invention provides an image sensor chip wafer-level packaging method, comprising the steps of:

[0007] Providing a wafer, and forming a plurality of regularly arranged image sensor chips on the wafer;

[0008] Providing a wafer-level transparent substrate, and manufacturing support dams on the transparent substrate corresponding to the areas between the photosensitive areas of the adjacent image sensor chips on the wafer;

[0009] Pressing the surface of the transparent substrate on which the support dam is formed to the wafer;

[0010] Removing the covering on the wafer dicing road and exposing the first pad located outside the photosensitive area;

[0011] Divide the wafer-level transparent substrate into a plurality of transparent cover plates, wherein the transparent cover plates cover the photosensitive area, and divide the support dam into a single frame structure surrounding the photosensitive area;

[0012] The wafer is cut along the cutting paths to form individual image sensor chips.

[0013] As a further improvement of the present invention, “making the supporting dam” specifically includes:

[0014] A plurality of support dams arranged in parallel are manufactured on the transparent substrate corresponding to the areas between adjacent photosensitive areas on the wafer, and the first pads are exposed between adjacent support dams.

[0015] As a further improvement of the present invention, it is characterized in that “removing the covering on the wafer dicing road” specifically includes:

[0016] The transparent substrate covering the cutting path and the first pad between adjacent photosensitive areas is cut.

[0017] As a further improvement of the present invention, it is characterized in that “removing the covering on the wafer dicing road” further comprises:

[0018] A portion of the support dam located below the transparent cover is cut.

[0019] As a further improvement of the present invention, it is characterized in that "making the support dam" specifically includes:

[0020] A support dam is manufactured on the transparent substrate corresponding to the area between adjacent photosensitive areas on the wafer, so that the support dam covers the first pad.

[0021] As a further improvement of the present invention, it is characterized in that “removing the covering on the wafer dicing road” specifically includes:

[0022] Cutting the portion of the transparent substrate covering the cutting path and the first pad between adjacent image sensor chips and the portion of the support dam located therebelow;

[0023] The remaining portion of the support dam after etching and cutting is exposed to expose the first pad.

[0024] As a further improvement of the present invention, it is characterized in that "pressing" specifically includes:

[0025] An adhesive layer is arranged on the support dam, and the transparent substrate and the wafer are aligned and pressed together.

[0026] As a further improvement of the present invention, it is characterized in that

[0027] The transparent substrate is inorganic glass or organic glass.

[0028] As a further improvement of the present invention, it is characterized in that after cutting the wafer to form a single image sensor chip, it also includes the following steps:

[0029] Providing a substrate, disposing the image sensor chip on a first surface of the substrate and electrically connecting the image sensor chip thereto;

[0030] Filling the plastic packaging material to plastic-package the image sensor chip and the substrate;

[0031] Disposing a welding protrusion on a second surface of the substrate relative to the first surface thereof;

[0032] The substrate is cut to form individual packaging structures.

[0033] As a further improvement of the present invention, “arranging the image sensor chip on the first surface of the substrate and electrically connecting it” specifically includes:

[0034] Laminating the back surface of the image sensor chip to the first surface of the substrate;

[0035] The lead wire electrically connects the first pad and the second pad located on the first surface of the substrate. The beneficial effect of the present invention is that by first bonding the wafer-level transparent substrate and the support dam disposed thereon to the wafer, and then cutting and etching the transparent substrate and the support dam, all image sensor chips on the wafer can be sealed and protected at the same time in the early stage of the packaging process, thereby avoiding the operation of bonding the support dam and covering the transparent cover plate to the image sensor chips one by one, reducing the environmental cleanliness requirements in the subsequent process flow, thereby effectively improving the production yield and reducing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] Figure 1 It is a schematic diagram of the process of packaging an image sensor chip, a transparent substrate and a support dam in a wafer-level packaging method of an image sensor chip in one embodiment of the present invention.

[0037] Figure 2 is a schematic diagram of a wafer in one embodiment of the present invention.

[0038] Figure 3 yes Figure 2 An enlarged schematic diagram of the cross-sectional view at AA in the figure.

[0039] Figure 4 It is a schematic diagram of a transparent substrate and a support dam in the first embodiment of the present invention.

[0040] Figure 5 yes Figure 4An enlarged schematic diagram of the cross-sectional view at BB in the middle.

[0041] Figure 6 yes Figure 4 Schematic diagram of the transparent substrate and the support dam after being aligned and pressed onto the image sensor chip.

[0042] Figure 7 It is a schematic diagram of a transparent substrate and a support dam in the second embodiment of the present invention.

[0043] Figure 8 yes Figure 7 Cross-sectional view at CC.

[0044] Fig. 9 yes Figure 7 Schematic diagram of the transparent substrate and the support dam after being aligned and pressed onto the image sensor chip.

[0045] Fig.10 and Fig.11 They are Figure 6 and Fig. 9 Schematic diagram of the packaging structure after removing part of the support dam and transparent substrate.

[0046] Fig.12 and Fig.13 They are Fig.10 and Fig.11 Schematic diagram of the package structure after cutting.

[0047] Fig.14 It is a schematic diagram of the process of packaging an image sensor chip and a substrate in a wafer-level packaging method of an image sensor chip in one embodiment of the present invention.

[0048] Fig.15 and Fig.16 They are Fig.12 and Fig.13 Schematic diagram of the packaging structure after being attached to the substrate.

[0049] Fig.17 and Fig.18 They are Fig.15 and Fig.16 Schematic diagram of the package structure after the lead wires are electrically connected and filled with plastic packaging material.

[0050] Fig.19 and Fig. 20 They are Fig.17 and Fig.18 Schematic diagram of the packaging structure after the welding protrusions are set on the second surface of the substrate.

[0051] Fig.21 and Fig. 22 They are Fig.19 and Fig. 20Schematic diagram of the wafer-level packaging structure of a single image sensor chip formed by cutting the packaging structure. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in combination with the specific implementation methods of this application and the corresponding drawings. Obviously, the described implementation methods are only part of the implementation methods of this application, not all of the implementation methods. Based on the implementation methods in this application, all other implementation methods obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0053] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0054] For ease of explanation, this document uses terms that represent relative positions in space for description, such as "above", "below", "back", "front", etc., to describe the relationship of one unit or feature shown in the drawings relative to another unit or feature. Terms of relative positions in space can include different orientations of the device in use or operation other than the orientation shown in the figure. For example, if the device in the figure is turned over, the unit described as being "below" or "above" other units or features will be located "below" or "above" the other units or features. Therefore, the exemplary term "below" can encompass both the spatial orientations of below and above.

[0055] like Figure 1 As shown, the present invention provides an image sensor chip wafer-level packaging method, comprising the steps of:

[0056] S1: Figure 2 and Figure 3 As shown, a wafer 1 is provided, on which a plurality of regularly arranged image sensor chips 11 are formed, and a cutting path 12 is formed between adjacent image sensor chips 11. After the wafer 1 is packaged, it is cut along the cutting path 12 to form a packaging structure of a plurality of image sensor chips 11.

[0057] It should be noted that the cutting channel 12 is only a blank area reserved for cutting between two image sensor chips 11 , and there is no actual boundary line between the cutting channel and the image sensor chips 11 on both sides.

[0058] Furthermore, the image sensor chip 11 has a functional surface 111 and a back surface 112 facing each other, the functional surface 111 is provided with a photosensitive area 1111 and a first pad 1112 located outside the photosensitive area 1111 and spaced a distance therefrom, and the first pad 1112 is electrically coupled to the photosensitive area 1111.

[0059] The photosensitive area 1111 may include a plurality of photodiode arrays arranged to convert light signals irradiated to the photosensitive area 1111 into electrical signals. The first pad 1112 serves as an input and output terminal for connecting the device in the photosensitive area 1111 to an external circuit. In other embodiments of the present invention, other electronic components may be arranged on the image sensor chip 11, and the present invention is not limited thereto.

[0060] S2: Figure 4 and Figure 5 As shown, a wafer-level transparent substrate 2 is provided, and a support dam 3 is made on the transparent substrate 2 corresponding to the area between the photosensitive areas 1111 of each adjacent imaging chip 11 on the wafer 1 .

[0061] The transparent substrate 2 can be made of inorganic glass, organic glass or other light-transmitting materials with a specific strength, which can protect and transmit light to the photosensitive area 1111. The upper and lower surfaces of the transparent substrate 2 are both flat and smooth to avoid scattering and diffuse reflection of incident light, thereby affecting the sensing accuracy of the image sensor chip 11.

[0062] In some embodiments of the present invention, the material of the support dam 3 is photosensitive resin, and a photosensitive resin coating is formed on the transparent substrate 2 by spraying or spin coating, and then the photosensitive resin coating is patterned by exposure and development process to form the support dam 3 arranged in an array in a specified area. In other embodiments of the present invention, the material of the support dam 3 can also be an insulating dielectric material such as silicon oxide, silicon nitride, silicon oxynitride, etc., which is formed by a deposition process, and then patterned by photolithography and etching processes to form the support dam 3 arranged in an array in a specified area.

[0063] S3: Figure 6 As shown, the transparent substrate 2 having the support dam 3 formed thereon is pressed together with the wafer 1 .

[0064] In some embodiments of the present invention, the support dam 3 and the wafer 1 can be aligned and pressed together by an adhesive layer. The adhesive layer is formed on the upper surface of the support dam 3 or a limited area on the wafer 1 by screen printing or spin coating, and then the support dam 3 and the wafer 1 are aligned and pressed together and combined by the adhesive layer. The adhesive layer can achieve bonding on the one hand, and can also play an insulating and sealing role on the other hand. The adhesive layer can be a polymer adhesive material, such as polymer materials such as silicone, epoxy resin, benzocyclobutene, etc.

[0065] Specifically, in the present invention, there are various implementation structures of the support dam 3 on the transparent substrate 2, and two embodiments are specifically described below.

[0066] like Figures 4 to 6 As shown, in the first embodiment, a plurality of support dams 3 arranged in parallel are made on the transparent substrate 2 corresponding to the area between each adjacent photosensitive area 1111 on the wafer 1, and the first pads 1112 are exposed between the adjacent support dams 3. The area where the support dam 3 is set corresponds to the position on the wafer 1 and is spaced a certain distance from the photosensitive area 1111 and the pad, respectively, to prevent the adhesive layer from contaminating the above area and affecting the quality of the package and the image sensor chip 11. By exposing the first pad 1112, in the subsequent cutting process, it is sufficient to cut off the transparent cover plate 21 blocking the first pad 1112, thereby simplifying the subsequent process flow.

[0067] Exemplarily, one support dam 3 is provided between two adjacent first pads 1112 and between the first pad 1112 and the adjacent photosensitive area 1111 .

[0068] like Figures 7 to 9 As shown, in the second embodiment, a support dam 3 is made on the transparent substrate 2 corresponding to the area between the adjacent photosensitive areas 1111 on the wafer 1, and the support dam 3 covers the first pad 1112. The area where the support dam 3 is set corresponds to the position on the wafer 1 and is spaced a certain distance from the two adjacent sensing areas to prevent the adhesive layer from contaminating the photosensitive area 1111. The support dam 3 of this structure is simple in structure and easy to manufacture.

[0069] S4: Fig.10 As shown, the covering on the cutting path 12 of the wafer 1 is removed, and the first welding pad 1112 located outside the photosensitive area 1111 is exposed, the transparent substrate 2 at the wafer level is divided into multiple transparent cover plates 21, and the transparent cover plates 21 cover the photosensitive area 1111, and the support dam 33 is divided into a single frame structure surrounding the photosensitive area 1111.

[0070] The single transparent cover plate 21 on the photosensitive area 1111 and the support dam 33 arranged around the periphery thereof form a sealed cavity.

[0071] Specifically, in the present invention, the implementation method of this step is different according to the different structures of the support dam 3, and is specifically described below in combination with the structures of the support dam 3 described in the above-mentioned embodiment 1 and embodiment 2.

[0072] like Fig.10 As shown, in the first embodiment, the portion of the transparent substrate 2 covering the cutting path 12 and the first pad 1112 between adjacent photosensitive areas 1111 is cut by a tool or a laser.

[0073] Furthermore, in some other embodiments of Example 1, after the transparent substrate 2 is cut to expose the first welding pad 1112, part of the support dam 3 located under the transparent cover plate 21 is cut, and at least part of the support dam 3 is retained without being cut, so as to ensure that the cutting step does not scratch the functional surface 111 of the image sensor chip 11 and reduce the yield.

[0074] Furthermore, in the horizontal direction, cutting off a portion of the transparent cover plate 21 and the support dam 3 located near the first welding pad 1112 area can ensure that the first welding pad 1112 is completely exposed without affecting the subsequent lead processing.

[0075] The support dam 3 formed by the above-mentioned cutting step forms a stepped structure on one side of the photosensitive area 1111, and a block-shaped notch 31 is formed on the upper end of the side facing the first welding pad 1112. The lower surface and the rear surface of the block-shaped notch 31 are respectively parallel and perpendicular to the functional surface 111, and the side wall surface of the transparent cover plate 21 is flush with the rear surface of the block-shaped notch 31.

[0076] like Fig.11 As shown, in the second embodiment, the transparent substrate 2 covering the cutting path 12 and the first pad 1112 between the adjacent image sensor chips 11 and the support dam 3 located thereunder are cut by a cutter or laser, and a certain processing margin is left for the cutting to avoid scratching the functional surface 111 of the image sensor chip 11. Then, the remaining support dam 3 is removed by an etching process to expose the covered functional surface 111 and the first pad 1112.

[0077] The support dam 3 formed by the above-mentioned cutting step forms a rectangular parallelepiped structure on one side of the photosensitive area 1111 , and the side wall surface of the transparent cover plate 21 is flush with the side wall surface of the support dam 3 .

[0078] Here, through step S3 and step S4, the complete transparent substrate 2 and the support dam 3 arranged thereon can be first bonded to the wafer 1, and all the image sensor chips 11 on the wafer 1 can be sealed and protected at the same time in the early stage of the packaging process, thereby avoiding the operation of bonding the support dam 3 and covering the transparent cover 21 to the image sensor chips 11 one by one, thereby reducing the environmental cleanliness requirements in the subsequent process flow, thereby effectively improving the production yield and reducing costs.

[0079] S5: cutting the wafer 1 along the cutting path 12 to form a plurality of the image sensor chips 11 provided with the support dam 3 and the transparent cover plate 21 .

[0080] like Fig.12 and Fig.13 As shown, the image sensor chip 11 is obtained after cutting the wafer 1 in Example 1 and Example 2 respectively.

[0081] like Fig.14 As shown, it is a schematic diagram of the process of mounting the image sensor chip and the substrate in the image sensor chip wafer-level packaging method provided by the invention.

[0082] S6 : providing a substrate 4 , and attaching the back surface 112 of the image sensor chip 11 to the first surface 41 of the substrate 4 .

[0083] The image sensor chip 11 and the substrate 4 may be fixed by an adhesive layer.

[0084] like Fig.15 and Fig.16 As shown in FIG. 1 , the intermediate packaging structure after the image sensor chip 11 is mounted on the substrate 4 in Embodiment 1 and Embodiment 2 respectively.

[0085] S7: The first pad 1112 and the second pad 411 are electrically connected by a bonding wire, and a plastic encapsulation material 5 is filled to encapsulate the image sensor chip 11 and the substrate 4 .

[0086] The image sensor chip 11 and the substrate 4 are electrically connected via metal bonding wires 6 .

[0087] like Fig.17 and Fig.18 As shown in FIG. 1 , the intermediate packaging structure after the image sensor chip 11 is plastic-sealed in the first embodiment and the second embodiment respectively.

[0088] In some other embodiments of the present invention, electrical connectors such as solder balls may be provided on the back side 112 of the image sensor chip 11, and a conductive structure such as a through silicon via may be formed inside the back side 112 to electrically connect the photosensitive area 1111 to the electrical connectors, so that the image sensor chip 11 may be electrically connected to the substrate 4 by flip-chip mounting.

[0089] The molding compound forms a molding layer 5 after filling. The molding compound can be a polymer composite material such as epoxy resin, polyimide, dry film, etc. The molding layer 5 provides physical support for the packaging structure and plays a sealing and protective role for the image sensor chip 11, the substrate 4 and the welding wires.

[0090] After the plastic encapsulation material is filled, the upper surface of the plastic encapsulation material is thinned by mechanical grinding or the like, so that the upper surface of the plastic encapsulation material and the upper surface of the transparent cover plate 21 are flush with each other.

[0091] S8: a welding protrusion 421 is provided on the second surface 42 of the substrate 4 opposite to the first surface 41 thereof, and the welding protrusion 421 is electrically connected to the second welding pad 411 via an interconnection line located in the substrate 4 .

[0092] like Fig.19 and Fig. 20 As shown, they are the intermediate packaging structures after the substrate 4 in the first embodiment and the second embodiment is provided with welding protrusions 421 .

[0093] S9: cutting the substrate 4 to form a single packaging structure.

[0094] like Fig.21 and Fig. 22 As shown in FIG. 1 , the packaging structure of a single image sensor chip 11 in Embodiment 1 and Embodiment 2 are shown respectively.

[0095] In summary, the present invention first bonds the wafer-level transparent substrate and the support dam disposed thereon to the wafer, and then performs the process of cutting and etching the transparent substrate and the support dam. This allows all image sensor chips on the wafer to be sealed and protected at the same time in the early stage of the packaging process, thereby avoiding the operations of bonding the support dam and covering the transparent cover plate to the image sensor chips one by one, reducing the environmental cleanliness requirements in the subsequent process flow, thereby effectively improving the production yield and reducing costs.

[0096] It should be understood that although this specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each implementation mode may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

[0097] The series of detailed descriptions listed above are only specific descriptions of feasible implementation methods of the present invention and are not intended to limit the scope of protection of the present invention. All equivalent implementation methods or changes that do not deviate from the technical spirit of the present invention should be included in the scope of protection of the present invention.

Claims

1. A wafer-level packaging method for an image sensor chip, characterized in that: Includes steps: A wafer is provided, and a plurality of regularly arranged image sensor chips are formed on the wafer; the image sensor chip comprises a photosensitive area and a first bonding pad located outside the photosensitive area and spaced a distance therefrom; Providing a wafer-level transparent substrate, and manufacturing support dams on the transparent substrate corresponding to the areas between the photosensitive areas of the adjacent image sensor chips on the wafer. Specifically, manufacturing a plurality of support dams on the transparent substrate corresponding to the areas between the adjacent photosensitive areas on the wafer, and exposing the first pads between the adjacent support dams; Pressing the surface of the transparent substrate on which the support dam is formed to the wafer; Removing the covering on the wafer cutting path, specifically, cutting the transparent substrate covering the cutting path and the first pad between adjacent photosensitive areas, cutting part of the support dam located below the transparent cover plate, forming a stepped structure on one side of the photosensitive area, a block-shaped notch is formed on the upper end of the side facing the first pad, and exposing the first pad located outside the photosensitive area, dividing the transparent substrate at the wafer level into a plurality of transparent cover plates, the transparent cover plates covering the photosensitive area, and dividing the support dam into a single frame structure surrounding the photosensitive area; The wafer is cut along the cutting paths to form individual image sensor chips.

2. The image sensor chip wafer level packaging method according to claim 1, characterized in that: "Carrying out pressing" specifically includes: An adhesive layer is arranged on the support dam, and the transparent substrate and the wafer are aligned and pressed together.

3. The image sensor chip wafer level packaging method according to claim 1, characterized in that: The transparent substrate is inorganic glass or organic glass.

4. The image sensor chip wafer level packaging method according to claim 1, characterized in that: After the wafer is cut to form a single image sensor chip, the process further includes the following steps: Providing a substrate, disposing the image sensor chip on a first surface of the substrate and electrically connecting the image sensor chip thereto; Filling the plastic packaging material to plastic-package the image sensor chip and the substrate; Disposing a welding protrusion on a second surface of the substrate relative to the first surface thereof; The substrate is cut to form individual packaging structures.

5. The image sensor chip wafer level packaging method according to claim 4, characterized in that: “Disposing the image sensor chip on the first surface of the substrate and electrically connecting it” specifically includes: Laminating the back surface of the image sensor chip to the first surface of the substrate; The lead wire electrically connects the first bonding pad and a second bonding pad located on the first surface of the substrate.

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