Semiconductor device

Abstract

A semiconductor device has a device substrate (1) in which a semiconductor circuit including two high-frequency amplifiers is formed, a cover substrate (2), and a conductive package frame (30) between the device substrate (1) and the cover substrate (2) that forms a space surrounding a region in which the semiconductor circuit is formed and performs airtight packaging. The package frame (30) is configured as a line of a 90-degree hybrid circuit or a line of a squirrel cage circuit.

Description

Technical Field

[0001] This application relates to a hollow-structured semiconductor device that performs high-frequency operations. Background Technology

[0002] Semiconductor chips sometimes malfunction due to electrode corrosion caused by atmospheric moisture, thus requiring packaging with an airtight structure. Furthermore, for semiconductor chips operating at high frequencies, electromagnetic shielding is required to prevent instability caused by external electromagnetic waves and unwanted radiation from the semiconductor itself. For such chip packaging materials, metal caps are typically formed on substrates like CuW, but this is expensive and contributes to cost increases. In contrast, in recent years, there has been a growing trend to reduce packaging costs by packaging semiconductor chips at the chip scale (CSP).

[0003] In conventional semiconductor devices with a hollow structure (cavity), the cavity is achieved by bonding the device substrate to the cover substrate using a packaging frame made of conductive material (see Patent Document 1), or by bonding the wall of the first package to the second package (see Patent Documents 2 and 3). The packaging frame or wall is installed only to achieve the cavity, and when a matching circuit is installed, it is configured to be arranged separately from the packaging frame or wall, inside the cavity.

[0004] Patent Document 1: International Publication No. WO2017 / 029822

[0005] Patent Document 2: Japanese Patent Application Publication No. 2003-234452

[0006] Patent Document 3: Japanese Patent Application Publication No. 2003-197863 Summary of the Invention

[0007] In conventional hollow semiconductor devices, matching circuits are placed on the cover substrate or package to realize the cavity in order to miniaturize the device and reduce the mounting area when mounting the device in a system. However, in semiconductor devices composed of two or more amplifiers side-by-side, such as Dougherty amplifiers, in addition to the matching circuits on the input and output sides of each amplifier, power distribution circuits are also required on the input side and power combining circuits on the output side. There is not enough space on the cover substrate to accommodate all the circuits. Therefore, the power distribution circuits, power combining circuits, etc., need to be constructed separately from the hollow semiconductor device, for example, on a resin substrate, resulting in a corresponding increase in the mounting area.

[0008] This application discloses a technique for solving the aforementioned problems, with the aim of further reducing the overall installation area of ​​the device with a simple structure.

[0009] The semiconductor device disclosed in this application includes: a device substrate having a semiconductor circuit including two high-frequency amplifiers; a cover substrate; and a package frame for a conductor, which forms a space between the device substrate and the cover substrate to enclose the area where the semiconductor circuit is formed and hermetically seals the package frame, which is configured as a 90-degree mixed circuit line.

[0010] Additionally, it includes: a device substrate having a semiconductor circuit containing two high-frequency amplifiers; a cover substrate; and a conductive encapsulation frame having a space formed between the device substrate and the cover substrate to encapsulate the area where the semiconductor circuit is formed, and the encapsulation frame being configured as a squirrel-cage circuit.

[0011] The effects of the invention

[0012] According to the semiconductor device disclosed in this application, the packaging frame used for hermetic packaging is also used as a component of a high-frequency circuit, thereby reducing the number of components in the semiconductor device and further reducing the overall mounting area of ​​the device compared to the past with a simple structure. Attached Figure Description

[0013] Figure 1 This is a top view showing the basic structure of the device substrate of the semiconductor device according to Embodiment 1.

[0014] Figure 2 This is a perspective view showing the basic structure of the semiconductor device according to Embodiment 1 with the device substrate and cover substrate separated.

[0015] Figure 3 This is a top view showing an example of the actual structure of the device substrate of the semiconductor device according to Embodiment 1.

[0016] Figure 4 This is a perspective view showing an example of the actual structure of the semiconductor device according to Embodiment 1 with the device substrate and cover substrate separated.

[0017] Figure 5 This is a top view showing the basic structure of the device substrate of the semiconductor device according to Embodiment 2.

[0018] Figure 6 This is a perspective view showing the basic structure of the semiconductor device according to Embodiment 2 with the device substrate and cover substrate separated.

[0019] Figure 7 This is a top view showing an example of the actual structure of the device substrate of the semiconductor device according to Embodiment 2.

[0020] Figure 8 This is a perspective view showing an example of the actual structure of the semiconductor device according to the embodiment, with the device substrate and the cover substrate separated. Detailed Implementation

[0021] Implementation method 1.

[0022] Figure 1 This is a top view of the device substrate 1 of the semiconductor device according to Embodiment 1, viewed from directly above, showing the internal structure of the semiconductor device. Figure 2 It is Figure 1 The device substrate 1 and the cover substrate 2 are shown in a perspective view, separated. The cover substrate 2 is used to cover the device substrate 1 to achieve an airtight seal. A semiconductor circuit, mainly composed of transistors 50, 51, etc., is mounted on the device substrate 1. A conductive device substrate-side encapsulation frame 301 is formed on the periphery of the surface where the semiconductor circuit is mounted. Bumps are formed on the semiconductor circuit at locations where connection with parts other than the circuit on the device substrate 1 is required. Figure 1 , Figure 2 In the example, a bump 110 is formed on the gate electrode of transistor 50, and a bump 140 is formed on the drain electrode; a bump 120 is formed on the gate electrode of transistor 51, and a bump 130 is formed on the drain electrode. The source electrode of each transistor is connected to a ground electrode formed on the back side via a through-hole that connects the surface and back side of the device substrate 1. Transistors 50 and 51 each constitute a high-frequency amplifier. That is, Figure 1 The semiconductor device with the structure has two high-frequency amplifiers.

[0023] On the other hand, ports 7, 8, 9, and 10 are formed on the cover substrate 2. These ports are composed of electrode pads and conductive passages. The electrode pads are disposed on the cover substrate 2, and the conductive passages connect the surface and back of the cover substrate 2. Furthermore, a conductive cover substrate-side package frame 302 is formed on the peripheral portion of the cover substrate 2 that is joined to the device substrate-side package frame 301 of the device substrate 1, i.e., on the device substrate 1 side surface (back side). Ports 11, 12, 13, and 14 are also formed thereon. Moreover, ports 7, 8, 9, and 10 formed on the peripheral portion are electrically connected to the cover substrate-side package frame 302 but do not penetrate the cover substrate-side package frame 302.

[0024] The device substrate-side package frame 301 and the cover substrate-side package frame 302 are hermetically bonded using a conductive bonding material such as solder. This hermetically bonded connection creates a space between the device substrate 1 and the cover substrate 2 with a thickness equal to the sum of the thickness of the device substrate-side package frame 301 (e.g., 20 μm) and the thickness of the cover substrate-side package frame 302 (e.g., 2 μm). This space, i.e., the area where semiconductor circuits such as transistors 50 and 51 are mounted, can be hermetically sealed. Since the joint formed by bonding the device substrate-side package frame 301 and the cover substrate-side package frame 302 functions as a package frame, this joint is called a package frame 30. The package frame 30 can be thicker than the cover substrate-side package frame 302, for example, with a thickness of 2 μm for the device substrate-side package frame 301 and 20 μm for the cover substrate-side package frame 302. As long as the package frame 30 is provided between the device substrate 1 and the cover substrate 2, a space is formed in the area where semiconductor circuits are mounted, thus constructing a hollow semiconductor device. Figure 2 As shown by the dashed arrow in the oblique view, port 7 is provided on the cover plate 2. Figure 1 as well as Figure 2 The port portion 70, indicated by the black dot 70, is electrically connected to the package frame 30. Similarly, port 8 at port portion 80, port 9 at port portion 90, and port 10 at port portion 100 are each electrically connected to the package frame 30. In addition, port 11 of the cover substrate 2 is connected to bump 110, port 12 to bump 120, port 13 to bump 130, and port 14 to bump 140 of the device substrate 1.

[0025] In this application, the package frame 30 is used as a high-frequency circuit component such as a line for transmitting high frequencies. When the package frame 30 is used as a line, the impedance of the line is determined by the dielectric constant and thickness of the device substrate 1 and the cover substrate 2, and the width of the conductor constituting the line, i.e., the package frame 30. The portion of the package frame 30 that is a bonding body, from the port portion 70 electrically connected to the port 7 to the port portion 100 electrically connected to the port 10, indicated by reference numeral 31, is designated as package frame portion 31. Similarly, the portion from the port portion 70 to the port portion 80 is designated as package frame portion 32, the portion from the port portion 80 to the port portion 90 is designated as package frame portion 33, and the portion from the port portion 90 to the port portion 100 is designated as package frame portion 34. For example, when the design characteristic impedance of the semiconductor circuit line is set to Z0, the characteristics of each package frame portion are set as follows. For the portions of package frame portion 31 and package frame portion 33, the width is adjusted so that the impedance is Z0 / √2, and the length of the line is adjusted to be λ / 4 at the operating frequency of the semiconductor circuit. Regarding the package frame portion 32 and package frame portion 34, the width is adjusted so that the impedance becomes Z0, and the line length is adjusted to become λ / 4 at the operating frequency. The structure formed by the package frame 30 having the above-described package frame portion structure and the four ports 7, 8, 9 and 10 connected to the package frame 30 is a structure known as a 90-degree hybrid circuit.

[0026] In practical use, such as Figure 3 as well as Figure 4 As shown, port 70, or port 7, is grounded together with, for example, the source electrode of a transistor via a resistor 19 provided on the cover substrate 2 side. Furthermore, the configuration is such that ports 9 and 12 are connected via a matching circuit formed on, for example, the surface or back surface of the cover substrate 2, and ports 10 and 11 are connected via a matching circuit formed on, for example, the surface or back surface of the cover substrate 2, with high frequency input from port 8. Not limited to this, the configuration can also be as follows: any one of ports 7, 8, 9, and 10 is designated as the port for inputting high frequency; the port from which the clockwise and counterclockwise high frequencies transmitted from that input port are in opposite phase (180 degrees out of phase) is grounded via a resistor; and matching circuits are inserted between one of the other two ports and port 11, and between the other port and port 12, for connection.

[0027] For example, such as Figure 3 as well as Figure 4As shown, when port 7 is grounded via resistor 19 and a high frequency is input from port 8, high frequencies with a 90-degree phase difference and equal power are distributed to ports 9 and 10. That is, the package frame 30, as the bonding body, is formed such that the width and length of package frame portions 31, 32, 33, and 34 satisfy the aforementioned conditions. Ports 7, 8, 9, and 10 are directly connected to the package frame 30, thereby maintaining an airtight state and achieving a hollow structure, and allowing the package frame itself to function as a component of the 90-degree mixing circuit. Furthermore, port 14, connected to the drain of transistor 50, and port 13, connected to the drain of transistor 51, become ports for extracting the high frequencies amplified by the transistors.

[0028] The above describes a structure where ports 7, 8, 9, and 10 are provided on the cover substrate 2, and these ports are connected to resistors and matching circuits provided on the cover substrate 2. However, it is also possible to configure the structure as follows: by placing the matching circuits, etc., on the device substrate 1, ports other than those for high-frequency input are not provided; instead, a resistor is connected to the device substrate 1, for example. Figure 3 The port portion 70 of the device substrate side package frame 301 shown has a matching circuit connected between the port portion 90 and the gate electrode of the transistor 51, and between the port portion 100 and the gate electrode of the transistor 50. Alternatively, the cover substrate 2 may not have a port connected to the package frame, but the package frame is connected to a matching circuit or the like provided on the device substrate 1. This is also the same structure described later.

[0029] The above connection example illustrates the use of the package frame 30 as a circuit component of a distributor, but the package frame 30 can also be used as a circuit component of a synthesizer. Figure 3 as well as Figure 4 In the structure shown, if high frequencies of the same frequency with a 90-degree phase difference are input to ports 9 and 10, the combined high frequency can be output from port 8. That is, by grounding port 7 via resistor 19, for example, by connecting port 14 and port 10 via a matching circuit, and connecting port 13 and port 9 via a matching circuit, it can be used as a combiner to power combine the high frequencies amplified by transistors 50 and 51, and the combined high frequency output can be obtained from port 8. The two high frequencies to be combined need to be high frequencies with a 90-degree phase difference at the locations of ports 9 and 10. However, it is not limited to this; by setting any one of ports 7, 8, 9, and 10 as the output high frequency port, inputting high frequencies with a 90-degree phase difference from two of the other three ports, and grounding the other port via a resistor, the combined high frequency can be obtained from the output port.

[0030] In the above configuration, the package frame 30 is used as a high-frequency circuit, and a structure with four ports connected to the package frame 30 is provided. This allows the circuit consisting of the package frame 30 and the four ports to function as a distributor distributing high frequencies to two high-frequency amplifiers or as a synthesizer combining high frequencies from two high-frequency amplifiers. However, this is not a limitation. For example, it is also possible to configure three high-frequency amplifiers in an area hermetically sealed by the package frame, having six ports connected to the package frame, thereby distributing high frequencies to the three high-frequency amplifiers or combining high frequencies from the three high-frequency amplifiers.

[0031] As described above, due to space constraints, semiconductor devices and distributors or synthesizers with hollow structures, which were previously installed separately, can now have their functionality as 90-degree mixing circuits added to the package frame itself. This significantly reduces the mounting area and the workload of installing the distributor or synthesizer. Furthermore, since functionality can be added simply by changing the mask used in the process, installation can be performed at a lower cost compared to purchasing external distributors or synthesizers. In particular, the higher the frequency band, such as the Ku band, the smaller the circuit size becomes, resulting in greater miniaturization compared to mounting it on an external substrate.

[0032] Implementation method 2.

[0033] Figure 5 This is a top view of the device substrate 1 of the semiconductor device according to Embodiment 2, viewed from directly above, showing the internal structure of the semiconductor device. Figure 6 It is Figure 5 The device substrate 1 and the cover substrate 2 are shown separately in a perspective view. The cover substrate 2 is used to cover the device substrate 1 to achieve an airtight seal. Similar to Embodiment 1, a semiconductor circuit, mainly consisting of transistors 50 and 51, is mounted on the device substrate 1. A conductive device substrate-side encapsulation frame 401 is formed on the surface where the semiconductor circuit is mounted. Bumps are formed on the semiconductor circuit at locations where connection with parts other than the circuit on the device substrate 1 is required. Figure 5 , Figure 6 In the example, a bump 110 is formed on the gate electrode of transistor 50, and a bump 140 is formed on the drain electrode; a bump 120 is formed on the gate electrode of transistor 51, and a bump 130 is formed on the drain electrode. The source electrode of each transistor is connected to a ground electrode formed on the back side via a passage that connects the surface and back side of the device substrate 1.

[0034] On the other hand, similar to Embodiment 1, ports 7, 8, 9, and 10 are formed on the cover substrate 2. These ports are composed of electrode pads and conductive passages, wherein the electrode pads are disposed on the cover substrate 2, and the conductive passages connect the surface and back of the cover substrate 2. Furthermore, a conductive cover substrate side package frame 402 is formed on the back of the cover substrate 2 corresponding to the device substrate side package frame 401 of the device substrate 1. Ports 11, 12, 13, and 14 are also formed. Ports 7, 8, 9, and 10 are electrically connected to the cover substrate side package frame 402 but do not penetrate it.

[0035] The device substrate-side package frame 401 and the cover substrate-side package frame 402 are hermetically bonded using a conductive bonding material such as solder. This hermetically bonded connection creates a space between the device substrate 1 and the cover substrate 2, the thickness of which is the sum of the thicknesses of the device substrate-side package frame 401 and the cover substrate-side package frame 402. This space, i.e., the area where semiconductor circuits such as transistors 50 and 51 are mounted, is hermetically sealed. Since the bond obtained by joining the device substrate-side package frame 401 and the cover substrate-side package frame 402 functions as a package frame, this bond is referred to as the package frame 40. For example, in... Figure 6 As shown by the dashed arrow in the oblique view, port 7 is provided on the cover plate 2. Figure 5 as well as Figure 6 The port portion 70, indicated by the black dot 70, is electrically connected to the package frame 30. Similarly, port 8 at port portion 80, port 9 at port portion 90, and port 10 at port portion 100 are each electrically connected to the package frame 40. In addition, port 11 of the cover substrate 2 is connected to bump 110, port 12 to bump 120, port 13 to bump 130, and port 14 to bump 140 of the device substrate 1.

[0036] The package frame 40 is used as a high-frequency circuit and is formed with the following characteristics. The portion of the package frame 40 from port 70 connected to port 7 to port 100 connected to port 10, as indicated by reference numeral 41, is designated as package frame portion 41. Similarly, the portion from port 70 to port 80 is designated as package frame portion 42, the portion from port 80 to port 90 is designated as package frame portion 43, and the portion from port 90 to port 100 is designated as package frame portion 44. Regarding the package frame portions 41, 42, and 43 of the package frame 40, for example, when the design characteristic impedance of the semiconductor circuit is set to Z0, the width is adjusted to make the impedance... Furthermore, the length of the line is adjusted to be λ / 4 at the operating frequency of the semiconductor circuit. Regarding the package frame portion 44 within the package frame 40, when the characteristic impedance of the line is set to Z0, the width is adjusted to make the impedance... Furthermore, the length of the circuit is adjusted to be λ×(3 / 4) at the operating frequency. The structure formed by the package frame 40 with the above-described package frame structure and the four ports 7, 8, 9, and 10 electrically connected to the package frame 40 is a structure known as a rat-race circuit. In addition, since the length of the package frame portion 44 is long, the circuit is configured as a folded-back circuit as shown in the figure. In this structure, the space between the device substrate 1 and the cover substrate 2, which is hermetically sealed by the package frame 40, can also be hermetically sealed in the area where the transistors 50 and 51 are mounted.

[0037] In practical use, such as Figure 7 as well as Figure 8 As shown, port 10, or port 10, is connected to a ground electrode on the back side of the device substrate 1, for example, via a resistor 24 provided on the cover substrate 2 side, thereby grounding. Alternatively, ports 9 and 12 are connected via a matching circuit, ports 7 and 11 are connected via a matching circuit, and high frequencies are input from port 8. Not limited to this, it can also be configured such that any one of ports 7, 8, 9, and 10 is grounded via a resistor, and matching circuits are inserted between any one of the other three ports and port 11, and between any other port and port 12, to input high frequencies from the remaining ports.

[0038] For example, such as Figure 7 as well as Figure 8 As shown, when port 10 is grounded via resistor 24 and a high frequency is input from port 8, high frequencies with the same phase and equal power are distributed to ports 7 and 9. That is, the width and length of each package portion of the package frame 40 are configured to satisfy the aforementioned conditions. Ports 7, 8, 9, and 10 are directly connected to the package frame 40, thereby maintaining an airtight state and achieving a hollow structure. The package frame 40 itself functions as a component of the squirrel-cage circuit. Furthermore, port 14, connected to the drain of transistor 50, and port 13, connected to the drain of transistor 51, become ports for extracting the high frequencies amplified by the transistors.

[0039] The above connection example demonstrates the use of the package frame 40 as a circuit component of a distributor; it can also be used as a circuit component of a synthesizer. By grounding port 10 via resistor 24, for example, by connecting ports 7 and 14 via a matching circuit, and ports 9 and 13 via a matching circuit, it can be used as a synthesizer to power combine the high frequencies amplified by transistors 50 and 51, and the power-combined high-frequency output can be obtained from port 8. The two high frequencies to be combined need to be high frequencies with equal phase at the locations of ports 7 and 9 connected to the package frame 40. However, it is not limited to this; by setting any one of ports 7, 8, 9, and 10 as the output high-frequency port, inputting high frequencies with the same phase or a phase difference of 180 degrees from two of the other three ports in a structurally matched manner, and grounding the other port via a resistor, the power-combined high frequency can be obtained from the output port.

[0040] Due to space constraints, traditionally separate hollow-structure semiconductor devices and distributors or synthesizers can now have their mounting area significantly reduced and the workload of installing distributors or synthesizers decreased by adding functionality as a squirrel-cage circuit to the package itself. Furthermore, since functionality can be added simply by changing the process mask, installation can be performed at a lower cost compared to purchasing external distributors or synthesizers. In particular, the higher the frequency band, such as the Ku band, the smaller the circuit size becomes, resulting in greater miniaturization compared to mounting on an external substrate.

[0041] In Embodiment 1, an example of a 90-degree hybrid circuit consisting of a package frame 30 and four ports was described. In Embodiment 2, an example of a squirrel-cage circuit consisting of a package frame 40 and four ports was described. However, it is not limited to these examples. High frequencies can also be transmitted to the package frame, causing the package frame to operate as a high-frequency circuit component other than a 90-degree hybrid circuit or a squirrel-cage circuit.

[0042] Thus, according to the semiconductor device disclosed in this application, since the package frame operates as a high-frequency circuit component, it is possible to form a structure in which the package frame is also used as a high-frequency circuit component that is mounted separately from the package frame, thereby achieving the effect of miniaturizing the semiconductor device.

[0043] This application describes various exemplary embodiments and examples, but the various features, methods, and functions described in one or more embodiments are not limited to application to a specific embodiment and can be applied to embodiments individually or in various combinations. Therefore, countless modifications not illustrated are conceivable within the scope of the technology disclosed in this application. For example, these include cases where at least one structural element is modified, added, or omitted, and further include cases where at least one structural element is extracted and combined with structural elements of other embodiments.

[0044] Explanation of the label

[0045] 1. Device substrate, 2. Cover substrate, 7, 8, 9, 10 ports, 30, 40 package frames, 50, 51 transistors.

Claims

1. A semiconductor device comprising: A device substrate having a semiconductor circuit including two high-frequency amplifiers; a cover substrate; and a packaging frame for a conductor, which hermetically seals a space between the device substrate and the cover substrate surrounding the region where the semiconductor circuit is formed. The semiconductor device is characterized by, The encapsulation frame is used as a line with characteristic impedance for high-frequency transmission, and is configured as a 90-degree hybrid circuit. The cover substrate has a port of conductive material that connects the surface and the back side through a passage portion. The port is electrically connected to the packaging frame, and high frequency is transmitted to the packaging frame via the port. For each section of the package frame, defined by the locations where the ports are connected, the width of the package frame varies independently according to the desired characteristic impedance. The encapsulation frame is a device substrate-side encapsulation frame and a cover substrate-side encapsulation frame. The cover substrate-side encapsulation frame and the device substrate-side encapsulation frame are hermetically bonded by a conductive bonding material. A conductive passage portion is formed on the cover substrate, which is a conductive material that passes through the surface and back of the cover substrate. The passage portion is electrically connected to the cover substrate-side encapsulation frame or the device substrate-side encapsulation frame. The passage portion does not pass through the cover substrate-side encapsulation frame.

2. The semiconductor device according to claim 1, characterized in that, The encapsulation frame is configured as a circuit component of the distributor.

3. The semiconductor device according to claim 1, characterized in that, The encapsulation frame is configured as a circuit component of the synthesizer.

4. The semiconductor device according to claim 1, characterized in that, It has 4 of the aforementioned ports.

5. A semiconductor device comprising: A device substrate having a semiconductor circuit including two high-frequency amplifiers; a cover substrate; and a packaging frame for a conductor, which hermetically seals a space between the device substrate and the cover substrate surrounding the region where the semiconductor circuit is formed. The semiconductor device is characterized by, The encapsulation frame is used as a line with characteristic impedance for high-frequency transmission, and is configured as a squirrel-cage circuit. The cover substrate has a port of conductive material that connects the surface and the back side through a passage portion. The port is electrically connected to the packaging frame, and high frequency is transmitted to the packaging frame via the port. The longest interval of the encapsulation frame located between adjacent ports contains the folded-back line. The encapsulation frame is a device substrate-side encapsulation frame and a cover substrate-side encapsulation frame. The cover substrate-side encapsulation frame and the device substrate-side encapsulation frame are hermetically bonded by a conductive bonding material. A conductive passage portion is formed on the cover substrate, which is a conductive material that passes through the surface and back of the cover substrate. The passage portion is electrically connected to the cover substrate-side encapsulation frame or the device substrate-side encapsulation frame. The passage portion does not pass through the cover substrate-side encapsulation frame.

6. The semiconductor device according to claim 5, characterized in that, The encapsulation frame is configured as a circuit component of the distributor.

7. The semiconductor device according to claim 5, characterized in that, The encapsulation frame is configured as a circuit component of the synthesizer.

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