A chip varistor and a manufacturing method thereof

Abstract

The present invention discloses a chip varistor and a manufacturing method thereof. The specific manufacturing steps of the manufacturing method are as follows: the first step: firstly prepare a workpiece including a chip, an electrode and a pin, wherein the electrode is an electrode layer formed on the upper and lower surfaces of the chip, and the pin is welded on the electrode layer; the second step: then preheat the prepared workpiece; the third step: then adhere epoxy resin powder to the surface of the workpiece, so that the epoxy resin powder completely covers the chip, and at the same time, the epoxy resin powder covers part of the pins, and the epoxy resin powder adhered to the surface of the workpiece forms a coating, and the coating is leveled; the fourth step: before the epoxy resin powder is cured, the coating is flattened to form a plane on the upper and lower sides, and finally a chip varistor product is obtained. The manufacturing method reduces the amount of encapsulation material, saves mold opening costs, and improves the surface flatness of the chip varistor through automated production by leveling equipment.

Description

Technical Field

[0001] The present invention relates to the technical field of varistors, and in particular to a chip varistor and a manufacturing method thereof. Background Art

[0002] When the current plug-in varistor is configured on the circuit board, the overall height of the plug-in varistor plus the pins is relatively high, so it is impossible to achieve flattening and thinning of the circuit board product. At the same time, due to the poor flatness of the upper surface of the plug-in varistor body, the mechanical suction nozzle has poor contact with the upper surface of the plug-in varistor, and it is impossible to perform automatic suction, which leads to poor production speed.

[0003] In order to reduce the overall height of the plug-in type varistor, the pins of the plug-in type varistor are currently bent to form a chip type varistor, which can reduce the overall height of the varistor. However, the pins of the chip type varistor are welded to the electrodes, and after coating and curing, the encapsulation layer (epoxy resin) will bulge along the shape of the pins, making the surface of the encapsulation layer uneven, which in turn makes it difficult to automatically absorb and poorly fits the circuit board when it is subsequently mounted.

[0004] In order to solve the surface flatness problem of chip varistors, the industry usually adopts potting sealing or integral mold forming. However, potting sealing consumes a lot of raw materials, which increases costs; integral mold forming has high mold opening costs, and the number of components that each mold can accommodate is limited, resulting in poor production speed. Summary of the invention

[0005] The technical problem to be solved by the present invention is: in order to overcome the problems existing in the prior art, the present invention provides a chip varistor and a manufacturing method thereof, which reduces the amount of encapsulation material used, saves mold opening costs, and improves the surface flatness of the chip varistor through automated production with leveling equipment.

[0006] The technical solution adopted by the present invention to solve its technical problem is: a chip varistor, including a varistor body and an epoxy resin insulating encapsulation layer wrapping the varistor body, the epoxy resin insulating encapsulation layer is a coating formed by epoxy resin powder attached to the surface of the varistor body and sequentially subjected to leveling and flattening treatments; the pins in the varistor body are first bent and formed and then welded to the electrode layer, the bent portion of the pins includes a first bent edge, a second bent edge and a third bent edge connected in sequence end to end, the first bent edge is joined to the electrode layer, and the third bent edge is joined to the external circuit board.

[0007] More specifically, in the above technical solution, the first bending edge and the third bending edge are both flat.

[0008] More specifically, in the above technical solution, the epoxy resin insulating encapsulation layer covers the chip to form an upper surface and a lower surface, the upper surface is parallel to the lower surface, and the sum of the thickness of the chip and the upper and lower epoxy resin insulating encapsulation layers is greater than 2.5 mm.

[0009] More specifically, in the above technical solution, the third bent edge is parallel to and coplanar with the lower surface.

[0010] More specifically, in the above technical solution, the flatness of the upper surface and the lower surface is less than 0.1 mm.

[0011] A method for manufacturing a chip varistor, the specific manufacturing steps are as follows:

[0012] Step 1: First, prepare a workpiece including a chip, an electrode and a pin, wherein the electrode is an electrode layer formed on the upper and lower surfaces of the chip, and the pin is welded on the electrode layer;

[0013] The second step: then preheating the prepared workpiece;

[0014] The third step: attaching epoxy resin powder to the surface of the workpiece, so that the epoxy resin powder completely covers the chip, and at the same time, the epoxy resin powder covers part of the pins, the epoxy resin powder attached to the surface of the workpiece forms a coating, and the coating is leveled;

[0015] Step 4: Flatten the coating before the epoxy resin powder is cured to form a flat surface from top to bottom, and finally obtain a finished chip varistor.

[0016] More specifically, in the above technical solution, the resin glass transition temperature of the epoxy resin powder is 80°C to 100°C.

[0017] More specifically, in the above technical solution, in the fourth step, the coating has an initial stage of cross-linking reaction at the initial stage of curing, and a flattening device is used to flatten the coating in the initial stage of cross-linking reaction.

[0018] More specifically, in the above technical solution, the flattening treatment is performed within 0s to 120s after the coating is leveled.

[0019] More specifically, in the above technical solution, the flattening treatment is performed within 0s to 60s after the coating is leveled.

[0020] The beneficial effects of the present invention are as follows: the present invention provides a chip varistor and a manufacturing method thereof, which reduces the amount of encapsulation material used, saves mold opening costs, and improves the surface flatness of the chip varistor through automated production with leveling equipment. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0022] Figure 1 It is a structural diagram of a chip varistor.

[0023] The numbers in the accompanying drawings are: 1, first bending edge; 2, second bending edge; 3, third bending edge; 4, upper surface; 5, lower surface; 6, circuit board. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0025] See Figure 1 A chip varistor includes a varistor body and an epoxy resin insulating encapsulation layer wrapping the varistor body, wherein the epoxy resin insulating encapsulation layer is a coating formed by epoxy resin powder attached to the surface of the varistor body and sequentially subjected to leveling and flattening treatments.

[0026] Among them, the pins in the varistor body are first bent into shape and then welded to the electrode layer. Compared with the pins being first welded to the electrode layer and then folded after coating, the stress generated when folding the pins can avoid the impact on the chip and coating and causing damage.

[0027] The bent portion of the pin includes a first bent edge 1, a second bent edge 2, and a third bent edge 3 connected in sequence from head to tail, the second bent edge 2 is between the first bent edge 1 and the third bent edge 3, the first bent edge 1 is bonded to the electrode layer, and the third bent edge 3 is bonded to the external circuit board 6. The first bent edge 1 and the third bent edge 3 are both flat. The flat shape of the first bent edge 1 can increase the contact area with the electrode layer and increase the flatness of the upper surface of the chip, reducing the amount of coating powder. The flat shape of the third bent edge 3 can increase the contact area with the circuit board 6 and increase the bonding property with the circuit board 6.

[0028] The epoxy resin insulation encapsulation layer covers the chip to form an upper surface 4 and a lower surface 5. The upper surface 4 and the lower surface 5 are flat and parallel to each other, and the sum of the thickness of the chip and the upper and lower epoxy resin insulation encapsulation layers is greater than 2.5 mm to meet safety requirements. The flatness of the upper surface 4 and the lower surface 5 is less than 0.1 mm. After the chip covered with the epoxy resin insulation encapsulation layer is placed on the board, the upper surface 4, the lower surface 5 and the circuit board 6 are parallel to each other, and the lower surface 5 is in contact with the circuit board 6. The third bending edge 3 is parallel to the lower surface 5 and coplanar.

[0029] It should be noted that: when epoxy resin powder with poor heat resistance and epoxy resin powder with insufficient internal curing polymerization are selected, the manufactured chip varistor is bonded to the external circuit board 6, and the high temperature during reflow soldering causes the epoxy resin powder to undergo secondary curing. The high temperature generated can easily cause the coating covering the pins to fluidize again and produce depressions, resulting in poor coating flatness. In severe cases, it may even cause the pins to be exposed, which in turn causes poor product flatness.

[0030] Therefore, the present invention improves the heat resistance of epoxy resin powder, and increases the resin glass transition temperature of epoxy resin powder from the original 75°C to 80°C to 100°C. Preferably, the resin glass transition temperature of epoxy resin powder is increased to 90°C to 100°C.

[0031] Alternatively, in the present invention, a heat-resistant filler is added to the epoxy resin powder. The heat-resistant filler can be mica powder or the like, which can improve the heat resistance of the epoxy resin powder.

[0032] The test experiment of epoxy resin coating is as follows:

[0033]

[0034] The manufacturing method of the chip varistor has the following specific manufacturing steps:

[0035] The first step: first prepare a workpiece including a chip, electrodes and pins, the electrodes are electrode layers formed on the upper and lower surfaces of the chip, and the pins are welded on the electrode layers.

[0036] The second step: then preheat the prepared workpiece at a temperature of 140°C to 170°C.

[0037] The third step: Epoxy resin powder is applied to the surface of the workpiece to completely cover the chip and some pins. The epoxy resin powder applied to the surface of the workpiece forms a coating, and the coating is leveled. The leveling time is 45s to 55s. The workpiece can be laid flat to level it. The powder coating will not produce sag like a liquid coating. It should be noted that the workpiece surface can be coated with epoxy resin powder multiple times to thicken the epoxy resin coating to make the pin protrusions flat.

[0038] Step 4: Finally, preheat the workpiece and / or the leveling equipment. Specifically, the workpiece can be preheated separately, or the leveling equipment can be preheated separately. Of course, both the workpiece and the leveling equipment can be preheated. The preheating temperature is 110°C to 170°C. The coating has concave and convex surfaces due to the characteristics of the workpiece body. Before the epoxy resin powder is cured, the coating is flattened to form a plane from top to bottom, and finally a finished chip varistor is obtained.

[0039] There is an initial stage of cross-linking reaction in the initial stage of epoxy resin curing, that is, a flattening device is used to flatten the epoxy resin in the initial stage of cross-linking reaction. The flattening device is specially designed. The study of the initial stage of cross-linking reaction of epoxy resin is extremely important. Specifically, the flattening treatment is carried out within 0s to 120s after the coating is leveled, preferably, the flattening treatment is carried out within 0s to 60s.

[0040] The above are only preferred specific implementation modes of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical solutions and inventive concepts of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.

Claims

1. A method for manufacturing a chip varistor, characterized in that: The chip varistor comprises a varistor body and an epoxy resin insulating encapsulation layer that encapsulates the varistor body, wherein the epoxy resin insulating encapsulation layer is a coating formed by epoxy resin powder adhering to the surface of the varistor body and undergoing leveling and flattening treatments in sequence; the pins in the varistor body are first bent and formed and then welded to the electrode layer, the bent portion of the pins comprising a first bent edge (1), a second bent edge (2) and a third bent edge (3) that are connected in sequence end to end, the first bent edge (1) being bonded to the electrode layer, the third bent edge (3) being bonded to the electrode layer, and the second bent edge (2) being bonded to the electrode layer. The bent edge (3) is joined to an external circuit board (6); the epoxy resin insulating encapsulation layer covers the chip to form an upper surface (4) and a lower surface (5); the third bent edge (3) is parallel to and coplanar with the lower surface (5); the first bent edge (1) and the third bent edge (3) are both flat; the upper surface (4) is parallel to the lower surface (5), and the sum of the thicknesses of the chip and the upper and lower epoxy resin insulating encapsulation layers is greater than 2.5 mm; the flatness of the upper surface (4) and the lower surface (5) is less than 0.1 mm; The specific manufacturing steps of the chip varistor are as follows: Step 1: First, prepare a workpiece including a chip, an electrode and a pin, wherein the electrode is an electrode layer formed on the upper and lower surfaces of the chip, and the pin is welded on the electrode layer; The second step: then preheating the prepared workpiece; The third step: attaching epoxy resin powder to the surface of the workpiece, so that the epoxy resin powder completely covers the chip, and at the same time, the epoxy resin powder covers part of the pins, the epoxy resin powder attached to the surface of the workpiece forms a coating, and the coating is leveled; Step 4: Flatten the coating before curing the epoxy resin powder to form a flat surface up and down, and finally obtain a finished chip varistor; The resin glass transition temperature of the epoxy resin powder is 90°C to 100°C; In the fourth step, the coating has an initial stage of cross-linking reaction at the initial stage of curing, and a flattening device is used to flatten the coating in the initial stage of cross-linking reaction.

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