Transmission interface error handling method and related error handling device
By introducing a controller into a high-speed interface transmission system, detecting and handling errors in direct and indirect interfaces, the problem of insufficient error recovery mechanism in the existing technology is solved, and the stable recovery of the system and the improvement of user experience is achieved.
Patent Information
- Application Number
- CN201910505253.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-06-12
- Publication Date
- 2025-04-11
- Estimated Expiration
- 2039-06-12
AI Technical Summary
The existing technology lacks an effective error recovery mechanism, which causes transmission between high-speed interfaces to fail to recover normally when an error occurs, which may cause the program to be stuck or timed out, causing inconvenience to users.
By introducing a controller into the transmission interface, the errors in the direct interface and the indirect interface are detected, and the errors in the indirect interface are directly processed without affecting the main control terminal. If it cannot be processed, the error event will be returned to the master.
It realizes that the high-speed interface can be restored to normal state when there is a transmission error without a stuck situation, improving the stability and user experience of the system.
Smart Images

Figure CN112083977B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to transmission between multiple devices, and in particular to an error handling method for a transmission interface. Background Art
[0002] Based on convenience and practicality, more and more products are now integrating two or more high-speed interfaces, such as universal serial bus (USB) to peripheral component interconnect express (PCIE), USB to serial advanced technology attachment (SATA), PCIE device to PCIE host and other conversion methods. The transmission between these high-speed interfaces is achieved through a control circuit that can be compatible with and convert two different interfaces. In the absence of errors, the transmission between the above high-speed interfaces can operate normally, but when an error occurs, although these different interfaces have their own error recovery mechanism (Error Recovery mechanism), there is no clear way to integrate the different error reporting mechanisms so that the master (command master) (can also be understood as the upper layer, host end) can be integrated. As a result, the program often freezes or times out due to the lack of an appropriate error debugging mechanism or reporting mechanism, causing great inconvenience to the user.
[0003] In summary, current interface transmission products lack a good error recovery mechanism to integrate two or more high-speed interfaces into a single product. Therefore, a novel error recovery mechanism is needed to properly solve the above problems. Summary of the Invention
[0004] One of the objectives of the present invention is to provide a recovery mechanism at a high-speed interface to solve the problems encountered in the prior art without causing side effects.
[0005] One of the objectives of the present invention is to provide a high-speed interface recovery mechanism. Through this error recovery mechanism, the high-speed interface can be restored to a normal state when an error occurs in transmission, and a deadlock situation will not occur.
[0006] An embodiment of the present invention provides an error handling method for a transmission interface, wherein the transmission interface is used to connect a first device and a second device to perform data transmission between the first device and the second device, wherein the connection type between the first device and the transmission interface is a direct interface (DI), and the connection type between the second device and the transmission interface is an indirect interface (II). The error handling method includes: when an error is detected on the direct interface, reporting an error event to a host end of the first device; when an error is detected on the indirect interface, attempting to directly handle the error without informing the host end of the error; and if it is determined that the error cannot be handled, reporting another error event to the host end.
[0007] One embodiment of the present invention provides an error handling architecture comprising a first device, a second device, and a transmission interface. The first device comprises a first command interface, and the second device comprises a second command interface. The transmission interface is used to connect the first and second devices for data transmission between the first and second devices, and the transmission interface comprises a controller, a third command interface, and a fourth command interface. The transmission interface is used to connect the first and second devices for data transmission between the first and second devices, wherein the third command interface is used to connect to the first command interface to form a direct interface (DI), and the fourth command interface is used to connect to the second command interface to form an indirect interface (II). When the controller detects an error on the direct interface, it reports an error event to a host of the first device. When the controller detects an error on the indirect interface, it attempts to directly handle the error without notifying the host of the error. If the controller determines that the error cannot be handled, it reports another error event to the host. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 FIG. 4 is a schematic diagram of a high-speed interface adapter architecture according to an embodiment of the present invention.
[0009] Figure 2 FIG. 1 is a schematic diagram of an architecture for USB and PCIE transmission according to an embodiment of the present invention.
[0010] Figure 3 Flowchart of a method for error handling in a transmission interface according to an embodiment of the present invention.
[0011] Explanation of symbols
[0012] 100 high-speed interface switching architecture
[0013] 10, 20, 10', 20' devices
[0014] 30, 30' instruction conversion unit
[0015] 12, 22, 32, 33 command interface
[0016] 14, 24, 34 controllers
[0017] 300 Error Handling Method
[0018] Steps 301-314 DETAILED DESCRIPTION
[0019] Certain words are used in the specification and claims to refer to specific components. It should be understood by those skilled in the art that hardware manufacturers may use different terms to refer to the same component. This specification and claims do not use differences in name as a way to distinguish components, but rather use differences in the functions of the components as the criterion for distinction. The word "including" mentioned throughout the specification and claims is an open-ended term and should be interpreted as "including but not limited to". In addition, the word "coupled" here includes any direct and indirect electrical connection means. Therefore, if the text describes a first device coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means.
[0020] Please refer to Figure 1 , Figure 1 FIG. 1 is a schematic diagram of a high-speed interface adapter architecture 100 according to an embodiment of the present invention. Figure 1 As shown, devices 10 and 20 are connected via a command conversion unit (CCU) 30, which serves as a direct interface for receiving commands. The transmission method between the command interface 12 of device 10 and the command interface 32 of the CCU 30 is called a direct interface (DI), while the transmission method between the command interface 22 of device 20 and the command interface 33 of the CCU 30 is called an indirect interface (II). Furthermore, devices 10 and 20 include controllers 14 and 24, respectively, for performing basic processing.
[0021] For a better understanding, device 10 may be a USB device, and device 20 may be a PCIE device, such as a hard drive or solid state drive (SSD). In the prior art, when an abnormality occurs in the transmission between the command conversion unit 30 and the PCIE end, the USB command master (not shown) can only detect the status of the USB end and therefore cannot determine that the abnormality occurred on the PCIE end. If the command master simply determines that there is no error on the USB end, it does not know how to correct the abnormality. Consequently, the lack of an appropriate error correction or reporting mechanism often causes the program to freeze or time out, causing great inconvenience to the user. Please note that the command master can also be understood as an upper-layer component or host.
[0022] The error recovery mechanism of the present invention can be divided into the following two cases:
[0023] A. When an exception occurs in the direct interface, it is immediately reported to the USB host, which then handles the error.
[0024] B. When an error occurs on the indirect interface, the instruction conversion unit 30 is responsible for handling it and resolving the issue without the host discovering the error. If the instruction conversion unit 30 is unable to resolve the issue, the indirect interface generates an error message and provides it to the direct interface. The direct interface is then responsible for reporting it back to the host, which then handles the error accordingly.
[0025] by Figure 1 For example, assuming that the host on the device 10 sends a command to the command conversion unit 30 through the direct interface, and the direct interface finds an error after receiving the command, it directly reports it to the host, and the host handles the error.
[0026] In another example, assume that the host on device 10 is able to send a command to command conversion unit 30 via a direct interface. The direct interface does not detect any errors upon receiving the command. Later, when command conversion unit 30 sends the command to an indirect interface, the host on device 20 (not shown) detects an error and reports it to the indirect interface. The command conversion unit then controls the direct interface to prevent the host on device 10 from detecting any problems (e.g., by first reporting a normal status to the host). The indirect interface then corrects the error according to the specifications of command interface 22 on device 20. If the problem with the indirect interface can be resolved by both the command conversion unit and command interface 22 on device 20, the direct interface is responsible for reporting a normal status to the host on device 10. If the problem with the indirect interface cannot be resolved by both the command conversion unit and command interface 22 on device 20, the indirect interface generates an error status, which the direct interface is responsible for transmitting to the host on device 10.
[0027] Please refer to Figure 2 , Figure 2 Figure 2 is a schematic diagram of an architecture 200 for USB and PCIE transmission according to an embodiment of the present invention, in which a command conversion unit 30' acts as a bridge between a USB device 10' and a PCIE device 20'. The PCIE device 20' can be an SSD (hereinafter referred to as the PCIE device 20'). The host of the USB device 10' (hereinafter referred to as the USB host) and the command conversion unit 30' (hereinafter referred to as the bridge) communicate via BOT / UASP, and the command conversion unit 30' and the SSD communicate via NVMe / AHCI.
[0028] When the USB host sends a SCSI command to the SSD, it is encapsulated into a USB command via UASP / BOT and then transmitted to the USB side of the bridge (i.e., the direct interface). Upon receiving the command, the USB side first confirms whether the command complies with the UASP / BOT specification. If an error is found, the error status is sent to the USB host according to the UASP / BOT specification. If it complies with the UASP / BOT specification, the command is encapsulated into a PCIE command using the NVMe / AHCI specification via the indirect interface on the bridge and transmitted to the SSD. If an SSD error occurs, the error status is sent to the indirect interface, which then performs error recovery according to the NVMe / AHCI specification. At this time, the bridge must allow the direct interface to continue to make the USB host believe that no errors have occurred. When the indirect interface can handle the error according to the NVMe / AHCI specification, the direct interface will report a correct status to the USB host. If the indirect interface cannot handle the error, the indirect interface will provide an error status to the bridge, and the bridge will then report the error status to the USB host through the direct interface and enable it to handle the error.
[0029] exist Figure 1 、 Figure 2 In the embodiment of FIG, possible errors and corresponding processing methods are as follows (but not limited to):
[0030] 1. Device not ready: This status indicates that the device is busy and cannot process commands. The solution is as follows:
[0031] 1. If it occurs in a direct interface, the device must directly report the error status to the host to let it know that it is not ready.
[0032] 2. If it occurs in the indirect interface, you must wait for a while until it can operate normally without affecting the direct interface. This action can maintain the normal operation of the main control end.
[0033] 3. If the problem occurs in the indirect interface and cannot be resolved even after waiting, the error status will be reported to the host to let it know that the device is not ready.
[0034] 2. The command content received by the device is incorrect (the format is incorrect). The processing method is as follows:
[0035] 1. If it occurs in the direct interface, the direct interface must inform the host of the device which command part has the error.
[0036] 2. If it occurs in the indirect interface, the indirect interface must inform the main control end of the device which command part has an error.
[0037] 3. Unsupported instructions are handled as follows:
[0038] 1. If it occurs in the direct interface, the direct interface must inform the host of the device that it does not support the command.
[0039] 2. If it occurs in the indirect interface, the indirect interface must inform the host of the device that it does not support the command.
[0040] 3. As long as any interface (ie, direct interface or indirect interface) does not support the command, the device must inform the host that the command is not supported.
[0041] 4. Aborted: The device aborted the command due to a command being processed on the power supply. The following steps are taken to handle the aborted command:
[0042] 1. If it occurs on the direct interface, the direct interface must notify the host of the device that the command has been interrupted.
[0043] 2. If it occurs in the indirect interface, the indirect interface must make corresponding processing without affecting the direct interface, such as retrying.
[0044] 3. If the error occurs on the indirect interface and the indirect interface cannot resolve the issue, the device's main control terminal must be informed of the interruption through the direct interface.
[0045] 5. If the device is unresponsive, such as if it is deadlocked, please follow the steps below:
[0046] 1. If the error occurs on the direct interface, it cannot respond and must be restored by the host driver.
[0047] 2. If it occurs in the indirect interface, the indirect interface must take corresponding measures without affecting the direct interface, such as restarting (Reset).
[0048] 3. If it occurs on the indirect interface and the indirect interface cannot handle the situation, the direct interface must inform the host of the device that the device cannot respond.
[0049] Please refer to Figure 3 , Figure 3 FIG. 3 is a flow chart of a method 300 for error handling in a transmission interface according to an embodiment of the present invention. Please note that these steps do not necessarily need to be followed if substantially the same result can be obtained. Figure 3 For example, new steps may be inserted and some steps may be removed from the current flow. Figure 3 The method shown can be Figure 1 The high-speed interface adapter architecture 100 shown here is employed and can be simply summarized as follows:
[0050] Step 301: Start;
[0051] Step 302: Check whether an error occurs in the direct interface and the indirect interface. If an error occurs in the direct interface, jump to step 304; if an error occurs in the indirect interface, jump to step 306; if no error occurs, jump to step 314;
[0052] Step 304: Report an error to the host directly via the direct interface, and jump to step 312;
[0053] Step 306: Handle the error without letting the host find it with the help of the direct interface, and determine whether the indirect interface can solve the error. If so, jump to step 308; if not, jump to step 310;
[0054] Step 308: After the error is handled, report the normal status to the host, and jump to step 314;
[0055] Step 310: The indirect interface provides an error status to the direct interface, and the direct interface reports the error status to the host.
[0056] Step 312: The host provides a corresponding repair solution for the error state to eliminate the problem;
[0057] Step 314: End.
[0058] After reading the above paragraphs, those skilled in the art will be able to easily understand Figure 3 For the sake of brevity, further description of each step will be omitted here.
[0059] In summary, the present invention aims to improve the error recovery mechanism of the high-speed transfer interface and enable the indirect interface to resolve problems without the host being aware of them. However, if the indirect interface is not capable of resolving the problem, it will still report the situation to the direct interface, which will then report it back to the host, preventing the host from assuming that the indirect interface is transmitting normally when in fact it cannot receive data.
[0060] The above descriptions are merely preferred embodiments of the present invention. All equivalent changes and modifications made according to the claims of the present invention should fall within the scope of the present invention.
Claims
1. An error handling method for a transmission interface, the transmission interface is used to connect a first device and a second device to perform data transmission between the first device and the second device, wherein the connection between the first device and the transmission interface is a direct interface, and the connection between the second device and the transmission interface is an indirect interface. The error handling method is applied when a host control end of the first device issues a command through the direct interface, and the error handling method comprises: When an error is detected in the direct interface, an error event is reported to the host of the first device via the transmission interface, wherein, The transmission interface is a command conversion unit, which is used to directly receive a command from the first device, package the command, and send the command to the second device; When an error is detected in the indirect interface connection, attempting to directly handle the error through the instruction conversion unit without letting the host know that the error has occurred; as well as If it is determined that the error cannot be processed, another error event is reported to the host through the command conversion unit. 2 . The error handling method of claim 1 , wherein the direct interface assists the indirect interface in handling errors without the host end discovering the errors.
3. The error handling method as claimed in claim 2, wherein the direct interface continues to make the host end believe that no error has occurred, and when the indirect interface completes the error handling, the direct interface reports the correct status to the host end.
4. The error handling method as claimed in claim 3, wherein in the case where the direct interface assists the indirect interface, if the indirect interface cannot handle the error, the direct interface reports the other error event to the host. 5 . The error handling method as claimed in claim 1 , wherein the first device is a USB device, and the second device is a hard disk device.
6. The error handling method as claimed in claim 5, wherein the direct interface is transmitted via BOT / UASP, and the indirect interface is transmitted via NVMe / AHCI.
7. The error handling method of claim 1 , wherein the error event and the another error event include at least one of the following: The device is not ready, the command content is incorrect, the command is not supported, the command was interrupted, and the device cannot respond.
8. An error handling device, comprising: A first device comprising a first command interface; a second device comprising a second command interface; and a transmission interface, used to connect the first device and the second device to perform data transmission between the first device and the second device, wherein: The transmission interface is a command conversion unit, which is used to directly receive a command from the first device, package the command, and send the command to the second device, including: a controller, a third command interface and a fourth command interface, wherein the third command interface is used to connect to the first command interface to form a direct interface, and the fourth command interface is used to connect to the second command interface to form an indirect interface; and, When a host of the first device issues a command through the direct interface and when the controller detects an error occurs in the direct interface, reporting an error event to the host of the first device; and when the controller detects an error occurs in the indirect interface connection, attempting to directly handle the error without letting the host know that there is an error; If the controller determines that the error cannot be processed, another error event is reported to the host. 9 . The error handling device as claimed in claim 8 , wherein the controller controls the direct interface to assist the indirect interface in handling errors without being discovered by the host.
10. The error handling device as claimed in claim 9, wherein the controller controls the direct interface to continue to make the host end believe that no error has occurred, and when the indirect interface has completed processing the error, the direct interface reports the correct status to the host end, and if the indirect interface cannot process the error, the direct interface reports the other error event to the host end.
Citation Information
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