Electronic device and method of using storage unit of electronic device

Abstract

This disclosure relates to an electronic device and a method of using a storage unit of the electronic device. The electronic device may include a processor, a first volatile memory, and a storage unit including a non-volatile memory and a second volatile memory. The processor is configured to: identify information about a specific file and the type of request for data included in the specific file in response to a request for data creation; set a flag in the request based on the identified information about the specific file; identify whether mapping information of a specific region including the logical address of the data in mapping information of logical and physical addresses of the non-volatile memory is stored in the first volatile memory; determine whether to use the first volatile memory to manage the mapping information of the specific region; and determine whether to update the mapping information of the specific region in the first volatile memory.

Description

Technical Field

[0001] This disclosure relates to an electronic device including a storage unit and a method of using the storage unit. Background Technology

[0002] Portable terminals can use a separate storage unit to store large amounts of data. Flash memory is a device that includes non-volatile memory and is widely used in portable terminals, computers, digital cameras, and memory cards.

[0003] Data can be moved while flash memory performs a useless information collection function to minimize useless information areas. Therefore, flash memory can use the mapping information (Logic-to-Physical Mapping Table (L2P Table)) in which logical addresses and physical addresses are mapped to each other for storage space to store data.

[0004] To improve the processing speed of data requests, the host device can load mapping information stored in the non-volatile memory of the storage unit into the host device's volatile memory for use. The host device can use the mapping information loaded into volatile memory to perform logical-to-physical (L2P) address translation. The size of the host device's volatile memory is limited, and only a portion of the mapping information can be loaded into and used.

[0005] According to the method for loading and using a portion of the mapping information in the volatile memory of the host device, the portion of the mapping information to be loaded into the volatile memory of the host device is determined based on the internal strategy of the storage unit, and therefore the mapping information including the area containing the data expected by the user may not be used directly.

[0006] According to the method for loading and using a portion of the mapping information in the volatile memory of the host device, the time for loading the mapping information into the volatile memory of the host device is determined based on the internal policy of the storage unit. Therefore, overhead may occur when loading the mapping information into the volatile memory of the host device. Summary of the Invention

[0007] Embodiments of this disclosure provide an electronic device that identifies and manages portions of mapped information to be loaded into the volatile memory of a host device, thereby improving the processing speed of requests for user-desired data.

[0008] Embodiments of this disclosure also provide an electronic device that determines the time when a processor loads mapping information into the volatile memory of a host device, thereby reducing the overhead caused by loading the mapping information.

[0009] An electronic device according to various example embodiments of the present disclosure may include a processor, a first volatile memory, and a storage unit including a non-volatile memory and a second volatile memory. The processor according to various embodiments is configured to: identify information about a specific file and the type of request for data included in the specific file in response to a request for data creation; determine, based on the identified information about the specific file, whether to set a flag in the request; identify whether mapping information of a specific region including the logical address of the data in mapping information where logical addresses and physical addresses of the non-volatile memory map to each other is stored in the first volatile memory; determine, based on the identified type of request and whether a flag is set in the request, whether to use the first volatile memory to manage the mapping information of the specific region; and determine, based on the identified type of request and the result of identifying whether the mapping information is stored, whether to update the mapping information of the specific region in the first volatile memory.

[0010] A method for using the storage section of an electronic device (the electronic device including the storage section) according to various example embodiments of the present disclosure may include: identifying information about a specific file and the type of request for data included in the specific file in response to a request for data creation; determining whether to set a flag in the request based on the identified information about the specific file; identifying whether mapping information of a specific region including the logical address of the data in mapping information of logical addresses and physical addresses of non-volatile memory included in the storage section is stored in a first volatile memory; determining whether to use the first volatile memory to manage the mapping information of the specific region based on the identified type of request and whether a flag is set in the request; and determining whether to update the mapping information of the specific region in the first volatile memory based on the identified type of request and the result of identifying whether the mapping information is stored.

[0011] An electronic device according to various example embodiments of the present disclosure may include a processor, a first volatile memory, and a storage unit including a non-volatile memory and a second volatile memory. The processor according to various embodiments is configured to: in response to a request in a file to create data, identify whether mapping information of a specific region of the logical address of the data in a mapping message that maps logical addresses and physical addresses of the non-volatile memory to each other is stored in the first volatile memory; send a request to the storage unit to send the data; and in response to the mapping information of the specific region not being stored in the first volatile memory, send a request to the storage unit to read the mapping information of the specific region. Attached Figure Description

[0012] The above and other aspects, features, and advantages of certain embodiments of this disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, wherein:

[0013] Figure 1 This is a block diagram illustrating example electronic devices in a network environment according to various embodiments of the present disclosure;

[0014] Figure 2A This is a block diagram of an electronic device illustrating an example process for processing a request to read data according to various embodiments of the present disclosure;

[0015] Figure 2B This is a block diagram illustrating an electronic device for processing example procedures of requesting to read data according to various embodiments of the present disclosure;

[0016] Figure 3 This is a block diagram illustrating the function of an example host performance booster (HPB) according to various embodiments of the present disclosure;

[0017] Figure 4 This is a block diagram illustrating example electronic devices according to various embodiments of the present disclosure;

[0018] Figure 5 The block diagram of the electronic device illustrates examples of electronic devices performing HPB functions according to various embodiments of the present disclosure;

[0019] Figure 6 The block diagram of the electronic device illustrates an example process of an electronic device according to various embodiments of the present disclosure processing a request to read data;

[0020] Figure 7 The block diagram of the electronic device illustrates an example process of an electronic device according to various embodiments of the present disclosure processing a request to read data;

[0021] Figure 8 A block diagram of an electronic device illustrates an example process of an electronic device, according to various embodiments of the present disclosure, processing a request to write data;

[0022] Figure 9 A block diagram of an electronic device illustrates an example process of an electronic device, according to various embodiments of the present disclosure, processing a request to delete data;

[0023] Figure 10 This is a flowchart illustrating example operation of an electronic device according to various embodiments of the present disclosure;

[0024] Figure 11 This is a flowchart illustrating example operation of an electronic device according to various embodiments of the present disclosure;

[0025] Figure 12AThis is a flowchart illustrating example operation of an electronic device according to various embodiments of the present disclosure;

[0026] Figure 12B This is a flowchart illustrating example operation of an electronic device according to various embodiments of the present disclosure; and

[0027] Figure 13 This is a flowchart illustrating example operation of an electronic device according to various embodiments of the present disclosure. Detailed Implementation

[0028] Figure 1 This is a block diagram illustrating an electronic device 101 in a network environment 100 according to various embodiments. (Refer to...) Figure 1 In network environment 100, electronic device 101 can communicate with electronic device 102 via a first network 198 (e.g., a short-range wireless communication network), or with electronic device 104 or server 108 via a second network 199 (e.g., a long-range wireless communication network). According to an embodiment, electronic device 101 can communicate with electronic device 104 via server 108. According to an embodiment, electronic device 101 may include a processor 120, memory 130, input device 150, sound output device 155, display device 160, audio module 170, sensor module 176, interface 177, haptic module 179, camera module 180, power management module 188, battery 189, communication module 190, user identification module (SIM) 196, or antenna module 197. In some embodiments, at least one of these components (e.g., display device 160 or camera module 180) may be omitted from electronic device 101, or one or more other components may be added to electronic device 101. In some embodiments, some of the components may be implemented as a single integrated circuit. For example, the sensor module 176 (e.g., a fingerprint sensor, an iris sensor, or an illuminance sensor) may be implemented as embedded in the display device 160 (e.g., a display).

[0029] Processor 120 may run software (e.g., program 140) to control at least one other component (e.g., hardware or software component) of electronic device 101 connected to processor 120, and may perform various data processing or calculations. According to one embodiment, as at least part of the data processing or calculation, processor 120 may load commands or data received from another component (e.g., sensor module 176 or communication module 190) into volatile memory 132, process the commands or data stored in volatile memory 132, and store the resulting data in non-volatile memory 134. According to an embodiment, processor 120 may include a main processor 121 (e.g., central processing unit (CPU) or application processor (AP)) and an auxiliary processor 123 (e.g., graphics processing unit (GPU), image signal processor (ISP), sensor hub processor, or communication processor (CP)) that is operationally independent of or combined with the main processor 121. Additionally or alternatively, auxiliary processor 123 may be adapted to consume less power than main processor 121, or adapted for a specific function. The auxiliary processor 123 can be implemented separately from the main processor 121, or it can be implemented as part of the main processor 121.

[0030] When the main processor 121 is inactive (e.g., in sleep mode), the auxiliary processor 123 may control at least some of the functions or states associated with at least one component of the electronic device 101 (other than the main processor 121) (e.g., display device 160, sensor module 176, or communication module 190), or when the main processor 121 is active (e.g., running an application), the auxiliary processor 123 may work with the main processor 121 to control at least some of the functions or states associated with at least one component of the electronic device 101 (e.g., display device 160, sensor module 176, or communication module 190). According to embodiments, the auxiliary processor 123 (e.g., an image signal processor or a communication processor) may be implemented as part of another component (e.g., camera module 180 or communication module 190) functionally associated with the auxiliary processor 123.

[0031] Memory 130 may store various data used by at least one component of electronic device 101 (e.g., processor 120 or sensor module 176). The various data may include, for example, software (e.g., program 140) and input or output data for commands associated with it. Memory 130 may include volatile memory 132 or non-volatile memory 134.

[0032] The program 140 may be stored as software in the memory 130, and the program 140 may include, for example, an operating system (OS) 142, middleware 144, or application 146.

[0033] Input device 150 can receive commands or data from outside electronic device 101 (e.g., a user) that will be used by other components of electronic device 101 (e.g., processor 120). Input device 150 may include, for example, a microphone, mouse, or keyboard.

[0034] The sound output device 155 can output sound signals to the outside of the electronic device 101. The sound output device 155 may include, for example, a speaker or a receiver. The speaker can be used for general purposes such as playing multimedia or playing records, and the receiver can be used for incoming calls. According to an embodiment, the receiver may be implemented separately from the speaker or as part of the speaker.

[0035] Display device 160 can visually provide information to the outside of electronic device 101 (e.g., to a user). Display device 160 may include, for example, a display, a holographic device, or a projector, and control circuitry for controlling a respective one of the display, holographic device, and projector. According to an embodiment, display device 160 may include touch circuitry adapted to detect touch or sensor circuitry (e.g., a pressure sensor) adapted to measure the intensity of the force caused by touch.

[0036] The audio module 170 can convert sound into electrical signals and vice versa. According to an embodiment, the audio module 170 can obtain sound via the input device 150, or output sound via the sound output device 155 or headphones of an external electronic device (e.g., electronic device 102) that is directly (e.g., wired) or wirelessly connected to the electronic device 101.

[0037] Sensor module 176 can detect the operating state of electronic device 101 (e.g., power or temperature) or the environmental state outside electronic device 101 (e.g., user state), and then generate an electrical signal or data value corresponding to the detected state. According to embodiments, sensor module 176 may include, for example, a gesture sensor, gyroscope sensor, atmospheric pressure sensor, magnetic sensor, accelerometer, grip sensor, proximity sensor, color sensor, infrared (IR) sensor, biometric sensor, temperature sensor, humidity sensor, or illuminance sensor.

[0038] Interface 177 may support one or more specific protocols used to enable electronic device 101 to connect directly (e.g., wired) or wirelessly to external electronic devices (e.g., electronic device 102). According to embodiments, interface 177 may include, for example, a High Definition Multimedia Interface (HDMI), a Universal Serial Bus (USB) interface, a Secure Digital Card (SD) interface, or an audio interface.

[0039] Connection end 178 may include a connector, through which electronic device 101 can be physically connected to an external electronic device (e.g., electronic device 102). According to embodiments, connection end 178 may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0040] The tactile module 179 can convert electrical signals into mechanical stimuli (e.g., vibration or motion) or electrical stimuli that can be recognized by a user through his touch or kinesthesia. According to embodiments, the tactile module 179 may include, for example, a motor, a piezoelectric element, or an electrical stimulator.

[0041] Camera module 180 can capture still or moving images. According to an embodiment, camera module 180 may include one or more lenses, an image sensor, an image signal processor, or a flash.

[0042] The power management module 188 manages the power supply to the electronic device 101. According to an embodiment, the power management module 188 may be implemented as at least part of, for example, a power management integrated circuit (PMIC).

[0043] Battery 189 can power at least one component of electronic device 101. According to an embodiment, battery 189 may include, for example, a non-rechargeable primary battery, a rechargeable rechargeable battery, or a fuel cell.

[0044] Communication module 190 can support the establishment of a direct (e.g., wired) or wireless communication channel between electronic device 101 and external electronic devices (e.g., electronic device 102, electronic device 104, or server 108), and perform communication via the established communication channel. Communication module 190 may include one or more communication processors capable of operating independently of processor 120 (e.g., application processor (AP)) and support direct (e.g., wired) or wireless communication. According to embodiments, communication module 190 may include wireless communication module 192 (e.g., cellular communication module, short-range wireless communication module, or Global Navigation Satellite System (GNSS) communication module) or wired communication module 194 (e.g., local area network (LAN) communication module or power line communication (PLC) module). One of these communication modules can communicate with an external electronic device via a first network 198 (e.g., a short-range communication network such as Bluetooth, Wi-Fi Direct, or Infrared Data Association (IrDA)) or a second network 199 (e.g., a long-range communication network such as a cellular network, the Internet, or a computer network (e.g., a LAN or a wide area network (WAN))). These various types of communication modules can be implemented as a single component (e.g., a single chip) or as multiple components (e.g., multiple chips) that are separate from each other. The wireless communication module 192 can identify and verify the electronic device 101 in the communication network (such as the first network 198 or the second network 199) using user information (e.g., the International Mobile Subscriber Identity (IMSI)) stored in the user identification module 196.

[0045] Antenna module 197 can transmit or receive signals or power to or from the outside of electronic device 101 (e.g., external electronic device). According to embodiments, antenna module 197 may include one or more antennas, and therefore, at least one antenna suitable for a communication scheme used in a communication network (such as a first network 198 or a second network 199) can be selected by, for example, communication module 190 (e.g., wireless communication module 192). Signals or power can then be transmitted or received between communication module 190 and external electronic device via the selected at least one antenna.

[0046] At least some of the aforementioned components can be interconnected and communicate signals (e.g., commands or data) between them via an inter-peripheral communication scheme (e.g., bus, general purpose input / output (GPIO), serial peripheral interface (SPI), or mobile industrial processor interface (MIPI)).

[0047] According to an embodiment, commands or data can be sent or received between electronic device 101 and external electronic device 104 via server 108 connected to a second network 199. Each of electronic device 102 and electronic device 104 can be a device of the same type as electronic device 101, or a device of a different type. According to an embodiment, all or some operations to be performed on electronic device 101 can be performed on one or more of external electronic devices 102, external electronic devices 104, or server 108. For example, if electronic device 101 is required to automatically perform a function or service, or is required to perform a function or service in response to a request from a user or another device, electronic device 101 may request the one or more external electronic devices to perform at least a portion of the function or service, instead of running the function or service, or electronic device 101 may request the one or more external electronic devices to perform at least a portion of the function or service in addition to running the function or service. Upon receiving the request, the one or more external electronic devices may perform at least a portion of the requested function or service, or perform additional functions or services related to the request, and transmit the result of the execution to electronic device 101. Electronic device 101 may provide the result as at least a partial response to the request, either with further processing or without further processing. For this purpose, technologies such as cloud computing, distributed computing, or client-server computing may be used.

[0048] Figure 2A and Figure 2B A block diagram of an electronic device illustrates an example process for processing a request to read data according to various embodiments of the present disclosure.

[0049] Figure 2A This is a diagram illustrating an example process according to various embodiments, in which, if mapping information corresponding to data is loaded into the RAM 320 (or volatile memory) of the storage unit 300, the electronic device (e.g., Figure 1 The electronic device 101) processes the request to read data when it creates a request to read data.

[0050] Reference Figure 2A Electronic devices according to various embodiments (e.g., Figure 1 The electronic device 101 may include an application processor (AP) 200 and a storage unit 300.

[0051] Application processor 200 according to various embodiments may include a processor (e.g., including processing circuitry) 210 (e.g., Figure 1 The processor 120 and the storage host controller (e.g., including circuitry) 220.

[0052] The processor 210, according to various embodiments, may include various processing circuitry and execute various software (e.g., program 140). The processor 210 may execute, for example, application 211, file system 213, or storage drive 215.

[0053] Storage unit 300 according to various embodiments may store various data used by at least one element of an electronic device. Storage unit 300 according to various embodiments may include, for example, NAND flash memory (e.g., non-volatile memory) 310, RAM (e.g., volatile memory) 320, and storage unit controller (e.g., including circuitry) 330. Non-volatile memory may be, for example, flash memory. Non-volatile memory includes, for example, NAND flash memory that meets the Universal Flash Memory (UFS) standard specification. NAND flash memory 310 according to various embodiments may store mapping information 311 (e.g., mapping table) indicating the relationship (e.g., mapping relationship) between logical addresses 311a and physical addresses 311b for data in storage unit. Mapping information may be, for example, mapping information 311 in which logical addresses 311a and physical addresses 311b of NAND flash memory 310 are mapped to each other (logical-to-physical address mapping information (e.g., L2P table)). The volatile memory of storage unit 300 may be, for example, RAM. According to various embodiments, RAM 320 may store (e.g., cache) mapping information (e.g., cached L2P) of a portion of the mapping information 311 stored in NAND flash memory 310. According to various embodiments, memory controller 330 may include various control circuits and is configured to control various elements of memory 300 and / or perform communication-related operations or data processing.

[0054] According to various embodiments, a request to read data contained in a specific file can be created by application 211 (data read I / O request or read I / O). To process the data read request, in operation ①, processor 210 can identify the logical address of the data contained in the corresponding specific file via file system 213. For example, if a request to read data 214a contained in file A.apk 214 is created, processor 210 can identify the logical address of the corresponding data 214a as "1" via file system 213.

[0055] In operations ② and ③, according to various embodiments, processor 210 can send a request to read data including the logical address of the data to storage host controller 220 by executing storage drive 215.

[0056] In operation ④, according to various embodiments, the storage unit host controller 220 can send a request to read data including the logical address of the data to the storage unit 300. According to an embodiment, the storage unit host controller 220 can send the data read request to the storage unit 300 based on the control of the processor 210.

[0057] In operation ⑤, according to various embodiments, the storage unit 300 can identify, based on the control of the storage unit controller 330, whether the address information corresponding to the data is included in the mapping information stored (e.g., cached) in a portion of the RAM (e.g., volatile memory) 320 of the storage unit 300. For example, the RAM 320 of the storage unit 300 can store a portion of the mapping information (e.g., L2P table) 311 stored in the NAND flash memory (e.g., non-volatile memory) 310. For example, due to size limitations, the RAM 320 of the storage unit 300 can only store and use a portion of the mapping information (e.g., L2P table) 311 stored in the NAND flash memory 310. When a request to process data uses the mapping information (e.g., cached L2P table) stored in a portion of the RAM 320 of the storage unit 300, the electronic device (e.g., application processor 200) does not need to reload the mapping information 311 stored in the NAND flash memory 310, thus improving processing speed.

[0058] According to various embodiments, if the address information corresponding to the data is included in the mapping information of a portion of the RAM 320 stored in the storage unit 300, the storage unit controller 330 can identify the physical address matching the logical address of the data from the mapping information of the portion of the RAM 320 stored in the RAM 320. For example, the storage unit controller 330 can identify the physical address "4" matching the logical address "1" of the data from the mapping information of the portion of the RAM 320 stored in the RAM 320.

[0059] In operation ⑥, the storage unit controller 330, according to various embodiments, can process data read requests by accessing the physical address of data identified in the physical NAND cell 313.

[0060] Figure 2B This is a diagram illustrating an example process according to various embodiments, in which, if the mapping information corresponding to the data is not loaded into the RAM 320 of the storage unit 300, the electronic device (e.g., Figure 1 The electronic device 101) processes the request to read data when it creates a request to read data. In the following text, as previously referenced... Figure 2A The overlapping content described can be found here. Figure 2B No repetition.

[0061] According to various embodiments, a request to read data contained in a specific file can be created via application 211 (e.g., a data read I / O request or read I / O). To process the created request to read data, in operation ①, processor 210 can identify the logical address of the data contained in the corresponding specific file via file system 213. For example, if a request to read data 214b contained in file A.apk 214 is created, processor 210 can identify the logical address of the corresponding data 214b as "2" via file system 213.

[0062] In operations ② and ③, according to various embodiments, processor 210 can send a request to read data including the logical address of the data to storage host controller 220 by executing storage drive 215.

[0063] In operation ④, according to various embodiments, the storage unit host controller 220 can send a request to read data including the logical address of the data to the storage unit 300. According to an embodiment, the storage unit host controller 220 can send the data read request to the storage unit 300 based on the control of the processor 210.

[0064] According to various embodiments, the storage unit 300 can, under the control of the storage unit controller 330, identify whether the address information corresponding to the data is included in the mapping information of a portion of the RAM (e.g., volatile memory) 320 of the storage unit 300 (e.g., cached). The mapping information of the portion of the RAM 320 of the storage unit 300, indicated by dashed lines, may be mapping information that has not yet been loaded from the NAND flash memory 310 and is therefore not yet stored in the RAM 320; thus, it may refer, for example, to mapping information to be loaded from the NAND flash memory 310 later. If the address information corresponding to the data is not included in the mapping information of the portion of the RAM 320 of the storage unit 300, the storage unit controller 330 can, in operation ⑤, load the mapping information of the portion of the logical address "2" of the data from the NAND flash memory 310 into the RAM 320 of the storage unit 300.

[0065] In operation ⑥, according to various embodiments, the storage unit controller 330 can load mapping information of a portion of the region corresponding to the logical address "2" of the data from the NAND flash memory 310 into the RAM 320, so as to store the loaded mapping information in the RAM 320. The mapping information of the portion of the RAM 320 in the storage unit 300, indicated by dashed lines, may refer to, for example, mapping information that can be used after being loaded from the NAND flash memory 310.

[0066] According to various embodiments, the memory controller 330 can identify the physical address that matches the logical address of the data by using mapping information (e.g., cached L2P) of a portion of the newly loaded region in RAM 320. For example, the memory controller 330 can identify the physical address "7" that matches the logical address "2" of the data by using the mapping information of a portion of the newly loaded region in RAM 320.

[0067] In operation ⑦, the storage unit controller 330, according to various embodiments, can process data read requests by accessing the physical address of the data identified by the physical NAND cell 313.

[0068] Figure 3 This is a block diagram of an electronic device illustrating the function of an example host performance enhancer (HPB) according to various embodiments of the present disclosure.

[0069] Reference Figure 3 Electronic devices according to various embodiments (e.g., Figure 1 The electronic device 101 may include an application processor 200, a first RAM (e.g., a first volatile memory) 400, and a storage unit 300. According to various embodiments, the first RAM 400 may be, for example, host-side RAM managed by the processor 210.

[0070] The storage unit 300 according to various embodiments may include, for example, NAND flash memory (e.g., non-volatile memory) 310, a second RAM (e.g., second volatile memory) 320, and a storage unit controller 330. The non-volatile memory may be, for example, flash memory. The non-volatile memory may include, for example, NAND flash memory 310 that meets the Universal Flash Memory (UFS) standard specification. The NAND flash memory 310 according to various embodiments may store mapping information 311 indicating the relationship between logical addresses 311a and physical addresses 311b for stored data. This mapping information 311 may, for example, be mapping information in which logical addresses and physical addresses of the NAND flash memory 310 are mapped to each other (logical-to-physical address mapping information (e.g., L2P table)).

[0071] According to various embodiments, the first RAM (first volatile memory) 400 can load and store a portion of the mapping information from the NAND flash memory (e.g., non-volatile memory) 310 of the storage unit 300. According to various embodiments, the processor 210 can process requests to read data using a mapping table (e.g., an HPB L2P table) 410 stored in the first RAM 400 for a portion of the data. For example, if a request to read data corresponding to logical address "2" is created, the processor 210 can identify whether the address information corresponding to the logical address "2" of the data is included in the mapping table 410 for the portion of the data stored in the first RAM 400. The information corresponding to logical address "2" is included in the address 411 of region "1" in the mapping table 410 currently stored in the first RAM 400 in the mapping information; therefore, the processor 210 can identify that the physical address corresponding to the logical address "2" of the data is "7". The processor 210 can include the physical address in the request to read data to be transferred to the storage unit 300. The first RAM 400 on the host side is loaded with a portion of mapping information 311, which maps logical addresses 311a and physical addresses 311b of the NAND flash memory 310 of the storage unit 300 to each other. The host-side processor 210 performs logical / physical address translation operations, such as the Host Performance Enhancer (HPB) function defined in the UFS standard. Using the HPB function, the host-side processor 210 can perform operations that load mapping information of a portion of the storage unit 300 into the second RAM 320 of the storage unit 300, and operations that translate logical addresses to physical addresses using mapping information of a portion of the storage unit 300's storage units (e.g., cached L2P). Figure 2B This operation (⑥) can improve the processing performance of data requests.

[0072] According to various embodiments, mapping tables (e.g., HPB L2P tables or HPB L2P mapping tables) loaded into the first RAM 400 can be loaded and managed in units of predetermined sizes (e.g., 16MB, 32MB, or 64MB). This unit can be referred to as a region. For example, mapping information including logical addresses "1, 2, 3, and 4" can be mapping information 411 for a first region (e.g., region "1"), and mapping information including logical addresses "5, 6, 7, and 8" can be mapping information 413 for a second region (e.g., region "2"). HPB L2P mapping table 410 according to various embodiments may include metadata for identifying the integrity of the mapping information.

[0073] According to various embodiments, the processor 210 can load mapping information of a portion of the mapping information from the NAND flash memory 310 of the storage unit 300 into the first RAM 400. Detailed processing operations based on requests to create data using the HPB function will be described in more detail below.

[0074] Figure 4 This is a block diagram illustrating example electronic devices according to various embodiments of the present disclosure. Figure 4 This is a block diagram illustrating the software and hardware layers of an electronic device according to various embodiments.

[0075] Reference Figure 4 Electronic devices according to various embodiments (e.g., Figure 1 The electronic device 101 can be divided into a host (e.g., a host device) 40 and a storage unit 300. According to various embodiments, the host 40 can be an environment in which software including user applications and an operating system (OS) run. According to various embodiments, the host 40 can include a first RAM 400 and an application processor (e.g., including processing circuitry) 200. The first RAM 400 can be, for example, volatile memory and can store an HPB L2P mapping table 410. The HPB L2P mapping table 410 can include mapping information of a portion of a region loaded from the NAND flash memory 310 of the storage unit 300. The host 40 can transmit various requests (data I / O requests) for data, such as data created during software execution, to the storage unit 300.

[0076] Application processor 200 according to various embodiments may include various processing circuits and may be a hardware device for executing software loaded into first RAM 400, and may perform software module operations. Application processor 200 according to various embodiments may include file system 213, storage drive 215, and storage host controller 220. File system 213 and storage drive 215 may be integrated into a processor (not shown) (e.g., ...). Figure 1 The software executed in processor 120 (or processor 210 of FIG. 2). According to various embodiments, the processor can be configured to control various elements of the electronic device and / or perform communication-related operations or data processing. For example, the processor can be operatively connected to elements of the electronic device. The processor can load commands or data received from other elements of the electronic device into a storage unit, process the commands or data stored in the storage unit, and store the result data.

[0077] According to various embodiments, the file system 213 can be a software module for managing files stored in the storage unit 300 and can support read / write / delete requests for data of basic files, and manage file attributes and permissions. If a request is created to include data in a specific file, the file system 213 according to various embodiments can determine whether to maintain / manage the L2P mapping table 410 stored in the first RAM 400 on the host 40 end in order to identify the extension, attributes, or permissions of the specific file. If it is determined that the first RAM 400 manages the L2P mapping table stored in the first RAM 400, the file system 213 can set a flag (HOST HPB flag) in the request for data to be included in the corresponding file.

[0078] According to various embodiments, the storage unit driver 215 may be a software module for communicating with the storage unit 300, and it may use the HPB function to manage the L2P mapping table 410 stored in the first RAM 400 at the host 40. For example, the storage unit driver 215 may manage the L2P mapping table 410 stored in the first RAM 400 based on whether a flag is set in a request for data transferred via the file system 213 and the type of data request.

[0079] The storage unit host controller 220 according to various embodiments may include various circuits and may be a hardware module responsible for communication between the host application processor 200 and the storage unit 300.

[0080] According to various embodiments, the first RAM 400 may be a volatile memory used in the application processor 200 and may temporarily store data required for the unit driver software and software operation. If the storage unit 300 supports HPB functionality, an L2P mapping table 410 may be stored in the first RAM 400, which is mapping information of a portion of the NAND flash memory 310 loaded from the storage unit 300.

[0081] According to various embodiments, the L2P mapping table 410 may be part of the L2P mapping information 311 loaded from the storage unit 300 into the first RAM 400 of the host 40, and may be used during processing of requests to read data stored in the storage unit 300 and may be maintained and managed by the storage unit driver 215. According to various embodiments, the L2P mapping table 410 stored in the first RAM 400 may include a reference flag and a need-update flag. The reference flag may, for example, be flag information indicating whether the mapping information of a corresponding region is managed by the host 40 (e.g., whether the mapping information is managed by the first RAM 400). For example, if the reference flag value of the mapping information of a specific region is set to "1", it may, for example, refer to the mapping information of the specific region managed by the host 40; however, if the value of the mapping information of a specific region is set to "0", it may, for example, refer to the mapping information of the specific region not managed by the host 40. The update flag may, for example, be flag information indicating whether the mapping information of a specific region stored in the first RAM 400 of the host 40 needs to be updated. For example, if the update flag value for the mapping information of a specific region is set to "1", it may indicate that the mapping information of the specific region needs to be updated from the NAND flash memory 310. However, if the update flag value is set to "0", it may indicate that the mapping information of the specific region does not need to be updated. According to various embodiments, a base flag and an update flag can be set for each region of the L2P mapping table 410.

[0082] According to various embodiments, the storage unit 300 may include a NAND flash memory 310, a storage unit controller 330, and a second RAM 320. Figure 4 (Not shown in the image).

[0083] According to various embodiments, the NAND flash memory 310 can be a non-volatile memory and can be a space for physically storing data. According to various embodiments, L2P mapping information 311 (e.g., a mapping table) can be stored in the NAND flash memory 310.

[0084] The L2P mapping information 311 in the NAND flash memory 310 according to various embodiments may include, for example, the entire mapping information in which logical addresses and physical addresses of the NAND flash memory 310 are mapped to each other. A portion of the L2P mapping information 311 in the NAND flash memory 310 may be loaded into the second RAM 320 to be used in the storage unit 300. If the storage unit 300 supports HPB functionality, a portion of the L2P mapping information 311 in the NAND flash memory 310 may be loaded into the first RAM 400 to be used in the host 40.

[0085] According to various embodiments, the storage unit controller 330 may be a hardware module including various circuits responsible for communication between the application processor 200 of the host 40 and the storage unit 300. For example, the storage unit controller 330 may process requests for data being transferred from the host 40 and manage L2P mapping information 311 in the NAND flash memory 310.

[0086] Figure 5 The block diagram of the electronic device illustrates an electronic device performing HPB functions according to various embodiments of the present disclosure.

[0087] Reference Figure 5 Electronic devices according to various embodiments (e.g., Figure 1 The electronic device 101 may include an application processor 200, a first RAM (first volatile memory) 400, and a storage unit 300. Details that are repeated above will not be repeated here.

[0088] If the storage unit 300 supports HPB functionality, the processor 210, according to various embodiments, may include various processing circuitry and map mapping information (e.g., an HPB L2P table) of a specific region from the storage unit 300 to the first RAM 400. The processor 210 may also manage a mapping table 410 of a specific region stored in the first RAM 400. For example, the processor 210 may use the mapping table 410 of a specific region stored in the first RAM 400 to process requests to read data.

[0089] According to various embodiments, the processor 210 can set a flag in the data request and can manage the mapping table (e.g., HPB L2P mapping table) 410 stored in the first RAM 400 based on whether the flag is set in the data request and the type of data request.

[0090] Reference Figure 5 The first RAM 400 shown can load mapping information 411 corresponding to a first region (e.g., region 1) of the HPB L2P mapping table 410 stored in the first RAM 400. If the reference flag 411a of the mapping information 411 of the first region is set to "1" (reference = 1), it is determined that the mapping information 411 of the first region is managed by the host 40, and therefore, the mapping information 411 can be stored in the first RAM 400. If the update flag 411b of the mapping information 411 of the first region is set to "1" (need_update = 1), it may be necessary to update the mapping information 411 of the first region.

[0091] According to various embodiments, the processor 210 can send a request to the storage unit 300 to update the mapping information 411 of a first region, wherein the update flag 411b is set to "1". According to various embodiments, the processor 210 can receive mapping information of a specific region from the storage unit 300 and can update the mapping information in the first RAM 400.

[0092] If a request is made to include data in a specific file, the processor 210, according to various embodiments, can determine whether the specific file is intended for executing a specific application, for example, by identifying the file extension and attribute information of the specific file through the file system 213. For example, if the file extension of the specific file is apk, vdex, so, sc, or lib, the processor 210 can determine that the specific file is intended for executing a specific application. For example, if the file attribute of the specific file is executable, the processor 210 can determine that the specific file is intended for executing a specific application. The processor 210, according to various embodiments, can determine whether it is appropriate to manage the mapping information of a specific region corresponding to the data through the first RAM 400 on the host 40 by identifying whether the specific file is a read-only file. For example, if the file attribute of the specific file is read-only, the processor 210 can determine that it is appropriate to manage the mapping information of the specific region corresponding to the data through the first RAM 400 on the host 40.

[0093] If it is determined that the particular file is for accessing a particular application, the processor 210, according to various embodiments, can set a flag in the data request and can determine that the mapping information of a particular region including the physical address of the data is managed by the first RAM 400 end of the host 40 end.

[0094] In order to smoothly perform HPB functions using the methods disclosed above, processor 210 can identify and manage specific regions that will be managed by first RAM 400 in mapping information (L2P mapping table) 311.

[0095] Although the above method has been described with reference to an example of a request to create data during the execution (entry) of a specific application, it is clear that, in addition to the cases described above, this method can also be applied to processes that improve performance by handling requests for data of files with high access frequency or data of recently accessed files. In the following explanation, for ease of illustration, the case of handling requests for data created during the execution of the application will be described primarily.

[0096] Figure 6 and Figure 7 The block diagram of the electronic device illustrates an example process of an electronic device according to various embodiments of the present disclosure processing a request to read data.

[0097] Figure 6 This is a diagram illustrating an example process by which an electronic device processes a request to read data when a request to read data is created, according to various embodiments, if the mapping information corresponding to the data in a specific region does not exist in the first RAM 400 at the host 40.

[0098] Reference Figure 6 In operation ①, processor 210 according to various embodiments can identify requests (e.g., data read I / O requests) to read data included in a specific file during application execution. Processor 210 according to various embodiments can identify the type of request to create data (e.g., read / write / delete requests). Processor 210 according to various embodiments can identify the logical address of data in a specific file for which a request to read data was created via file system 213. For example, processor 210 can identify a request to read data 214a corresponding to logical address "1" included in data in file A.apk 214.

[0099] In operation ②, the processor 210, according to various embodiments, can identify information about a specific file 214 that created the request to read data via the file system 213. For example, the processor 210 can identify the extension and attribute information of the specific file 214. For example, the processor 210 can identify whether the specific file 214 is included in a Least Recently Used (LRU) list or a Most Recently Used (MRU) list. The processor 210, according to various embodiments, can manage and store the least recently used applications in the LRU list. The processor 210, according to various embodiments, can record and manage the most recently used applications or files in the MRU list via an operating system (OS) or the running machine.

[0100] According to various embodiments, the processor 210 may set a flag in the created request to read data based on information about the identified file. For example, in response to the case that a particular file 214 is a file used to execute a particular application, the processor 210 may set a flag in the created request to read data. For example, the processor 210 may set a flag in the created request to read data in response to the case that a particular file 214 is included in a Least Recently Used (LRU) list or a Most Recently Used (LRU) list.

[0101] For example, if the file 214 for which the data read request was created has the extension .apk, the processor 210, according to various embodiments, can identify that the file 214 is a file used to execute a specific application. Furthermore, the processor 210 can set flags (e.g., the HOST HPB flag) in the created data read request.

[0102] In operation ③, the processor 210, according to various embodiments, can identify whether a flag is set in the created request to read data and whether mapping information for a specific region including the logical address of the data is stored in the first RAM (e.g., first volatile memory) 400. The mapping information 411 for the first region (e.g., region "1"), indicated by the dashed line in the first RAM 400, is mapping information that has not yet been loaded from the NAND flash memory (e.g., non-volatile memory) 310 and therefore has not yet been stored in the first RAM 400; thus, it may refer, for example, to mapping information to be loaded later from the NAND flash memory 310. It can be assumed that the specific region including the mapping information for specific data is the first region (e.g., region "1") 411. Because a flag is currently set in the created request to read data, the processor 210 can determine that the mapping information 411 for the specific region including the data is managed by the first RAM 400 on the host side. The processor 210 can set a reference flag 411a of the mapping information 411 for the first region (e.g., region "1") in the mapping information to be stored in the first RAM to be "1". The case where the reference flag 411a of the first region's mapping information is "1" could refer, for example, to the first region's mapping information 411 managed by the first RAM 400 at the host 40. Since the first region's mapping information 411 is not currently stored in the first RAM 400 (indicated by the dashed line), the processor 210 can set the update flag (need_update flag) 411b of the first region's mapping information 411 to "1" for information about the first region in the mapping information to be stored in the first RAM 400. The case where the update flag 411b of the first region's mapping information 411 is "1" refers, for example, to the need to update the first region's mapping information 411 from the NAND flash memory (e.g., non-volatile memory) 310 of the storage unit 300 to the first RAM 400.

[0103] In operation ④, according to various embodiments, the processor 210 can send a request to read data including a logical address of data to the storage unit host controller 220 by executing the storage unit driver 215 of the storage unit 300. For example, since the mapping information of the first region 411 is not currently stored in the first RAM 400, the processor 210 can identify the physical address of specific data without using the information stored in the first RAM 400. The processor 210 can send a request to read data including a logical address of specific information to the storage unit host controller 220. For example, the processor 210 can send a request to read data including the logical address "1" of specific data to the storage unit host controller 220.

[0104] In operation ⑤, according to various embodiments, the processor 210 can send a request to read data including the logical address of the data to the storage unit 300 via the storage unit host controller 220.

[0105] In operation ⑥, according to various embodiments, the storage unit 300 can identify, based on the control of the storage unit controller 330, whether the address information corresponding to the data includes mapping information of a portion of the storage unit (e.g., cache) in the second RAM (e.g., volatile memory) 320 of the storage unit 300. For example, the second RAM 320 of the storage unit 300 may store a portion of the mapping information (e.g., L2P table) 311 stored in the NAND flash memory (e.g., non-volatile memory) 310. For example, because the size of the second RAM 320 is small, the second RAM 320 of the storage unit 300 may only store and use a portion of the mapping information (e.g., L2P table) 311 stored in the NAND flash memory 310. If the address information corresponding to the data is included in the mapping information of a portion of the second RAM 320 of the storage unit 300, the storage unit controller 330 can identify the physical address mapped to the logical address of the data from the mapping information of the portion of the second RAM 320. According to various embodiments, the storage controller 330 can process data read requests by accessing the physical address of data identified in the physical NAND cell.

[0106] In operation ⑦, according to various embodiments, the processor 210 can send an update request for the mapping information 411 of a specific region in the first RAM 400 to the storage unit 300 by executing the storage unit driver 215 of the storage unit 300. For example, because the update flag 411b of the mapping information 411 of the first region in the first RAM 400 is set to "1", the processor 210 can send an update request for the mapping information 411 of the first region to the storage unit 300. In response to receiving the update request, according to various embodiments, the storage unit 300 can retrieve the mapping information 411 of the first region and send it to the processor 210.

[0107] In operation ⑧, the processor 210 according to various embodiments can receive mapping information of a specific region from the storage unit 300 and store the received mapping information in the first RAM 400. The mapping information 411 of the first region, indicated by dashed lines, can be loaded into the first RAM 400 through operation ⑧. When the mapping information 411 of the specific region is completely updated, the processor 210 according to various embodiments can change the update flag (need_update flag) 411b of the mapping information 411 of the first region stored in the first RAM 400 to "0". If the value of the update flag 411b of the mapping information 411 of the first region is "0", it may, for example, mean that the mapping information 411 of the first region stored in the first RAM 400 does not need to be updated.

[0108] According to various embodiments, operations ⑥ and ⑦ can be performed in response to a situation where a request to read data has been fully processed or in response to a situation where a request to read data has been fully processed and there is no request to currently process data.

[0109] Figure 7 This is a block diagram illustrating an example process by which an electronic device processes a data read request when, according to various embodiments, mapping information for a specific region corresponding to the data is not present in the first RAM 400 at the host 40. In the following, with reference to the above... Figure 6 The content described is repeated in the reference. Figure 7 The details will not be repeated in the description.

[0110] Reference Figure 7 In operation ①, the processor 210 according to various embodiments can recognize the creation of a request (e.g., a data read I / O request) to read data included in a specific file during application execution. The processor 210 according to various embodiments can identify the logical address of the data in the specific file for which the data read request was created via the file system 213. For example, the processor 210 can recognize the creation of a request to read data 214b corresponding to logical address "2" within the data included in the A.apk file 214.

[0111] In operation ②, the processor 210 according to various embodiments can identify information about a specific file 214 that created the request to read data through the file system 213.

[0112] According to various embodiments, the processor 210 can set a flag in the created request to read data based on information from the identified file 214.

[0113] For example, because the extension of the specific file 214 that created the request to read data is .apk, the processor 210, according to various embodiments, can recognize that the specific file 214 is a file for executing a specific application and can set a flag (e.g., the HOST HPB flag) in the created request to read data.

[0114] In operation ③, the processor 210, according to various embodiments, can identify whether a flag is set in the created request to read data and whether mapping information (e.g., an HPB L2P table) of a specific region including the logical address of the data is stored in the first RAM (e.g., a first volatile memory) 400. The mapping information 411 of the first region (e.g., region "1") in the first RAM 400, indicated by a solid line, can be mapping information that has been loaded from NAND flash memory (non-volatile memory) 310 and is therefore currently stored in the first RAM 400. Assume that the specific region including the mapping information of specific data is the first region (e.g., region "1") 411. Because a flag is currently set in the created request to read data, the processor 210 can determine that the mapping information 411 of the specific region including the data is managed by the first RAM 400 on the host side. The processor 210 can set a reference flag 411a of the mapping information 411 of the first region to "1" for information about the first region (e.g., region "1") 411 in the mapping information stored (or to be stored) in the first RAM 400. Because the mapping information 411 of the first region is currently stored in the first RAM 400 (represented by the solid line), the processor 210 can set the update flag (need_update flag) 411b of the mapping information 411 of the first region to "0" based on the information about the first region in the mapping information stored in the first RAM 400. The case where the value of the update flag 411b of the mapping information 411 of the first region is "0" can, for example, mean that it is not necessary to update the mapping information 411 of the first region from the NAND flash memory (e.g., non-volatile memory) 310 of the storage unit 300 to the first RAM 400.

[0115] According to various embodiments, the processor 210 can use mapping information 411 of a specific region stored in the first RAM 400 to identify the physical address mapped to the logical address of data 214b. For example, the processor 210 can identify that the physical address mapped to the logical address 2 of data 214b is "7" using the mapping information 411 of the first region stored in the first RAM 400.

[0116] In operation ④, according to various embodiments, the processor 210 can send a request to read data including the physical address of the data to the storage unit host controller 220 by executing the storage unit driver 215 of the storage unit 300. For example, because the mapping information 411 of the first region is stored in the first RAM 400, the processor 210 can use the information stored in the first RAM 400 to identify the physical address of specific data 214b. The processor 210 can send a request to read data including the physical address of the specific data to the storage unit host controller 220. For example, the processor 210 can send a request to read data including the physical address "7" of the specific data to the storage unit host controller 220.

[0117] In operation ⑤, according to various embodiments, the processor 210 can send a request to read data including the physical address of the data to the storage unit 300 via the storage unit host controller 220.

[0118] In operation ⑥, according to various embodiments, the storage unit 300 can process data read requests by accessing the identified physical address of the data in the physical NAND cell under the control of the storage unit controller 330.

[0119] Figure 8 The block diagram of the electronic device illustrates an example process of an electronic device according to various embodiments of the present disclosure processing a request to write data.

[0120] Reference Figure 8 According to various embodiments, the processor 210, during operation ①, can recognize the creation of a request to write data included in a specific file (e.g., a data write I / O request) so as to update application 211 during execution. The processor 210, according to various embodiments, can recognize the type of data request created and can identify that the data request is a data write request. The processor 210, according to various embodiments, can identify the logical address of the data in the specific file for which the data write request was created via the file system 213. For example, the processor 210 can recognize a request to create data 214c corresponding to logical address "3" included in the data in file A.apk 214.

[0121] In operation ②, the processor 210, according to various embodiments, can identify information about a specific file 214 in which a write data request has been created via the file system 213. For example, the processor 210 can identify the extension and attribute information of the specific file 214. The processor 210, according to various embodiments, can set a flag in the write data request based on the identified file information. For example, in response to the case that the specific file 214 is a file used to execute a specific application, the processor 210 can set a flag in the write data request.

[0122] For example, according to various embodiments, processor 210 can identify that a specific file 214, which has a request to write data, has an extension of .apk and has executable file attributes, thus identifying that the specific file 214 is a file for executing a specific application. Processor 210 can set a flag (e.g., a HOST HPB flag) in the request to write data in response to the identification that the specific file 214 is a file for executing a specific application.

[0123] In operation ③, the processor 210, according to various embodiments, can identify whether a flag is set in the request to create write data and whether mapping information (e.g., an HPB L2P table) for a specific region including the logical address of the data is stored in the first RAM (e.g., the first volatile memory) 400. The mapping information 411 for the first region (e.g., region "1") in the first RAM 400, indicated by dashed lines, can refer to, for example, mapping information that will be updated later from the NAND flash memory 310. Assume that the specific region including the mapping information for specific data is the first region (e.g., region "1"). Because a flag is currently set in the request to create write data, the processor 210 can determine that the mapping information 411 for the specific region including the data is managed by the first RAM 400 at the host 40. The processor 210 can set a reference flag 411a of the mapping information 411 for the first region (region "1") within the mapping information stored (or to be stored) in the first RAM 400 to "1".

[0124] Because the request to create data is a request to write data, the processor 210, according to various embodiments, can determine that the mapping information 411 of the first region currently stored in the first RAM 400 will be changed later (indicated by the dashed line), and the processor 210 can set the update flag (need_update flag) 411b of the mapping information 411 of the first region to "1" for the information about the mapping information 411 of the first region stored (to be stored) in the mapping information in the first RAM 400. The case where the value of the update flag 411b of the mapping information 411 of the first region is "1" may, for example, mean that the mapping information of the first region 411 needs to be updated from the NAND flash memory (non-volatile memory) 310 of the storage unit 300 to the first RAM 400.

[0125] In operation ④, according to various embodiments, the processor 210 can send a request to the storage host controller 220 to write data including data at a logical address via the storage drive 215. For example, the processor 210 can send a request to the storage host controller 220 to write data including specific data at logical address "3".

[0126] In operation ⑤, according to various embodiments, the processor 210 can send a request to write data including the logical address of the data to the storage unit 300 via the storage unit host controller 220.

[0127] In operation ⑥, the storage unit controller 330, according to various embodiments, can execute a request to write data at a logical address into the NAND flash memory (non-volatile memory) 310. For example, the storage unit controller 330 can recognize that the physical address corresponding to the logical address "3" in the mapping information 311 in the NAND flash memory 310 has changed to "2" due to the request to write data.

[0128] In operation ⑦, according to various embodiments, the processor 210 can send an update request for mapping information of a specific region in the first RAM 400 to the storage unit 300 by executing the storage unit driver 215 of the storage unit 300. For example, because the update flag 411b of the mapping information 411 of the first region in the first RAM 400 is set to "1", the processor 210 can send an update request for the mapping information 411 of the first region to the storage unit 300. In response to receiving the update request, according to various embodiments, the storage unit 300 can extract the mapping information of the first region from the NAND flash memory 310 and send the extracted mapping information to the processor 210.

[0129] In operation ⑧, the processor 210 according to various embodiments can receive mapping information of a specific region from the storage unit 300 and store the received mapping information in the first RAM 400. The mapping information 411 of the first region, indicated by dashed lines, can be loaded into the first RAM 400 through operation ⑧. When the mapping information 411 of the specific region is completely updated, the processor 210 according to various embodiments can change the update flag (need_update flag) 411b of the mapping information 411 of the first region stored in the first RAM 400 to "0". If the value of the update flag 411b of the mapping information 411 of the first region is "0", it may, for example, mean that the mapping information 411 of the first region stored in the first RAM 400 does not need to be updated.

[0130] According to various embodiments, operations ⑥ and ⑦ can be performed in response to a situation where a request to write data has been fully processed or in response to a situation where a request to process data has been fully processed and there is no request to process data currently.

[0131] Figure 9 The block diagram of the electronic device illustrates an example process of an electronic device according to various embodiments of the present disclosure processing a request to delete data.

[0132] Reference Figure 9 In operation ①, the processor 210, according to various embodiments, can recognize the creation of a request to delete a specific file (e.g., a data deletion I / O request or a data discard I / O request). The processor 210, according to various embodiments, can recognize the type of data request created (e.g., a read / write / delete request) and can identify that the data request created is a data deletion request. The processor 210, according to various embodiments, can identify the logical address of the data of the specific file for which the data deletion request was created via the file system 213. For example, the processor 210 can identify that a request was created to delete data corresponding to logical addresses "1" to "3" included in the A.apk file 214 in order to delete the A.apk file 214.

[0133] In operation ②, the processor 210, according to various embodiments, can identify information about a specific file 214 that created the request to read data via the file system 213. The processor 210, according to various embodiments, can set a flag in the created request to delete data based on the identified file information.

[0134] In operation ③, in response to a request to create data being a request to delete data, processor 210, according to various embodiments, can determine that mapping information for a specific region including the data is not managed by the first RAM 400 on the host side. Processor 210 can set a reference flag 411a of the mapping information 411 of the first region (e.g., region "1") to "0" for information about the first region (e.g., region "1") in the mapping table 410 stored in the first RAM 400. Processor 210, according to various embodiments, can set an update flag (need_update flag) 411b of the mapping information 411 of the first region to "0" in response to a request to create data being a request to delete data. Processor 210, according to various embodiments, can delete (or unload) the mapping information 411 of the specific region from the first RAM 400. The mapping information 411 of the specific region, indicated by the shaded line and which can be stored in the first RAM 400, may refer to, for example, mapping information to be deleted later.

[0135] In operation ④, according to various embodiments, the processor 210 can send a request to delete data including logical addresses of data to the storage host controller 220 by executing the storage drive 215. For example, the processor 210 can send a request to delete data including logical addresses "1" to "3" to the storage host controller 220.

[0136] In operation ⑤, according to various embodiments, the processor 210 can send a request to delete data including logical addresses to the storage unit 300 via the storage unit host controller 220.

[0137] In operation ⑥, the storage controller 330 according to various embodiments can process data deletion requests by means of NAND flash memory (e.g., non-volatile memory) 310. For example, the storage controller 330 can delete physical addresses mapped to logical addresses "1" to "3" of the data.

[0138] Figure 10 This is a flowchart illustrating example operation of an electronic device according to various embodiments of the present disclosure.

[0139] Referring to the operation flowchart 1000, in operation 1010, the processor 210 according to various embodiments (e.g., Figure 4 The file system (213) can identify requests that create data included in a specific file.

[0140] In operation 1020, processor 210 according to various embodiments (e.g., Figure 4The file system 213 can, in response to a request to create data included in a specific file, identify the type (or category) of the request for information about the specific file and the data. For example, processor 210 can identify the file extension (e.g., apk, vdex, so, sc, or lib) and attribute information (e.g., executable file). For example, processor 210 can identify whether a specific file is included in a Least Recently Used (LRU) list or a Most Recently Used (LRU) list. For example, processor 210 can manage and store least recently used applications in the LRU list. For example, processor 210 can record and manage the most recently used applications or files in the LRU list through the operating system (OS) or the running machine. For example, processor 210 can identify whether a request to create data is a request to read data, a request to write data, or a request to delete data.

[0141] In operation 1030, processor 210 according to various embodiments (e.g., Figure 4 The file system 213 can determine whether to set a flag in the request to create data based on information about a specific file identified. For example, the processor 210 can set a flag in the request to create data in response to determining that a specific file is a file used to execute a specific application. For example, the processor 210 can identify whether a specific file is a read-only file by means of a first volatile memory at the host 40 (e.g., ...). Figure 4 The first RAM 400) determines whether it is suitable to manage mapping information of a specific region corresponding to the data, and the processor 210 may, in response to the processor 210 determining that it is suitable to use the first volatile memory (e.g., ...) Figure 4 The first RAM 400 is used to manage the mapping information and set flags in the data request.

[0142] During operation 1040, the processor 210 (e.g., memory driver 215) according to various embodiments can identify whether mapping information of a specific region including the logical address of data is stored in the first volatile memory (e.g., Figure 4 In the first RAM 400). For example, the processor 210 can identify the non-volatile memory (e.g., storage unit 300) therein. Figure 4 The mapping information of logical addresses and physical addresses of the NAND flash memory 310 (e.g., Figure 4 The mapping information of a specific region containing the logical address of data in the L2P mapping information 311 in the NAND flash memory 310 is stored in the first volatile memory (e.g., Figure 4 In the first RAM 400).

[0143] In operation 1050, the processor 210 (e.g., storage drive 215) according to various embodiments can determine whether to use a first volatile memory (e.g., storage drive 215) based on the type of the identified data request and whether a flag is set in the data request. Figure 4 The first RAM 400 manages the mapping information for a specific region. For example, if the type of data request identified is a data read request and a flag is set in the data request, the processor 210 can determine that the mapping information for the specific region is managed by the first volatile memory (e.g., RAM 400). Figure 4 The first RAM 400) manages the data. For example, if the type of data request identified is a write data request and a flag is set in the data request, the processor 210 can determine that the mapping information for a specific region is managed by the first volatile memory (e.g., RAM 400). Figure 4 The first RAM 400) manages the data. For example, if the type of data request identified is a data deletion request, the processor 210 can determine that the mapping information for a specific region is not managed by the first volatile memory (e.g., RAM 400). Figure 4 The first RAM 400) is managed.

[0144] In response to the mapping information of a specific region, it is determined that the first volatile memory (e.g., Figure 4 The processor 210 (e.g., memory drive 215) according to various embodiments can manage the first volatile memory (e.g., RAM 400). Figure 4 The reference flag 411a of a specific region in the first RAM 400 is set to "1". For example, the processor 210 may respond to the determination that the mapping information of the specific region is not determined by the first volatile memory (e.g., Figure 4 The first RAM 400) manages the first volatile memory (e.g., Figure 4 The reference flag 411a of a specific region in the first RAM 400 is set to "0".

[0145] In operation 1060, the processor 210 (e.g., storage driver 215) according to various embodiments can, based on the type of the identified data request and whether the mapping information of the identified specific region is stored in the first volatile memory (e.g., ... Figure 4 In the first RAM 400), it is determined whether to update the first volatile memory (e.g., Figure 4 The mapping information of a specific region in the first RAM400.

[0146] For example, processor 210 can determine that it is not necessary to update the first volatile memory (e.g., based on the fact that the identified data request is a data read request) Figure 4The mapping information of a specific region in the first RAM 400) and the mapping information of the specific region is stored in the first volatile memory (e.g., Figure 4 In the first RAM 400).

[0147] For example, processor 210 can determine whether the first volatile memory needs to be updated based on whether the identified data request is a data read request (e.g., Figure 4 The mapping information of a specific region in the first RAM 400), and the mapping information of the specific region is not stored in the first volatile memory (e.g., Figure 4 In the first RAM 400).

[0148] For example, if the identified data request is a request to write data, then processor 210 can determine that the first volatile memory needs to be updated (e.g., Figure 4 The mapping information of a specific region in the first RAM (400).

[0149] For example, if the identified data request is a request to delete data, then processor 210 can determine that it is not necessary to update the first volatile memory (e.g., Figure 4 The mapping information of a specific region in the first RAM (400).

[0150] According to various embodiments, the processor 210 may, in response to determining that mapping information for a specific region needs to be updated, allocate a first volatile memory (e.g., Figure 4 The update flag 411b of a specific region in the first RAM 400 is set to "1". For example, the processor 210 may, in response to determining that the mapping information of the specific region does not need to be updated, set the update flag 411b of the first volatile memory (e.g., RAM 400) to "1". Figure 4 The update flag 411b for a specific region in the first RAM 400 is set to "0".

[0151] Figure 11 This is a flowchart illustrating example operation of an electronic device according to various embodiments of the present disclosure.

[0152] The operation flowchart 1100 shows Figure 10 Examples of detailed operations for operations 1020 and 1030.

[0153] Referring to the operation flowchart 1100, the processor 210 according to various embodiments (e.g., Figure 4 The file system 213) can identify information about a specific file in operation 1110 in response to a request to create data included in a specific file.

[0154] In operation 1120, processor 210, according to various embodiments, can determine whether a particular file is a file used to execute a particular application as an identification result. For example, processor 210 can determine whether a particular file is a file used to execute a particular application by identifying the file extension and attribute information of the particular file. For example, if the file extension of the particular file is apk, vdex, so, sc, or lib, and the attribute of the particular file is an executable file attribute, then processor 210 can determine that the particular file is a file used to execute a particular application.

[0155] If a particular file is determined to be used to execute a particular application, the processor 210 can set a flag in the data request via branch operation 1130 (1120 - yes).

[0156] If it is determined that a particular file is not being used to execute a particular application, the processor 210 can identify whether the particular file is included in the Least Recently Used (LRU) list or the Most Recently Used (LRU) list via branch operation 1140 (1120 - No).

[0157] In response to a specific file being included in the least recently used list or the most recently used list as an identification result, processor 210 can set a flag in the data request via branch operation 1130 (1140 - yes).

[0158] In response to a situation where a particular file is not included in the least recently used list or the most recently used list as an identification result, processor 210 may set a flag in the data request without branching operation 1150 (1140 - no).

[0159] Figure 12A and Figure 12B This is a flowchart illustrating example operation of an electronic device according to various embodiments of the present disclosure. (Refer to...) Figure 10 and Figure 11 Explanations of overlapping content will not be repeated here.

[0160] Referring to the operation flowchart 1200, in operation 1201, the processor 210 according to various embodiments (e.g., Figure 4 The file system (213) can recognize requests to create data included in a specific file.

[0161] During operation 1203, the processor 210, according to various embodiments, can identify file information of a specific file and the type of data request (e.g., read / write / delete request).

[0162] In operation 1205, processor 210, according to various embodiments, can determine whether a flag is set in the request based on information about the identified specific file. For example, if it is determined that the specific file is used to execute a specific application, or if the specific file is included in a Least Recently Used (LRU) list or a Most Recently Used (LRU) list, processor 210 can set a flag in the data request.

[0163] If no flag is set in the data request, the processor 210 can send the data request directly to the storage unit 300 via branch operation 1206 (1205 - No).

[0164] If a flag is set in the data request, the processor 210 can identify whether the data request is a request to read data through branch operation 1207 (1205 - Yes).

[0165] If the data request is not a request to read data as the identification result, then the operation of processor 210 can proceed to operation B (1207-No). See below for reference. Figure 12B Describe operation B.

[0166] If the data request is a request to read data as an identification result, then processor 210 can determine, through branch operation 1209 (1207 - yes), the mapping information of a specific region including the logical address of the data from the first volatile memory (e.g., ...). Figure 4 The first volatile memory (e.g., the first RAM 400) manages the data. For example, if a flag is set in a request to read data, the processor 210 can determine that the mapping information of a specific region including the logical address of the data is managed by the first volatile memory (e.g., the first RAM 400).

[0167] In operation 1211, processor 210, according to various embodiments, can identify whether mapping information for a specific region is stored in a first volatile memory (e.g., Figure 4 In the first RAM 400).

[0168] If the mapping information for a specific region is stored in the first volatile memory (e.g., Figure 4 If the first RAM 400) is used as the recognition result, then the processor 210 can use the memory stored in the first volatile memory (e.g., ) through branch operation 1219 (1211 - yes) Figure 4 The processor 210, according to various embodiments, can send a request to the storage unit 300 to read data including the physical address of the data by using mapping information of a specific region in the first RAM 400.

[0169] If the mapping information for a specific region is not stored in the first volatile memory (e.g., Figure 4 If the first RAM 400 is used as the identification result, the processor 210 can send a request to read the logical address containing the data to the storage unit 300 through branch operation 1213 (1211-No).

[0170] In operation 1215, processor 210, according to various embodiments, may determine that the first volatile memory needs to be updated (e.g., Figure 4 The mapping information of a specific region in the first RAM 400), and therefore the processor 210 can update the first volatile memory (e.g., Figure 4 A request for mapping information of a specific region in the first RAM (400) is sent to the storage unit (300).

[0171] In operation 1217, according to various embodiments, the processor 210 can receive mapping information of a specific region from the storage unit 300 in response to the sending of an update request, and can store the received mapping information of the specific region in a first volatile memory (e.g., Figure 4 In the first RAM 400).

[0172] According to various embodiments, operations 1215 and 1217 for updating the mapping information of a specific region can be performed in response to a situation where a request to read data has been fully processed or in response to a situation where a request to read data has been fully processed and there is no request for data currently being processed.

[0173] Reference Figure 12B In operation B, the processor 210 according to various embodiments (e.g., Figure 4 The file system (213) can identify whether a data request is a write data request through branch operation (1223).

[0174] If the data request is a request to write data as an identification result, then processor 210 can determine the mapping information of a specific region from the first volatile memory (e.g., ...) through branch operation 1225 (1223 - Yes). Figure 4 The first RAM400) is managed.

[0175] In operation 1227, the processor 210, according to various embodiments, can send a request to write data including a logical address of the data to the storage unit 300.

[0176] In operation 1229, if the data request is a request to write data, the processor 210, according to various embodiments, can determine that the first volatile memory needs to be updated (e.g., ...). Figure 4The first RAM 400) mapping information of a specific region, and the processor 210 can update the first volatile memory (e.g., Figure 4 A request for mapping information of a specific region in the first RAM (400) is sent to the storage unit (300).

[0177] In operation 1231, according to various embodiments, the processor 210 can receive a request to update the mapping information of a specific region from the storage unit 300 in response to a request to send the mapping information of the specific region, and the processor 210 can store the received mapping information of the specific region in a first volatile memory (e.g., ...). Figure 4 The update is performed in the first RAM 400.

[0178] If the data request is not identified as a request to write data, the processor 210 can identify that the data request is a request to delete data through branch operation 1233 (1223-No).

[0179] In operation 1235, in response to the request for data deletion, processor 210, according to various embodiments, can determine that the mapping information for a specific region is not stored in the first volatile memory (e.g., ...). Figure 4 The first RAM 400) is managed.

[0180] In operation 1237, processor 210, according to various embodiments, can send a request to delete data including the logical address of the data to storage unit 300.

[0181] According to various embodiments, operations 1229 and 1231 for updating the mapping information of a specific region can be performed in response to a situation where a request to write data has been fully processed or in response to a situation where a request to write data has been fully processed and there is no request to process data.

[0182] Figure 13 This is a flowchart illustrating example operation of an electronic device according to various embodiments of the present disclosure.

[0183] Referring to the operation flowchart 1300, in operation 1310, the processor 210 according to various embodiments (e.g., Figure 4 The file system 213 can identify whether a request has been made to create data included in a file. In operation 1320, the processor 210, according to various embodiments, can, in response to a request to create data included in a file, identify whether mapping information of a specific region of the logical address of the included data is stored in a first volatile memory (e.g., ...). Figure 4 In the first RAM 400).

[0184] In operation 1330, the processor 210, according to various embodiments, can send a data request to the storage unit 300. For example, the processor 210 can send a request for data including the logical address of the data to the storage unit 300 in response to a situation where mapping information for a specific region is not stored in the first volatile memory. For example, the processor 210 can, in response to a situation where mapping information for a specific region is stored in the first volatile memory, identify the physical address corresponding to the logical address of the data using the mapping information for the specific region, and the processor 210 can send a request for data including the physical address of the data to the storage unit 300.

[0185] In operation 1340, according to various embodiments, the processor 210 may send a request to read the mapping information of a specific region to the storage unit 300 in response to a situation where the mapping information of a specific region is not stored in the first volatile memory. According to various embodiments, the storage unit 300 may identify the mapping information of the specific region from the non-volatile memory 310 of the storage unit 300 in response to receiving the request to read the mapping information of the specific region, and may send the mapping information of the specific region to the processor 210.

[0186] An electronic device (e.g., electronic device 101) according to various example embodiments of the present disclosure may include a processor (e.g., processor 210), a first volatile memory (e.g., first RAM 400), and a storage unit (e.g., storage unit 300) including a non-volatile memory (e.g., NAND flash memory) and a second volatile memory (e.g., second RAM 320). The processor according to various embodiments is configured to: identify information about a specific file and the type of request for data included in the specific file in response to a request for data creation; determine whether to set a flag in the request based on the identified information about the specific file; identify whether mapping information of a region including the logical address of data in mapping information where logical addresses and physical addresses of the non-volatile memory are mapped to each other is stored in the first volatile memory; determine whether to use the first volatile memory to manage the mapping information of a specific region based on the identified type of request and whether a flag is set in the request; and determine whether to update the mapping information of the specific region in the first volatile memory based on the identified type of request and the result of identifying whether the mapping information is stored.

[0187] In an electronic device according to various example embodiments, the processor may be configured to: identify the extension and attribute information of a particular file, and set a flag in a data request in response to the fact that the particular file is a file used to execute a particular application.

[0188] In an electronic device according to various example embodiments, the processor may be configured to: identify whether a particular file is included in a least recently used list or a most recently used list, and set a flag in a data request in response to the particular file being included in the least recently used list or the most recently used list.

[0189] In an electronic device according to various example embodiments, the processor may be configured to determine, in response to a request for data that is a request to read data and a flag is set in the request, to use a first volatile memory to manage mapping information of a specific region.

[0190] In an electronic device according to various example embodiments, the processor may be configured to send a request to the storage unit to read data including the logical address of the data in response to the fact that mapping information of a specific region is not stored in a first volatile memory.

[0191] In the electronic device 101 according to various example embodiments, the processor may be configured to: send a request to the storage unit to update the mapping information of a specific region in the first volatile memory, and receive the mapping information of the specific region from the storage unit and store the received mapping information in the first volatile memory.

[0192] In an electronic device according to various example embodiments, the processor may be configured to send an update request to the storage unit in response to a request to read fully processed data.

[0193] In an electronic device according to various example embodiments, the processor may be configured to send an update request to the storage unit in response to a request that no data currently being processed exists.

[0194] In an electronic device according to various example embodiments, the processor may be configured to: in response to storing mapping information of a specific region in a first volatile memory, identify a physical address mapped to a logical address of data using the mapping information of the specific region; and send a request to the storage unit to read data including the identified physical address.

[0195] In an electronic device according to various example embodiments, the processor may be configured to: send a request to the storage unit to update mapping information of a specific region in a first volatile memory in response to a request to write data; and update the mapping information of the specific region in the first volatile memory by receiving the mapping information of the specific region from the storage unit.

[0196] In an electronic device according to various example embodiments, the processor may be configured to, in response to a request for data deletion, determine that mapping information of a specific region is not managed using a first volatile memory, and send a request to the storage unit to delete the data.

[0197] In electronic devices according to various example embodiments, mapping information for a specific area includes metadata for integrity identification.

[0198] Methods of using the storage unit of an electronic device (e.g., electronic device 101) according to various example embodiments of the present disclosure may include: identifying information about a specific file and the type of request for data included in the specific file in response to a request for data creation; determining whether to set a flag in the request based on the identified information about the specific file; identifying whether mapping information of a specific region including logical addresses of data in mapping information of logical addresses and physical addresses of a non-volatile memory (e.g., NAND flash memory 310) in the storage unit (e.g., storage unit 300) is stored in a first volatile memory (e.g., first RAM 400); determining whether to use the first volatile memory to manage the mapping information of the specific region based on the identified type of request and whether a flag is set in the request; and determining whether to update the mapping information of the specific region in the first volatile memory based on the identified type of request and the result of identifying whether the mapping information is stored.

[0199] In the method of using the storage section of an electronic device according to various example embodiments, identifying information about a specific file includes identifying the file extension and attribute information of the specific file, and setting a flag includes setting a flag in a data request in response to the fact that the specific file is a file used for a specific application.

[0200] In a method of using the storage section of an electronic device according to various example embodiments, determining whether to use a first volatile memory to manage mapping information of a specific area may include: in response to a data request being a request to read data and a flag being set in the request, determining to use the first volatile memory to manage mapping information of a specific area.

[0201] The method of using the storage section of an electronic device according to various example embodiments may further include: sending a request to the storage section to read data including a logical address of data in response to the fact that mapping information of a specific region is not stored in a first volatile memory.

[0202] The method of using the storage section of an electronic device according to various example embodiments may further include: sending a request to update mapping information of a specific region in a first volatile memory to the storage section, and receiving the mapping information of the specific region from the storage section and storing the received mapping information into the first volatile memory.

[0203] In a method of using the storage unit of an electronic device according to various example embodiments, sending an update request to the storage unit may include sending an update request to the storage unit in response to a request to read data that has been fully processed.

[0204] An electronic device (e.g., electronic device 101) according to various example embodiments of the present disclosure may include a processor (e.g., processor 210), a first volatile memory (e.g., first RAM 400), and a storage unit (e.g., storage unit 300) including a non-volatile memory (e.g., NAND flash memory 310) and a second volatile memory (e.g., second RAM 320). The processor according to various embodiments is configured to: in response to a request to create data included in a file to identify whether mapping information of a specific region of the logical address of the data in a mapping message in which logical addresses and physical addresses of the non-volatile memory are mapped to each other is stored in the first volatile memory, send a request to the storage unit to send data; and in response to a request that the mapping information of the specific region is not stored in the first volatile memory, send a request to the storage unit to read the mapping information of the specific region.

[0205] In an electronic device according to various example embodiments, the processor may be configured to: send a request to a storage unit for data including a logical address of the data in response to the fact that mapping information of a specific region is not stored in a first volatile memory, and send a request to a storage unit for data including a physical address of the data in response to the fact that mapping information of a specific region is stored in the first volatile memory.

[0206] According to various example embodiments of the present disclosure, in an electronic device, the processor determines and manages a portion of the mapped information to be loaded into the volatile memory of a host device, thereby improving the processing speed of requests for data required by the user.

[0207] According to various example embodiments of the electronic device of the present disclosure, the processor determines the time for the processor to load mapping information into the volatile memory of the host device, thereby reducing the overhead caused by loading the mapping information.

[0208] The electronic device according to various embodiments can be one of a variety of types of electronic devices. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. According to embodiments of this disclosure, the electronic device is not limited to those described above.

[0209] It should be understood that the various embodiments of this disclosure and the terminology used therein are not intended to limit the technical features set forth herein to the specific embodiments, but rather to include various changes, equivalents, or substitutions to the respective embodiments. In the description of the drawings, similar reference numerals may be used to refer to similar or related elements. It will be understood that nouns in the singular form corresponding to terms may include one or more things unless the relevant context clearly indicates otherwise. As used herein, each of the phrases such as “A or B,” “at least one of A and B,” “at least one of A or B,” “A, B, or C,” “at least one of A, B, and C,” and “at least one of A, B, or C” may include all possible combinations of the items enumerated together with the corresponding phrase among the plurality of phrases. As used herein, terms such as “first” and “second” or “first” and “second” may be used to simply distinguish one component from another and do not limit the components in other respects (e.g., importance or order). It will be understood that, whether the terms “operably” or “communically” are used or not, if an element (e.g., a first element) is referred to as “combined with another element (e.g., a second element),” “combined to another element (e.g., a second element),” “connected to another element (e.g., a second element),” or “attached to another element (e.g., a second element)”, it means that the first element can be directly (e.g., wiredly) connected to the second element, wirelessly connected to the second element, or connected to the second element via a third element.

[0210] As used herein, the term "module" can include a unit implemented in hardware, software, or firmware, and is used interchangeably with other terms (e.g., "logic," "logic block," "part," or "circuit"). A module can be a single integrated component adapted to perform one or more functions, or the smallest unit or part of such a single integrated component. For example, according to an embodiment, a module can be implemented in the form of an application-specific integrated circuit (ASIC).

[0211] The various embodiments set forth herein can be implemented as software (e.g., program 140) containing one or more instructions readable by a machine (e.g., electronic device 101) stored in a storage medium (e.g., internal memory 136 or external memory 138). For example, under the control of a processor, the processor (e.g., processor 120) of the machine (e.g., electronic device 101) can invoke and execute at least one of the one or more instructions stored in the storage medium, with or without the use of one or more other components. This enables the machine to operate to perform at least one function according to the invoked at least one instruction. The one or more instructions may include code generated by a compiler or code executable by an interpreter. Machine-readable storage media may be provided in the form of non-transitory storage media. The term "non-transitory" means only that the storage medium is a tangible device and does not include signals (e.g., electromagnetic waves), but this term does not distinguish between data being stored semi-permanently in the storage medium and data being temporarily stored in the storage medium.

[0212] According to embodiments, methods according to various embodiments of this disclosure may be included and provided in a computer program product. The computer program product can be traded as a product between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., a compact disk read-only memory (CD-ROM)) or via an app store (e.g., the Play Store). TM The computer program product may be published online (e.g., downloaded or uploaded), or may be distributed directly between two user devices (e.g., smartphones) (e.g., downloaded or uploaded). If published online, at least a portion of the computer program product may be temporarily generated, or at least a portion of the computer program product may be temporarily stored in a machine-readable storage medium (such as the memory of a manufacturer's server, an app store's server, or a forwarding server).

[0213] According to various embodiments, each of the above-described components (e.g., a module or program) may include a single entity or multiple entities. According to various embodiments, one or more of the above-described components may be omitted, or one or more other components may be added. Optionally or additionally, multiple components (e.g., modules or programs) may be integrated into a single component. In this case, according to various embodiments, the integrated component may still perform the one or more functions of each of the multiple components in the same or similar manner as the corresponding component of the multiple components performed one or more functions prior to integration. According to various embodiments, the operations performed by a module, program, or other component may be performed sequentially, in parallel, repeatedly, or heuristically, or one or more of the operations may be run in a different order or omitted, or one or more other operations may be added.

[0214] Although this disclosure has been shown and described with reference to various exemplary embodiments, it will be understood that these exemplary embodiments are intended to be illustrative and not restrictive. Those skilled in the art will understand that various changes in form and detail may be made without departing from the true spirit and full scope of this disclosure, including the appended claims and their equivalents.

Claims

1. An electronic device, the electronic device comprising: processor; First volatile memory; as well as The storage unit includes non-volatile memory and a second volatile memory. The processor is configured as follows: In response to the creation of a request for data included in a file, information about the file and the type of data request are identified. Determine whether to set a flag in the request based on the information of the identified file. The mapping information, which identifies the region containing the logical address of the data in the mapping information that maps the logical and physical addresses of the non-volatile memory to each other, is stored in the first volatile memory. Based on the type of the identified request and whether a flag is set in the request, it is determined whether the first volatile memory should be used to manage the mapping information of the region containing the logical address of the data. Based on the type of the identified request and the result of identifying whether the mapping information is stored, it is determined whether to update the mapping information of the region in the first volatile memory that includes the logical address of the data. The processor is further configured to: in response to a request to read or write the data and a flag being set in the request, determine mapping information for using the first volatile memory to manage the region containing the logical address of the data. The processor is further configured to: in response to the fact that mapping information of a region including the logical address of the data is not stored in the first volatile memory, send a request to the storage unit to read or write data including the logical address of the data. The processor is further configured as follows: In response to the complete processing of a request to read or write the data, a request is sent to the storage unit to update the mapping information of the region in the first volatile memory that includes the logical address of the data. The system receives mapping information of a region containing the logical address of the data from the storage unit and stores the received mapping information in the first volatile memory.

2. The electronic device according to claim 1, wherein, The processor is further configured to: Identify the file extension and attribute information, and In response to the fact that the file is a file used to execute a specific application, the flag is set in the request for the data.

3. The electronic device according to claim 1, wherein, The processor is further configured to: Identify whether the file is included in the least recently used list or the most recently used list, and The flag is set in the request for the data in response to whether the file is included in the least recently used list or the most recently used list.

4. The electronic device according to claim 1, wherein, The processor is further configured to send a request to the storage unit to update the mapping information of the region in response to the complete processing of a request to read or write the data.

5. The electronic device according to claim 1, wherein, The processor is further configured to send a request to the storage unit to update the mapping information of the region in response to the absence of a request for data currently being processed.

6. The electronic device according to claim 1, wherein, The processor is further configured to: In response to the mapping information of the region including the logical address of the data being stored in the first volatile memory, the physical address mapped to the logical address of the data is identified by the mapping information of the region including the logical address of the data. as well as A request is sent to the storage unit to read the data, including the identified physical address.

7. The electronic device according to claim 1, wherein, The processor is further configured to: In response to the request to write the data, a request is sent to the storage unit to update the mapping information of the region in the first volatile memory that includes the logical address of the data. The mapping information of the region containing the logical address of the data in the first volatile memory is updated by receiving mapping information of the region containing the logical address of the data from the storage unit.

8. The electronic device according to claim 1, wherein, The processor is further configured to: In response to a request to delete the data, it is determined that the mapping information for the region containing the logical address of the data will not be used in the first volatile memory. Send a request to the storage unit to delete the data.

9. The electronic device according to claim 1, wherein, The mapping information for the region containing the logical address of the data includes metadata used for integrity identification.

10. A method of using the storage section of an electronic device, the method comprising: In response to the creation of a request for data included in a file, information about the file and the type of request for the data are identified; Determine whether to set a flag in the request based on the information of the identified file; Whether the mapping information of the region containing the logical address of the data in the mapping information of the logical address and physical address of the non-volatile memory included in the storage unit is stored in the first volatile memory; Based on the type of the identified request and whether a flag is set in the request, determine whether to use the first volatile memory to manage the mapping information of the region containing the logical address of the data; Based on the type of the identified request and the result of identifying whether the mapping information is stored, determine whether to update the mapping information of the region in the first volatile memory that includes the logical address of the data; In response to a request to read or write the data and the flag being set in the request, it is determined that the mapping information for the region containing the logical address of the data is to be managed using the first volatile memory. In response to the fact that the mapping information of the region including the logical address of the data is not stored in the first volatile memory, a request to read or write data including the logical address of the data is sent to the storage unit; In response to the complete processing of the request to read or write the data, a request is sent to the storage unit to update the mapping information of the region in the first volatile memory that includes the logical address of the data; as well as The system receives mapping information of a region containing the logical address of the data from the storage unit and stores the received mapping information in the first volatile memory.

11. The method according to claim 10, wherein, The information used to identify the file includes identifying the file's extension and attribute information, as well as... Setting the flag includes setting the flag in a request for data in response to the file being a file for a specific application.

12. The method according to claim 10, wherein, Sending a request to the storage unit to update the mapping information of the region includes: sending a request to the storage unit to update the mapping information of the region in response to the complete processing of a request to read or write the data.

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