Semiconductor structure and method for forming the same

Abstract

The present invention provides a semiconductor structure and a method for forming the same. The method for forming the semiconductor structure comprises: providing a substrate; forming a dielectric layer on the substrate; forming a contact hole in the dielectric layer; forming a seed layer at the bottom and sidewall of the contact hole, wherein the thickness of the seed layer at the bottom of the contact hole is greater than the thickness at the sidewall of the contact hole; and forming a conductive plug in the contact hole. The semiconductor structure comprises: a substrate; a dielectric layer on the substrate; a contact hole in the dielectric layer; a seed layer at the bottom and sidewall of the contact hole, wherein the thickness of the seed layer at the bottom of the contact hole is greater than the thickness at the sidewall of the contact hole; and a conductive plug in the contact hole. The present invention can improve the reliability of the electrical connection of the conductive plug.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular to a semiconductor structure and a method for forming the same. Background Art

[0002] The main semiconductor device of integrated circuits, especially very large-scale integrated circuits, is the metal-oxide-semiconductor field-effect transistor (MOS transistor). With the development trend of very large-scale integrated circuits, integrated circuits are becoming more and more complex, and the technical nodes of semiconductor devices are constantly decreasing. When the size of semiconductor devices is reduced to a certain extent, various secondary effects caused by the physical limits of semiconductor devices appear one after another, such as: the problem of large leakage current of semiconductor devices. In order to improve the leakage current problem, high-k gate dielectric materials are currently mainly used to replace traditional silicon dioxide gate dielectric materials, and metals are used as gate electrodes to avoid the Fermi level pinning effect and boron penetration effect between high-k materials and traditional gate electrode materials.

[0003] Moreover, with the development trend of ultra-large-scale integrated circuits, more and more components are included, and the contact hole process has become an indispensable process step in the manufacture of MOS transistors. The contact hole plug is an important medium for connecting the active area of ​​MOS transistors with the back-end metal layer and finally connecting to the external circuit. The formation quality of the contact hole plug directly affects the device performance and product yield.

[0004] The development of technology has put forward higher requirements on the reliability of the electrical connection between the contact plug and the external circuit. Summary of the invention

[0005] The problem solved by the embodiments of the present invention is to provide a semiconductor structure and a method for forming the same, so as to improve the reliability of electrical connection.

[0006] To solve the above problems, the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a dielectric layer on the substrate; forming a contact hole in the dielectric layer; forming a seed layer at the bottom and sidewalls of the contact hole, wherein the thickness of the seed layer at the bottom of the contact hole is greater than the thickness on the sidewalls of the contact hole; and forming a conductive plug in the contact hole.

[0007] Optionally, the step of forming the seed layer includes: forming a first seed layer on the bottom and sidewalls of the contact hole by a chemical vapor deposition process; and forming a second seed layer on the first seed layer by a radio frequency physical vapor deposition process.

[0008] Optionally, the power of the RF physical vapor deposition process is 2KW-4KW, and the frequency is in the range of 2MHZ-40MHZ.

[0009] Optionally, the step of forming a seed layer includes: forming a first seed layer at the bottom and sidewall of the contact hole by a chemical vapor deposition process; forming a second seed layer on the first seed layer by a direct current physical vapor deposition process, and the power of the direct current physical vapor deposition process is in the range of 5KW-15KW.

[0010] Optionally, a thickness of the second seed layer at the bottom of the contact hole is more than twice a thickness of the second seed layer on the side wall.

[0011] Optionally, the thickness of the first seed layer is in the range of 1-5 nm.

[0012] Optionally, the thickness of the second seed layer is in the range of 2-8 nm.

[0013] Optionally, the material of the seed layer is cobalt or ruthenium.

[0014] Optionally, a conductive plug is formed in the contact hole by an electroplating process.

[0015] Optionally, the conductive plug is made of copper.

[0016] Optionally, the method further includes: forming a diffusion barrier layer on the bottom and sidewalls of the contact hole after forming the contact hole and before forming the seed layer.

[0017] Optionally, the diffusion barrier layer has a thickness in the range of 1-5 nm.

[0018] Correspondingly, the present invention also provides a semiconductor structure, comprising: a substrate; a dielectric layer located on the substrate; a contact hole located in the dielectric layer; a seed layer located on the bottom and side walls of the contact hole, the thickness of the seed layer at the bottom of the contact hole being greater than the thickness on the side walls of the contact hole; and a conductive plug located in the contact hole.

[0019] Optionally, the seed layer includes: a first seed layer located at the bottom and sidewalls of the contact hole; and a second seed layer located on the first seed layer, wherein the thickness of the second seed layer at the bottom of the contact hole is greater than the thickness on the sidewalls of the contact hole.

[0020] Optionally, a thickness of the second seed layer at the bottom of the contact hole is more than twice a thickness of the second seed layer on the side wall.

[0021] Optionally, the thickness of the first seed layer is in the range of 1-5 nm.

[0022] Optionally, the thickness of the second seed layer is in the range of 2-8 nm.

[0023] Optionally, the material of the seed layer is cobalt or ruthenium.

[0024] Optionally, the conductive plug is made of copper.

[0025] Optionally, the method further includes: a diffusion barrier layer located between the bottom of the contact hole or the sidewall of the contact hole and the seed crystal layer.

[0026] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0027] In the embodiment of the present invention, a seed layer is formed at the bottom and sidewalls of the contact hole, and the thickness of the seed layer at the bottom of the contact hole is greater than the thickness on the sidewalls of the contact hole. Thus, when a conductive plug is formed in the contact hole, since the thickness of the seed layer at the bottom of the contact hole is greater, the conductive material is more likely to nucleate on the thicker seed layer, and thus the growth rate of the conductive material above the bottom of the contact hole is faster. Thus, even if the opening of the contact hole is small, before the conductive materials on the sidewalls of the contact hole contact and seal the opening, the conductive material at the bottom of the contact hole has reached a greater thickness and the contact hole is completely filled, thereby reducing the probability of hole formation, improving the formation quality of the conductive plug, and further improving the reliability of the electrical connection between the conductive plug and the external circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 to Figure 2 is a schematic diagram of a method for forming a semiconductor structure;

[0029] Figures 3 to 8 It is a structural schematic diagram of each step of a method for forming a semiconductor structure according to an embodiment of the present invention. DETAILED DESCRIPTION

[0030] As can be seen from the background technology, the current electrical connection reliability between the contact hole plug and the external circuit is low. Figure 1 to Figure 2 The schematic diagram of the semiconductor structure forming method is shown to explain why the problem occurs.

[0031] refer to Figure 1 The opening size of the contact hole is getting smaller and smaller, and a seed layer 14 is formed on the side wall and the bottom of the contact hole. When the conductive material 13 is filled into the contact hole by electroplating, the conductive material at the bottom of the contact hole has not yet grown to the required thickness, and the conductive material located on the side wall of the contact hole has filled the contact hole opening, thereby generating a hole 15 at the opening of the contact hole.

[0032] Combined with reference Figure 2When the excessive conductive material 13 is removed by the planarization process, the remaining conductive material 13 in the contact hole is retained as a contact hole plug. Due to the presence of the hole 15, a notch 12 is formed on the surface of the contact hole plug formed after the planarization process, so that the morphology quality of the formed contact hole plug does not meet the requirements. The notch 12 easily causes a poor contact problem between the contact hole plug and the external circuit, thereby affecting the reliability of the electrical connection.

[0033] In order to solve the technical problem, an embodiment of the present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a dielectric layer on the substrate; forming a contact hole in the dielectric layer; forming a seed layer at the bottom and sidewalls of the contact hole, wherein the thickness of the seed layer at the bottom of the contact hole is greater than the thickness on the sidewalls of the contact hole; and forming a conductive plug in the contact hole.

[0034] In the embodiment of the present invention, a seed layer is formed at the bottom and sidewalls of the contact hole, and the thickness of the seed layer at the bottom of the contact hole is greater than the thickness on the sidewalls of the contact hole. Thus, when a conductive plug is formed in the contact hole, since the thickness of the seed layer at the bottom of the contact hole is greater, the conductive material is more likely to nucleate on the thicker seed layer, and thus the growth rate of the conductive material above the bottom of the contact hole is faster. Thus, even if the opening of the contact hole is small, before the conductive materials on the sidewalls of the contact hole contact and seal the opening, the conductive material at the bottom of the contact hole has reached a greater thickness and the contact hole is completely filled, thereby reducing the probability of hole formation, improving the formation quality of the conductive plug, and further improving the reliability of the electrical connection between the conductive plug and the external circuit.

[0035] Combined with reference Figures 3 to 8 , showing a schematic structural diagram of each step of a method for forming a semiconductor structure according to an embodiment of the present invention.

[0036] like Figure 3 As shown, a substrate (not shown) is provided to serve as a basis for subsequent processes. A plurality of devices to be connected are formed in the substrate.

[0037] In this embodiment, the material of the substrate is silicon. In other embodiments, the material of the substrate may also be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium, and the initial substrate may also be other types of substrates such as a silicon on insulator substrate or a germanium on insulator substrate.

[0038] In this embodiment, the device to be connected is a transistor, and the transistor can be a planar transistor or a fin field effect transistor.

[0039] In other embodiments, the device to be connected may also be other devices, such as a capacitor or an inductor.

[0040] like Figure 3 As shown, a dielectric layer 100 is formed on the substrate to isolate adjacent devices.

[0041] The dielectric layer 100 is an interlayer dielectric layer, and the material of the dielectric layer 100 is an insulating material. In this embodiment, the material of the dielectric layer 100 is SiOCH.

[0042] In other embodiments, the material of the interlayer dielectric layer may also be silicon nitride or silicon oxynitride, amorphous carbon or diamond-like carbon (DLC) or other dielectric materials.

[0043] In order to reduce the parasitic capacitance of the contact plug, the dielectric layer 100 may be made of a low-K or ultra-low-K insulating material. The low-K insulating material herein refers to an insulating material with a dielectric constant less than 3, and the ultra-low-K insulating material refers to an insulating material with a dielectric constant less than 2.0.

[0044] The dielectric layer 100 may also be a porous low-K dielectric material. In order to achieve a lower dielectric constant, a material with a lower dielectric constant may be used and porosity may be introduced into the material. Since the dielectric constant of air is specified as 1, the dielectric constant can be reduced.

[0045] In this embodiment, the dielectric layer 100 can be formed by chemical vapor deposition or physical vapor deposition.

[0046] It should be noted that, after forming the dielectric layer 100 and before forming the contact hole 101 , the forming method further includes: forming a mask on the dielectric layer 100 , wherein the mask has an opening for patterning the dielectric layer 100 to form the contact hole.

[0047] Specifically, the material of the mask is at least one of TEOS, TiN and SiOC.

[0048] Continue to refer Figure 3 A contact hole 101 is formed in the dielectric layer 100 for accommodating a conductive material to form a conductive plug.

[0049] Specifically, the contact hole 101 corresponds to the position of the device to be connected, and exposes the portion of the device to be connected that needs to be connected.

[0050] In actual process, the contact hole 101 can be formed by dry etching process. Dry etching is helpful to improve the etching efficiency of forming the contact hole 101, and the dry etching process has the characteristic of anisotropic etching, so it is also helpful to improve the morphology quality of the contact hole 101.

[0051] After the dry etching process, a cleaning process is further performed on the contact hole 101 to remove byproducts formed in the contact hole 101 by the dry etching process, thereby improving the formation quality of the contact hole plug.

[0052] Combined with reference Figures 4 to 6 A seed layer 110 is formed at the bottom and sidewalls of the contact hole 101 , and the thickness of the seed layer 110 at the bottom of the contact hole 101 is greater than the thickness on the sidewalls of the contact hole 101 .

[0053] The thickness of the seed layer 110 at the bottom of the contact hole 101 is greater than the thickness on the sidewall of the contact hole 101. Thus, when a conductive plug is formed in the contact hole 101, since the thickness of the seed layer 110 at the bottom of the contact hole 101 is greater, the conductive material is more likely to nucleate on the thicker seed layer. Therefore, the growth rate of the conductive material at the bottom of the contact hole 101 is faster. Thus, even if the opening of the contact hole 101 is small, before the conductive materials on the sidewalls of the contact hole 101 contact and seal the opening, the conductive material at the bottom of the contact hole 101 has reached a greater thickness and the contact hole 101 is completely filled, thereby reducing the probability of hole formation, improving the formation quality of the conductive plug, and further improving the reliability of the electrical connection between the conductive plug and the external circuit.

[0054] like Figure 4 As shown, in the embodiment of the present invention, before forming the seed layer 110 , a diffusion barrier layer 102 is formed on the bottom and sidewalls of the contact hole 101 to prevent metal diffusion.

[0055] Specifically, the diffusion barrier layer 102 includes one or more of TaN, Ta, TiN, Ti and WC.

[0056] It should be noted that if the thickness of the diffusion barrier layer 102 is too large, the diffusion barrier layer 102 occupies a large space on the bottom and sidewall of the contact hole 101, thereby affecting the subsequent formation of the seed layer 105 and the contact hole plug; if the thickness of the diffusion barrier layer 102 is too small, the effect of the diffusion barrier layer on reducing metal diffusion is affected. Accordingly, the thickness of the diffusion barrier layer 102 is in the range of 1-5 nm.

[0057] like Figure 5 and Figure 6 As shown, a seed layer 110 is formed on the bottom and sidewall of the contact hole 101 in which the diffusion barrier layer 102 is formed.

[0058] In this embodiment, the seed layer 110 includes two film layers: a first seed layer 103 and a second seed layer 104. The thickness of the first seed layer 103 at the bottom and sidewall of the contact hole 101 is relatively close, while the thickness of the second seed layer 104 at the bottom of the contact hole 101 is greater than the thickness at the sidewall of the contact hole 101. Therefore, the overall thickness of the seed layer 110 at the bottom of the contact hole 101 is greater than the overall thickness at the sidewall of the contact hole 101.

[0059] In other embodiments, the seed layer 110 may also be a single-layer structure, or the seed layer 110 may also be a multi-layer structure with more than two layers.

[0060] like Figure 5 As shown, a first seed layer 103 is formed on the bottom and sidewall of the contact hole 110 by a chemical vapor deposition process.

[0061] Since the step coverage of the chemical vapor deposition process is good, the thickness of the first seed layer 103 formed by the chemical vapor deposition process at the bottom of the contact hole 110 is uniform with the thickness at the sidewall of the contact hole 110 .

[0062] It should be noted that, in addition to forming the first seed layer 103 on the bottom and side walls of the contact hole 110, the chemical vapor deposition process also forms the first seed layer 103 on the surface of the dielectric layer 100. The thickness of the chemical vapor deposition process at the bottom and side walls of the contact hole 110 in this embodiment is not less than 80% of the thickness on the surface of the dielectric layer 100. In this way, the chemical vapor deposition process has good step coverage, so that more material can be formed inside the contact hole 110, thereby ensuring that a first seed layer 103 of a certain thickness is formed on the bottom and side walls of the contact hole 110.

[0063] In this embodiment, by forming the first seed layer 103 , a continuously formed seed layer material is also formed on the side wall of the contact hole 110 , so that a conductive material can also be formed on the side wall of the contact hole 110 during a subsequent electroplating process.

[0064] In this embodiment, the material of the first seed layer 103 is cobalt or ruthenium.

[0065] If the thickness of the first seed layer 103 is too large, the first seed layer 103 occupies a larger proportion in the entire seed layer 110, thereby reducing the proportion of the second seed layer in the entire seed layer, thereby reducing the thickness difference of the seed layer 110 at the bottom and sidewall of the contact hole, which is likely to affect the effect of reducing the generation of holes; accordingly, if the thickness of the first seed layer 103 is too small, the thickness difference of the seed layer 110 at the bottom and sidewall of the contact hole is increased, which is likely to make the growth rate of the conductive plug at the bottom of the contact hole too fast, resulting in material waste. Accordingly, the thickness of the first seed layer 103 is in the range of 1-5nm.

[0066] like Figure 6 As shown, the second seed layer 104 is formed on the first seed layer 103 by radio frequency physical vapor deposition process.

[0067] The RF PVD process has the characteristics of strong ionization. Under the action of a strong electric field, ions are more likely to gather at the bottom of the contact hole, so the second seed layer 104 is formed at a higher rate at the bottom of the contact hole. As a result, the thickness of the second seed layer 104 at the bottom of the contact hole is greater than the thickness of the second seed layer 104 at the sidewall of the contact hole.

[0068] It should be noted that the thickness of the second seed layer 104 at the bottom of the contact hole 101 is more than twice the thickness of the second seed layer 104 on the side wall. Therefore, when a conductive material is formed in the contact hole 101, the growth rate of the conductive material at the bottom of the contact hole is fast enough compared to the growth rate of the conductive material on the side wall of the contact hole, which can avoid the formation of holes, optimize the formation quality of the conductive plug, and further enhance the reliability of the electrical connection between the conductive plug and the external circuit.

[0069] Specifically, if the power of RF physical vapor deposition is too large or the frequency is too high, the formation rate of the second seed layer 104 at the bottom of the contact hole is too large compared with the formation rate of the second seed layer 104 at the side wall of the contact hole. In this case, the conductive material at the bottom of the contact hole is formed too quickly, which may easily lead to material waste. If the power of RF physical vapor deposition is too small or the frequency is too small, the conductive material at the bottom of the contact hole is not formed fast enough, and the generation of holes may not be completely eliminated.

[0070] Accordingly, the process conditions of the RF physical vapor deposition process include: power of 2KW-4KW, and frequency in the range of 2MHZ-40MHZ.

[0071] It should be noted that, in other embodiments, a DC physical vapor deposition process may be used to form the second seed layer 104 on the first seed layer 103. In the DC physical vapor deposition process, if the power is high, strong ionization may be generated, so that under the action of a strong electric field, ions are more likely to gather at the bottom of the contact hole, and thus the formation rate of the second seed layer 104 at the bottom of the contact hole is higher. As a result, the thickness of the second seed layer 104 at the bottom of the contact hole is greater than the thickness of the second seed layer 104 at the sidewall of the contact hole.

[0072] In order to achieve stronger ionization, the power of the DC physical vapor deposition process is in the range of 5KW-15KW.

[0073] Therefore, in the step of forming the second seed crystal layer, the second seed crystal layer may be formed on the first seed crystal layer by a direct current physical vapor deposition process, and the power of the direct current physical vapor deposition process is in the range of 5KW-15KW.

[0074] In this embodiment, the material of the second seed layer 104 is cobalt or ruthenium.

[0075] If the thickness of the second seed layer 104 is too large, the proportion of the second seed layer 104 in the entire seed layer 110 is large, and the difference in thickness of the seed layer 110 at the bottom and sidewall of the contact hole is increased, which easily makes the growth rate of the conductive plug at the bottom of the contact hole too fast, thereby causing material waste. If the thickness of the second seed layer 104 is too small, the proportion of the second seed layer 104 in the entire seed layer is reduced, and the difference in thickness of the seed layer 110 at the bottom and sidewall of the contact hole is reduced, which easily affects the effect of reducing the generation of holes; accordingly, the thickness of the second seed layer 104 is in the range of 2-8nm.

[0076] like Figure 7 and Figure 8 As shown, a conductive plug 106 is formed in the contact hole 101 to achieve electrical connection between the device to be connected and an external circuit.

[0077] like Figure 7 As shown, a conductive material 105 is formed in the contact hole 101 by an electroplating process. The electroplating process has good filling properties, thereby ensuring that the space of the contact hole 101 is filled, thereby achieving good electrical connection.

[0078] In the present embodiment, since the thickness of the seed layer 110 at the bottom of the contact hole 101 is greater than the thickness at the side wall of the contact hole 101, the conductive material 105 is easily nucleated and then film-formed at the bottom of the contact hole 101 during the electroplating process. Therefore, the formation rate of the conductive material 105 at the bottom of the contact hole 101 is relatively high. Before the conductive material formed on the side wall contacts the contact hole 101, the conductive material can already fill the contact hole 101. Therefore, it is not easy to form a hole, thereby improving the formation quality of the conductive plug and improving the reliability of the electrical connection of the conductive plug.

[0079] In this embodiment, the conductive plug 106 is made of copper. A conductive material made of copper is formed in the contact hole 101 by an electroplating process.

[0080] like Figure 8 As shown, the excess conductive material on the dielectric layer 100 is removed by a planarization process, and the conductive material remaining in the contact hole 101 serves as a conductive plug 106 .

[0081] It should be noted that, since a mask is formed on the surface of the dielectric layer 100 in this embodiment, during the process of removing excess conductive material through the planarization process, the planarization process also removes the mask on the surface of the dielectric layer 100 .

[0082] The conductive plug 160 formed in the embodiment of the present invention is not prone to holes and gaps, which can improve the reliability of the electrical connection of the conductive plug 160 .

[0083] In order to solve the technical problem, the embodiment of the present invention further provides a semiconductor structure, and further referring to Figure 8 , which shows a schematic diagram of a semiconductor structure according to an embodiment of the present invention. The semiconductor structure includes: a substrate (not labeled), a dielectric layer 100, a contact hole, a seed layer 110 and a conductive plug 106. Among them,

[0084] The substrate is used as a basis for subsequent processes. A plurality of devices to be connected are formed in the substrate.

[0085] In this embodiment, the material of the substrate is silicon. In other embodiments, the material of the substrate may also be other materials such as germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium, and the initial substrate may also be other types of substrates such as a silicon on insulator substrate or a germanium on insulator substrate.

[0086] In this embodiment, the device to be connected is a transistor, and the transistor can be a planar transistor or a fin field effect transistor.

[0087] In other embodiments, the device to be connected may also be other devices, such as a capacitor or an inductor.

[0088] The dielectric layer 100 is located on the substrate and is used to isolate adjacent devices.

[0089] The dielectric layer 100 is an interlayer dielectric layer, and the material of the dielectric layer 100 is an insulating material. In this embodiment, the material of the dielectric layer 100 is SiOCH.

[0090] In other embodiments, the material of the interlayer dielectric layer may also be silicon nitride or silicon oxynitride, amorphous carbon or diamond-like carbon (DLC) or other dielectric materials.

[0091] In order to reduce the parasitic capacitance of the contact plug, the dielectric layer 100 may be made of a low-K or ultra-low-K insulating material. The low-K insulating material herein refers to an insulating material with a dielectric constant less than 3, and the ultra-low-K insulating material refers to an insulating material with a dielectric constant less than 2.0.

[0092] The dielectric layer 100 may also be a porous low-K dielectric material. In order to achieve a lower dielectric constant, a material with a lower dielectric constant may be used and porosity may be introduced into the material. Since the dielectric constant of air is specified as 1, the dielectric constant can be reduced.

[0093] The contact hole is located in the dielectric layer 100 and is used to contain a conductive material to form a conductive plug. Specifically, the contact hole 101 corresponds to the position of the device to be connected and exposes the part of the device to be connected that needs to be connected.

[0094] The seed layer 110 is located at the bottom and sidewalls of the contact hole. The thickness of the seed layer 110 at the bottom of the contact hole is greater than the thickness at the sidewalls of the contact hole.

[0095] The thickness of the seed layer 110 at the bottom of the contact hole is greater than the thickness on the side wall of the contact hole 101. Thus, when a conductive plug is formed in the contact hole, since the thickness of the seed layer 110 at the bottom of the contact hole is greater, the conductive material is more likely to nucleate on the thicker seed layer, so the growth rate of the conductive material at the bottom of the contact hole is faster. Thus, even if the opening of the contact hole is small, before the conductive materials on the side walls of the contact hole contact and seal the opening, the conductive material at the bottom of the contact hole has reached a greater thickness and the contact hole is completely filled, thereby reducing the probability of hole formation, improving the formation quality of the conductive plug, and further improving the reliability of the electrical connection between the conductive plug and the external circuit.

[0096] In this embodiment, the seed layer 110 includes two film layers: a first seed layer 103 and a second seed layer 104. The thickness of the first seed layer 103 at the bottom and sidewall of the contact hole 101 is relatively close, while the thickness of the second seed layer 104 at the bottom of the contact hole 101 is greater than the thickness at the sidewall of the contact hole 101. Therefore, the overall thickness of the seed layer 110 at the bottom of the contact hole 101 is greater than the overall thickness at the sidewall of the contact hole 101.

[0097] In other embodiments, the seed layer 110 may also be a single-layer structure, or the seed layer 110 may also be a multi-layer structure with more than two layers.

[0098] In this embodiment, by providing the first seed layer 103 , a continuously formed seed layer material is also formed on the side wall of the contact hole 110 , so that when the conductive material is formed during the electroplating process, the conductive material can also be formed on the side wall of the contact hole 110 .

[0099] In this embodiment, the material of the first seed layer 103 is cobalt or ruthenium.

[0100] If the thickness of the first seed layer 103 is too large, the first seed layer 103 occupies a larger proportion in the entire seed layer 110, thereby reducing the proportion of the second seed layer in the entire seed layer, thereby reducing the thickness difference of the seed layer 110 at the bottom and sidewall of the contact hole, which is likely to affect the effect of reducing the generation of holes; accordingly, if the thickness of the first seed layer 103 is too small, the thickness difference of the seed layer 110 at the bottom and sidewall of the contact hole is increased, which is likely to make the growth rate of the conductive plug at the bottom of the contact hole too fast, resulting in material waste. Accordingly, the thickness of the first seed layer 103 is in the range of 1-5nm.

[0101] It should be noted that the thickness of the second seed layer 104 at the bottom of the contact hole 101 is more than twice the thickness of the second seed layer 104 on the side wall. Therefore, when a conductive material is formed in the contact hole 101, the growth rate of the conductive material at the bottom of the contact hole is fast enough compared to the growth rate of the conductive material on the side wall of the contact hole, which can avoid the formation of holes, optimize the formation quality of the conductive plug, and further enhance the reliability of the electrical connection between the conductive plug and the external circuit.

[0102] In this embodiment, the material of the second seed layer 104 is cobalt or ruthenium.

[0103] If the thickness of the second seed layer 104 is too large, the proportion of the second seed layer 104 in the entire seed layer 110 is large, and the difference in thickness of the seed layer 110 at the bottom and sidewall of the contact hole is increased, which easily makes the growth rate of the conductive plug at the bottom of the contact hole too fast, resulting in material waste. If the thickness of the second seed layer 104 is too small, the proportion of the second seed layer 104 in the entire seed layer is reduced, thereby reducing the difference in thickness of the seed layer 110 at the bottom and sidewall of the contact hole, which easily affects the effect of reducing the generation of holes; accordingly, the thickness of the second seed layer 104 is in the range of 2-8nm.

[0104] The conductive plug 106 is located in the contact hole.

[0105] In the present embodiment, since the thickness of the seed layer 110 at the bottom of the contact hole 101 is greater than the thickness at the side wall of the contact hole 101, the conductive material 105 is easy to nucleate and then form a film at the bottom of the contact hole 101 during the electroplating process. Therefore, the formation rate of the conductive material 105 at the bottom of the contact hole 101 is relatively high. Before the conductive material on the side wall contacts, the conductive material can fill the contact hole 101. Therefore, it is not easy to form a hole, thereby improving the formation quality of the conductive plug and improving the reliability of the electrical connection of the conductive plug.

[0106] In this embodiment, the conductive plug 106 is made of copper.

[0107] The semiconductor structure further includes: a diffusion barrier layer located between the bottom of the contact hole or the sidewall of the contact hole and the seed crystal layer, for preventing metal diffusion.

[0108] Specifically, the diffusion barrier layer 102 includes one or more of TaN, Ta, TiN, Ti and WC.

[0109] It should be noted that if the thickness of the diffusion barrier layer 102 is too large, the diffusion barrier layer 102 occupies a large space on the bottom and sidewall of the contact hole 101, thereby affecting the subsequent formation of the seed layer 105 and the contact hole plug; if the thickness of the diffusion barrier layer 102 is too small, the effect of the diffusion barrier layer on reducing metal diffusion is affected. Accordingly, the thickness of the diffusion barrier layer 102 is in the range of 1-5 nm.

[0110] In the semiconductor structure of the present invention, the conductive plug 160 is not prone to holes and gaps, which can improve the reliability of the electrical connection of the conductive plug 160.

[0111] The semiconductor structure may be formed by using the method for forming a semiconductor structure according to the embodiment of the present invention, or may be formed by using other methods for forming a semiconductor structure.

[0112] The embodiments of the present invention are disclosed as above, but the embodiments of the present invention are not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of the present invention. Therefore, the protection scope of the embodiments of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: providing a substrate; forming a dielectric layer on the substrate; forming a contact hole in the dielectric layer; A seed layer is formed at the bottom and sidewall of the contact hole, wherein the thickness of the seed layer at the bottom of the contact hole is greater than the thickness on the sidewall of the contact hole, and the step of forming the seed layer comprises: Conformally forming a first seed layer on the bottom and sidewalls of the contact hole, and forming a second seed layer on the first seed layer, wherein the thickness of the second seed layer at the bottom of the contact hole is greater than the thickness on the sidewalls of the contact hole; forming a conductive plug on the seed layer in the contact hole; The conformally forming a first seed layer on the bottom and sidewalls of the contact hole comprises: forming a first seed layer at the bottom and sidewalls of the contact hole by a chemical vapor deposition process; The forming of the second seed layer on the first seed layer comprises: forming a second seed crystal layer on the first seed crystal layer by a radio frequency physical vapor deposition process, wherein the power of the radio frequency physical vapor deposition process is 2KW-4KW, so that the thickness of the second seed crystal layer at the bottom of the contact hole is greater than the thickness on the side wall of the contact hole; or, A second seed layer is formed on the first seed layer by a DC physical vapor deposition process, wherein the power of the DC physical vapor deposition process is in the range of 5KW-15KW, so that the thickness of the second seed layer at the bottom of the contact hole is greater than the thickness on the side wall of the contact hole.

2. The forming method according to claim 1, characterized in that: The frequency of the radio frequency physical vapor deposition process is in the range of 2 MHZ-40 MHZ.

3. The forming method according to claim 1, characterized in that: The thickness of the second seed crystal layer at the bottom of the contact hole is more than twice the thickness of the second seed crystal layer on the side wall.

4. The forming method according to claim 1, characterized in that: The thickness of the first seed layer is in the range of 1-5 nm.

5. The forming method according to claim 1, characterized in that: The thickness of the second seed layer is in the range of 2-8 nm.

6. The forming method according to claim 1, characterized in that: The material of the seed layer is cobalt or ruthenium.

7. The forming method according to claim 1, characterized in that: A conductive plug is formed in the contact hole by an electroplating process.

8. The forming method according to claim 1, characterized in that: The conductive plug is made of copper.

9. The forming method according to claim 1, characterized in that: Also includes: After forming the contact hole and before forming the seed layer, a diffusion barrier layer is formed on the bottom and sidewall of the contact hole.

10. The forming method according to claim 9, characterized in that: The thickness of the diffusion barrier layer is in the range of 1-5 nm.

11. A semiconductor structure, characterized in that: The method according to any one of claims 1 to 10 is used to form the device, comprising: substrate; a dielectric layer located on the substrate; a contact hole in the dielectric layer; A seed layer located at the bottom and sidewalls of the contact hole, wherein the thickness of the seed layer at the bottom of the contact hole is greater than the thickness at the sidewalls of the contact hole, and the seed layer comprises: a first seed layer conformally formed on the bottom and sidewalls of the contact hole, and a second seed layer formed on the first seed layer; The thickness of the second seed layer at the bottom of the contact hole is greater than the thickness on the sidewall of the contact hole; A conductive plug is located in the contact hole.

12. The semiconductor structure according to claim 11, wherein: The thickness of the second seed crystal layer at the bottom of the contact hole is more than twice the thickness of the second seed crystal layer on the side wall.

13. The semiconductor structure according to claim 11, wherein: The thickness of the first seed layer is in the range of 1-5 nm.

14. The semiconductor structure according to claim 11, wherein: The thickness of the second seed layer is in the range of 2-8 nm.

15. The semiconductor structure according to claim 11, wherein: The material of the seed layer is cobalt or ruthenium.

16. The semiconductor structure according to claim 11, wherein: The conductive plug is made of copper.

17. The semiconductor structure according to claim 11, wherein: Also includes: A diffusion barrier layer is located between the bottom of the contact hole or the sidewall of the contact hole and the seed layer.

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