A display panel

Abstract

The present invention discloses a display panel, comprising: a buffer layer is arranged on the surface of a substrate; a first metal reflective layer is arranged on the buffer layer, the first metal reflective layer comprises a first side wall and a second side wall inclined to the surface of the substrate, the angle between the first side wall and the second side wall is 90 degrees, and the first metal reflective layer is used to reflect light; a thin film transistor is arranged on the buffer layer; a second insulating layer is arranged on the thin film transistor and the first metal reflective layer; an anode is arranged on the second insulating layer; a pixel definition layer is arranged on the anode, and a first hole is arranged on the pixel definition layer; a first light-emitting layer is arranged in the first hole; and a cathode is arranged on the pixel definition layer. The above technical solution can improve the reflection efficiency, display effect and viewing angle of the display panel.

Description

Technical Field

[0001] The present invention relates to the field of display panels, and in particular to a display panel. Background Art

[0002] A double-sided display is a device that can display images on both sides of a display device. It has a wide range of applications, such as in the communications industry, airports, digital cameras, camcorders, electronic products, etc. Traditional double-sided display panels are mostly placed opposite to each other, so that a display panel can be seen on each side. Although this achieves double-sided display, its essence is to stack two single-sided display panels, which inevitably brings disadvantages such as large space and high power consumption. The new double-sided display panel can achieve double-sided display with only one display panel. Compared with traditional double-sided display devices, it has the advantages of thinner panels and lower power consumption, making it possible to use it in small electronic products.

[0003] For example, in the application number CN201811037109.7, entitled "Display panel, manufacturing method thereof, and display device", the metal reflective layer placed on one side of the light-emitting layer is mostly a planar or concave-convex structure. The effect of the planar or concave-convex metal reflective layer for reflecting light is still insufficient, which affects the visual effect and display effect of the display panel. Summary of the invention

[0004] Therefore, it is necessary to provide a display panel to solve the problem of insufficient light reflection efficiency of the metal reflective layer of the display panel.

[0005] To achieve the above object, this embodiment provides a display panel, including:

[0006] A buffer layer is provided on the surface of the substrate;

[0007] A first metal reflective layer is disposed on the buffer layer, the first metal reflective layer includes a first side wall and a second side wall inclined to the surface of the substrate, the angle between the first side wall and the second side wall is 90 degrees, an opening formed between the first side wall and the second side wall faces upward, and the first side wall and the second side wall are used to reflect incident light;

[0008] A thin film transistor is arranged on the buffer layer, and the thin film transistor is located on one side of the first metal reflective layer;

[0009] A second insulating layer is disposed on the thin film transistor and the first metal reflective layer;

[0010] An anode is arranged on the second insulating layer, the anode is a light-transmitting anode, and the anode is connected to the source or drain of the thin film transistor through a hole on the second insulating layer;

[0011] A pixel definition layer is disposed on the anode, and a first hole is disposed on the pixel definition layer;

[0012] A first light-emitting layer is disposed in the first hole, and the first light-emitting layer is located above the first metal reflective layer;

[0013] A cathode is arranged on the pixel definition layer. The cathode is a light-transmitting cathode and is connected to the first light-emitting layer.

[0014] Furthermore, it also includes a second light-emitting layer and a second metal layer reflective layer;

[0015] The pixel definition layer is provided with a second hole, and the second light-emitting layer is provided in the second hole; and further includes a second metal reflective layer;

[0016] A second metal reflective layer is arranged on the cathode, the second metal reflective layer is located above the second light-emitting layer, the second metal reflective layer is located on one side of the first light-emitting layer, the second metal reflective layer is used to reflect the light of the second light-emitting layer, and the structure directly below the second light-emitting layer is a light-transmitting structure.

[0017] Furthermore, a projection of the conductive channel of the thin film transistor is located within a projection of the second metal reflective layer, and the projection direction is perpendicular to the substrate.

[0018] Furthermore, the structure of the second metal reflective layer is the same as that of the first metal reflective layer.

[0019] Furthermore, the second metal layer and the cathode are respectively located in different regions of the same layer.

[0020] Furthermore, the thin film transistor includes a gate, a first insulating layer, an active layer, a source electrode and a drain electrode;

[0021] The gate is arranged on the buffer layer;

[0022] The first insulating layer is disposed on the gate;

[0023] The active layer is disposed on the first insulating layer, and the active layer is located above the gate;

[0024] The source electrode and the drain electrode are arranged on the active layer;

[0025] The second insulating layer is disposed on the source electrode and the drain electrode, and the second insulating layer is used to protect the thin film transistor thereunder.

[0026] Further, a light-transmitting capacitor is included, wherein the capacitor includes a lower plate and an upper plate;

[0027] The lower electrode plate is arranged on the buffer layer and is located on one side of the gate;

[0028] The upper electrode plate is disposed on the first insulating layer, the upper electrode plate is connected to the source or drain of the thin film transistor, and the upper electrode plate is above the lower electrode plate.

[0029] Further, the second insulating layer includes a passivation layer and a planarization layer;

[0030] The passivation layer is disposed on the source electrode and the drain electrode;

[0031] The planar layer is disposed on the passivation layer;

[0032] The planar layer is provided with a hole on the second insulating layer, the hole on the second insulating layer penetrates the planar layer and the passivation layer, and the bottom of the hole on the second insulating layer is the source electrode or the drain electrode.

[0033] Furthermore, the first metal reflective layer further includes a bottom wall parallel to the surface of the substrate, and the bottom wall is arranged between the first side wall and the second side wall.

[0034] Different from the prior art, the above technical solution has a first metal reflective layer with a first side wall and a second side wall that are perpendicular to each other, and uses the principle of vertical mirror reflection to reflect light, so that the incident light is reflected in a direction perpendicular to the surface of the substrate, so that the first metal reflective layer reflects the light of the first light-emitting layer with higher efficiency, forming a top-emitting or bottom-emitting display panel, which can improve the reflection efficiency, display effect and viewing angle of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 This is a schematic cross-sectional structure diagram of manufacturing a buffer layer on a substrate in this embodiment;

[0036] Figure 2 This is a schematic cross-sectional structure diagram of manufacturing a transparent conductive layer and a metal film layer on a substrate in this embodiment;

[0037] Figure 3 It is a schematic cross-sectional structure diagram of using a half-color mask to expose the photoresist on the substrate in this embodiment;

[0038] Figure 4 It is a structural schematic diagram of the light transmittance on the half-color mask according to this embodiment;

[0039] Figure 5 It is a schematic cross-sectional structure diagram of etching the metal film layer and the transparent conductive layer not covered by the photoresist on the substrate in this embodiment;

[0040] Figure 6 It is a schematic cross-sectional structure diagram of removing the photoresist on the lower electrode plate area on the substrate in this embodiment;

[0041] Figure 7 This is a schematic cross-sectional structure diagram of removing the metal film layer above the lower electrode plate area on the substrate and retaining the transparent conductive layer on the lower electrode plate area in this embodiment;

[0042] Figure 8 is a schematic cross-sectional structure diagram of the gate, the lower electrode plate and the first metal reflective layer described in this embodiment;

[0043] Fig. 9 This is a schematic cross-sectional structure diagram of the first metal reflective layer of the first structure according to this embodiment;

[0044] Fig.10 This is a schematic cross-sectional structure diagram of the first metal reflective layer of the second structure according to this embodiment;

[0045] Fig.11 is a schematic cross-sectional structure diagram of the prismatic vertical structure of the buffer layer of this embodiment;

[0046] Fig.12 This is a schematic cross-sectional structure diagram of manufacturing a first insulating layer on a substrate in this embodiment;

[0047] Fig.13 This is a schematic cross-sectional structure diagram of manufacturing an active layer on a substrate in this embodiment;

[0048] Fig.14 This is a schematic diagram of the cross-sectional structure of manufacturing a source electrode, a drain electrode and an upper electrode plate on a substrate in this embodiment;

[0049] Fig.15 This is a schematic cross-sectional structure diagram of manufacturing a second insulating layer on a substrate in this embodiment;

[0050] Fig.16 This is a schematic cross-sectional structure diagram of manufacturing a passivation layer and a planarization layer on a substrate in this embodiment;

[0051] Fig.17 This is a schematic diagram of the cross-sectional structure of manufacturing an anode on a substrate in this embodiment;

[0052] Fig.18 A schematic diagram of the cross-sectional structure of a pixel definition layer produced on a substrate in this embodiment;

[0053] Fig.19 This is a schematic diagram of the cross-sectional structure of manufacturing the first light-emitting layer and the second light-emitting layer on the substrate in this embodiment;

[0054] Fig. 20 This is a schematic cross-sectional structure diagram of manufacturing a cathode on a substrate in this embodiment;

[0055] Fig.20a This is a schematic cross-sectional structure diagram of manufacturing a first cathode and a second cathode on a substrate in this embodiment;

[0056] Fig.21 This is a schematic cross-sectional structure diagram of manufacturing a second metal reflective layer on a substrate in this embodiment;

[0057] Fig. 22 is a schematic structural diagram of the double-sided display panel of this embodiment;

[0058] Fig.23 This is a schematic cross-sectional structural diagram of the first metal reflective layer reflecting light from the first light-emitting layer and the second metal reflective layer reflecting light from the second light-emitting layer in this embodiment;

[0059] Fig.24 This is a schematic cross-sectional structure diagram of a cover plate installed on a substrate in this embodiment;

[0060] Fig.25 This is a schematic cross-sectional structure diagram of manufacturing a second metal reflective layer on the cover plate in this embodiment.

[0061] Description of reference numerals:

[0062] 1. Substrate;

[0063] 2. Buffer layer; 21. Prismatic vertical structure;

[0064] 3. Transparent conductive layer;

[0065] 4. Metal film layer;

[0066] 5. Thin film transistor; 51. Gate electrode; 52. Active layer; 53. Source electrode; 54. Drain electrode;

[0067] 6. first metal reflective layer; 61. first side wall; 62. second side wall;

[0068] 7. Capacitor; 71. Lower plate; 72. Upper plate;

[0069] 8. The first insulating layer;

[0070] 9. second insulating layer; 91. passivation layer; 92. planarization layer;

[0071] 10. Anode;

[0072] 11. Pixel definition layer; 111. First hole; 112. Second hole;

[0073] 12. a first light-emitting layer;

[0074] 13. A second light-emitting layer;

[0075] 14. cathode; 141. first cathode; 142. second cathode;

[0076] 15. A second metal reflective layer;

[0077] 16. Cover plate;

[0078] PR, photoresist. DETAILED DESCRIPTION

[0079] In order to explain the technical content, structural features, achieved objectives and effects of the technical solution in detail, the following is a detailed description in conjunction with specific embodiments and accompanying drawings.

[0080] See also Figures 1 to 25 This embodiment provides a display panel, including the following manufacturing steps: manufacturing a buffer layer on the surface of a substrate; specifically, coating a buffer layer material by chemical vapor deposition to form a buffer layer 2 on the surface of a substrate 1, the structure of which is as follows: Figure 1 As shown. The buffer layer material is polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), organic photosensitive material, silicon oxide (SiOx), silicon nitride (SiNx), aluminum oxide or titanium oxide and other materials with similar properties. On the one hand, the buffer layer 2 is used to carry the first metal reflective layer 6 for reflection; on the other hand, the buffer layer 2 is used to absorb external impact and reduce the external force on the substrate 1 itself.

[0081] A plurality of prism-shaped vertical structures 21 are formed on the buffer layer 2, and the first metal reflective layer 6 covers the prism-shaped vertical structures 21 on the buffer layer 2; specifically, a plurality of grooves are etched out by developing, etching or nano-imprinting technology to form a plurality of prism-shaped vertical structures on the buffer layer. A prism-shaped vertical structure includes a side wall 1 and a side wall 2 inclined to the surface of the substrate, the angle between the side wall 1 and the surface of the substrate is 45 degrees, and the angle between the side wall 1 and the side wall 2 is 90 degrees. The structure is as follows: Fig.11 shown.

[0082] It should be noted that the cross section of the etched groove is triangular, that is, the top of the side wall 1 is connected to the top of the side wall 2, so that the prism-shaped vertical structure is a triangular prism, and the buffer layer includes a plurality of such triangular prism-shaped vertical structures, and two adjacent prism-shaped vertical structures are connected to each other. The structure of the first metal reflective layer 6 covered in this shape is as shown in FIG. Fig. 9 As shown; for example, the etched groove is a trapezoid, and there is also a gap between the two adjacent prismatic vertical structures, and there is a gap between the top of the side wall 1 (the waist of the trapezoid) and the top of the side wall 2 (the waist of the trapezoid), and the top of the side wall 1 and the top of the side wall 2 are parallel to the surface of the substrate. The structure of the first metal reflective layer 6 covering this shape is as shown Fig.10 shown.

[0083] The gate 51, the lower electrode 71 of the light-transmitting capacitor 7 and the first metal reflective layer 6 are manufactured; specifically, a transparent conductive layer material and a metal film layer material are sequentially deposited by evaporation or sputtering to form a transparent conductive layer 3 and a metal film layer 4 on the substrate, and the structure is as follows Figure 2 As shown. The transparent conductive layer 3 is arranged on the buffer layer, and the metal film layer 4 is arranged on the transparent conductive layer 3. The transparent conductive layer material is a transparent conductive film such as indium tin oxide (ITO), zinc oxide (ZnO), tin oxide (SnO2), carbon nanotubes or graphene, and the metal film layer material is one or more of the metals with good conductivity such as aluminum, molybdenum, titanium, nickel, copper, silver, chromium, and alloys.

[0084] Next, a layer of photoresist PR is coated and exposed using a half-color mask, so that the light transmittance of the portion of the half-color mask aligned with the lower electrode 71 of the capacitor is 50%, the light transmittance of the portion of the half-color mask aligned with the gate 51 is 0%, the light transmittance of the portion of the half-color mask aligned with the first metal reflective layer 6 is 0%, and the light transmittance of the remaining portion of the half-color mask is 100%. The structure is as follows: Figure 3 As shown ( Figure 3 Only the capacitor area and the gate area are shown in the figure). After exposure, the developer is used for development, and the photoresist on the first metal reflective layer area is retained, the photoresist on the gate area is retained, and the photoresist on the lower plate area is also retained. The thickness of the photoresist PR on the lower plate area is less than the thickness of the photoresist PR on the gate area. The photoresist in the remaining parts is completely removed. It should be noted that the photoresist on the lower plate area is thinned, that is, the photoresist in the 50% transmittance area is thinner than the photoresist in the 0% transmittance area. The structure is as follows Figure 4 shown.

[0085] After development, the metal film layer and transparent conductive layer not covered by the photoresist are etched using the photoresist as a mask. Figure 5 Then, the photoresist on the lower plate area is removed by ashing, and the structure is as shown in FIG. Figure 6 Because the thickness of the photoresist on the first metal reflective layer region and the gate region is greater than that on the lower plate region, after the ashing process, the photoresist on the first metal reflective layer region and the gate region will be thinned but will not be removed, which can protect the metal film layer below.

[0086] After the ashing treatment, the metal film layer above the lower electrode area is removed by controlling the etching time or the selectivity of the etching solution, and the transparent conductive layer on the lower electrode area is retained. The structure is as follows Figure 7 Finally, all the photoresists are removed, a lower electrode is formed on the lower electrode area, a gate is formed on the gate area, and a first metal reflective layer is formed on the first metal reflective layer area. The structure is as shown in FIG. Figure 8As shown. The lower electrode plate 71 includes a transparent conductive layer, so that the lower electrode plate 71 is a transparent lower electrode plate 71, and light can pass through the transparent lower electrode plate 71. The first metal reflective layer 6 and the gate 51 both include a transparent conductive layer 3 and a metal film layer 4. The lower electrode plate 71 can be connected to the gate 51, and the lower electrode plate 71 or the gate 51 is located on one side of the first metal reflective layer 6.

[0087] The first metal reflective layer 6 covers the prismatic vertical structure 21 on the buffer layer, and the first metal reflective layer includes a first side wall 61 and a second side wall 62 that are inclined to the surface of the substrate. The first side wall 61 of the first metal reflective layer is attached to the side wall 1 of the buffer layer, and the second side wall 62 of the first metal reflective layer is attached to the side wall 2 of the buffer layer. The angle between the first side wall and the surface of the substrate is 45 degrees, the angle between the first side wall and the second side wall is 90 degrees, and the opening formed between the first side wall and the second side wall is upward.

[0088] In the first structure, the cross-section of the first side wall and the second side wall of a group is triangular, and the structure is as follows Fig. 9 As shown; in the second structure, the cross-section of a set of the first side wall and the second side wall is a trapezoid, and the first metal reflective layer also includes a wall parallel to the surface of the substrate, and the structure is as shown Fig.10 When the first light-emitting layer above emits light onto the first side wall, the direction of the incident light is perpendicular to the surface of the substrate. After the incident light is reflected by the first side wall, the direction of the incident light is parallel to the surface of the substrate and the incident angle between the incident light and the second side wall is also 45 degrees. Then, after the second side wall reflects the incident light, the direction of the incident light is parallel to the surface of the substrate. The structure is as shown in FIG. Fig.23 The first metal reflective layer can reflect the incident light in a direction perpendicular to the substrate surface, so that the first metal reflective layer reflects the light of the first light-emitting layer with high efficiency, forming a top-emitting display panel, the structure of which is shown in FIG. Fig. 22 The first metal reflective layer can improve the reflection efficiency, display effect and viewing angle of the display panel.

[0089] It should be noted that the angle between the first side wall and the substrate surface is not limited to 45 degrees, but may be any other angle, such as 30 degrees, 50 degrees, 80 degrees, etc.

[0090] Preferably, the projection of the first light-emitting layer is located within the projection of the first metal reflective layer, and the projection direction is perpendicular to the substrate, so that the light emitted by the first light-emitting layer can be completely reflected by the first metal reflective layer to a direction away from the substrate.

[0091] In order to isolate the contact between metals, a first insulating layer 8 is formed; specifically, an insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), aluminum oxide or titanium oxide is deposited by chemical vapor deposition to form a first insulating layer on the buffer layer, the gate, the first metal reflective layer and the lower plate, and the structure is as follows: Fig.12 The first insulating layer covers the buffer layer, the gate, the first metal reflective layer and the lower electrode plate to prevent the metal from being connected to other lines to form a short circuit.

[0092] Next, an active layer 52 is fabricated; the active layer is located above the gate, and the active layer material may be polysilicon, oxide semiconductor, graphene, carbon nanotube, organic semiconductor, etc., and the structure may be as follows: Fig.13 After the active layer 52 is made, the source electrode 53, the drain electrode 54 and the upper electrode plate 72 are made; this step is the same as the step of making the first metal reflective layer, the gate electrode and the lower electrode plate, and the transparent conductive layer and the metal film layer are first made in sequence and then etched, which will not be repeated here. The structure is as shown in FIG. Fig.14 As shown. The active layer region between the source electrode 53 and the drain electrode 54 is a conductive channel of the thin film transistor. Then, the source electrode 53 is connected to the active layer 52, and the drain electrode 54 is connected to the active layer 52. The source electrode 53, the drain electrode 54, the active layer 52, the gate electrode 51 and part of the first insulating layer 8 form a thin film transistor 5 (Thin Film Transistor, abbreviated as TFT), and the thin film transistor acts as a switch to turn on the circuit.

[0093] The source electrode and the drain electrode both include a transparent conductive layer and a metal film layer, and the upper electrode plate includes a transparent conductive layer. The upper electrode plate is connected to the source electrode or the drain electrode, and the upper electrode plate is above the lower electrode plate. The upper electrode plate is also transparent, and the upper electrode plate and the lower electrode plate are parallel to each other. The first insulating layer between the upper electrode plate and the lower electrode plate serves as a dielectric layer of the capacitor, and plays a role in isolating the electrical connection between the upper electrode plate and the lower electrode plate.

[0094] In order to protect the thin film transistor below, a second insulating layer 9 is made; specifically, insulating materials such as silicon nitride (SiNx), silicon oxide (SiOx), aluminum oxide or titanium oxide are first deposited by chemical vapor deposition to form a passivation layer 91 on the thin film transistor (source, drain and active layer). Then, insulating materials such as polyimide, silicon nitride (SiNx) or silicon oxide (SiOx) are first deposited by chemical vapor deposition to form a flat layer 92 on the passivation layer 91. The structure is as follows: Fig.16As shown. It should be noted that the function of the passivation layer is to isolate the electrical connection between metals to avoid short circuits. The upper surface of the flat layer is a plane. The function of the flat layer is to level the in-plane step difference caused by various layer patterns on the substrate of the display device, so as to facilitate the good superposition of subsequent film layers and improve the display effect. Or in some embodiments, by increasing the thickness of the passivation layer, it can also act as a flat layer to flatten the uneven film layer on the substrate. The structure is as follows Fig.15 shown.

[0095] In order to connect the anode and the thin film transistor, a hole is etched on the second insulating layer; specifically, a photoresist is applied, and the photoresist is patterned, that is, the photoresist is exposed and developed, so that the part where the hole is to be etched is opened. Then, the flat layer is etched to the source electrode or the drain electrode using the photoresist as a mask to form a hole on the second insulating layer. The structure is as follows: Fig.15 or Fig.16 As shown. After the hole on the second insulating layer is made, the photoresist is removed. The hole on the second insulating layer passes through the flat layer and the passivation layer, and the bottom of the hole on the second insulating layer is the source electrode or the drain electrode. If the anode is to be connected to the source electrode, the bottom of the hole on the second insulating layer is the source electrode; if the anode is to be connected to the drain electrode, the bottom of the hole on the second insulating layer is the drain electrode.

[0096] Next, an anode 10 is manufactured. The anode 10 is connected to the source 53 or the drain 54 of the thin film transistor 5 through the hole in the second insulating layer. The structure is as follows: Fig.17 As shown. Preferably, the material of the anode is indium tin oxide (ITO), that is, the anode is a light-transmitting anode, so that light can penetrate it. Then, a pixel definition layer is made, and the pixel definition layer is arranged on the anode and the flat layer. At the same time, a first hole 111 and a second hole 112 are made on the pixel definition layer 11, and the bottom of the first hole 111 and the bottom of the second hole 112 are both the anode 10. The first hole is located above the first metal reflective layer, and the second hole is located on one side of the first hole (or the first metal reflective layer). The structure is as shown Fig.18 Then, a first light-emitting layer 12 is formed in the first hole, and a second light-emitting layer 13 is formed in the second hole. The structure is as shown in FIG. Fig.19 As shown. The first light-emitting layer 12 and the second light-emitting layer 13 each include a hole injection layer HIL, a hole transport layer HTL, an organic light-emitting layer EM, an electron transport layer ETL, and an electron injection layer EIL. The first light-emitting layer and the second light-emitting layer can emit light required by the display panel, but these are too dispersed, so the first metal reflective layer and the second metal reflective layer are needed for regulation.

[0097] A cathode 14 is formed on the pixel definition layer, and the cathode 14 covers the first light-emitting layer 12 in the first hole and the second light-emitting layer 13 in the second hole. The structure is as follows: Fig. 20 As shown. The cathode can be a magnesium-silver alloy, etc., so that the cathode is a light-transmitting cathode. Finally, a second metal reflective layer 15 is made on the cathode. The second metal reflective layer 15 is located above the second light-emitting layer 13. The second metal reflective layer 15 is located on one side of the first light-emitting layer 12. The second metal reflective layer is used to reflect the light of the second light-emitting layer to the substrate. The structure is as shown Fig.21 The second light-emitting layer is bottom-emitting (the direction of light emission is shown in Fig.21 The first light-emitting layer is top-emitting (the direction of light emission is shown in FIG. Fig.21 The display panel has a double-sided display function and its structure is as follows Fig. 22 As shown. In each RGB sub-pixel, both top emission and bottom emission modes are provided and controlled by the same set of TFT driving circuits. Preferably, the first light-emitting layer and the second light-emitting layer do not interfere with each other when realizing top emission or bottom emission.

[0098] The conductive channel of the thin film transistor may be affected by light, resulting in abnormal performance at certain times. Preferably, the projection of the conductive channel of the thin film transistor is located within the projection of the second metal reflective layer, and the projection direction is perpendicular to the substrate. Fig.21 The second metal reflective layer blocks the ambient light and protects the conductive channel of the thin film transistor from being affected by the ambient light, which is beneficial to improving the working stability of the thin film transistor. It should be noted that the structure directly below the second light-emitting layer is a light-transmitting structure, so that light can pass through the structure directly below the second light-emitting layer.

[0099] In some embodiments, the first light-emitting layer and the second light-emitting layer are not manufactured at the same time, and the cathode is not manufactured at the same time. The process flow is: the second light-emitting layer 13 (bottom emission) → the second cathode 142 (opaque and with high reflectivity) → the first light-emitting layer 12 (top emission) → the first cathode 141 (transparent), and the structure is as follows: Fig.20a As shown. Wherein, the first cathode 141 and the second cathode 142 constitute the cathode 14 mentioned above. Since the first light-emitting layer and the second light-emitting layer are made separately, it is more conducive to the optimization of the performance of the light-emitting device. Preferably, the projection of the conductive channel of the thin film transistor is located within the projection of the second cathode, and the projection direction is perpendicular to the substrate.

[0100] After the cathode and the second metal reflective layer are manufactured, the cover plate 16 is placed on the cathode 14 and the second metal reflective layer 15. At this time, the second metal reflective layer is a planar structure. Fig.21 and Fig.24As shown. Preferably, the structure of the second metal reflective layer is the same as that of the first metal reflective layer, and has a side wall inclined to the surface of the substrate. In this case, the cover plate is also provided with a buffer layer having a prismatic vertical structure, and the second metal reflective layer covers the buffer layer of the prismatic vertical structure. An insulating layer covering the second metal reflective layer can also be provided on the side of the second metal reflective layer away from the buffer layer. The cover plate is covered on the cathode through the second metal reflective layer. The structure is as shown in FIG. Fig.25 shown.

[0101] This embodiment also provides a display panel, the display panel comprising: a buffer layer 2 is arranged on the surface of a substrate 1, and the structure is as follows Figure 1 As shown. The buffer layer 2 is made of materials with similar properties such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide (PI), organic photosensitive materials, silicon oxide (SiOx), silicon nitride (SiNx), aluminum oxide or titanium oxide. On the one hand, the buffer layer is used to support the first metal reflective layer; on the other hand, the buffer layer is used to absorb external impact and reduce the external force on the substrate itself.

[0102] A plurality of prism-shaped vertical structures 21 are arranged on the buffer layer 2. One prism-shaped vertical structure includes a side wall 1 and a side wall 2 inclined to the surface of the substrate, the angle between the side wall 1 and the surface of the substrate is 45 degrees, and the angle between the side wall 1 and the side wall 2 is 90 degrees. Fig.11 It should be noted that the top of the side wall 1 is connected to the top of the side wall 2, so that the prism-shaped vertical structure is a triangular prism, and the buffer layer includes a plurality of such triangular prism-shaped vertical prism structures, and two adjacent prism-shaped vertical structures are connected to each other. The structure of the first metal reflective layer covered in this shape is as shown in FIG. Fig. 9 As shown; there is also a gap between the two adjacent prismatic vertical structures, there is a gap between the top of the side wall one and the top of the side wall two, and the top of the side wall one and the top of the side wall two are parallel to the surface of the substrate. The structure of the first metal reflective layer covering this shape is as shown Fig.10 shown.

[0103] A first metal reflective layer 6 is disposed on the buffer layer 2. The first metal reflective layer 6 includes a first side wall 61 and a second side wall 62 that are inclined to the surface of the substrate. The angle between the first side wall 61 and the surface of the substrate is 45 degrees, and the angle between the first side wall 61 and the second side wall 62 is 90 degrees. The opening formed between the first side wall and the second side wall faces upward, and the first metal reflective layer 6 is used to reflect the light of the first light-emitting layer. The first metal reflective layer 6 covers the prismatic vertical structure 21 on the buffer layer. The first side wall 61 of the first metal reflective layer is attached to the side wall 1 of the buffer layer, and the second side wall 62 of the first metal reflective layer is attached to the side wall 2 of the buffer layer.

[0104] It should be noted that the angle between the first side wall and the substrate surface is not limited to 45 degrees, but may be any other angle, such as 30 degrees, 50 degrees, 80 degrees, etc.

[0105] In the first structure, the cross-section of the first side wall and the second side wall of a group is triangular, and the structure is as follows Fig. 9 As shown; in the second structure, the cross-section of a set of the first side wall and the second side wall is a trapezoid, and the first metal reflective layer also includes a wall parallel to the surface of the substrate, and the structure is as shown Fig.10 When the first light-emitting layer above emits light onto the first side wall, the direction of the incident light is perpendicular to the surface of the substrate. After the incident light is reflected by the first side wall, the direction of the incident light is parallel to the surface of the substrate and the incident angle between the incident light and the second side wall is also 45 degrees. Then, after the second side wall reflects the incident light, the direction of the incident light is parallel to the surface of the substrate. The structure is as shown in FIG. Fig.23 The first metal reflective layer can reflect the incident light in a direction perpendicular to the substrate surface, so that the first metal reflective layer reflects the light of the first light-emitting layer with high efficiency, forming a top-emitting display panel, the structure of which is shown in FIG. Fig. 22 The first metal reflective layer can improve the reflection efficiency, display effect and viewing angle of the display panel.

[0106] Preferably, the projection of the first light emitting layer 12 is located within the projection of the first metal reflective layer 6, and the projection direction is perpendicular to the substrate, so that the light emitted by the first light emitting layer can be completely reflected by the first metal reflective layer to a direction away from the substrate.

[0107] A thin film transistor 5 is arranged on the buffer layer, and the thin film transistor 5 is located on one side of the first metal reflective layer. At the same time, a capacitor 7 can be arranged on one side of the thin film transistor 5. The thin film transistor includes a gate 51, a first insulating layer 8, an active layer 52, a source 53 and a drain 54.

[0108] The gate 51 is arranged on the buffer layer, and the lower plate 71 of the capacitor 7 is arranged on the buffer layer. The lower plate 71 can be connected to the gate 51 or not depending on the situation of the compensation circuit. The lower plate 71 or the gate 51 is located on one side of the first metal reflective layer 6. The structure is as follows: Figure 8 As shown. Preferably, the lower electrode plate 71 includes a transparent conductive layer 3, so that the lower electrode plate 71 is a transparent lower electrode plate 71, and light can pass through the transparent lower electrode plate 71. The first metal reflective layer 6 and the gate 51 both include a transparent conductive layer 3 and a metal film layer 4. The metal film layer 4 of the gate 51 (or the first metal reflective layer 6) is arranged on the transparent conductive layer 3. The transparent conductive layer of the lower electrode plate, the transparent conductive layer of the first metal reflective layer and the transparent conductive layer of the gate are arranged in the same layer.

[0109] Among them, the transparent conductive layer material is transparent conductive films such as indium tin oxide (ITO), zinc oxide (ZnO), tin oxide (SnO2), carbon nanotubes or graphene, and the metal film layer material is one or more of metals with excellent conductivity such as aluminum, molybdenum, titanium, nickel, copper, silver, chromium, and alloys.

[0110] In order to isolate the contact between metals, the first insulating layer 8 is arranged on the gate; the first insulating layer 8 covers the buffer layer 2, the gate 51, the first metal reflective layer 6 and the lower plate 71 to prevent the metal from being connected to other lines to form a short circuit. Fig.12 The first insulating layer is made of insulating materials such as silicon nitride (SiNx), silicon oxide (SiOx), aluminum oxide or titanium oxide.

[0111] The active layer 52 is disposed on the first insulating layer. The active layer 52 is located above the gate 51. The structure is as follows: Fig.13 As shown; the active layer material is such as polysilicon, oxide semiconductor, graphene, carbon nanotube, organic semiconductor, etc.

[0112] The source electrode 53 and the drain electrode 54 are disposed on the active layer 52; the source electrode 53 is connected to the active layer 52, and the drain electrode 54 is connected to the active layer 52. The structure is as follows: Fig.14 The source electrode 53, the drain electrode 54, the active layer 52, the gate electrode 51 and part of the first insulating layer form a thin film transistor 5 (abbreviated as TFT), and the thin film transistor 5 acts as a switch to turn on the circuit. The active layer region between the source electrode and the drain electrode is a conductive channel of the thin film transistor 5.

[0113] The upper electrode plate 72 is arranged on the first insulating layer 8, and the upper electrode plate 72 is connected to the source electrode 53 or the drain electrode 54, and serves to connect the capacitor with the thin film transistor. The upper electrode plate 72 is above the lower electrode plate 71. Preferably, the source electrode and the drain electrode both include a transparent conductive layer and a metal film layer, and the upper electrode plate includes a transparent conductive layer, and the transparent conductive layer of the source electrode and the drain electrode is arranged in the same layer as the transparent conductive layer of the upper electrode plate. The upper electrode plate is connected to the source electrode or the drain electrode, and the upper electrode plate is above the lower electrode plate. The upper electrode plate is also transparent, and the upper electrode plate and the lower electrode plate are parallel to each other. The first insulating layer between the upper electrode plate and the lower electrode plate serves as a dielectric layer of the capacitor, and serves to isolate the electrical connection between the upper electrode plate and the lower electrode plate.

[0114] In order to protect the thin film transistor below, a second insulating layer 9 is arranged on the thin film transistor and the first metal reflective layer; the second insulating layer 9 is used to protect the thin film transistor below; the second insulating layer 9 includes a passivation layer 91 and a flat layer 92 arranged in sequence, and the structure is as follows: Fig.16 As shown. The passivation layer 91 is arranged on the source 53 and the drain 54. The function of the passivation layer 91 is to isolate the electrical connection between metals to avoid the formation of a short circuit. The flat layer 92 is arranged on the passivation layer 91, and the upper surface of the flat layer is a plane. The function of the flat layer is to flatten the in-plane step difference caused by various layer patterns on the substrate of the display device, so as to facilitate the good superposition of subsequent film layers and improve the display effect. Or in some embodiments, by increasing the thickness of the passivation layer, it can also act as a flat layer to smooth the uneven film layer on the substrate. The structure is as shown in FIG. Fig.15 shown.

[0115] The passivation layer is made of insulating materials such as silicon nitride (SiNx), silicon oxide (SiOx), aluminum oxide or titanium oxide, and the planarization layer is made of insulating materials such as polyimide, silicon nitride (SiNx) or silicon oxide (SiOx).

[0116] It should be noted that the flat layer is provided with a hole on the second insulating layer, the hole on the second insulating layer penetrates the flat layer and the passivation layer, and the bottom of the hole on the second insulating layer is the source electrode or the drain electrode, and the structure is as follows: Fig.15 or Fig.16 shown.

[0117] A light-transmitting anode 10 is disposed on the second insulating layer, and the anode 10 is connected to the source 53 or the drain 54 of the thin film transistor through the hole in the second insulating layer. Fig.17As shown; the hole on the second insulating layer passes through the flat layer and the passivation layer, and the bottom of the hole on the second insulating layer is the source or the drain. If the anode is to be connected to the source, then the bottom of the hole on the second insulating layer is the source; if the anode is to be connected to the drain, then the bottom of the hole on the second insulating layer is the drain.

[0118] The anode is provided with a pixel definition layer 11, and the pixel definition layer is provided with a first hole 111; the bottom of the first hole 111 is the anode 10. The first light-emitting layer 12 is provided in the first hole 111, and the first light-emitting layer 12 is located above the first metal reflective layer 6, and the structure is as follows: Fig.18 and Fig.19 shown.

[0119] In some embodiments, the display panel is a double-sided display panel, and a second hole 112 is provided on the pixel definition layer 11, and the bottom of the second hole 112 is the anode 10. The second hole 112 is located on one side of the first hole 111 (or the first metal reflective layer), and the structure is as follows: Fig.18 and Fig.19 Each RGB sub-pixel has two light-emitting modes, top-emitting and bottom-emitting, which are controlled by the same set of TFT driving circuits.

[0120] The first light-emitting layer 12 and the second light-emitting layer 13 each include a hole injection layer HIL, a hole transport layer HTL, an organic light-emitting layer EM, an electron transport layer ETL, and an electron injection layer EIL. The first light-emitting layer and the second light-emitting layer can emit light required by the display panel, but these are too dispersed, so the first metal reflective layer and the second metal reflective layer are needed for regulation.

[0121] A light-transmitting cathode 14 is disposed on the pixel definition layer 11, and the cathode 14 covers the first light-emitting layer 12 in the first hole and the second light-emitting layer 13 in the second hole. Fig. 20 The cathode may be a magnesium-silver alloy or the like, so that the cathode is a light-transmitting cathode.

[0122] A second metal reflective layer 15 is disposed on the cathode. The second metal reflective layer 15 is located above the second light-emitting layer 13. The second metal reflective layer 15 is located on one side of the first light-emitting layer 12. The second metal reflective layer 15 is used to reflect the light of the second light-emitting layer to the substrate. The structure is as follows: Fig.21 The second light-emitting layer 13 is bottom-emitting (the direction of light emission is shown in FIG. Fig.21 The first light-emitting layer 12 is top-emitting (the direction of light emission is shown in FIG. Fig.21 The display panel has a double-sided display function and its structure is as follows Fig. 22Preferably, the first light-emitting layer and the second light-emitting layer do not interfere with each other when realizing top emission or bottom emission.

[0123] The conductive channel of the thin film transistor may be affected by light, resulting in abnormal performance at certain times. Preferably, the projection of the conductive channel of the thin film transistor is located within the projection of the second metal reflective layer, and the projection direction is perpendicular to the substrate. Fig.21 The second metal reflective layer blocks the ambient light and protects the conductive channel of the thin film transistor from being affected by the ambient light, which is beneficial to improving the working stability of the thin film transistor. It should be noted that the structure directly below the second light-emitting layer is a light-transmitting structure, so that light can pass through the structure directly below the second light-emitting layer.

[0124] Or in some embodiments, the cathode can replace the role of the second reflective metal layer. The cathode 14 includes a first cathode 141 and a second cathode 142; the first cathode 141 is a light-transmitting first cathode, and the first cathode 141 covers the first light-emitting layer 12; the second cathode 142 is a light-shielding and reflective second cathode 142, and the second cathode 142 covers the second light-emitting layer 13, and the second cathode 142 is used to reflect the light of the second light-emitting layer 13, and the structure is as follows Fig.20a Since the first light-emitting layer and the second light-emitting layer are made separately, it is more conducive to optimizing the performance of the light-emitting device. Preferably, the projection of the conductive channel of the thin film transistor covered by the second cathode is located within the projection of the second cathode, and the projection direction is perpendicular to the substrate.

[0125] The cover plate 16 is placed on the cathode and the second metal reflective layer. At this time, the second metal reflective layer is a planar structure. Fig.21 and Fig.24 As shown. Preferably, the structure of the second metal reflective layer 15 is the same as that of the first metal reflective layer 6, and has a side wall inclined to the surface of the substrate. In this case, the cover plate 16 is also provided with a buffer layer having a prismatic vertical structure, and the second metal reflective layer covers the buffer layer of the prismatic vertical structure. An insulating layer covering the second metal reflective layer can also be provided on the side of the second metal reflective layer away from the buffer layer. The cover plate is covered on the cathode through the second metal reflective layer. The structure is as shown in FIG. Fig.25 shown.

[0126] It should be noted that, although the above embodiments have been described in this article, the patent protection scope of the present invention is not limited thereby. Therefore, based on the innovative concept of the present invention, changes and modifications made to the embodiments described herein, or equivalent structures or equivalent process changes made using the contents of the present invention specification and drawings, directly or indirectly applying the above technical solutions to other related technical fields, are all included in the patent protection scope of the present invention.

Claims

1. A display panel, characterized in that: include: A buffer layer is provided on the surface of the substrate; A first metal reflective layer is disposed on the buffer layer, the first metal reflective layer includes a first side wall and a second side wall inclined to the surface of the substrate, the angle between the first side wall and the second side wall is 90 degrees, an opening formed between the first side wall and the second side wall faces upward, and the first side wall and the second side wall are used to reflect incident light; A thin film transistor is arranged on the buffer layer, and the thin film transistor is located on one side of the first metal reflective layer; A second insulating layer is disposed on the thin film transistor and the first metal reflective layer; An anode is arranged on the second insulating layer, the anode is a light-transmitting anode, and the anode is connected to the source or drain of the thin film transistor through a hole on the second insulating layer; A pixel definition layer is disposed on the anode, and a first hole is disposed on the pixel definition layer; A first light-emitting layer is disposed in the first hole, and the first light-emitting layer is located above the first metal reflective layer; A cathode is disposed on the pixel definition layer, the cathode is a light-transmitting cathode, and the cathode is connected to the first light-emitting layer; Also includes a second light emitting layer and a second metal layer reflective layer; The pixel definition layer is provided with a second hole, and the second light-emitting layer is provided in the second hole; and further includes a second metal reflective layer; A second metal reflective layer is arranged on the cathode, the second metal reflective layer is located above the second light-emitting layer, the second metal reflective layer is located on one side of the first light-emitting layer, the second metal reflective layer is used to reflect the light of the second light-emitting layer, and the structure directly below the second light-emitting layer is a light-transmitting structure.

2. A display panel according to claim 1, characterized in that: The projection of the conductive channel of the thin film transistor is located within the projection of the second metal reflective layer, and the projection direction is perpendicular to the substrate.

3. The display panel according to claim 1, characterized in that: The structure of the second metal reflective layer is the same as that of the first metal reflective layer.

4. The display panel according to claim 1, characterized in that: The second metal layer and the cathode are respectively located in different regions of the same layer.

5. The display panel according to claim 1, characterized in that: The thin film transistor comprises a gate, a first insulating layer, an active layer, a source electrode and a drain electrode; The gate is arranged on the buffer layer; The first insulating layer is disposed on the gate; The active layer is disposed on the first insulating layer, and the active layer is located above the gate; The source electrode and the drain electrode are arranged on the active layer; The second insulating layer is disposed on the source electrode and the drain electrode, and the second insulating layer is used to protect the thin film transistor thereunder.

6. The display panel according to claim 5, characterized in that: A light-transmitting capacitor including a lower plate and an upper plate; The lower electrode plate is arranged on the buffer layer and is located on one side of the gate; The upper electrode plate is disposed on the first insulating layer, the upper electrode plate is connected to the source or drain of the thin film transistor, and the upper electrode plate is above the lower electrode plate.

7. The display panel according to claim 1, characterized in that: The second insulating layer includes a passivation layer and a planarization layer; The passivation layer is disposed on the source electrode and the drain electrode; The planar layer is disposed on the passivation layer; The planar layer is provided with a hole on the second insulating layer, the hole on the second insulating layer penetrates the planar layer and the passivation layer, and the bottom of the hole on the second insulating layer is the source electrode or the drain electrode.

8. The display panel according to claim 1, characterized in that: The first metal reflective layer further includes a bottom wall parallel to the surface of the substrate, and the bottom wall is disposed between the first side wall and the second side wall.

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