Lattice-matched magnetic tunnel junctions with coupled pinning layers

Abstract

Embodiments of magnetic tunnel junction (MTJ) structures discussed herein employ a first pinned layer and a second pinned layer with a synthetic antiferromagnetic layer disposed therebetween. The first pinned layer in contact with the seed layer may contain a single layer of platinum or palladium alone, or a single layer of platinum or palladium in combination with cobalt and one or more bilayers of platinum (Pt), nickel (Ni), or palladium (Pd), or a combination of the foregoing, or an alloy of the foregoing. The first pinned layer and the second pinned layer may have different compositions or configurations such that the first pinned layer has a higher magnetic material content than the second pinned layer, and / or is thicker than the second pinned layer. The MTJ stack discussed herein maintains the desired magnetic properties after high temperature annealing.

Description

background Technical Field

[0002] Embodiments of the present disclosure generally relate to fabricating magnetic tunnel junction structures for magnetic random access memory (MRAM) applications. Background Art

[0004] Spin transfer torque magnetic random access memory, or STT-MRAM, employs a magnetic tunnel junction structure in its memory cell in which two ferro-magnetic layers are separated from each other by a thin insulating or "dielectric" layer. One of the magnetic layers has a fixed magnetic polarity and the other has a magnetic polarity that can be selectively changed between two states. In the case where the magnetic layers have perpendicular magnetic anisotropy, the polarity of the variable polarity layer can be switched between having the same polarity as the fixed polarity layer or having a polarity opposite to the polarity of the fixed polarity layer in the depth direction of the film layer stack comprising the magnetic tunnel junction or "MTJ" structure. The resistance across the MTJ is a function of the polarity of the variable polarity layer relative to the fixed polarity layer. The resistance across the MTJ is low when the polarities of the two layers are the same in the depth direction of the MTJ, and high when they are opposite to each other in the depth direction of the MTJ. Thus, the resistance across the cell can be used to indicate a value of 1 or 0, and thus store a data value, such as by using a low resistance state to represent a data value of 1, and a high resistance state to represent a data value of 0.

[0005] In order to form an MTJ stack, a film layer stack is manufactured, which includes a first pinned layer and a second pinned layer and a synthetic antiferromagnetic coupling (SyF) layer between the first pinned layer and the second pinned layer. When exposed to a magnetic field, the SyF coupling layer aligns the surface atoms of the first pinned layer and the second pinned layer with the surface atoms of the SyF coupling layer, thereby pinning the orientation of the magnetic moments of each layer in the first pinned layer and the second pinned layer. The first pinned layer and the second pinned layer each include similar magnetic moments, and therefore will react similarly when an external magnetic field is applied to the conventional MTJ stack 100A. The SyF coupling layer maintains the anti-parallel alignment of the magnetic moments of the first and second pinned layers.

[0006] In the case of MTJs employing a synthetic anti-ferrimagnetic (SyF) layer including two or more ferromagnetic layers separated by a non-magnetic layer, the SyF coupling may be lost after high temperature processing thereof, for example, after processing at a temperature of about 400° C. or above. In addition, when a magnetic field is applied to the MTJ stack, a dipole field may be generated, a magnetic dipole is a closed current loop, and the dipole field may interfere with the performance of the MTJ stack including the magnetic storage layer of the MTJ stack.

[0007] Therefore, there remains a need for an improved MTJ stack that can withstand processing temperatures and reduce dipole field effects. Summary of the invention

[0008] The present disclosure generally relates to the design and fabrication of magnetic tunnel junction (MTJ) stacks for memory cells.

[0009] In one example, a device includes: a magnetic tunnel junction stack, including: a first pinned layer including a first bilayer and a first lattice matching layer, the first lattice matching layer being formed above the first bilayer, wherein the first lattice matching layer includes platinum or palladium. The MTJ stack of the device further includes: a synthetic antiferromagnetic (SyF) coupling layer contacting the first lattice matching layer of the first pinned layer; and a second pinned layer contacting the SyF coupling layer. The second pinned layer includes a second lattice matching layer formed of platinum or palladium, the second lattice matching layer contacting the SyF coupling layer.

[0010] In one example, a magnetic tunnel junction stack includes: a first pinned layer including a first plurality of bilayers and a first lattice matching layer, the first lattice matching layer being formed over the first plurality of bilayers, wherein the first lattice matching layer includes platinum or palladium, and wherein each bilayer of the first plurality of bilayers includes a first cobalt interlayer and a second interlayer of platinum, nickel, palladium, or an alloy or combination of the foregoing; a synthetic antiferromagnetic (SyF) coupling layer formed on the first pinned layer; and a second pinned layer formed on the SyF coupling layer, wherein the second pinned layer includes a second lattice matching layer formed on the SyF coupling layer.

[0011] In another example, a magnetic tunnel junction (MTJ) stack includes: a buffer layer; a seed layer formed over the buffer layer, the seed layer being formed of chromium; and a first pinned layer contacting the seed layer. The first pinned layer includes a first bilayer and a first lattice matching layer, the first lattice matching layer being formed over the first bilayer, the first lattice matching layer being formed of at least one of platinum or palladium. The first bilayer includes a cobalt interlayer and at least one interlayer including platinum, nickel, or palladium. The MTJ stack further includes: a synthetic antiferromagnetic (SyF) coupling layer formed over the first pinned layer; and a second pinned layer formed over the SyF coupling layer, wherein the second pinned layer includes a second lattice matching layer formed over the SyF coupling layer, wherein the second lattice matching layer includes platinum or palladium. The MTJ stack further includes: a structural barrier layer formed over the second pinned layer, wherein the structural barrier layer includes at least one of tantalum, molybdenum, or tungsten; a magnetic reference layer formed over the structural barrier layer; a tunnel barrier layer formed over the magnetic reference layer; and a magnetic storage layer formed over the tunnel barrier layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The above briefly summarizes the manner in which the above-described features of the present disclosure can be understood in detail, as well as a more specific description of the present disclosure, which can be obtained by referring to the embodiments, some of which are shown in the accompanying drawings. However, it should be noted that the drawings only depict exemplary embodiments and should not be considered as limiting the scope of the present invention, which may allow other equivalent embodiments.

[0013] Figure 1A Schematic diagram of an example magnetic tunnel junction (MTJ) stack.

[0014] Figure 1B Is manufactured including Figure 1A A flow chart of a method of manufacturing a magnetic tunnel junction (MTJ) stack and a memory device according to an embodiment of the present disclosure.

[0015] Figure 2A is a schematic diagram of an MTJ stack according to an embodiment of the present disclosure.

[0016] Figure 2B is an enlarged view of a buffer layer of an MTJ stack according to an embodiment of the present disclosure.

[0017] Figure 2C is an enlarged view of a first pinned layer of an MTJ stack according to an embodiment of the present disclosure.

[0018] Figure 2D is an enlarged view of the second pinned layer of the MTJ stack according to an embodiment of the present disclosure.

[0019] Figure 2E is an enlarged view of an example magnetic storage layer of an MTJ stack according to an embodiment of the present disclosure.

[0020] Figure 2F is an enlarged view of an example capping layer of an MTJ stack according to an embodiment of the present disclosure.

[0021] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further description. DETAILED DESCRIPTION

[0022] Embodiments of the present disclosure relate to magnetic tunnel junction (MTJ) stacks and STT MRAM memory cells and memories. Here, the MTJ stack is incorporated into a film stack including an upper electrode and a lower electrode, so that the MTJ stack is sandwiched between the upper electrode and the lower electrode. The MTJ stack can be patterned to form a plurality of independent memory cells used in a magnetoresistive random access memory (MRAM). There are two magnetic layers in each MTJ stack of an MRAM cell, one of which has a fixed polarity and the other has a polarity that can be switched by applying a voltage to the layer or by applying a current to the magnetic layer. Based on the relative polarity between the first and second magnetic layers, the resistance across the MRAM varies. The first and second magnetic layers are referred to herein as magnetic reference layers and magnetic storage layers, respectively. The memory cell formed by the MTJ stack operates when a voltage is applied to the cell or when a current passes through the cell. The polarity of the switchable magnetic layer can change in response to the application of a voltage of sufficient intensity. In addition, the resistivity of the cell can be determined by measuring the current-to-voltage relationship across the cell at a relatively low voltage below the threshold required to switch the magnetic polarity of the magnetic storage layer.

[0023] The basic MTJ stack discussed herein is formed using multiple deposition chambers, which are used to deposit thin film layers on a substrate and ultimately pattern and etch the deposited film layers. The deposition chamber used to form the MTJ stack discussed herein includes a physical vapor deposition (PVD) chamber. Here, the PVD chamber is used to form multiple thin film layers of the MTJ stack. The MTJ stack includes a buffer layer, a seed layer on the buffer layer, a first pinned layer on the seed layer, a synthetic antiferromagnetic (SyF) coupling layer on the first pinned layer, a second pinned layer on the SyF coupling layer, and a barrier layer on the second pinned layer. In the PVD operation described herein, a plasma is formed in a sputtering chamber by an inert gas or a rare gas such as argon (Ar), helium (He), krypton (Kr) and / or xenon (Xe), while the chamber is maintained in a vacuum state. The PVD processing chamber also contains at least one sputtering target, and the substrate is disposed on a substantially flat surface facing the sputtering target. The sputtering target is coupled to a power supply so that the sputtering target is electrically driven or self-established as a cathodic state in a circuit of the power supply, through the plasma to a ground, such as a grounded portion of the sputtering chamber. The substrate is disposed on a pedestal or on another structure in the sputtering chamber, which may be at a floating potential, connected to ground, or may be biased to form an anode in the cathodic target to direct the plasma to the anode or ground circuit. The positively ionized portion of the noble gas atoms in the sputtering chamber are electrically attracted to the negatively biased target, and thus, the ions of the plasma bombard the target, which causes atoms of the target material to be ejected and deposited on the substrate, forming a thin film composed of the target material(s) on the substrate.

[0024] In order to form a thin film of the compound, a sputtering target including the compound can be sputtered using Ar plasma in a PVD chamber. In another example, a compound layer is deposited on a substrate using multiple sputtering targets, and each sputtering target includes one or more elements of the compound to be formed as a thin film on the substrate. Multiple sputtering targets are present in a PVD chamber, and Ar plasma or other gas system plasma sputtering can be used to form a desired compound layer on the substrate. In addition, in the PVD operation used to form the layers of the MTJ stack herein, metal oxide sputtering targets or metal nitride sputtering targets are used to form metal oxides and metal nitrides. In an alternative embodiment, in Ar plasma and oxygen (O 2 ) or nitrogen (N 2) is present in the PVD chamber, and a metal oxide or metal nitride layer of the MTJ stack is formed in the PVD chamber by sputtering one or more sputtering targets composed of metals of metal oxides or metal nitrides. In one example, the PVD chamber has a plurality of sputtering targets disposed therein, and each sputtering target in the PVD chamber is biased by a power supply to establish a negative bias thereon in any of the following ways: by directly applying a negative DC bias to the sputtering target, or by using a waveform to electrically drive or self-build a cathode state on the target, or a combination of the foregoing. In this example, the shield in the PVD chamber is configured to block one or more of the plurality of targets from the influence of the plasma, while allowing ions of the plasma formed in the PVD chamber to bombard at least one target to eject or sputter target material atoms from these targets to form a thin film on the substrate. In this example, one or more sputtering targets are exposed to Ar plasma, and their sputtering sequentially or synchronously forms a desired film composition on the substrate, and when O is separately applied to the substrate in addition to the Ar plasma, the O is separately applied to the substrate. 2 or N 2 When used for thin film layer formation on a substrate, separate PVD chambers are used to form the metal oxide and metal nitride layers.

[0025] The PVD system may include one or more PVD sputtering chambers coupled to a central robotic substrate transfer chamber. The central robotic substrate transfer chamber is configured to move substrates between a loading station coupled thereto and the sputtering chambers connected thereto. The PVD system is maintained at, for example, 10E -9 The substrate to be formed on the MTJ stack is placed under a background vacuum pressure of 1000 mTorr so that the substrate on which the MTJ stack is to be formed is not exposed to the external atmosphere when the substrate on which the MTJ stack is to be formed is moved in and between PVD chambers during the manufacture of the MTJ film layer stack thereon. Before forming the initial film layer of the MTJ film layer stack on the substrate, the substrate is degassed in the vacuum chamber and pre-cleaned using Ar gas plasma, or pre-cleaned in He / H gas plasma in a dedicated pre-cleaning chamber connected to the central robot transfer chamber. During the manufacture of the MTJ stack using one or more PVD chambers, one or more rare or inert sputtering gases, such as Ar, Kr, He, or Xe, may be set in each PVD chamber. The gas is ionized to form a plasma in the chamber, and the ions of the plasma bombard the negatively biased (several) sputtering targets to eject surface atoms from the targets to deposit a thin film of (several) target materials on the substrate located in the PVD sputtering chamber. In an embodiment, the processing pressure in the one or more PVD chambers can be from about 2 mTorr to about 3 mTorr. Depending on the implementation, a substrate support pedestal (or other structure on which a substrate may be mounted) in a PVD platform is maintained at -200°C to 600°C during fabrication of at least the seed layer, first and second pinned layers, SyF coupling layer and buffer layer of the MTJ stack.

[0026] Figure 1Ais a schematic diagram of a magnetic tunnel junction (MTJ) stack. Figure 1A A conventional MTJ stack 100A is shown, and the MTJ stack 100A includes a substrate 102, which includes a conductive layer of tungsten (W), tantalum nitride (TaN), titanium nitride (Tin), or other metal layers. In some examples, the substrate 102 includes one or more transistors, bit lines or source lines, and other storage lines previously fabricated therein or thereon, or other elements used to form an MRAM memory and previously fabricated or formed thereon. The substrate on which the MTJ stack is formed may have dimensions that may include a diameter of less than 200 mm, a diameter of 200 mm, a diameter of about 300 mm, a diameter of about 450 mm, or another diameter, and may have a circular or rectangular or square panel shape.

[0027] The buffer layer 104 in the conventional MTJ stack 100A is formed on the substrate 102 by sputtering one or more targets in a PVD chamber in which the substrate is located, and includes one or more of the following layers: Co x Fe y B z , TaN, Ta, or a combination of the foregoing. The seed layer 106 is deposited over the buffer layer 104 via sputtering in a PVD chamber. The buffer layer 104 is used in the conventional MTJ stack 100A to improve the adhesion of the seed layer 106 to the substrate. The seed layer 106 here includes platinum (Pt) or ruthenium (Ru), and is formed by sputtering a target of Pt or Ru or an alloy of the foregoing in a PVD chamber in which the substrate is located. The seed layer 106 is used to improve the adhesion and seeding of subsequently deposited layers in the conventional MTJ stack 100A by reducing or eliminating the lattice mismatch between the buffer layer 104 and the seed layer 106.

[0028] A first pinned layer 108 is formed on the seed layer 106 by sputtering. The first pinned layer 108 here includes a cobalt (Co) layer, one or more Co-containing bilayers, or a combination of a cobalt layer and one or more Co-containing bilayers. A synthetic antiferromagnetic (SyF) coupling layer 110 is formed above the first pinned layer 108 by sputtering. The SyF coupling layer 110 can be formed by sputtering the aforementioned elements from a target of ruthenium (Ru), rhodium (Rh), Cr, or iridium (Ir). A second pinned layer 112 is formed above the SyF coupling layer 110 by sputtering. The second pinned layer 112 is formed of a single cobalt (Co) layer here. The SyF coupling layer 110 is located between the first pinned layer 108 and the second pinned layer 112, and aligns the surface atoms of the first pinned layer 108 and the second pinned layer 112 with the surface atoms of the SyF coupling layer 110 when exposed to a magnetic field, thereby pinning the orientation of the magnetic moments of each of the first pinned layer 108 and the second pinned layer 112. The first pinned layer 108 and the second pinned layer 112 each include similar magnetic moments and will therefore react similarly when an external magnetic field is applied to the conventional MTJ stack 100A. The SyF coupling layer 110 maintains the antiparallel alignment of the magnetic moments of the first pinned layer 108 and the second pinned layer 112.

[0029] A structural barrier layer 114 is formed over the second pinned layer 112 and includes tantalum (Ta), molybdenum (Mo), tungsten (W), or a combination thereof. The structural barrier layer 114 is utilized because of its crystalline structure, which is different from the crystalline structure of the first 108 and second 112 pinned layers. The structural barrier layer 114 prevents a short circuit from forming between the conventional MTJ stack 100A and a metal contact that may be coupled to the conventional MTJ stack 100A to form an MRAM memory cell.

[0030] In addition, in the conventional MTJ stack 100A, the magnetic reference layer 116 is formed over the structural barrier layer 114 by sputtering in a PVD chamber. The tunnel barrier layer 118 is formed over the magnetic reference layer 116, and the magnetic storage layer 120 is formed over the tunnel barrier layer 118. Each of the tunnel barrier layer 118, the magnetic reference layer 116, and the magnetic storage layer 120 is formed by using an Ar plasma sputtering target in one or more PVD chambers. The magnetic reference layer 116 and the magnetic storage layer 120 each include Co, which may vary in composition. x Fe y B zalloy. In addition, the magnetic storage layer 120 may include one or more layers of Ta, Mo, W, or Hf, or a combination of the foregoing. The tunnel barrier layer 118 includes an insulating material and may be made of a dielectric material such as MgO. The composition and thickness of the tunnel barrier layer 118 are selected to produce a large tunnel magnetoresistance ratio (TMR) in the tunnel barrier layer 118 of the conventional MTJ stack 100A. TMR is the ratio of the number of volts in the conventional MTJ stack 100A from the anti-parallel state (R ap ) to parallel state (parallel state; R p ) is a measure of the resistance change and can be expressed using the formula ((R ap -R p ) / R p ) is expressed as a percentage. When a bias voltage is applied to the conventional MTJ stack 100A, the tunnel barrier layer 118 is penetrated by spin-polarized electrons, and the transmission of the electrons through the tunnel barrier layer 118 causes conduction between the magnetic reference layer 116 and the magnetic storage layer 120 .

[0031] A capping layer 122 is formed on the magnetic storage layer 120 by sputtering in a PVD chamber, and includes a plurality of interlayers. The capping layer 122 includes a first capping interlayer 122A made of a dielectric material such as MgO. A second capping interlayer 122B including a metal material such as Ru, Ir, Ta, or a combination of the foregoing is formed over the first capping interlayer 122A. The first capping interlayer 122A acts as an etch stop layer for hard mask etching and protects the MTJ stack 100A from corrosion. The second capping interlayer 122B is configured to be electrically connected to a transistor or a contact when the conventional MTJ stack 100A is subsequently patterned, as described below with reference to Figure 1B A hard mask layer 124 is formed in a PVD chamber by sputtering. The hard mask layer 124 is formed over the second capping interlayer 122B to protect the conventional MTJ stack 100A and may be patterned during subsequent operations.

[0032] Figure 1B 1 is a flow chart of a method 100B for manufacturing a memory device including an MTJ stack 100A, and the MTJ stack is manufactured according to an embodiment of the present disclosure and is shown in FIG. Figures 2A to 2F The method 100B is performed in part in a plurality of PVD chambers of a PVD system configured to deposit thin film layers by sputtering. The substrate 102 may be moved in and between the sputtering chambers via a central robotic transfer chamber of the PVD system to form various thin film layers, including Figure 1A100A and the MTJ stacks fabricated according to embodiments of the present disclosure shown and discussed below. In another example, as discussed above, a plurality of sputtering targets are disposed in a PVD chamber, and a shield inside the PVD chamber is configured to selectively protect the plurality of sputtering targets from exposure to plasma, or to expose the targets. The shield is rotated at different operations of the method 100B to expose one or more targets sequentially or synchronously to the plasma in the PVD chamber.

[0033] Therefore, this article refers to method 100B. Figure 1A In one or more PVD chambers, argon (Ar), helium (He), krypton (Kr), xenon (Xe), oxygen (O 2 ) or nitrogen (N 2 ) as plasma species to perform the operations of method 100B. During method 100B, the process pressure in the PVD chamber may be from about 2 mTorr to about 3 mTorr. Depending on the implementation, during the fabrication of the pinning layer and the seed layer of the MTJ stack, the substrate support pedestal (or other structure on which the substrate may be disposed) in the PVD platform is maintained at -200° C. to 600° C.

[0034] Depending on the composition of the (several) sputtering targets used for the various layers of the MTJ stack 100A, the substrate 102 can be moved in and between PVD chambers, or as discussed herein, multiple targets are coupled to a power source and shields are configured to selectively protect some targets so that one or more targets are exposed sequentially or simultaneously to form the desired film composition, or both methods can be performed. During sputtering in the PVD chamber, when Ar is used as a sputtering gas, Ar ions of the plasma bombard one or more exposed sputtering targets, causing surface atoms of the sputtering targets to be ejected and deposited as a thin film on the substrate. In method 100B, at operation 128A, such as Figure 1A A substrate such as the substrate 102 in the method 100B is subjected to operations including degassing and pre-cleaning in Ar gas plasma or He / H plasma. During method 100B, the substrate is moved between processing chambers via or through a central robotic substrate transfer chamber. In operation 128B, the substrate 102 is transferred from the central robotic substrate transfer chamber to a PVD chamber of a plurality of PVD chambers. Subsequently, in operation 130, a buffer layer 104 is deposited on the substrate 102 by sputtering in a target in the PVD chamber. A power of 1 kW to 100 kW is applied to one or more PVD chambers discussed herein to ionize a portion of the Ar and form a plasma used in operation 130. The ejected surface atoms of the target are deposited on the substrate 102 to form the buffer layer 104.

[0035] During the formation of the buffer layer 104 at operation 130, Ar plasma is used to sputter a layer including Cox Fe y B z One or more sputtering targets of Ta, TaN and / or Ta are used to form the buffer layer 104. In the embodiment where the buffer layer 104 is Ta or includes Ta, the buffer layer 104 is sputtered in the PVD chamber using a Ta target and Ar plasma. In the example where the buffer layer 104 is TaN or includes TaN, when there is nitrogen (N 2 ) and sputtering a Ta sputtering target using Ar plasma to form a TaN buffer layer 104, operation 130 is performed. In another example where the buffer layer 104 is or includes TaN, operation 130 is performed in a PVD chamber using a TaN sputtering target and Ar plasma to form the buffer layer 104. During the formation of the buffer layer 104 and subsequent layers, the one or more PVD chambers used are maintained at a vacuum pressure.

[0036] Subsequently, in operation 132, a seed layer 106 is deposited on the buffer layer 104 by sputtering a target in a PVD chamber. In an embodiment of operation 132, the seed layer 106 is formed in the same PVD chamber as the PVD chamber used to form the buffer layer 104, using a sputtering target different from the sputtering target used to deposit the buffer layer 104. In operation 134, a first pinned layer 108 is deposited on the seed layer 106 by sputtering a target in the PVD chamber. The first pinned layer 108 is shown as an example in the conventional MTJ stack 100A, and can be formed in the PVD chamber by sputtering one or more targets using Ar plasma in operation 134. In an example where the first pinned layer 108 is a Co layer, the Co target is sputtered using Ar plasma in the PVD chamber. In an example where the first pinned layer 108 includes one or more bilayers, operation 134 uses a Co sputtering target to form a first interlayer of the bilayer, and uses another sputtering target composed of a different element to form a second interlayer of the bilayer. Depending on the embodiment, a Co sputtering target and a sputtering target of another element may be sputtered using Ar plasma in the same PVD chamber, or each layer of the double layer may be formed in a separate PVD chamber.

[0037] In an example according to an embodiment of the present disclosure that may be combined with other examples herein, a PVD chamber is used to form a Figure 2A and Figure 2CThe first pinned layer 208 shown. In this example, the first pinned layer 208 is formed in a PVD chamber using one or more sputtering targets in operation 134. In order to deposit the first pinned layer 208, a xenon (Xe) or argon (Ar) gas is introduced into the PVD chamber at a flow rate of about 2sccm to 40sccm. The Xe or Ar gas is introduced into the PVD chamber, and a power of 50W to 10000W is applied to the target with a negative voltage to form a plasma. In another example, the Xe or Ar gas is introduced into the PVD chamber at a flow rate of 5sccm to 20sccm, and in some examples, the Xe or Ar gas is introduced into the PVD chamber at a flow rate of 10sccm. In another example, the power applied to the one or more sputtering targets for forming the first pinned layer 208 is 100W to 800W, and, in another example, the power applied to the one or more sputtering targets can be 400W.

[0038] Depending on the composition of the first pinned layer 208, Xe gas may be used in a sputtering operation in a PVD chamber in operation 134 to form a plasma because it is a heavier gas than Ar and therefore produces ions with a higher atomic weight than ions formed using Ar or other lighter gases. Therefore, Xe plasma bombards the target with more energy than Ar plasma and can be used to sputter deposit layers such as Pt. In one example of the first pinned layer 208 in the present disclosure, Xe, Ar, or a mixture thereof is introduced into the PVD chamber at a flow rate of about 10 sccm, and a power of 400 W is applied to the target at a negative voltage to form an Ar or Xe plasma. In one example, the first pinned layer 208 is made of a lattice matching layer of Pd or Pt by sputtering a Pd target or a Pt target. The lattice matching layer of the first pinned layer 208 is from about to about thick.

[0039] In another example, if Figure 2CAs shown, the first pinned layer 208 includes at least one bilayer, the bilayer includes two interlayers, and a lattice matching layer including Pt or Pd is formed above the at least one bilayer. In an example in which at least one bilayer is used in addition to the lattice matching layer to form the first pinned layer 208, the bilayer includes a first interlayer of Co and a second interlayer such as Pt, Pd or Ni or a combination or alloy of the foregoing. The bilayer of the first pinned layer 208 can be formed in a PVD chamber at operation 134, the PVD chamber including a plurality of targets including a Co target and a target formed of Pt, Pd or Ni or a combination or alloy of the foregoing, or the bilayer of the first pinned layer 208 is formed in separate PVD chambers, one PVD chamber containing a Co target and another PVD chamber containing a target of Pt, Pd or Ni or a combination or alloy of the foregoing. In one example, a plurality of sputtering targets are disposed in a single PVD chamber and sputtered using Ar plasma and / or Xe plasma. The shields discussed herein may be used to selectively expose each of the Co target and the target of another element to the plasma. The selective target exposure forms a Co interlayer of the bilayer and forms an interlayer of the other element to form a resulting bilayer. The interlayer deposition may be repeated at operation 134 for multiple iterations to form a target of the Co target and another element. Figure 2C One or more bi-layers of the first pinned layer 208 are shown.

[0040] In operation 136, a SyF coupling layer 110 is deposited on the first pinned layer 108 by sputtering a target of Ru, Cr, Rh or Ir in a PVD chamber using Ar, Kr or Xe plasma. Figure 2AIn one example of the SyF coupling layer 210 of an embodiment of the present disclosure shown, the SyF coupling layer 210 is deposited in a PVD chamber using a sputtering target of Ru, Cr, Rh, or Ir in operation 136. In one example of forming the SyF coupling layer 210 in operation 136, the Ir sputtering target is sputtered in the PVD chamber using Kr or Xe as a plasma gas. The Xe gas or Kr gas to form the plasma is introduced into the PVD chamber at a flow rate of 10 sccm to 25 sccm, and in some examples, the Xe gas or Kr gas to form the plasma is introduced into the PVD chamber at a gas flow rate of 16 sccm. In another example of forming the SyF coupling layer 210 in operation 136, the Ru sputtering target is sputtered in the PVD chamber using Ar plasma. The Ar gas used to form the plasma to sputter the Ru target is introduced into the PVD chamber at a gas flow rate that can be, for example, 2 sccm to 10 sccm, and in some examples, the Ar gas flow rate is 6 sccm. Furthermore, in an example of operation 136, when Kr, Xe, or Ar gas is used in the PVD chamber, a power between 150 W and 300 W is applied to the target at a negative voltage to form and maintain Kr, Xe, or Ar plasma. In other examples, a power of about 250 W is applied to the target. In operation 136, a SyF coupling layer 210 is deposited in contact with the lattice matching layer of the first pinned layer 208.

[0041] At operation 138, a second pinned layer 112 is deposited on the SyF coupling layer 110 in a PVD chamber. In one example, the second pinned layer 112 is formed of Co in the PVD chamber using a Co target and Ar plasma. In another example, the second pinned layer 112 includes a bilayer and may or may not include a Co layer formed to contact the bilayer. In this example, the second pinned layer 112 is formed in the PVD chamber using a Co sputtering target and a second metal sputtering target, and the shield is adjusted in at least one iteration to expose each of the Co and second metal sputtering targets, respectively, to form one or more bilayers of the second pinned layer 112. In other examples, each layer of the bilayer of the second pinned layer 112 may be formed in different PVD chambers, where one PVD chamber includes a Co sputtering target and the other PVD chamber includes a sputtering target of the second metal.

[0042] In one example of the second pinning layer 212 according to an embodiment of the present disclosure, Figure 2A and 2DAs shown, at operation 138, a second pinned layer 212 is deposited in a PVD chamber using Ar plasma and / or Xe plasma, depending on the target material to be sputtered. In an embodiment of the present disclosure, the second pinned layer 212 is fabricated by sputtering a Pt target with Xe plasma at operation 138 to deposit a lattice matching layer of Pt on the SyF coupling layer 210. In an embodiment, the second pinned layer 212 further includes a bilayer including a first interlayer of Co and a second interlayer of Pt, Ni or Pd. The bilayer is formed on the lattice matching layer of the second pinned layer 212.

[0043] In an example of forming at least one bilayer as part of the second pinned layer, the bilayer is formed in a PVD chamber in the following manner: a Co sputtering target is used to form a first interlayer of the bilayer, and a second metal sputtering target is used to form a second interlayer of the bilayer. The second sputtering target may be formed of Pt, Pd, or Ni. In another example, the second sputtering target may be formed of an alloy including one or more of Pt, Pd, or Ni, and in at least one iteration, the shield is adjusted to expose each of the Co and second metal sputtering targets, respectively, to form one or more bilayers of the second pinned layer 212. When a metal such as Pt is used to form the second pinned layer 212, xenon may be used to deposit the second pinned layer 212 because Xe is a heavier gas than Ar gas and may therefore more effectively interact with heavier metals including Pt during the sputtering process in the PVD chamber. In an embodiment, the second pinned layer 212 further includes a Co layer formed above the at least one bilayer. The Co layer formed above the at least one bilayer may have up to In an embodiment, the second pinned layer 212 may have a total thickness of from 0.3 nm to 15 nm. In an embodiment where a plasma is formed in a PVD chamber using Xe gas, the Xe gas is introduced into the PVD chamber at a flow rate of from about 2 sccm to about 40 sccm, or from 5 sccm to 20 sccm, and in some embodiments, the Xe gas is introduced into the PVD chamber at a flow rate of about 10 sccm. During the formation of the second pinned layer 212, a power of from 50 W to about 1000 W is applied to the target at a negative voltage to form and maintain Ar and / or Xe plasma. In some examples, a power of from 100 W to 600 W is applied to the target at a negative voltage to form and maintain Ar and / or Xe plasma, and in some embodiments, a power of about 200 W is applied to the target at a negative voltage.

[0044] The structural barrier layer 114 is formed in a PVD chamber at operation 140, and the PVD chamber includes a sputtering target including Ta, Mo, and / or W, depending on the desired composition of the structural barrier layer 114. When two or more sputtering targets of Ta, Mo, and W are used, each target may be used in a separate PVD chamber, or the two or more sputtering targets may be sputtered sequentially or simultaneously in the PVD chamber using the shielding adjustments discussed above, depending on the desired composition of the structural barrier layer 114. A magnetic reference layer 116 is then deposited on the structural barrier layer 114 at operation 142, and the magnetic reference layer 116 may be formed in the PVD chamber in which other layers of the MTJ stack 100A may also be formed. Whether both the buffer layer 104 and the magnetic reference layer 116 are Co x Fe y B z - system, which may depend on, for example, the composition of other layers, for example, the composition of the buffer layer 104. Co x Fe y B z The alloy sputtering target forms the magnetic reference layer 116 in the PVD chamber. In other examples, the magnetic reference layer 116 can be deposited using independent sputtering targets of Co, Fe or B, or by a combination of an alloy sputtering target and a single element sputtering target, such as a combination of a CoFe target and a B target.

[0045] At operation 144, a tunnel barrier layer 118 is deposited on the magnetic reference layer 116. In one example of operation 144, the tunnel barrier layer 118 is formed in a PVD chamber using a metal oxide target such as MgO and an Ar gas system plasma. In an alternative embodiment, at operation 144, the tunnel barrier layer 118 is formed in a PVD chamber using the following method: 2 While present in the PVD chamber, a metal target such as Mg, Ti, Hf, Ta, or Al and an Ar gas system plasma are used to form a metal oxide of the tunnel barrier layer 118. At operation 146, a magnetic storage layer 120 is formed in the PVD chamber. The formation of the magnetic storage layer 120 can occur in various ways depending on the desired composition. The magnetic storage layer 120 may include Co x Fe y B z , and in some examples, may include one or more layers of Ta, Mo, W, or Hf. Accordingly, the deposition of the magnetic storage layer 120 in the PVD chamber may include Ar plasma and Co x Fe y B zAn alloy target, or independent targets of Co, Fe, and B, or a combination of an alloy target and an element target, such as a combination of a CoFe target and a B target. In an example where the magnetic storage layer 120 includes Ta, Mo, W, or Hf, a sputtering target of Ta, Mo, W, or Hf is sputtered in a chamber using plasma formed of Ar.

[0046] In one example, the magnetic storage layer 120 can be formed in a single PVD chamber using Ar plasma. The shield can be adjusted to expose or protect the Co x Fe y B z and one or more targets of layers of Ta, Mo, W or Hf to deposit the magnetic storage layer 120. In another example, Ar plasma is used to deposit the magnetic storage layer 120 using Co x Fe y B z The Co alloy target is used to sputter the magnetic storage layer 120 in the PVD chamber. x Fe y B z In another example, Co is formed in a PVD chamber by using independent Co, Fe and B targets and Ar gas system plasma. x Fe y B z In another example, Ar gas system plasma and alloy targets and compound element targets, such as CoFe targets and B targets, are used to form Co in a PVD chamber. x Fe y B z The Ta, Mo, W, or Hf layer of the magnetic storage layer 120 may be sputtered in a PVD chamber using a Ta target, a Mo target, a W target, or a Hf target.

[0047] At operation 148, the capping layer 122 is deposited on the magnetic storage layer 120. In an embodiment, the first capping interlayer 122A of the capping layer 222 is formed in a PVD chamber, which may be different from the PVD chamber for forming the non-oxide layer because when forming the oxide layer, Ar plasma and O 2 Both are present in the PVD chamber during operation 148. The Mg target is sputtered using Ar plasma, and O 2The PVD chamber is also present in the PVD chamber to deposit the first capping interlayer 122A in the PVD chamber. In another example of operation 148, the first capping interlayer 122A is formed in the PVD chamber using a MgO sputtering target and Ar plasma. In an example where the first capping interlayer 122A is formed of the same material as the tunnel barrier layer 118 (e.g., Mg), the PVD chamber used for operation 144 can be the same PVD chamber used for forming the first capping interlayer 122A in operation 148. In operation 150, the second capping interlayer 122B is deposited on the first capping interlayer 122A. If an MgO sputtering target is used in operation 148, the first capping interlayer 122A is formed in the PVD chamber. 2 , operation 150 may occur in a separate PVD chamber from the PVD chamber used to sputter the first capping interlayer 122A because no O 2 The second capping interlayer 122B is formed in a PVD chamber using Ar plasma and one or more sputtering targets composed of Ru, Ir and / or Ta. Depending on the composition of the second capping interlayer 122B, operation 150 may occur in, for example, the PVD chamber also used to form the SyF coupling layer 110 in operation 136.

[0048] Further, in the method 100B, at operation 152, a hard mask layer 124 is deposited over the second capping interlayer 122B in a PVD chamber. Depending on the type of hard mask layer 124 used in the MTJ stack 100A, operation 152 may or may not be performed in the PVD chamber. 2 For example, if the hard mask layer 124 is a metal oxide hard mask, O may be used during operation 152. 2 and Ar-based plasma together with a metal sputtering target or a plurality of metal sputtering targets to form a metal oxide layer, or in operation 150 without using O 2 In the case of forming the hard mask layer 124, a metal oxide sputtering target may be used to deposit the hard mask layer 124. In some embodiments, when the hard mask layer 124 is amorphous carbon or spin-on carbon, operation 152 occurs in a CVD or spin-on deposition chamber.

[0049] Further, in the method 100B, the MTJ stack 100A (or hereinafter referred to as Figure 2A100B) may undergo one or more processes collectively indicated by operation 154 in method 100B. These operations may include high temperature (approximately 400°C) operations. In one example, the process of operation 154 may include a pre-patterning annealing operation followed by an MTJ patterning operation. In alternative embodiments, the MTJ patterning at operation 154 may include multiple processes, such as patterning the hard mask layer 124, and may further include the following operations: after the hard mask layer 124 is patterned to form a plurality of independent pillars from the MTJ stack 100A, etching the MTJ stack 100A using the patterned hard mask layer as an etch mask.

[0050] In an alternative embodiment of operation 154, a thermal annealing operation is performed to repair, crystallize, and enhance the lattice structure of the film stack including the magnetic storage layer(s) and the magnetic reference layer(s) in the MTJ stack 100A. The thermal annealing performed at operation 154 may be used to further crystallize the material of at least the magnetic reference layer(s) 116 and the magnetic storage layer(s) 120. The crystallization of the magnetic reference layer and the magnetic storage layer as they are deposited establishes the perpendicular anisotropy of the MTJ stack 100A while maintaining the desired electrical and mechanical properties thereof. An embodiment of an MTJ stack fabricated following the operations of method 100B is shown and discussed below and is configured to maintain the as-deposited face-centered cubic (fcc) shape of the pinned layer after the thermal annealing operation performed at operation 154 and / or during additional or alternative back-end processing operations occurring at elevated temperatures of approximately 400°C. <111> Crystalline structure. An MTJ stack manufactured according to an embodiment of the present disclosure includes a SyF coupling layer between a first pinned layer and a second pinned layer. In an embodiment, the first pinned layer includes a first lattice matching layer and the second pinned layer includes a second lattice matching layer, each of the first lattice matching layer and the second lattice matching layer being formed of platinum (Pt) or palladium (Pd). The first lattice matching layer and the second lattice matching layer of the second pinned layer, referred to herein as the first pinned layer, are at least in part because the lattice constant of the material selected to make each of the layers in the first and second lattice matching layers is within about + / - 4% of the lattice constant of the material making the SyF coupling layer. The SyF coupling layer contacts each of the first lattice matching layer of the first pinned layer and the second lattice matching layer of the second pinned layer. This is in contrast to other MTJ stacks in which the SyF coupling layer contacts the Co layer of the first pinned layer and the Co layer of the second pinned layer.

[0051] In an embodiment, each layer in the first pinned layer and / or the second pinned layer further includes at least one bilayer, and the at least one bilayer is formed to contact the corresponding lattice matching layer. In one example, each layer in the first lattice matching layer from the first pinned layer and the second lattice matching layer from the second pinned layer is in contact with the SyF coupling layer, and the SyF coupling layer is formed of Ir. Each bilayer includes a first interlayer and a second interlayer. In one example of the first pinned layer, the first pinned layer includes a first lattice matching layer and a bilayer, the bilayer including a first interlayer of Co and a second interlayer of Ni. In another example of the first pinned layer, the first pinned layer includes a first lattice matching layer, and at least one bilayer includes a first interlayer of Co and a second interlayer of Pt. In another example of the first pinned layer, the first pinned layer includes a first lattice matching layer, and at least one bilayer includes a first interlayer of Co and a second interlayer of Pd. In an example of the second pinned layer, the second pinned layer includes a second lattice matching layer and a bilayer, the bilayer including a first interlayer of Co and a second interlayer of Pt. In another example, the second pinned layer includes a second lattice matching layer and a bilayer, the bilayer including a first interlayer of Co and a second interlayer of Pd. In another example, the second pinned layer includes a second lattice matching layer and a bilayer, the bilayer including a first interlayer of Co and a second interlayer of Ni. The second lattice matching layer is in contact with a SyF coupling layer including Ir. Further, in the example of the second pinned layer, a Co layer is formed over one or more bilayers and in contact with the structural barrier layer.

[0052] Depending on the implementation, the first pinned layer and the second pinned layer may each include the same layer structure, material and / or thickness, or may vary in layer structure, material and / or thickness. Using the MTJ stack discussed herein, there is an improved lattice matching between the first pinned layer and the SyF coupling layer and between the SyF coupling layer and the second pinned layer. As discussed below, the improved lattice matching reduces the effect of the dipole field on the magnetic storage layer. Lattice matching as discussed herein includes: manufacturing a layer including a first pinned layer, a second pinned layer and a SyF coupling layer so that when the lattice constant difference (referred to as lattice mismatch in this article) between the first pinned layer and the SyF coupling layer is reduced, the lattice mismatch between the second pinned layer and the SyF coupling layer is reduced. Lattice mismatch is defined in equation (1):

[0053] LM=[(a 1 –a 2 ) / a 1 ]x 100 (1)

[0054] In equation (1), a 1 is the lattice constant of the first material, and a 2is the lattice constant of the second material. In an embodiment of the present disclosure, the lattice mismatch between the SyF coupling layer and the first pinned layer of the MTJ stack is less than about + / -4%, and the lattice mismatch between the SyF coupling layer and the second pinned layer is less than + / -4%.

[0055] In addition, in the MTJ stack discussed herein, when each layer in the first pinned layer and the second pinned layer includes at least one bilayer, the thickness ratio of the interlayer of each bilayer of the first pinned layer and the second pinned layer can be adjusted to reduce the dipole field effect on the stack when a magnetic field is applied. If more than one bilayer is used, the thickness ratio discussed herein can be calculated for each bilayer in the pinned layer. In other examples, the thickness ratio can be calculated as an average across the bilayer, so that the thickness ratio of the pinned layer can be calculated using the average value of the thickness of the first interlayer and the average value of the thickness of the second interlayer across the bilayer of the pinned layer. The details of the thickness ratio are discussed below, and the thickness of the first interlayer of the bilayer of the pinned layer and the thickness of the second interlayer of the bilayer of the pinned layer are calculated. Using the MTJ stack discussed herein, even after annealing, the crystal structure of the SyF coupling layer and the magnetic coupling of the magnetic reference layer and the magnetic storage layer are substantially maintained in the same state of the deposited state. For example, the MTJ stack discussed herein can be maintained at about 400°C for 0.5 hours to at least 3 hours, and thus the magnetic and electrical properties of the MTJ stack are maintained.

[0056] Figure 2A 2 is a schematic diagram of an MTJ stack 200 according to an embodiment of the present disclosure. In the illustrated embodiment, a buffer layer 204 is formed on a conductive portion of a substrate 202, or on a conductive film layer on the substrate 202, via sputtering in a PVD chamber. The substrate 202 may include one or more of: tungsten (W), tantalum nitride (TaN), titanium nitride (Tin), or other metal layers. The buffer layer 204 improves the adhesion of the seed layer 206 to the substrate 202. The improved adhesion of the seed layer 206 to the substrate 202 facilitates the formation and performance of subsequently deposited layers of the MTJ stack 200. The buffer layer 204 includes Co x Fe y B z , Ta and / or TaN, and is formed in one or more PVD deposition operations in a PVD chamber using Ar plasma. In one example, the buffer layer 104 is formed in a PVD chamber using Ar plasma and a sputtering target, wherein the sputtering target is Co x Fe y B zIn another example, the buffer layer 104 is formed using independent sputtering targets of Co, Fe or B. In another example, the buffer layer 104 is formed by using a combination of an alloy sputtering target and a single element sputtering target, such as a combination of a CoFe target and a B target. In an example where the buffer layer 204 includes a Ta layer, the Ta layer can be formed in a PVD chamber using a Ta target and Ar plasma.

[0057] In one example, the buffer layer 204 includes TaN and is formed using a Ta target, Ar plasma, and N 2 The buffer layer 204 is sputtered onto the substrate 202 in a PVD chamber. 2 Reacts with the Ta material sputtered from the Ta target to form a TaN layer. In another example, a TaN sputtering target and Ar plasma are used in a PVD chamber to form the buffer layer 204. In one example, the buffer layer 204 is sputtered directly on and in contact with the conductive layer on the substrate 202. In other examples, there is a conductive transition layer between the conductive layer on the substrate 202 and the buffer layer 204, and the conductive transition layer does not affect the performance of the MTJ stack. The buffer layer 204 is used in the illustrated embodiment as appropriate and may not be used in some embodiments discussed herein. When the buffer layer 204 is used, the total thickness of the buffer layer 204 is from (without buffer layer) to about In one example, the buffer layer 204 is Ta, TaN, or Co sputtered directly on and in contact with the conductive layer on the substrate 202. x Fe y B z of a single layer, and the single layer is up to In another example, the buffer layer 204 is a combination of two or more layers, and each layer of the buffer layer 204 is Ta, TaN or Co. x Fe y B z In this example, the thickness of each layer of the buffer layer 204 can be to The buffer layer 204 is formed of TaN instead of Ta or Co. x Fe y B z In the example of formation, the thickness of the buffer layer 204 can be up to In another example that may be combined with other examples herein, wherein Co is used alone x Fe y B z To form the buffer layer 204. In this example, the buffer layer 204 may have a thickness of about In another example, at least one of Ta or TaN is combined with Co x Fe y B z , to form a buffer layer 204. In this example, the average thickness of the buffer layer 204 is about

[0058] The seed layer 206 is deposited in the PVD chamber by sputtering one or more targets. The seed layer 206 is deposited on the buffer layer 204. The seed layer 206 includes Cr or Pt. The details of forming the seed layer 206 in the PVD chamber are discussed above at operation 132. In an embodiment, the thickness of the seed layer 206 is In one example that may be combined with other examples herein, the thickness of the seed layer 206 ranges from about to about In one example, the seed layer 206 is directly formed on and contacts the buffer layer 204. In other examples, there is a transition layer between the seed layer 206 and the buffer layer 204, and the transition layer does not affect the performance of the MTJ stack.

[0059] Further, in the MTJ stack 200, the first pinned layer 208 is formed on the seed layer 206 in a PVD chamber. Figure 1B Operation 134 of method 100B in detail illustrates the formation of the first pinned layer 208, and the formation of the first pinned layer 208 occurs in a PVD chamber using Ar or Xe plasma and one or more sputtering targets. In one example, the first pinned layer 208 is fabricated as one or more bilayers of various materials and a lattice matching layer formed over the one or more bilayers, such that the lattice matching layer of the first pinned layer is in contact with the SyF coupling layer 210, as shown in FIG. Figure 2CAs shown. The lattice matching layer of the first pinned layer 208 can be formed of Pt or Pd. The first pinned layer 208 is deposited over one or more bilayers using a Pt or Pd sputtering target using Xe plasma. In an example where one or more bilayers are included in the first pinned layer 208, each bilayer contains a first interlayer of Co and a second interlayer of another element or alloy. At least one bilayer of the first pinned layer 208 is formed by sputtering a Co target using Ar plasma, and then sputtering a second target of Pt, Ni or Pd or a combination or alloy of the foregoing using Ar or Xe plasma. In an example where a Pt target is sputtered in addition to a Co target to form a bilayer of the first pinned layer 208, Xe plasma may be used instead of Ar plasma or Xe plasma may be used in addition to Ar plasma. In an embodiment where one or more bilayers are used to form the first pinned layer, repeated deposition cycles may be performed in a PVD chamber by forming a first interlayer of a bilayer, wherein the first interlayer includes Co. The first interlayer of the bilayer may be formed by shielding a target that does not include Co, and then, exposing a second target that includes a second element for depositing a second interlayer of the bilayer by shielding the Co target and the other targets. The deposition of the first interlayer and the second interlayer may be repeated in an iterative manner to form one or more bilayers of the first pinned layer 208. In one example, the first pinned layer 208 is formed directly on and in contact with the seed layer 206 in a PVD chamber. In other examples, there is a transition layer between the seed layer 206 and the first pinned layer 208 that does not affect the performance of the MTJ stack.

[0060] A synthetic antiferromagnetic (SyF) coupling layer 210 is deposited on the first pinned layer 208 in a PVD chamber, and a second pinned layer 212 is sputter-deposited on the SyF coupling layer 210. The SyF coupling layer 210 is formed in a PVD chamber using Kr or Xe plasma with a Ru sputtering target, a Rh sputtering target, a Cr sputtering target, or an Ir sputtering target. The thickness of the SyF coupling layer 210 is from about 100 Å to about 500 Å. to about In one embodiment, the second pinned layer 212 is fabricated by sputtering a Pt target or a Pd target in a PVD chamber using Ar or Xe plasma to form a lattice matching layer of the second pinned layer 212 on the SyF coupling layer 210. In some examples, the second pinned layer 212 includes at least one bilayer formed above the lattice matching layer. The at least one bilayer of the second pinned layer 212 includes a first interlayer of Co and a second interlayer of Ni, Pd or Pt or a combination or alloy of the foregoing. In one example, the SyF coupling layer 210 is directly formed on the lattice matching layer of the first pinned layer 208 and the lattice matching layer of the second pinned layer 212, and contacts the lattice matching layer of the first pinned layer 208 and the lattice matching layer of the second pinned layer 212. In other examples, there is a transition layer between the SyF coupling layer 210 and either or both of the first pinned layer 208 or the second pinned layer 212, and the transition layer does not affect the performance of the MTJ stack.

[0061] In the above Figure 1B Operation 138 of method 100B in the present invention discusses the formation of the second pinned layer 212. The second pinned layer 212 includes a lattice matching layer of Pt or Pd formed on the SyF coupling layer 210, and one or more bilayers formed above the lattice matching layer. By sputtering a Pt target or a Pd target using Xe plasma, the lattice matching layer of the second pinned layer 212 can be formed to a thickness of up to 100 Å. In an example where one or more bilayers are included in the second pinned layer 212, the first bilayer is formed on the lattice matching layer and includes a first interlayer of Co and a second interlayer of another element or combination or alloy of the elements such as Pd, Ni, or Pt. The bilayer is formed by sputtering a Co target using Ar plasma and then sputtering a second target of Pt, Ni, or Pd, or a combination or alloy of the foregoing using Xe or Ar plasma. In one embodiment, repeated deposition cycles of the first interlayer and the second interlayer using a Co target and a second target in a PVD chamber may be used to form one or more bilayers of the second pinned layer 212. The thickness of each bilayer of the second pinned layer 212 may be about to about In one example, the thickness of the second pinned layer 212 is about 0.3 nm to 15 nm. Figure 2D An alternative configuration of the second pinned layer 212 is shown.

[0062] In embodiments where the first pinned layer 208 and the second pinned layer 212 each include one or more bilayers, a thickness ratio may be defined for each pinned layer. The thickness ratio discussed herein is the ratio of the thickness of the sandwich of the one or more bilayers of each pinned layer. The thickness ratio discussed herein may be expressed as (X:Y) z, where X is the thickness of the first interlayer including Co, Y is the thickness of the second interlayer of Pt, Ni or Pd or an alloy of Pt, Ni and / or Pd, and z indicates the layer to which the thickness ratio is related, for example, whether the thickness ratio is for the first pinned layer 208 or the second pinned layer 212. In one example, the first interlayer of the first pinned layer 208 is from to Thick, and the second interlayer of the first pinned layer 208 is to In another example, the first interlayer of the second pinning layer 212 is to Thick, and the second interlayer of the second pinning layer 212 is to In this example, the thickness ratio of the first pinned layer 208 [(Co:Y) 208 ] is greater than the thickness ratio of the second pinned layer 212 [(Co:Y) 212 ].

[0063] After manufacturing the MTJ stack 200, operations including etching the MTJ stack 200 may be performed as part of the manufacturing of the MRAM device. After etching, when a magnetic field is applied to the MRAM device, a magnetic dipole field is generated from the first pinned layer 208 to the magnetic storage layer 220. The dipole field may negatively affect the performance of the layers of the MTJ stack 200, which include the magnetic storage layer 220. Since the second pinned layer 212 is closer to the magnetic storage layer 220 than the first pinned layer 208 in the MTJ stack 200, the thickness ratio of the first pinned layer 208 is greater than the thickness ratio of the second pinned layer 212, which minimizes the dipole field experienced by the magnetic storage layer 220. Therefore, by increasing the magnetic material content of the first pinned layer 208 compared to the magnetic material content of the second pinned layer 212, the dipole field experienced by the magnetic storage layer 220 may be reduced. The magnetic material content of the first or second pinned layer is the amount of material, such as Co or Ni, that is capable of maintaining magnetization in response to an applied magnetic field. This is in contrast to materials, such as Pt or Pd, that may also be used to form one or more pinned layers. In one example, the thickness ratio (Co:Y) of the first pinned layer is 208 The thickness ratio of the second pinning layer (Co:Y) can be from 1:1 to 8:1. 212 In this example, the MTJ stack 200 includes a first pinned layer 208 and a second pinned layer 212, and the first pinned layer 208 has a thickness ratio (Co:Y) of 8:1. 208 , and the second pinning layer 212 has a thickness ratio of 8:8 (Co:Y) 212In another example, the MTJ stack 200 includes a first pinned layer 208 and a second pinned layer 212, wherein the first pinned layer 208 has a thickness ratio (Co:Y) of 8:3. 208 , and the second pinning layer 212 has a thickness ratio (Co:Y) of 3:7 212 In other examples, the ratio (Co:Y) 208 and (Co:Y) 212 can be further varied, and [(Co:Y) 208 >(Co:Y) 212 When Y is a magnetic material such as Ni, the thickness ratio may be further adjusted depending on the implementation, and / or the second pinned layer 212 may be formed using a smaller number of bilayers than the number of bilayers used to form the first pinned layer 208. In some examples, the second pinned layer 212 does not include a bilayer.

[0064] Further, in the MTJ stack 200, a structural barrier layer 214 is optionally formed on the second pinned layer 212 by sputtering a material layer on the second pinned layer 212 in a PVD chamber. The structural barrier layer 214 prevents a short circuit from being formed between the MTJ stack 200 and a metal contact that can be coupled to the MTJ stack 200 to form an MRAM memory cell. In one example, during the deposition of the structural barrier layer 214 in the PVD chamber, one or more independent Ta, Mo, or W sputtering targets can be sputtered in the PVD chamber using Ar plasma, depending on the desired composition of the layer. In another example, during the deposition of the structural barrier layer 214 in the PVD chamber, one or more alloy targets including an alloy of Ta, Mo, and / or W can be sputtered in the PVD chamber using Ar plasma. Compared to the seed layer 206, the first pinned layer 208, and the second pinned layer 212, the structural barrier layer 214 is oriented <100> The seed layer 206, the first pinned layer 208, and the second pinned layer 212 may be oriented in a face-centered cubic (bcc) structure. <111> The thickness of the structural barrier layer 214 ranges from 0 (no layer) to to about And in one example, sputter deposition In one example, the structural barrier layer 214 is directly formed on the second pinned layer 212 by sputtering deposition and contacts the second pinned layer 212. In other examples, there is a transition layer between the structural barrier layer 214 and the second pinned layer 212 that does not affect the performance of the MTJ stack.

[0065] The magnetic reference layer 216 is formed on the structural barrier layer 214 by sputtering deposition in a PVD chamber using Ar plasma. The magnetic reference layer 216 may be deposited in the PVD chamber using a single Co-Fe-B alloy sputtering target, or by using two or more of a Co sputtering target, a Fe sputtering target, or a B sputtering target. In another example, the magnetic reference layer 216 may be formed in a PVD chamber using Ar plasma, an alloy target, and an element target, such as a CoFe target and a B target. The magnetic reference layer 216 may be sputtered onto to In one example, the magnetic reference layer 216 may be formed as The magnetic reference layer 216 includes Co x Fe y B z , wherein z is from about 10 wt % to about 40 wt %, y is from about 20 wt % to about 60 wt %, and x is equal to or less than 70 wt %. In an embodiment, z is at least 20 wt %. In one example, the magnetic reference layer 216 is formed directly on and in contact with the structural barrier layer 214. In other examples, there is a transition layer between the magnetic reference layer 216 and the structural barrier layer 214 that does not affect the performance of the MTJ stack.

[0066] The tunnel barrier layer 218 is formed on the magnetic reference layer 216 using sputtering of a target in Ar plasma in a PVD chamber. The tunnel barrier layer 218 includes metal oxides such as magnesium oxide (MgO), hafnium oxide (HfO 2 ), titanium oxide (TiO 2 ), tantalum oxide (TaO x ), aluminum oxide (Al 2 O 3 ) or other materials suitable for various applications. Therefore, the tunnel barrier layer 218 can be formed in a PVD chamber using Ar plasma and a sputtering target of a metal oxide. Alternatively, Ar plasma, O 2 and a metal sputtering target of a desired metal oxide to form a tunnel barrier layer 218 in a PVD chamber, wherein when the metal layer sputtered from the metal sputtering target is exposed to O 2 When a metal oxide layer is formed, the tunnel barrier layer 218 has to In some embodiments, the thickness of In one example, the tunnel barrier layer 218 is directly formed on and in contact with the magnetic reference layer 216. In other examples, there is a transition layer between the tunnel barrier layer 218 and the magnetic reference layer 216 that does not affect the performance of the MTJ stack.

[0067] In an embodiment, the MTJ stack 200 further includes a magnetic storage layer 220 formed on the tunnel barrier layer 218 using a sputtering operation in a PVD chamber as discussed herein. The magnetic storage layer 220 may include Co x Fe y B z In some examples, the magnetic storage layer 220 may include one or more layers of Ta, Mo, W, or Hf. Accordingly, the deposition of the magnetic storage layer 220 in the PVD chamber may include: using Ar plasma, Co x Fe y B z An alloy target, or independent targets of Co, Fe, and B, or a combination of an alloy target and an element target, such as a combination of a CoFe target and a B target. In an example where the magnetic storage layer 220 is formed of one or more of Ta, Mo, W, or Hf, a sputtering target of Ta, Mo, W, or Hf is sputtered in a chamber using plasma formed of Ar.

[0068] Depending on factors including the one or more materials used to form the magnetic storage layer 220, the thickness of the magnetic storage layer 220 ranges from about 1000 Å to about 5000 Å. to about In one embodiment, the magnetic storage layer is composed of Co x Fe y B z , wherein z is from about 10 wt % to about 40 wt %, y is from about 20 wt % to about 60 wt %, and x is equal to or less than 70 wt %. In this example, the thickness of the magnetic storage layer 220 is from to In another example, the thickness of the magnetic storage layer 220 is about In one example, the magnetic storage layer 220 is formed directly on and in contact with the tunnel barrier layer 218. In other examples, there is a transition layer between the magnetic storage layer 220 and the tunnel barrier layer 218 that does not affect the performance of the MTJ stack. The magnetic storage layer is shown below Figure 2E middle.

[0069] Further, in an embodiment of the MTJ stack 200, a capping layer 222 is formed on the magnetic storage layer 220 and includes a plurality of interlayers forming the capping layer 222, wherein the capping layer includes an oxide containing iron (Fe). In addition, in some embodiments, a hard mask layer 224 is directly formed on and in contact with the capping layer 222. In another example, the hard mask layer 224 is formed on the capping layer 222, and there is a transition layer between the capping layer 222 and the hard mask layer 224; such a transition layer does not affect the performance of the MTJ stack 200. The hard mask layer 224 may be formed of a metal oxide, amorphous carbon, ceramic, a metal material, or a combination of the foregoing. In one example, the magnetic storage layer 220 is directly formed on and in contact with the capping layer 222. In other examples, there is a transition layer between the magnetic storage layer 220 and the capping layer 222 that does not affect the performance of the MTJ stack 200. The capping layer 222 is shown below Figure 2F middle.

[0070] Figure 2B is an enlarged view of the buffer layer 204 according to an embodiment of the present disclosure. The buffer layer 204 may be formed of tantalum (Ta) or TaN. In another example that may be combined with other examples, the buffer layer 204 includes a layered stack of Ta and TaN. In other examples that may be combined with the examples herein, the buffer layer 204 may include a single Co x Fe y B z , or including Co x Fe y B z Combination with Ta, TaN or Ta / TaN layered stack. In one example of the buffer layer 204, the buffer layer 204 includes at least one bilayer 204D. The at least one bilayer 204D includes at least one iteration of the at least one bilayer 204D, a first buffer interlayer 204A and a second buffer interlayer 204B formed on the substrate 202 in an alternating manner. In this example, the first buffer interlayer 204A is formed of Ta, and the second buffer interlayer 204B is formed of TaN, and the first buffer interlayer 204A contacts the substrate 202. In another example, the first buffer interlayer 204A is formed of TaN, and the second buffer interlayer 204B is formed of Ta, and therefore, TaN directly contacts the substrate 202.

[0071] In other examples of the buffer layer 204, Figure 2A As shown, Co is used alone for the buffer layer 204. x Fe y B z , and therefore Co x Fe y B z may directly contact the substrate 202. In another example, Figure 2B As shown, the third buffer layer 204C is formed on at least one bilayer 204D. In this example, the third buffer layer 204C is composed of Co x Fe y B z Manufacturing and forming up to Therefore, depending on the configuration of the buffer layer 204, the thickness of the buffer layer 204 ranges from Thick to Thick. x Fe y B z In an example of the third buffer layer 204C, z is from about 10 wt % to about 40 wt %, y is from about 20 wt % to about 60 wt %, and x is equal to or less than 70 wt %.

[0072] Figure 2C 2 is an enlarged view of the first pinned layer 208 according to an embodiment of the present disclosure. In an embodiment, the first pinned layer 208 is made of at least one bilayer 230, and when two or more bilayers are used, the two or more bilayers can be considered to form a bilayer stack 234. Each bilayer 230 is made of a first interlayer 208A and a second interlayer 208B. The bilayers of the first pinned layer 208 are represented as (X / Y) n , (208A / 208B) n , where each bilayer is a combination of a first material X and a different second material Y, and where n is the number of bilayers in the first pinned layer 208. In an embodiment, X is Co and Y is one of Pt, Ni, or Pd. Although in Figure 2C In the example shown in FIG. 1 , n=4, but in alternative embodiments, n is from 1 to 10. In an embodiment, at least one bilayer 230 has from about to about In one example, the first interlayer 208A is formed of Co and has a thickness ranging from about to about The second interlayer 208B may be formed of Pt, Pd or Ni or a combination or alloy thereof, and may be formed from about to about Further, in another embodiment of the first pinned layer 208, at least one bilayer 230 is formed directly on and in contact with the seed layer 206, and the lattice matching layer 208C is formed on top of the at least one bilayer 230. Figure 2A In the MTJ stack of the MTJ stack 200, the lattice matching layer 208C contacts the SyF coupling layer 210. In an embodiment, the lattice matching layer 208C is formed from to In this example, the lattice matching layer 208C is Pt, and in another example, the lattice matching layer 208C is Pd. Depending on the implementation, the total thickness of the first pinned layer 208, which may include one or more layers including the lattice matching layer 208C and, in some examples, at least one bilayer 230, is from 1 nm to about 18 nm. In other examples, one or more transition layers that do not negatively affect the characteristics of the MTJ stack may be formed between the first pinned layer 208 and the seed layer 206.

[0073] Figure 2D 2 is an enlarged view of the second pinned layer 212 according to an embodiment of the present disclosure. In an embodiment, the second pinned layer 212 is made of a lattice matching layer 212A, and the lattice matching layer 212A is formed on and contacts the SyF coupling layer 210. In an embodiment, the lattice matching layer 212A includes to In one example of the second pinned layer 212, at least one bilayer 232 is formed above the lattice matching layer 212A. Each bilayer 232 includes a first interlayer 212B and a second interlayer 212C, the first interlayer 212B may be Co, and the second interlayer 212C may be Pt, Ni, or Pd, or a combination or alloy of the foregoing. When two or more bilayers such as the bilayer 232 are used in the second pinned layer 212, the two or more bilayers may be referred to as a bilayer stack 236. Thus, when one or more bilayers are deposited in operation 138, such as Figure 1B As shown, separate sputtering targets may be used to form each layer in the first interlayer 208A and the second interlayer 208B of the bilayer 230. The at least one bilayer 232 of the second pinned layer 212 is represented as (X / Y) n , (212A / 212B) n , where n is the number of double layers. Figure 2D In the example, n=4, but in alternative embodiments, n is from 1 to 5. In an embodiment, at least one bilayer 232 has from about to about In one example, the first interlayer 212B is about to about The second interlayer 212C is about to about In various embodiments, the second interlayer 212C includes Ni, Pt, or Pd, or a combination or alloy thereof.

[0074] Furthermore, in another embodiment, the second pinned layer 212 includes a capping layer 212D of Co formed on top of at least one bilayer 232. In other examples of the second pinned layer 212, the capping layer 212D is not present. In another example, not shown in FIG. Figure 2D A capping layer 212D of Co is formed on the lattice matching layer 212A. In an embodiment, the thickness of the capping layer 212D ranges from about to about Depending on the implementation, the total thickness of the second pinned layer 212, which may include one or more layers including at least one bilayer 232 discussed herein, is 0.3 nm to 15 nm. In some examples, a transition layer may be employed between the at least one bilayer 232 and the second pinned layer 212. In other examples, a transition layer may be formed between the at least one bilayer 232 and the SyF coupling layer 210. In other examples, a transition layer may be formed between the at least one bilayer 232 and the second pinned layer 212 and between the at least one bilayer 232 and the SyF coupling layer 210. Such transition layer(s) do not affect the performance of the MTJ stack.

[0075] In an embodiment, the first pinned layer 208 and the second pinned layer 212 each include the same interlayer composition and / or different interlayer thicknesses. In an alternative embodiment, the first pinned layer 208 and the second pinned layer 212 each include different compositions and / or thicknesses. In an embodiment, the first pinned layer 208 includes at least one bilayer, the at least one bilayer including a first interlayer of Co and a second interlayer of Pt, and the first pinned layer 208 further includes a first lattice matching layer of Pt or Pd, the first lattice matching layer being formed over the at least one bilayer. The first lattice matching layer of the first pinned layer 208 is in contact with the SyF coupling layer 210 formed of Ir. In this example, the second pinned layer 212 is formed over the SyF coupling layer 210 and includes a second lattice matching layer of Pt or Pd, the second lattice matching layer being formed to contact the SyF coupling layer 210. In some examples, the second pinned layer 212 further includes one or more bilayers formed over the second lattice matching layer. In an embodiment, the one or more bilayers of the second pinned layer 212 include a first interlayer of Co and a second interlayer of Pt. In another embodiment, the first pinned layer 208 includes at least one bilayer, the at least one bilayer includes a first interlayer of Co and a second interlayer of Ni, and the first pinned layer 208 further includes a first lattice matching layer of Pt or Pd formed over the at least one bilayer such that the first lattice matching layer is in contact with the SyF coupling layer 210 formed of Ir. In this example, the second pinned layer 212 includes a second lattice matching layer of Pt or Pd, the second lattice matching layer is formed to contact the SyF coupling layer 210, and the second pinned layer 212 optionally includes one or more bilayers formed over the second lattice matching layer. In this example, the one or more bilayers of the second pinned layer 212 include a first interlayer of Co and a second interlayer of Pt.

[0076] Figure 2E FIG. 2 is an enlarged view of an example magnetic storage layer 220 according to an embodiment of the present disclosure. Figure 2E As shown, the first magnetic layer 220A of the magnetic storage layer 220 and the second magnetic layer 220B of the magnetic storage layer 220 are each made of Co x Fe y B zA third layer 220C made of Ta, Mo, W, Hf or a combination thereof is disposed therebetween. The third layer 220C may contain a dopant, such as boron, oxygen or other dopants. Therefore, the magnetic storage layer 220 is made of the following three layers: a first magnetic layer 220A and a second magnetic layer 220B, and a third layer 220C disposed between the first magnetic layer 220A and the second magnetic layer 220B. The third layer 220C strengthens the pinning moment perpendicular to the plane of the substrate (e.g., a plane perpendicular to the substrate 202), which enhances the magnetic anisotropy, the directional dependence of the magnetism of the structure.

[0077] Figure 2F FIG. 2 is an enlarged view of an exemplary cover layer 222 according to an embodiment of the present disclosure. The total thickness of the cover layer 222 is to And in some embodiments, the total desired thickness of the covering layer (e.g., including Figure 2F All interlayers shown) are approximately In an embodiment, the capping layer 222 includes a plurality of interlayers. The first capping interlayer 222A is made of MgO or another iron-containing oxide formed directly on the magnetic storage layer 220 to about to about On top of the first cover interlayer 222A, a second cover interlayer 222B of Ru, Ir or a combination thereof is formed. to about In an embodiment, a third cover interlayer 222C to 222B is formed of Ta as appropriate. to about Therefore, some embodiments of the cover layer 222 do not include the third cover interlayer 222C. In an embodiment, the fourth cover interlayer 222D is formed on the third cover interlayer 222C as needed. The fourth cap interlayer 222D is formed of Ru, Ir, or a combination thereof. In various embodiments, the cap layer 222 includes only the first cap interlayer 222A, or the first cap interlayer 222A and the second cap interlayer 222B, or the first cap interlayer 222A, the second cap interlayer 222B, and the third cap interlayer 222C, or the first, second, and third cap layers 222A to 222C. In some embodiments, a transition layer may be used between some or all of the first cap interlayer 222A, the second cap interlayer 222B, and the third cap interlayer 222C, or a transition layer may be used between the cap layer 222 and the magnetic storage layer 220, so that the (several) transition layers do not negatively affect the performance of the MTJ stack.

[0078] The MTJ stack discussed herein has improved performance after being subjected to a temperature of 400° C. or above, at least because of the lattice matching between the first pinned layer and the SyF coupling layer and the lattice matching between the second pinned layer and the SyF coupling layer. The lattice matching between the SyF coupling layer and each of the first and second pinned layers suppresses the formation of roughness at the interface of the SyF coupling layer and the first pinned layer and at the interface of the SyF coupling layer and the second pinned layer. Roughness formation results in a lack of flatness in one or more layers, which negatively affects the performance of the MTJ stack. Furthermore, in an example where each of the first and second pinned layers includes a bilayer, the ratio of the thickness of each interlayer of each bilayer of the first and second pinned layers can be selected to reduce the dipole field effect generated when a magnetic field is applied to the MTJ stack. Therefore, the MTJ stack manufactured according to the embodiments of the present disclosure is able to maintain structural integrity and desired magnetic and electrical properties after high temperature processing.

[0079] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be devised without departing from the basic scope thereof and the scope of the disclosure is determined by the claims that follow.

Claims

1. A device comprising: A magnetic tunnel junction stack comprising: a first pinned layer comprising a first bilayer and a first lattice matching layer, the first lattice matching layer being formed over the first bilayer, wherein the first lattice matching layer comprises platinum or palladium; a synthetic antiferromagnetic coupling layer contacting the first lattice matching layer of the first pinned layer; and A second pinned layer contacts the synthetic antiferromagnetic coupling layer, wherein the second pinned layer comprises a second lattice matching layer, the second lattice matching layer contacts the synthetic antiferromagnetic coupling layer, wherein the second lattice matching layer comprises platinum or palladium. 2 . The device of claim 1 , wherein the total thickness of the first pinned layer is from 1 nm to 18 nm, and the total thickness of the second pinned layer is from 0.3 nm to 15 nm.

3. The device of claim 1, wherein the first bilayer comprises a first interlayer of cobalt and a second interlayer of platinum, nickel, palladium, or an alloy of the foregoing, or a combination thereof, wherein the first interlayer of cobalt has a thickness from 1 Å to 7 Å, and the second interlayer of platinum, nickel, palladium, or an alloy of the foregoing, or a combination thereof, has a thickness from 1 Å to 8 Å.

4. The device of claim 1, wherein the first lattice matching layer is from 1 Å to 3 Å thick, and the second lattice matching layer is from 1 Å to 3 Å thick.

5. The device of claim 1, wherein the synthetic antiferromagnetic coupling layer comprises ruthenium, chromium, rhodium, or iridium and is from 1 Å to 100 Å thick.

6. The device of claim 1, wherein the second pinned layer further comprises a bilayer formed of a first interlayer of cobalt and a second interlayer formed of platinum, nickel or palladium or an alloy of the foregoing or a combination of the foregoing, the first interlayer is from 1 Å to 8 Å thick, and the second interlayer is from 1 Å to 8 Å thick.

7. The device of claim 1, further comprising: a structural barrier layer contacting the second pinning layer; a magnetic reference layer contacting the structural barrier layer; a tunnel barrier layer contacting the magnetic reference layer; and The magnetic storage layer contacts the tunnel barrier layer.

8. The device of claim 1, wherein each of a lattice constant of the first lattice matching layer and a lattice constant of the second lattice matching layer is within + / - 4% of a lattice constant of the synthetic antiferromagnetic coupling layer.

9. A magnetic tunnel junction stack, comprising: a first pinned layer comprising a first plurality of bilayers and a first lattice matching layer, the first lattice matching layer being formed over the first plurality of bilayers, wherein the first lattice matching layer comprises platinum or palladium, each bilayer in the first plurality of bilayers being formed of a first cobalt interlayer and a second interlayer of platinum, nickel, palladium, or alloys thereof, or combinations thereof; a synthetic antiferromagnetic coupling layer formed on the first pinned layer; and A second pinned layer is formed on the synthetic antiferromagnetic coupling layer, wherein the second pinned layer comprises a second lattice matching layer, and the second lattice matching layer is formed on the synthetic antiferromagnetic coupling layer.

10. The stack of claim 9, wherein the second pinned layer further comprises a second bilayer formed on the second lattice matching layer and a cobalt layer formed on the second bilayer, the cobalt layer being from 1 Å to 10 Å thick.

11. The stack of claim 9, wherein the second lattice matching layer comprises platinum or palladium.

12. The stack of claim 9, further comprising: a structural barrier layer on the second pinned layer, wherein the structural barrier layer comprises at least one of tantalum, molybdenum, or tungsten and is from 1 Å to 8 Å thick; a magnetic reference layer disposed on the structural barrier layer; a tunnel barrier layer, located on the magnetic reference layer; and The magnetic storage layer is located on the tunnel barrier layer.

13. A magnetic tunnel junction stack, comprising: Buffer layer; a seed layer formed to contact the buffer layer, wherein the seed layer includes chromium; a first pinned layer contacting the seed layer, wherein the first pinned layer is formed by a first bilayer and a first lattice matching layer, the first lattice matching layer is formed above the first bilayer, the first lattice matching layer comprises platinum or palladium, and the first bilayer comprises a cobalt interlayer and an interlayer of platinum, nickel or palladium; a synthetic antiferromagnetic coupling layer formed on the first pinned layer; A second pinned layer formed on the synthetic antiferromagnetic coupling layer, wherein the second pinned layer comprises a second lattice matching layer, and the second lattice matching layer is formed on the synthetic antiferromagnetic coupling layer, wherein the second lattice matching layer comprises platinum or palladium; a structural barrier layer formed on the second pinned layer, wherein the structural barrier layer comprises at least one of tantalum, molybdenum or tungsten; a magnetic reference layer formed on the structural barrier layer; a tunnel barrier layer formed on the magnetic reference layer; and The magnetic storage layer is formed on the tunnel barrier layer.

14. The stack of claim 13, wherein the second pinned layer further comprises a second bilayer formed over the second lattice matching layer, the second bilayer comprising a first interlayer of cobalt and a second interlayer of platinum, nickel or palladium or an alloy of the foregoing or a combination of the foregoing.

15. A stack as described in claim 14, wherein there is a first thickness ratio between the thickness of the first interlayer of the first double layer of the first pinned layer and the thickness of the second interlayer, and there is a second thickness ratio between the thickness of the first interlayer of the second double layer of the second pinned layer and the thickness of the second interlayer, wherein the first thickness ratio is greater than the second thickness ratio.

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