A DC standard power source with ripple superposition based on DMA and programmable time base

Abstract

A DC standard power source with ripple superposition based on DMA and programmable time base, the industrial controller downloads the rippled DC waveform to the waveform random access memory through the Ethernet interface and DSP, the rippled DC waveform on the industrial controller can be calculated and generated by MATLAB tools or software fitting, the rate at which the industrial controller downloads the waveform to the random access memory is determined by the rate of Ethernet and the speed of DSP, when the industrial controller downloads all the waveforms to the random access memory, the DSP starts the first DMA controller and the second DMA controller, the DA converts the waveform stored in the random access memory into a small analog signal, the small analog signal VIN1 outputs a rippled DC voltage signal through a voltage amplifier, and the small analog signal VIN2 outputs a rippled DC current signal through a current amplifier. The present invention realizes high-accuracy output from low-frequency ripple to high-frequency ripple, and can realize bipolar output, and can be widely used in the simulation of low-speed analog signals.

Description

Technical Field

[0001] The invention belongs to the technical field of electric measuring instruments and meters, and relates to a direct current standard power source with ripple superposition based on DMA and a programmable time base. Background Art

[0002] With the development of power electronics technology and its application in various industries, the number of applications of DC power, including DC distribution network, high-voltage DC transmission, electric vehicle DC charging pile, photovoltaic inverter DC output, etc., is increasing. In general, some AC components will be superimposed on the DC power of industrial applications. The DC power obtained through AC voltage conversion, rectification and filtering of DC distribution network, high-voltage DC transmission, electric vehicle charging pile DC output will be superimposed with ripples related to the power frequency multiple. The ripple frequency of different pulsation rectification will be different. Generally, 6 and 12 pulsations are more common, and there are also some 48-pulse sorting equipment. The DC energy meters, DC monitoring terminals and other DC test instruments and meters of the monitoring equipment of these equipment need to be tested for electrical characteristics and accuracy with DC ripple output.

[0003] The present invention can provide accurate simulation signal output for high-frequency and low-frequency signals superimposed on new energy direct current, and provide a direct current voltage source and a direct current current source with an accuracy of 0.05 for direct current electric energy meters, direct current relay protection equipment, photovoltaic inverter output monitoring instruments and other various direct current monitoring instruments and meters, as well as a power source composed of a voltage source and a current source, with the ripple output being arbitrarily settable.

[0004] The prior art (Chen Shuiming; Jiang Wenhui; Leng Xuedao; Zhang Jiaxue; Wu Yunjia. DC voltage and ripple voltage synthesis device for DC electric energy meter [P]. Chinese Patent: CN 108983141 A, 2018-05-07) proposes a synthetic AC / DC series synthetic voltage source. The core of this invention patent is that the DC voltage and AC voltage are built into one device, and the synthesized voltage is output through series connection. However, there is no corresponding device for current. If the current is superimposed in parallel, it will load each other and cause circuit abnormality.

[0005] Currently, AC and DC power sources can generate a fixed frequency (50 Hz) and then superimpose a DC signal on the simulated ripple output, but the frequency range is greatly limited. Generally, the ripple simulation is 50 Hz or several times of 50 Hz.

[0006] The prior art (Chen Shuiming; Jiang Wenhui; Leng Xuedao; Zhang Jiaxue; Wu Yunjia. DC voltage and ripple voltage synthesis device for DC electric energy meter [P]. Chinese Patent: CN 108983141 A, 2018-05-07) is essentially a series connection of an AC voltage source and a DC voltage source. The voltage source cannot achieve continuous arbitrary output from low frequency to high frequency, and there is no DC ripple output current source solution. The AC and DC power supplies currently on the market cannot achieve DC source output with arbitrarily set ripple frequency (0.001Hz~20kHz), and cannot achieve bipolar output of DC voltage or current source. Summary of the invention

[0007] In order to solve the problems existing in the prior art, the purpose of the present invention is to provide a DC standard power source with ripple superposition based on DMA and programmable time base, transfer the calculation and fitting of the waveform to the industrial controller, effectively utilize Matlab simulation data or recorded data or other simulation data, and when DA conversion is required, through the automatic control of DMA hardware, ensure the stability of DA output timing, ensure the high fidelity of DA analog output signal, and realize the simulation and emulation of various high and low frequency ripple signals, and can simulate DC PLC output and other high frequency ripple output.

[0008] The present invention adopts the following technical solution:

[0009] A DC standard power source with ripple superposition based on DMA and programmable time base, comprising a DSP 1, an Ethernet interface 2, a waveform random access memory 3, an industrial controller 4, a timer 5, a first DMA controller 6A, a second DMA controller 6B, a first synchronous serial communication interface 7A, a second synchronous serial communication interface 7B, a first DA converter 8A, a second DA converter 8B, a crystal 9, a voltage power amplifier 10, and a current power amplifier 11.

[0010] The industrial controller 4 downloads the rippled DC waveform to the waveform random access memory 3 through the Ethernet interface 2 and the DSP 1;

[0011] The rippled DC waveform on the industrial controller 4 is generated by calculation using the MATLAB tool, or is actually recorded on site using an oscilloscope or a recorder;

[0012] After the industrial controller 4 downloads all the waveforms to the waveform random access memory 3, the DSP1 starts the first DMA controller 6A and the second DMA controller 6B, sends the DC waveform of the waveform random access memory 3 to the first synchronous serial communication interface 7A through the first DMA controller 6A, and sends the DC waveform of the waveform random access memory 3 to the first synchronous serial communication interface 7B through the first synchronous serial communication interface of the second DMA controller 6B;

[0013] The DC waveform passing through the first synchronous serial communication interface 7A is sent to the first DA converter 8A, and the DC waveform passing through the second synchronous serial communication interface 7B is sent to the second DA converter 8B.

[0014] Then the first DA converter 8A converts the waveform of the waveform random access memory 3 into a small analog signal VIN1, and the second DA converter 8B converts the waveform of the waveform random access memory 3 into a small analog signal VIN2. The small analog signal VIN1 outputs a rippled DC voltage signal through the voltage amplifier 10, and the small analog signal VIN2 outputs a rippled DC current signal through the current amplifier 11.

[0015] Among them, DSP stands for digital signal processing and DMA stands for direct memory access.

[0016] The crystal 9 is a 1ppm 10M active crystal;

[0017] The industrial controller 4 is a desktop computer or a laptop computer with an Internet port.

[0018] The conversion process of the first DA converter 8A and the second DA converter 8B requires a high level chip select signal, which includes D15-D0 and a clock signal greater than or equal to one, wherein D15-D0 has 16 clock signals, and a DA conversion requires greater than or equal to 17 clock signals. When the clock signal can be programmable, the output frequency of the ripple is modified by changing the clock signal time base.

[0019] Assume that the sampling point per cycle of the ripple output is N, the frequency of the ripple output is f, the period of the ripple output is T, and the time interval of the ripple DA output is Ts.

[0020] The continuous time function of the ripple output is

[0021]

[0022] The frequency of the ripple output is

[0023] f=CLK / 17N (2),

[0024] Where A is the amplitude of the ripple, N is the number of fitting points in one cycle of the ripple, i is the fitting sequence point, φ is the initial phase, A0 is the amplitude of the DC output, and CLK is the clock signal.

[0025] The clock signal is controlled by the 32-bit timer 5 inside the DSP. The input of the timer is DSP1 multiplies the crystal by 9 times to 80 MHz, and timer 5 divides the frequency by any value within 232.

[0026] The ripple frequency control is suitable for low frequency ripple.

[0027] The output frequency range of the ripple is:

[0028] When outputting high-frequency ripple, the maximum timer division of timer 5 is 2, the output is 40MHz, and the minimum fitting N is 100;

[0029] When outputting low-frequency ripple, the maximum frequency division of timer 5 is 2 32 , the output is 0.0018Hz,

[0030] The minimum fitting N is 8.

[0031] The first synchronous serial communication interface 7A controls the conversion of the first DA converter 8A, and the second synchronous serial communication interface 7B controls the conversion of the second DA converter 8B to complete the conversion from digital quantity to analog quantity. The synchronous clock SCLK is set as input and connected to the output of the timer 5. The first DA converter 8A transmits and converts the data input signal SDI data in the order of high bit to low bit under the control of the clock signal and the chip select signal.

[0032] The first DA converter 8AAD5543 is a current output, which is converted into a voltage signal through the operational amplifier U8_3, and the bipolar output is converted into a bipolar signal through the operational amplifier U8_4.

[0033] The conversion formula is:

[0034] Vin=(D / 32.768–1)×VREF

[0035] Wherein, Vin is the input voltage, VREF is the reference voltage, and D is the output 16-bit digital value of the reference voltage chip REF102.

[0036] The first DMA controller 6A controls the current output, the second DMA controller 6B controls the voltage output, the DMA controller sets the start address of the random access memory, the number of fitting points N of the ripple cycle, and the value range of N is 1 to 8000000;

[0037] After the DMA's first address and cycle are set, DMA is started, and DMA automatically and cyclically outputs the waveform data in the memory according to the timing requirements of DA;

[0038] The DMA of the voltage channel and the DMA of the current channel are started synchronously under the control of DSP1 to ensure the synchronous output of voltage and current.

[0039] The voltage amplifier 10 is composed of a proportional amplifier circuit, and the range of the output DC voltage signal with ripple is determined by the chip 3483 and the working power supply;

[0040] The amplification factor of the circuit is Vo = (1 + R2 / R1) × Vin,

[0041] Wherein, R1 is the resistance value of the first resistor, R2 is the resistance value of the second resistor, Vin is the input voltage, and Vo is the output voltage.

[0042] The current power amplifier 11 is composed of a power amplifier module OPA548 U11, a feedback resistor R5, and a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4. The current power amplifier 11 adopts a high-end feedback mode, and its output current I=R2×Vin / (R1×R5);

[0043] Vin=(D / 32.768–1)×VREF,

[0044] Wherein, Vin is the input voltage, VREF is the reference voltage, and D is the output 16-bit digital value of the voltage reference module REF102.

[0045] The beneficial effect of the present invention is that, compared with the prior art, the present invention uses high-speed DMA and programmable time base adjustable principles to design a DC standard power source with ripple output, which overcomes the previous disadvantage that the DC ripple frequency cannot be arbitrarily set, and can achieve high-accuracy output from low-frequency ripple to high-frequency ripple, and can achieve bipolar output (positive or negative voltage / current), which can be widely used in the simulation of low-speed analog signals, including analog output of PLC control, and simulation and testing of DC ripple signals such as photovoltaic inverter output. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 It is a general schematic diagram of a DC standard power source with ripple superposition based on DMA and programmable time base;

[0047] Figure 2 This is the schematic diagram of DMA transmission;

[0048] Figure 3 It is the DA conversion principle;

[0049] Figure 4 is a schematic diagram of a current power amplifier;

[0050] Figure 5 It is a schematic diagram of voltage power amplification;

[0051] Figure 6 This is a schematic diagram of DA output timing;

[0052] Among them, 1 is a digital signal processor; 2 is an Ethernet interface; 3 is a waveform random access memory; 4 is an industrial controller; 5 is a timer; 6A is a first DMA controller; 6B is a second DMA controller; 7A is a first synchronous serial communication interface; 7B is a second synchronous serial communication interface; 8A is a first DA converter; 8B is a second DA converter; 9 is a crystal; 10 is a voltage amplifier; 11 is a current amplifier; R1 is a first resistor; R2 is a second resistor; R3 is a third resistor; R4 is a fourth resistor; R5 is a fifth resistor. DETAILED DESCRIPTION

[0053] In order to make the purpose, technical scheme and advantages of the present invention clearer, the technical scheme of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. The embodiments described in this application are only embodiments of a part of the present invention, rather than all embodiments. Based on the spirit of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work belong to the protection scope of the present invention.

[0054] Overall working principle:

[0055] like Figure 1 The present invention is a DC standard power source with ripple superposition based on DMA and programmable time base, including DSP1, Ethernet interface 2, waveform random access memory 3, industrial controller 4, timer 5, first DMA controller 6A, second DMA controller 6B, first synchronous serial communication interface 7A, second synchronous serial communication interface 7B, first DA converter 8A, second DA converter 8B, crystal 9, voltage power amplifier 10, current power amplifier 11,

[0056] The industrial controller 4 downloads the rippled DC waveform to the waveform random access memory 3 through the Ethernet interface 2 and the DSP 1;

[0057] The DC waveform with ripples on the industrial controller 4 can be calculated by MATLAB tools or software fitting, or it can be actually recorded on site by an oscilloscope or a recorder. The rate at which the industrial controller 4 downloads the DC waveform with ripples to the waveform random access memory 3 is determined by the operating rate of the Ethernet interface 2 and the operating rate of the DSP 1.

[0058] After the industrial controller 4 downloads all the waveforms to the waveform random access memory 3, the DSP1 starts the first DMA controller 6A and the second DMA controller 6B, sends the DC waveform of the waveform random access memory 3 to the first synchronous serial communication interface 7A through the first DMA controller 6A, and automatically sends the DC waveform of the waveform random access memory 3 to the first synchronous serial communication interface 7B through the first synchronous serial communication interface of the second DMA controller 6B;

[0059] Secondly, the DC waveform passing through the first synchronous serial communication interface 7A is sent to the first DA converter 8A, and the DC waveform passing through the second synchronous serial communication interface 7B is sent to the second DA converter 8B;

[0060] Then, the first DA converter 8A converts the waveform of the waveform random access memory 3 into a small analog signal VIN1, and the second DA converter 8B converts the waveform of the waveform random access memory 3 into a small analog signal VIN2. The small analog signal VIN1 outputs a rippled DC voltage signal through the voltage amplifier 10, and the small analog signal VIN2 outputs a rippled DC current signal through the current amplifier 11.

[0061] Among them, DSP stands for digital signal processing and DMA stands for direct memory access.

[0062] Crystal 9 is a 1ppm 10M active crystal;

[0063] The industrial controller 4 is a desktop computer or a laptop computer with an Internet port.

[0064] Implementation principle of programmable time base clock signal:

[0065] like Figure 6 As shown, the conversion process of the first DA converter 8A and the second DA converter 8B requires a high level chip select signal, and the high level chip select signal includes D15~D0 and greater than or equal to a clock signal, wherein D15~D0 has 16 clock signals, and it takes greater than or equal to 17 clock signals to complete a DA conversion. When the clock signal can be programmed, the output frequency of the ripple is modified by changing the clock signal time base, and the change of the clock signal is realized by programming the timer 5.

[0066] Assume that the sampling point per cycle of the ripple output is N, the frequency of the ripple output is f, the period of the ripple output is T, and the time interval of the ripple DA output is Ts.

[0067] Then the continuous time function of the ripple output is

[0068]

[0069] Among them, A is the amplitude of the ripple, N is the number of fitting points in one cycle of the ripple, i is the fitting sequence point, φ is the initial phase, A0 is the amplitude of the DC output,

[0070] Compare formula (1-1) and formula (1-2)

[0071]

[0072] so

[0073]

[0074] Among them, CLK is the clock signal,

[0075] So the frequency of the ripple output

[0076] f=CLK / 17N (2),

[0077] The ripple frequency is controlled by modifying the value of the clock signal.

[0078] The clock signal is controlled by the 32-bit timer 5 inside the DSP. The input of the timer is the DSP Core 1 which multiplies the crystal by 8 to 80 MHz. The timer can divide the frequency by any value within 232.

[0079] The output frequency range of the ripple is

[0080] a) When outputting high-frequency ripple, the maximum frequency division of the timer is 2. The output is 40MHz. For the sake of waveform fidelity, the minimum fitting N is 100.

[0081] As shown in formula 2, f = CLK / 17 / N = 40M / 17 / 100 = 23.5KHz.

[0082] b) When outputting low-frequency ripple, the maximum frequency division of timer 5 is 2 32 , the output is 0.0018Hz, and the minimum fitting N is 8. (Determined by the size of the random access memory)

[0083] As shown in formula 2, f = CLK / 17 / N = 0.0009Hz / 17 / 8M = 0.0018Hz / 17 / 8×106

[0084] =0.0018Hz / 17 / 8×106=1.32×10 -9 Hz

[0085] It can achieve ultra-low frequency output, which is used to simulate a DC signal that rises slowly.

[0086] DA conversion principle:

[0087] like Figure 3 As shown, the DA conversion is completed from digital quantity to analog quantity under the control of the SPORT port. The synchronous clock SCLK of SPORT is set as input and connected to the output of the timer. The DA chip transmits and converts the SDI data in the order of high bit to low bit under the control of the clock signal and chip select signal. Figure 6 shown.

[0088] Since the DA chip AD5543 is a current output, it is converted into a voltage signal through the operational amplifier U8_3. At the same time, in order to achieve bipolar output, it is converted into bipolar through the operational amplifier U8_4.

[0089] The first synchronous serial communication interface 7A controls the conversion of the first DA converter 8A, and the second synchronous serial communication interface 7B controls the conversion of the second DA converter 8B to complete the conversion from digital quantity to analog quantity. The synchronous clock SCLK is set as input and connected to the output of the timer 5. The first DA converter 8A transmits and converts the data input signal SDI data in the order of high bit to low bit under the control of the clock signal and the chip select signal.

[0090] The first DA converter 8AAD5543 is a current output, which is converted into a voltage signal through the operational amplifier U8_3, and the bipolar output is converted into a bipolar signal through the operational amplifier U8_4.

[0091] The conversion formula is:

[0092] Vin=(D / 32.768–1)×VREF

[0093] Wherein, Vin is the input voltage, VREF is the reference voltage, and D is the output 16-bit digital value of the reference voltage chip REF102.

[0094] DMA transmission principle:

[0095] DMA transmission principle is as follows Figure 2 As shown, the voltage and current are controlled by two independent DMA controllers respectively. The first DMA controller 6A controls the current output, and the second DMA controller 6B controls the voltage output. The DMA controller can set the starting address of the random access memory, the number of fitting points N of the ripple period (N is determined by the capacity of the memory, and in the present invention, N is a maximum of 8000000), and N can be set to any number between 1 and 8000000, which can essentially adjust the ripple frequency.

[0096] As shown in formula 2, after the DMA's first address and cycle period (fitting period) are set, DMA is started and DMA will automatically transfer the waveform data in the memory according to the timing requirements of DA (such as Figure 6 ) automatically cycles and outputs without CPU intervention. The output waveform does not have any CPU instruction delay, and the timing jitter is equivalent to the crystal jitter and can be ignored.

[0097] The DMA of the voltage channel and the DMA of the current channel can be started synchronously under the control of the DSP Core, which can ensure the synchronous output of voltage and current.

[0098] Voltage amplifier principle:

[0099] like Figure 5 As shown, the voltage amplifier 10 is composed of a proportional amplifier circuit. In fact, the output range is determined by the chip 3483 and the working power supply. The chip 3483 can work up to + / -150V at most.

[0100] The amplification factor of the circuit is Vo = (1 + R2 / R1) × Vin = 11 × Vin,

[0101] Wherein, R1 is the resistance value of the first resistor, R2 is the resistance value of the second resistor, Vin is the input voltage, and Vo is the output voltage.

[0102] Current amplifier principle:

[0103] like Figure 4 As shown, the current power amplifier 11 is composed of a power amplifier module OPA548 U11, a feedback resistor R5, and a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4. The current power amplifier 11 adopts a high-end feedback method, and its output current I=R2×Vin / (R1×R5)=1k×Vin / (10K×0.1)=Vin / (1 ohm);

[0104] Vin=(D / 32.768–1)×VREF,

[0105] Wherein, Vin is the input voltage, VREF is the reference voltage, and D is the output 16-bit digital value of the voltage reference module REF102.

[0106] The current amplifier converts 1V voltage into 1A current.

[0107] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents. Any modification or equivalent replacement that does not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A DC standard power source with ripple superposition based on DMA and programmable time base, comprising a DSP (1), an Ethernet interface (2), a waveform random access memory (3), an industrial controller (4), a timer (5), a first DMA controller (6A), a second DMA controller (6B), a first synchronous serial communication interface (7A), a second synchronous serial communication interface (7B), a first DA converter (8A), a second DA converter (8B), a crystal (9), a voltage power amplifier (10), and a current power amplifier (11), characterized in that: The industrial controller (4) downloads the rippled DC waveform to the waveform random access memory (3) through the Ethernet interface (2) and the DSP (1); The rippled DC waveform on the industrial controller (4) is generated by calculation using a MATLAB tool, or is generated by actual on-site recording using an oscilloscope or a recorder; After the industrial controller (4) downloads all waveforms to the waveform random access memory (3), the DSP (1) starts the first DMA controller (6A) and the second DMA controller (6B), sends the DC waveform of the waveform random access memory (3) to the first synchronous serial communication interface (7A) through the first DMA controller (6A), and sends the DC waveform of the waveform random access memory (3) to the second synchronous serial communication interface (7B) through the first synchronous serial communication interface (7A) of the second DMA controller (6B); Sending a DC waveform passing through a first synchronous serial communication interface (7A) to a first DA converter (8A), and sending a DC waveform passing through a second synchronous serial communication interface (7B) to a second DA converter (8B); Then the first DA converter (8A) converts the waveform of the waveform random access memory (3) into a small analog signal VIN1, and the second DA converter (8B) converts the waveform of the waveform random access memory (3) into a small analog signal VIN2. The small analog signal VIN1 outputs a rippled DC voltage signal through a voltage amplifier (10), and the small analog signal VIN2 outputs a rippled DC current signal through a current amplifier (11); Among them, DSP stands for digital signal processing, and DMA stands for direct memory access; The conversion process of the first DA converter (8A) and the second DA converter (8B) requires a high level chip select signal, the high level chip select signal includes D15-D0 and a clock signal greater than or equal to one, wherein D15-D0 has 16 clock signals, and a DA conversion requires greater than or equal to 17 clock signals, and when the clock signal can be programmable, the output frequency of the ripple is modified by changing the clock signal time base, Assume that the sampling point per cycle of the ripple output is N, the frequency of the ripple output is f, the period of the ripple output is T, and the time interval of the ripple DA output is Ts. The continuous time function of the ripple output is The frequency of the ripple output is f=CLK / 17N (2), Where A is the amplitude of the ripple, N is the number of fitting points in one cycle of the ripple, i is the fitting sequence point, φ is the initial phase, A0 is the amplitude of the DC output, and CLK is the clock signal; The first synchronous serial communication interface (7A) controls the conversion of the first DA converter (8A), and the second synchronous serial communication interface (7B) controls the conversion of the second DA converter (8B), completing the conversion from digital quantity to analog quantity. The synchronous clock SCLK is set as input and connected to the output of the timer (5). The first DA converter (8A) transmits and converts the data input signal SDI data in the order of high bit to low bit under the control of the clock signal and the chip selection signal. The first DA converter (8A) AD5543 is a current output, which is converted into a voltage signal through the operational amplifier U8_3, and the bipolar output is converted into a bipolar signal through the operational amplifier U8_4. The conversion formula is: Vin=(D / 32.768–1)×VREF Among them, Vin is the input voltage, VREF is the reference voltage, and D is the 16-bit digital value output by the reference voltage chip REF102; The voltage power amplifier (10) is composed of a proportional amplifier circuit, and the range of the output DC voltage signal with ripple is determined by the chip 3483 and the working power supply; The amplification factor of the circuit is Vo = (1 + R2 / R1) × Vin, Wherein, R1 is the resistance value of the first resistor, R2 is the resistance value of the second resistor, Vin is the input voltage, and Vo is the output voltage; The current power amplifier (11) is composed of a power amplifier module OPA548 U11, a feedback resistor R5, and a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. The current power amplifier (11) adopts a high-end feedback mode, and its output current I=R2×Vin / (R1×R5); Vin=(D / 32.768–1)×VREF, Wherein, Vin is the input voltage, VREF is the reference voltage, and D is the output 16-bit digital value of the voltage reference module REF102.

2. The DC standard power source with ripple superposition based on DMA and programmable time base according to claim 1, characterized in that: The crystal (9) is a 1ppm 10M active crystal; The industrial controller (4) is a desktop computer or a laptop computer with a network port.

3. The DC standard power source with ripple superposition based on DMA and programmable time base according to claim 1, characterized in that: The clock signal is controlled by a 32-bit timer (5) inside the DSP. The input of the timer is that the DSP (1) multiplies the crystal (9) to 80 MHz, and the timer (5) divides the frequency by any value within 232.

4. The DC standard power source with ripple superposition based on DMA and programmable time base according to claim 1, characterized in that: The output frequency control of the ripple is suitable for low frequency ripple.

5. The DC standard power source with ripple superposition based on DMA and programmable time base according to claim 1, characterized in that: The output frequency range of the ripple is: When high-frequency ripple is output, the maximum timer division frequency of timer (5) is 2, the output is 40MHz, and the minimum fitting N is 100; When outputting low-frequency ripple, the maximum timer division frequency of timer (5) is 2 32 , the output is 0.0018Hz, and the minimum fitting N is 8.

6. The DC standard power source with ripple superposition based on DMA and programmable time base according to claim 1, characterized in that: The first DMA controller (6A) controls the current output, the second DMA controller (6B) controls the voltage output, the DMA controller sets the start address of the random access memory and the number of fitting points N of the ripple cycle, and the value range of N is 1 to 8000000; After the DMA's first address and cycle are set, DMA is started, and DMA automatically and cyclically outputs the waveform data in the memory according to the timing requirements of DA; The DMA of the voltage channel and the DMA of the current channel are started synchronously under the control of DSP (1) to ensure the synchronous output of voltage and current.

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