A low power consumption standby circuit and electronic device

By designing a low-power standby circuit and using automatic control of switches and charging circuits, the problem of high power consumption of electronic devices in standby state is solved, and significant reduction in power consumption and resource saving is achieved.

CN112234697BActive Publication Date: 2025-06-06NINGBO TOPBAND INTELLIGENT CONTROL CO LTD
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Patent Information

Application Number
CN201910636829.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2019-07-15
Publication Date
2025-06-06
Estimated Expiration
2039-07-15

AI Technical Summary

Technical Problem

Existing electronic devices still have high power consumption during standby state, resulting in waste of resources. How to reduce standby power consumption while ensuring the convenience and intelligence of the equipment?

Method used

A low-power standby circuit is designed, through series connection of the switch, the switch state detection unit, the charging circuit and the second switching unit, the control unit is used to control the switch to turn on and off, and the automatic discharge and shutdown of the charging circuit is realized, and the power consumption in the standby state is reduced.

Benefits of technology

It effectively reduces the power consumption of electronic devices in standby state, the circuit is simple and easy to implement, and convenient to use, reducing resource waste.

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Abstract

The present invention relates to a low-power standby circuit and an electronic device, comprising: a power input terminal, a power output terminal; a switch, a switch state detection unit, a charging circuit and a second switch unit connected in series between the power input terminal and the power output terminal; a first switch unit connecting the power input terminal and the power output terminal; a control unit connecting the switch state detection unit and the first switch unit; a discharge circuit connecting the switch state detection unit and the charging circuit, used to discharge the charging circuit when the switch is disconnected; the second switch unit is connected to the charging circuit, and is turned on before the charging circuit is charged to a preset voltage, and is turned off when the charging circuit is charged to the preset voltage; the control unit turns on the first switch unit when the second switch unit is turned on; and the switch state detection unit turns off the first switch unit when the switch is turned off. The implementation of the present invention can reduce the standby power consumption of the electronic device in the standby state, and the circuit is simple and convenient to use.
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Description

Technical Field

[0001] The present invention relates to a standby circuit, and more particularly to a low-power standby circuit and an electronic device. Background Art

[0002] The use of electronic devices has become an indispensable part of human daily life, especially with the intelligent development of electronic devices, and in order to facilitate people's use, more and more electronic devices are set to start on demand, which is no longer limited to manual switching operation of electronic devices. More often, electronic devices are stopped in standby mode to stop the operation of electronic devices. Many times, when electronic devices are in standby mode, there is still power consumption inside. The total amount of energy consumed by the use of a large number of electronic devices is also quite huge, which is a huge waste of resources for energy conservation and emission reduction, which has always been the top priority of governments. So, how to ensure people's growing demand for the use of electronic devices, while ensuring that people are more convenient and intelligent in the use of electronic devices, and reducing resource waste is also a top priority topic. Summary of the invention

[0003] The technical problem to be solved by the present invention is to provide a low-power standby circuit and an electronic device in view of the above-mentioned defects of the prior art.

[0004] The technical solution adopted by the present invention to solve the technical problem is: constructing a low-power standby circuit, comprising:

[0005] A power input terminal for connecting a power input, and a power output terminal for outputting a power supply;

[0006] A switch, a switch state detection unit, a charging circuit and a second switch unit are sequentially connected in series between the power input terminal and the power output terminal;

[0007] A first switch unit connecting the power input terminal and the power output terminal;

[0008] a control unit connected to the switch state detection unit and the first switch unit;

[0009] a discharge circuit connecting the switch state detection unit and the charging circuit, and used for discharging the charging circuit when the switch is disconnected;

[0010] The second switch unit is connected to the charging circuit, turned on before the charging circuit is charged to a preset voltage, and turned off when the charging circuit is charged to the preset voltage;

[0011] The control unit outputs a first level signal to turn on the first switch unit when the second switch unit is turned on;

[0012] The switch state detection unit generates a second level signal when the switch is turned off, and the control unit receives the second level signal and outputs a third level signal to turn off the first switch unit.

[0013] Preferably, the first switch unit includes a transistor Q1, a resistor R1 and a resistor R2, the base of the transistor Q1 is connected to the positive electrode of the power input end via the resistor R1, the base of the transistor Q1 is connected to the control unit via the resistor R2, the emitter of the transistor Q1 is connected to the positive electrode of the power input end, and the collector of the transistor Q1 is connected to the power output end.

[0014] Preferably, the second switch unit includes a transistor Q2 and a resistor R6, the emitter of the transistor Q2 is connected to the switch via the charging circuit and the switch state detection unit, the base of the transistor Q2 is connected to the charging circuit via the resistor R6, and the collector of the transistor Q2 is connected to the power supply output end.

[0015] Preferably, the charging circuit includes a resistor R4 and a capacitor C1, the first end of the capacitor C1 is connected to the emitter of the transistor Q2 via the resistor R4, and the first end of the capacitor C1 is connected to the base of the transistor Q2 via the resistor R6, and the second end of the capacitor C1 is connected to the negative electrode of the power input terminal.

[0016] Preferably, the discharge circuit comprises a resistor R3A, one end of the resistor R3A is connected to the first end of the capacitor C1, and the other end of the resistor R3A is connected to the second end of the capacitor C1; and / or

[0017] The switch state detection unit includes the resistor R4 and the resistor R3A. The resistor R4 and the resistor R3A are connected in series and then connected to the negative electrode of the power input terminal. The series node of the resistor R4 and the resistor R3A is connected to the control unit.

[0018] Preferably, the charging circuit further includes a diode D1, the anode of the diode D1 is connected to the switch via the switch state detection unit, and the cathode of the diode D1 is connected to the resistor R4 and the emitter of the transistor Q2.

[0019] Preferably, the discharge circuit includes a transistor Q3, the emitter of the transistor Q3 is connected to the cathode of the diode D1 via the resistor R4, the base of the transistor Q3 is connected to the switch state detection unit, and the collector of the transistor Q3 is connected to the second end of the capacitor C1.

[0020] Preferably, the switch state detection unit includes a resistor R3 and a resistor R5, and the resistor R3 and the resistor R5 are connected in series to connect the negative electrode of the power input end and the positive electrode of the diode D1, and the series node of the resistor R3 and the resistor R5 is respectively connected to the control unit and the base of the transistor Q3.

[0021] Preferably, the control unit includes an MCU unit, and the power output end is connected to the MCU unit.

[0022] The present invention also constructs an electronic device, comprising any one of the low-power standby circuits described above.

[0023] A low-power standby circuit and an electronic device implementing the present invention have the following beneficial effects: the standby power consumption of the electronic device in the standby state can be reduced, and the circuit is simple and easy to use. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The present invention will be further described below with reference to the accompanying drawings and embodiments, in which:

[0025] Figure 1 It is a logic block diagram of a low-power standby circuit of the present invention;

[0026] Figure 2 It is a circuit principle diagram of a first embodiment of a low power consumption standby circuit of the present invention;

[0027] Figure 3 is a circuit principle diagram of a second embodiment of a low power consumption standby circuit of the present invention;

[0028] Figure 4 It is a circuit principle diagram of a third embodiment of a low power consumption standby circuit of the present invention. DETAILED DESCRIPTION

[0029] In order to have a clearer understanding of the technical features, purposes and effects of the present invention, specific embodiments of the present invention are now described in detail with reference to the accompanying drawings.

[0030] like Figure 1As shown, in a first embodiment of a low-power standby circuit of the present invention, it includes: a power input terminal 10 for connecting a power input, a power output terminal 90 for outputting a power supply; a switch 20, a switch state detection unit 30, a charging circuit 40 and a second switch unit 50 connected in series between the power input terminal 10 and the power output terminal 90; a first switch unit 60 connecting the power input terminal 10 and the power output terminal 90; a control unit 80 connecting the switch state detection unit 30 and the first switch unit 60; a discharge circuit 70 connecting the switch state detection unit 30 and the charging circuit 40, for discharging the charging circuit 40 when the switch 20 is disconnected; the second switch unit 50 is connected to the charging circuit 40, turned on before the charging circuit 40 is charged to a preset voltage, and turned off when the charging circuit 40 is charged to the preset voltage; the control unit 80 outputs a first level signal to turn on the first switch unit 60 when the second switch unit 50 is turned on; the switch state detection unit 30 generates a second level signal when the switch 20 is disconnected, and the control unit 80 receives the second level signal and outputs a third level signal to turn off the first switch unit 60. Specifically, the power input terminal 10 is connected to the power output terminal 90 through the switch 20, the switch state detection unit 30, the charging circuit 40 and the second switch unit 50 connected in series in sequence. When the switch 20 is closed and turned on, the external power input charges the charging circuit 40 through the path formed by the power input terminal 10, the switch 20 and the switch state detection unit 30, and before the charging circuit 40 is charged to a preset voltage, the second switch unit 50 is turned on. At this time, the power input passes through the path and the second switch unit 50 and outputs the voltage to the working circuit through the power output terminal 90. After the working circuit is powered, the control unit 80 controls the first switch unit 60 to turn on by outputting a first level signal, and the power input of the power input terminal 10 is connected to the power output terminal 90 through the path formed by the first switch unit 60 to power the working circuit. At the same time, during the continuous charging process, the charging circuit 40 is charged to a preset voltage. At this time, the charging circuit 40 controls the second switch unit 50 to be disconnected, and the power input will no longer pass through the second switch unit 50 to output the power output terminal 90. Its power output will be powered by the path formed by the first switch unit 60 controlled by the control unit 80 for normal operation. It can be understood here that the power supply of the control unit 80 is supplied through the power output terminal 90, the second switch unit 50 is turned on, and when the power output terminal 90 has power output, the control unit 80 starts to control the first switch unit 60 to be turned on, forming a normal working power supply. When the working circuit of the power output terminal 90 needs to enter the standby state, the control unit 80 can control the first switch unit 60 to be turned off, so that the power output of the power output terminal 90 is zero, that is, a zero power consumption standby is formed.It should be understood here that the state corresponding to the zero-power standby state at this time is that the switch 20 is still in the closed state, and the working circuit of its power output terminal 90 enters the non-working state, and the switch 20 needs to be re-operated to make its working circuit enter the working state. In the normal working process, when the switch 20 is switched from closed to open, the discharge circuit 70 will discharge the charging circuit 40 so that the voltage state of the charging circuit 40 is the initial state or the zero state. In this way, when the switch 20 is closed next time, the charging circuit 40 can be charged, and the second switch unit 50 can be switched to the off or closed state according to the charging state of the charging circuit 40 to perform the above steps. At the same time, in the summary of the normal working process, when the switch 20 state is switched from closed to open, it is a hard shut-off process. When the switch state detection unit 30 detects that the switch 20 is in the off state, it generates a second level signal. The control unit 80 receives the second level signal, that is, it determines that the switch 20 is in the off state, and outputs a third level signal to shut down the first switch unit 60, so that the power output terminal 90 will no longer have power output, and the working circuit stops working, forming a shutdown process. It can also be understood that according to eg. Figure 2 and Figure 3 In the embodiment shown, the switch 20 may be a switch S1, which may be a normally open or normally closed switch, or a touch switch.

[0031] Optional, such as Figure 2 and Figure 3 In the illustrated embodiment, the first switch unit 60 includes a transistor Q1, a resistor R1 and a resistor R2, the base of the transistor Q1 is connected to the positive electrode of the power input terminal 10 via the resistor R1, the base of the transistor Q1 is connected to the control unit 80 via the resistor R2, the emitter of the transistor Q1 is connected to the positive electrode of the power input terminal 10, and the collector of the transistor Q1 is connected to the power output terminal 90. Specifically, the first switch unit 60 can adopt a transistor switch 20 circuit, that is, the transistor Q1, and the high level or low level output by the control unit 80 triggers the turning off or on of the transistor Q1, so as to realize whether the power input terminal 10 is connected to the power output terminal 90 through the first switch unit 60.

[0032] Optionally, the second switch unit 50 includes a transistor Q2 and a resistor R6, the emitter of the transistor Q2 is connected to the switch 20 via the charging circuit 40 and the switch state detection unit 30, the base of the transistor Q2 is connected to the charging circuit 40 via the resistor R6, and the collector of the transistor Q2 is connected to the power output terminal 90. Specifically, the second switch unit 50 can also adopt a transistor switch 20 circuit, that is, a transistor Q2, the base of the transistor Q2 is connected to the charging circuit 40 via the resistor R6, during the charging process of the charging circuit 40, when the charging voltage of the charging circuit 40 is lower than the emitter voltage of the transistor Q2, the transistor Q2 is turned on, that is, the second switch unit 50 is turned on, when the charging circuit 40 continues to charge until the charging voltage of the charging circuit 40 increases, and when the voltage difference between the emitter and the base of the transistor Q2 is zero, the transistor Q2 is turned off, that is, the second switch unit 50 is turned off.

[0033] Optionally, the charging circuit 40 includes a resistor R4 and a capacitor C1, wherein the first end of the capacitor C1 is connected to the emitter of the transistor Q2 via the resistor R4, and the first end of the capacitor C1 is connected to the base of the transistor Q2 via the resistor R6, and the second end of the capacitor C1 is connected to the negative electrode of the power input terminal 10. Specifically, the capacitor C1 is charged through the power input terminal 10, wherein the charging end of the capacitor C1 is connected to the base of the transistor Q2 via the resistor R6, and when the capacitor C1 is fully charged, the transistor Q2 is turned off.

[0034] Optional, such as Figure 2 In the embodiment shown, the discharge circuit 70 includes a resistor R3A, one end of the resistor R3A is connected to the first end of the capacitor C1, and the other end of the resistor R3A is connected to the second end of the capacitor C1; specifically, when the switch 20 is disconnected, the capacitor C1 in the charging circuit 40 stops charging, and the capacitor C1 is discharged through the resistor R3A. In another embodiment, the switch state detection unit 30 includes a resistor R4 and a resistor R3A, the resistor R4 and the resistor R3A are connected in series and then connected to the negative electrode of the power input terminal 10, and the series node of the resistor R4 and the resistor R3A is connected to the control unit 80. Specifically, the resistor R4 can be shared with the charging circuit 40, and the resistor R4 and the resistor R3A connected in series form a voltage divider. The control unit 80 is connected to the series node of the resistor R4 and the resistor R3A to detect the voltage divider of the resistor R3A to determine whether the switch 20 is disconnected. It can be understood that when the switch 20 is disconnected, and after the capacitor C1 is discharged, the voltage of the resistor R3A is zero, that is, the second level signal is low. At this time, it can be determined that the circuit is in the disconnected state of the switch 20, and the control unit 80 outputs the corresponding third level signal according to the second level signal. Here, the reuse of components in the circuit makes the circuit connection relationship simpler. In other embodiments, separate designs can also be performed.

[0035] Optional, such as Figure 3As shown, in one embodiment, the charging circuit 40 further includes a diode D1, the anode of the diode D1 is connected to the switch 20 via the switch state detection unit 30, and the cathode of the diode D1 is connected to the resistor R4 and the emitter of the transistor Q2. Specifically, the charging circuit 40 is further provided with a diode D1, which can isolate the power input terminal 10 from the charging device in the charging circuit 40.

[0036] Optionally, the discharge circuit 70 includes a transistor Q3, the emitter of the transistor Q3 is connected to the cathode of the diode D1 via a resistor R4, the base of the transistor Q3 is connected to the switch state detection unit 30, and the collector of the transistor Q3 is connected to the second end of the capacitor C1. Specifically, the base of the transistor Q3 is connected to the switch state detection unit 30, and the second level signal, i.e., a low level signal, is output according to the state of the switch 20 detected by the switch state detection unit 30. At this time, the transistor Q3 is turned on, and the discharge circuit 70 is turned on with the charging element capacitor C1 to discharge the capacitor C1. At this time, through the isolation effect of the diode D1, it is ensured that when the switch 20 is disconnected, a voltage difference is formed between the emitter and the base of the transistor Q3, so as to ensure that the transistor Q3 can be turned on to discharge the capacitor C1.

[0037] Optionally, in one embodiment, the switch state detection unit 30 includes a resistor R3 and a resistor R5, the resistor R3 and the resistor R5 are connected in series to connect the negative electrode of the power input terminal 10 and the positive electrode of the diode D1, and the series node of the resistor R3 and the resistor R5 is connected to the control unit 80 and the base of the transistor Q3 respectively. Specifically, the resistor R3 and the resistor R5 can be connected in series to form a voltage divider, and the control unit 80 can be connected to the series node of the resistor R3 and the resistor R5 to detect the voltage divider of the resistor R5 to determine whether the switch 20 is disconnected.

[0038] Optional, such as Figure 4 In the illustrated embodiment, the control unit 80 includes an MCU unit, and the power output terminal 90 is connected to the MCU unit. Specifically, the control unit 80 includes an MCU unit, which includes an MCU chip U6, and a peripheral circuit of the MCU chip U6, wherein the peripheral circuit includes a power supply unit for supplying power to the MCU chip U6, and the power supply unit is connected to the power output terminal 90 and supplies power through the power output of the power output terminal 90 to supply power to the MCU chip U6.

[0039] In addition, the present invention provides an electronic device, comprising any one of the above low-power standby circuits. Specifically, by providing the low-power standby circuit in the electronic device, the power consumption of the electronic device when entering standby mode can be reduced to a minimum.

[0040] It can be understood that the above embodiments only express the preferred implementation modes of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the patent scope of the present invention. It should be pointed out that, for ordinary technicians in this field, the above technical features can be freely combined without departing from the concept of the present invention, and several deformations and improvements can be made, which all belong to the protection scope of the present invention. Therefore, all equivalent changes and modifications made to the scope of the claims of the present invention should belong to the coverage of the claims of the present invention.

Claims

1. A low power standby circuit, It is characterized in that include: A power input terminal for connecting a power input, and a power output terminal for outputting a power supply; A switch, a switch state detection unit, a charging circuit and a second switch unit connected in series between the power input terminal and the power output terminal; and a discharge circuit connecting the switch state detection unit and the charging circuit; A first switch unit connecting the power input terminal and the power output terminal; A control unit connected to the switch state detection unit and the first switch unit, wherein the control unit is powered by the power output terminal; When the switch is turned on, the power input charges the charging circuit through a path formed by the power input terminal, the switch and the switch state detection unit; The second switch unit is connected to the charging circuit, turned on before the charging circuit is charged to a preset voltage, and turned off when the charging circuit is charged to the preset voltage; The control unit outputs a first level signal to turn on the first switch unit when the second switch unit is turned on; The switch state detection unit generates a second level signal when the switch is disconnected, and the control unit receives the second level signal and outputs a third level signal to turn off the first switch unit; The discharge circuit is used to discharge the charging circuit when the switch is disconnected.

2. The low power standby circuit according to claim 1, It is characterized in that The first switch unit includes a transistor Q1, a resistor R1 and a resistor R2, the base of the transistor Q1 is connected to the positive electrode of the power input end via the resistor R1, the base of the transistor Q1 is connected to the control unit via the resistor R2, the emitter of the transistor Q1 is connected to the positive electrode of the power input end, and the collector of the transistor Q1 is connected to the power output end.

3. The low power standby circuit according to claim 1, It is characterized in that The second switch unit includes a transistor Q2 and a resistor R6, the emitter of the transistor Q2 is connected to the switch via the charging circuit and the switch state detection unit, the base of the transistor Q2 is connected to the charging circuit via the resistor R6, and the collector of the transistor Q2 is connected to the power output end.

4. The low power standby circuit according to claim 3, It is characterized in that The charging circuit includes a resistor R4 and a capacitor C1, the first end of the capacitor C1 is connected to the emitter of the transistor Q2 via the resistor R4, and the first end of the capacitor C1 is connected to the base of the transistor Q2 via the resistor R6, and the second end of the capacitor C1 is connected to the negative electrode of the power input terminal.

5. The low power consumption standby circuit according to claim 4, It is characterized in that The discharge circuit includes a resistor R3A, one end of the resistor R3A is connected to the first end of the capacitor C1, and the other end of the resistor R3A is connected to the second end of the capacitor C1; and / or The switch state detection unit includes the resistor R4 and the resistor R3A. The resistor R4 and the resistor R3A are connected in series and then connected to the negative electrode of the power input terminal. The series node of the resistor R4 and the resistor R3A is connected to the control unit.

6. The low power standby circuit according to claim 4, It is characterized in that The charging circuit further includes a diode D1 , the anode of the diode D1 is connected to the switch via the switch state detection unit, and the cathode of the diode D1 is connected to the resistor R4 and the emitter of the transistor Q2 .

7. The low power consumption standby circuit according to claim 6, It is characterized in that The discharge circuit includes a transistor Q3, the emitter of the transistor Q3 is connected to the cathode of the diode D1 via the resistor R4, the base of the transistor Q3 is connected to the switch state detection unit, and the collector of the transistor Q3 is connected to the second end of the capacitor C1.

8. The low power consumption standby circuit according to claim 7, It is characterized in that The switch state detection unit includes a resistor R3 and a resistor R5. The resistor R3 and the resistor R5 are connected in series to connect the negative electrode of the power input end and the positive electrode of the diode D1. The series node of the resistor R3 and the resistor R5 is respectively connected to the control unit and the base of the transistor Q3.

9. The low power standby circuit according to claim 1, It is characterized in that The control unit includes an MCU unit, and the power output end is connected to the MCU unit.

10. An electronic device, It is characterized in that The invention comprises the low power consumption standby circuit as claimed in any one of claims 1 to 9.

Citation Information

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