Storage device and operating method of a storage system

Abstract

An operating method of a storage device and a storage system is provided. A storage device includes a non-volatile memory device including a first area, a second area, and a third area; and a controller receiving a first write command including a first logical block address from a host device, receiving first data corresponding to the first logical block address in response to the first write command, and storing the first data in the non-volatile memory device, when the first write command includes area information, the controller storing the first data in the first area or the second area based on the area information, when the first write command does not include the area information, the controller storing the first data in the third area, each of the first area and the second area including memory cells each storing 'n' bits (n is a positive integer), and the third area including memory cells each storing'm' bits (m is a positive integer greater than n).

Description

[0001] This application claims priority to Korean Patent Application No. 10-2019-0094253, filed on August 2, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. TECHNICAL FIELD

[0002] Exemplary embodiments of the inventive concept relate to semiconductor memory, and more particularly, to a storage device, an operating method of a storage system including the storage device, and a host device controlling the storage device. BACKGROUND

[0003] Semiconductor memory devices can be classified as volatile memory devices or nonvolatile memory devices. Volatile memory devices retain their data only when the device is powered. Examples of volatile memory devices include static random access memory (SRAM) or dynamic random access memory (DRAM). Nonvolatile memory devices do not lose data when power is lost. Examples of nonvolatile memory devices include a flash memory device, a phase change RAM (PRAM), a magnetic RAM (MRAM), a resistive RAM (RRAM), or a ferroelectric RAM (FRAM).

[0004] Flash memory devices are increasingly being used as mass storage media in computing devices. Various technologies are being developed to support high-speed operations of flash memory devices. For example, a universal flash storage (UFS) interface defined by JEDEC standards can support higher operation speeds than storage devices based on conventional flash memories. SUMMARY

[0005] According to an exemplary embodiment of the inventive concept, a storage device includes a nonvolatile memory device including a first area, a second area, and a third area, and a controller configured to receive a first write command including a first logical block address from a host device, receive first data corresponding to the first logical block address in response to the first write command, and store the first data in the nonvolatile memory device, wherein, when the first write command includes area information, the controller stores the first data in one of the first area and the second area based on the area information, wherein, when the first write command does not include the area information, the controller stores the first data in the third area, wherein each of the first area and the second area includes memory cells each configured to store "n" bits (n is a positive integer), and the third area includes memory cells each configured to store "m" bits (m is a positive integer greater than n).

[0006] According to an example embodiment of the inventive concept, there is provided a storage device including a non-volatile memory device including a first area, a second area, and a third area; and a controller configured to receive a first command including a first logical block address range and first range area information from a host device, and in response to the first command, allocate an area corresponding to the first range area information among the first area, the second area, and the third area to the first logical block address range, wherein the controller is further configured to receive a first write command including a first logical block address from the host device, and store first data corresponding to the first logical block address in the allocated area, and wherein the first logical block address is included in the first logical block address range.

[0007] According to an example embodiment of the inventive concept, there is provided an operating method of a storage system including a storage device including a first area, a second area, and a third area, and a host device configured to communicate with the storage device, the method including: transmitting, by the host device, a first write command including a first logical block address and first area information to the storage device; receiving, by the storage device, the first write command, and selecting an area corresponding to the first area information among the first area, the second area, and the third area; transmitting, by the storage device, a prepare-to-transmit universal flash protocol information unit (UPIU) to the host device; transmitting, by the host device, a DATA OUT UPIU including first data corresponding to the first logical block address to the storage device; in response to the prepare-to-transmit UPIU, receiving, by the storage device, the DATA OUT UPIU and storing the first data in the area corresponding to the first area information; transmitting, by the storage device, a first response UPIU to the host device; and managing, by the storage device, a mapping relationship between the first logical block address and a physical address of the area corresponding to the first area information.

[0008] According to an example embodiment of the inventive concept, there is provided a storage device including a non-volatile memory device including a first block, a second block, and a third block; and a memory controller configured to receive a write command including a logical block address and block information from a host, select a block corresponding to the block information among the first block, the second block, and the third block, transmit a prepare-to-transmit universal flash protocol information unit (UPIU) to the host, receive a DATA OUT UPIU including data corresponding to the logical block address from the host, store the data in the block corresponding to the block information, transmit a response UPIU to the host, and manage a mapping relationship between the logical block address and a physical address of the block corresponding to the block information. BRIEF DESCRIPTION OF DRAWINGS

[0009] The above and other features of the inventive concept will become clearer after a detailed description of example embodiments of the inventive concept with reference to the attached drawings.

[0010] FIG. 1 is a block diagram illustrating a storage system according to example embodiments of inventive concepts.

[0011] FIG. 2 is a diagram illustrating a physical storage space of a storage device of FIG. 1 .

[0012] FIG. 3A and FIG. 3B are diagrams for describing a turbo write buffer of FIG. 2 .

[0013] FIG. 4A and FIG. 4B are diagrams for describing a mode of a turbo write buffer of a storage device configured FIG. 1 .

[0014] FIG. 5 is a flowchart illustrating an operation of a storage system of FIG. 1 .

[0015] FIG. 6 is a flowchart illustrating an operation of a storage system of FIG. 1 .

[0016] FIG. 7 is a flowchart illustrating an operation of a storage device of FIG. 1 .

[0017] FIG. 8 is a block diagram illustrating a physical storage space of a storage device of FIG. 1 .

[0018] FIG. 9 is a diagram illustrating a logical storage space of a physical storage space of a storage device described with reference to FIG. 8 .

[0019] FIG. 10A and FIG. 10B are diagrams illustrating an operation in a physical storage space of a storage device described with reference to FIG. 8 .

[0020] FIG. 11 is a flowchart illustrating an operation of a storage system of FIG. 1 .

[0021] FIG. 12A , FIG. 12B and FIG. 12C are diagrams for describing a write operation of a flowchart according to FIG. 11 .

[0022] FIG. 13A and FIG. 13Bis a diagram for describing a method of setting region information with a write command UPIU.

[0023] FIG. 14 is a flowchart illustrating an operation of a storage device of FIG. 1 .

[0024] FIG. 15 is a flowchart illustrating an operation of a storage system of FIG. 1 .

[0025] FIG. 16A and FIG. 16B are diagrams for describing a logical block address range allocation operation of a flowchart according to FIG. 15 .

[0026] FIG. 17A , 17B and 17C are diagrams for describing a write operation of a flowchart according to FIG. 15 .

[0027] FIG. 18 is a flowchart illustrating an operation of a storage system of FIG. 1 .

[0028] FIG. 19 is a diagram for describing an operation S412 of FIG. 18 .

[0029] FIG. 20 is a diagram illustrating a hierarchical structure of a storage system of FIG. 1 .

[0030] FIG. 21 is a block diagram illustrating in detail a storage system according to an exemplary embodiment of the inventive concept.

[0031] FIG. 22 is a diagram illustrating that an exemplary embodiment of the inventive concept is applied to a storage system. DETAILED DESCRIPTION

[0032] FIG. 1 is a block diagram illustrating a storage system according to an exemplary embodiment of the inventive concept. Referring to FIG. 1 , the storage system 1000 can include a host 1100 and a storage device 1200. In an exemplary embodiment of the inventive concept, the storage system 1000 can include one of various computing systems such as a personal computer, a notebook computer, a tablet computer, a smart phone, and a wearable device.

[0033] The host 1100 can store data in the storage device 1200 or can read data stored in the storage device 1200. For example, the host 1100 can transfer a write command and write data to the storage device 1200 to store data in the storage device 1200. Alternatively, to read data from the storage device 1200, the host 1100 can transfer a read command to the storage device 1200 and can receive data from the storage device 1200.

[0034] The host 1100 can include a main processor such as a central processing unit (CPU) or an application processor (AP). Also, the host 1100 can include an auxiliary processor such as a graphic processing unit (GPU) or a neural processing unit (NPU) which assists the main processor.

[0035] The storage device 1200 can operate under the control of the host 1100. For example, the storage device 1200 can include a controller 1210 and a non-volatile memory device 1220. The controller 1210 (also referred to as a memory controller) can operate in response to a command received from the host 1100. For example, the controller 1210 can receive a write command and write data from the host 1100, and can store the received write data in the non-volatile memory device 1220 in response to the received write command.

[0036] Alternatively, the controller 1210 can receive a read command from the host 1100, and can read data stored in the non-volatile memory device 1220 in response to the received read command. Thereafter, the controller 1210 can transfer the read data to the host 1100. In an exemplary embodiment of the inventive concept, the non-volatile memory device 1220 can be a NAND flash device, but the inventive concept is not limited thereto.

[0037] In an exemplary embodiment of the inventive concept, the host 1100 can communicate with the storage device 1200 based on a universal flash storage (UFS) interface or protocol defined by a JEDEC standard. For example, the host 1100 and the storage device 1200 can exchange a packet in the form of a UFS protocol information unit (UPIU). The UPIU can include various information defined by an interface (e.g., a UFS interface) between the host 1100 and the storage device 1200. However, the inventive concept is not limited thereto. Hereinafter, for convenience of description, the terms "command", "UPIU", and "data" can be interchangeable, and these terms can have the same meaning or different meanings according to the embodiments disclosed herein.

[0038] In an exemplary embodiment of the inventive concept, the storage device 1200 may support a turbo write function or turbo write feature. The turbo write function may be enabled or disabled under the control of the host 1100. In an exemplary embodiment of the inventive concept, the controller 1210 may enable or disable the turbo write function in response to a turbo write function enable request from the host 1100. For example, the turbo write function enable request may be received from the host 1100 via a query request Universal Flash Protocol Information Unit (UPIU). When the turbo write function is enabled under the control of the host 1100, the storage device 1200 may perform a turbo write operation. The turbo write operation may be performed based on a single-level cell (SLC) buffering scheme, but is not limited thereto, and the turbo write operation may provide improved performance (specifically, improved write performance) of the storage device 1200. The turbo write operation will be described more fully below with reference to the accompanying drawings.

[0039] FIG. 2 It shows FIG. 1 1 is a diagram illustrating a physical storage space PS of the storage device 1200. The physical storage space PS of the storage device 1200 may indicate a physical area of ​​the nonvolatile memory device 1220 that actually stores user data. In other words, the physical storage space PS may be a space recognized by the host 1100 as the capacity of the storage device 1200. The host 1100 and the storage device 1200 may be implemented in accordance with the UFS protocol proposed by JEDEC for the purpose of communicating with each other, but the inventive concept is not limited thereto.

[0040] In an exemplary embodiment of the inventive concept, in addition to FIG. 2 In addition to the physical storage space PS shown in FIG, the storage device 1200 may also include any other storage space (for example, space that is not recognized by the host 1100 as the capacity of the storage device 1200 (such as a reserved area, a meta area for storing metadata, or an overprovisioning area for improving performance)). However, for ease of description, additional descriptions associated with other storage spaces will be omitted (or minimized), and the description will focus on the physical storage space PS for storing user data.

[0041] Reference FIG. 1 and FIG. 2 The physical storage space PS of the storage device 1200 may include a turbo write buffer area (TWB) (hereinafter referred to as a "turbo write buffer") and a user storage area (UST) (hereinafter referred to as a "user storage unit"). The user storage unit and the turbo write buffer may be referred to as a first area, a second area, a third area, etc.

[0042] The turbo write buffer TWB may correspond to a portion (e.g., "a") of the physical storage space PS of the nonvolatile memory device 1220. The user storage unit UST may correspond to the remaining portion (e.g., "b") of the physical storage space PS of the nonvolatile memory device 1220. Alternatively, the user storage unit UST may correspond to the entire physical storage space PS of the nonvolatile memory device 1220 (e.g., a+b).

[0043] In an exemplary embodiment of the inventive concept, each memory cell corresponding to the turbo write buffer TWB may be an SLC, and each memory cell corresponding to the user storage unit UST may be a triple-layer cell (TLC). Alternatively, each of the memory cells corresponding to the turbo write buffer TWB may store n bits of data (n is a positive integer), and each of the memory cells corresponding to the user storage unit UST may store m bits of data (m is a positive integer greater than n). In other words, the turbo write buffer TWB may be an area that supports a higher write speed than the user storage unit UST.

[0044] The inventive concept is not limited to the above description of the turbo write buffer TWB and the user storage unit UST. For example, the number of bits stored in each memory cell corresponding to the turbo write buffer TWB (e.g., k) may be greater than or equal to the number of bits stored in each memory cell corresponding to the user storage unit UST (e.g., i) (i.e., k ≥ i). In an exemplary embodiment of the inventive concept, in the turbo write buffer TWB and the user storage unit UST, the number of bits to be stored in each memory cell may be determined by various factors of the memory device 1200 (such as reliability and lifespan). Alternatively, in addition to the number of bits to be stored in each memory cell, the turbo write buffer TWB and the user storage unit UST may be divided by various factors of the memory device 1200 (such as reliability and lifespan).

[0045] In an exemplary embodiment of the inventive concept, each of reference symbols "a" and "b" may be the number of memory blocks in a corresponding memory space. The values ​​of "a" and "b" may be changed differently depending on the sizes of the turbo write buffer TWB and the user storage unit UST and the scheme for implementing the turbo write buffer TWB and the user storage unit UST (e.g., SLC, multi-level cell (MLC), TLC, and quad-level cell (QLC)).

[0046] As reference FIG. 1The storage device 1200 can support a normal write function and a turbo write function. When the turbo write function is enabled by the host 1100, the storage device 1200 can perform a turbo write operation. When the turbo write function is disabled by the host 1100, the storage device 1200 can perform a normal write operation.

[0047] For example, in the case where the turbo write function is enabled, the storage device 1200 can preferentially write write data received from the host 1100 to the turbo write buffer TWB. In this case, because the write data received from the host 1100 is written to the turbo write buffer TWB (e.g., SLC programming) compared to the case where a normal write operation (e.g., TLC programming) is performed on the user storage UST, a fast operation speed can be ensured. In the case where the turbo write function is disabled, the storage device 1200 can not first write write data to the turbo write buffer TWB. According to an internal allocation strategy (e.g., a normal write strategy), the storage device 1200 can directly write write data to the user storage UST, or can write write data to the turbo write buffer TWB. According to the normal write strategy, how to write write data can be determined based on various factors, such as a data share of the turbo write buffer TWB and a state of the physical storage space PS.

[0048] As another example, the normal write strategy can first write write data to the user storage UST. To more clearly explain the inventive concept, in the following detailed description, the normal write strategy is a strategy in which write data is preferentially written to the user storage UST. However, the inventive concept is not limited thereto.

[0049] In the exemplary embodiment of the inventive concept, data written to the turbo write buffer TWB can be flushed or migrated to the user storage UST according to an explicit command from the host 1100 or an internal allocation strategy.

[0050] FIG. 3A and FIG. 3B is a diagram for describing FIG. 2 a turbo write buffer. Referring to FIG. 1 , FIG. 2 , FIG. 3A and FIG. 3BThe storage device 1200 can include a first logical unit LU1, a second logical unit LU2, a third logical unit LU3, and a fourth logical unit LU4. Each of the first to fourth logical units LU1-LU4 can be an externally addressable, independent processing entity that processes commands from the host 1100. The host 1100 can manage the storage space of the storage device 1200 through the first to fourth logical units LU1-LU4. Each of the first to fourth logical units LU1-LU4 can be used to store data in the storage device 1200.

[0051] Each of the first to fourth logical units LU1-LU4 can be associated with at least one memory block of the non-volatile memory device 1220. There can be various logical units for various purposes. However, the first to fourth logical units LU1-LU4 can correspond to the physical storage space PS, and can be used to store data of the host 1100.

[0052] In FIG. 3A and FIG. 3B The first to fourth logical units LU1-LU4 are shown, but the inventive concept is not limited thereto. For example, the storage device 1200 can include other logical units for storing and managing user data in addition to the first to fourth logical units LU1-LU4. Alternatively, the storage device 1200 can include other logical units for supporting various functions in addition to the first to fourth logical units LU1-LU4.

[0053] The turbo write buffer TWB of the storage device 1200 can be configured in various types. The turbo write buffer TWB can be configured in one of a logical unit (LU) dedicated buffer type and a shared buffer type.

[0054] In the case of the LU dedicated buffer type, the turbo write buffer TWB can be independently or separately configured for each logical unit LU. For example, as shown in FIG. 3A In the LU dedicated buffer type, a first turbo write buffer TWB1 can be configured for a first logical unit LU1 of the first to fourth logical units LU1-LU4, and a third turbo write buffer TWB3 can be configured for a third logical unit LU3 of the first to fourth logical units LU1-LU4.

[0055] In FIG. 3AIn the case where a write command for the first logical unit LU1 is received after the turbo write function is enabled, write data can be preferentially written to the first turbo write buffer TWB1 corresponding to the first logical unit LU1. In the case where a write command for the third logical unit LU3 is received after the turbo write function is enabled, write data can be preferentially written to the third turbo write buffer TWB3 corresponding to the third logical unit LU3.

[0056] In the case where write commands for the second logical unit LU2 and the fourth logical unit LU4, which are not allocated turbo write buffers TWB, are received, write data can be written to the user storage UST corresponding to the second logical unit LU2 and the fourth logical unit LU4. Further, in the case where a write command for the first logical unit LU1 or the third logical unit LU3 is received after the turbo write is disabled, write data can be written to the user storage UST of the first logical unit LU1 or the first turbo write buffer TWB1, or can be written to the user storage UST of the third logical unit LU3 or the third turbo write buffer TWB3, according to a normal write strategy.

[0057] In the exemplary embodiment of the inventive concept, the capacities of the first turbo write buffer TWB1 and the third turbo write buffer TWB3 can be set independently of each other. However, the inventive concept is not limited thereto. For example, the number of logical units to which turbo write buffers are respectively allocated, the capacity of each turbo write buffer, etc. can be variously changed or modified.

[0058] In the exemplary embodiment of the inventive concept, the size of the turbo write buffer TWB of each logical unit can be set to a per-unit turbo write buffer size field (e.g., "dLUNumTurboWriteBufferAllocUnits") of a unit descriptor. In the exemplary embodiment of the inventive concept, the per-unit turbo write buffer size field (e.g., "dLUNumTurboWriteBufferAllocUnits") can be a configurable parameter.

[0059] In the case of the shared buffer type, one turbo write buffer can be configured for all logical units. For example, as shown in FIG. 3B In the shared buffer type, one turbo write buffer TWB0 shared by all of the first logical unit LU1 to the fourth logical unit LU4 can be configured, as shown in

[0060] In this case, when a write command for each of the first to fourth logical units LU1 to LU4 is received after the turbo write function is enabled, write data can be first written to the shared turbo write buffer TWB0. In the case where a write command for each of the first to fourth logical units LU1 to LU4 is received after the turbo write function is disabled, write data can be written to each of the first to fourth logical units LU1 to LU4 according to a normal write strategy, or to the shared turbo write buffer TWB0.

[0061] As described above, the storage device 1200 can include a turbo write buffer TWB for supporting a turbo write function. According to a buffer type (e.g., an LU dedicated buffer type or a shared buffer type), a turbo write buffer TWB can be configured for each of a plurality of logical units, or one turbo write buffer TWB can be configured to be shared by all logical units.

[0062] FIG. 4A and FIG. 4B is a diagram for describing a mode of a turbo write buffer of a storage device configured FIG. 1 . Hereinafter, for convenience of description, it is assumed that a physical storage space PS of the storage device 1200 is 32 GB based on TLC. In other words, in the case where each memory cell included in the storage device 1200 stores 3-bit data, the storage device 1200 can store 32 GB of user data.

[0063] However, the inventive concept is not limited thereto. For example, the physical storage space PS of the storage device 1200 can be variously changed according to a scheme in which the storage device 1200 or the non-volatile memory device 1220 is implemented (e.g., according to a memory cell type (e.g., SLC, MLC, TLC, or QLC), a number of memory cells, a memory cell structure, a reserved space ratio, etc.).

[0064] Referring to FIG. 1 , FIG. 4A and FIG. 4B , the storage device 1200 can configure a physical storage space of a turbo write buffer TWB according to various modes. For example, the storage device 1200 can configure a physical storage space of a turbo write buffer based on one of a user capacity reduction mode and a user capacity non-reduction mode.

[0065] The user capacity reduction mode can be a mode in which a user capacity of a user storage portion USTa is reduced for the purpose of configuring a turbo write buffer TWBa. For example, as FIG. 4AAs shown in FIG, the physical storage space PS of the storage device 1200 may be 32 GB based on TLC.

[0066] Before the turbo write buffer TWB is configured, 32 GB of capacity (eg, the entire capacity of the physical storage space PS) may be allocated to or available for the user storage UST. In this case, from the perspective of the host 1100, the user storage UST may be identified as 32 GB.

[0067] The turbo write buffer TWB may be configured according to the user capacity reduction mode. In this case, the second physical storage space PS2a as part of the physical storage space PS may be allocated to the turbo write buffer TWBa or may be used for the turbo write buffer TWBa.

[0068] In addition, the first physical storage space PS1a, which is part of the physical storage space PS, can be allocated to or used for the user storage unit USTa. In this case, compared with the case where the turbo write buffer TWBa is not configured, the capacity of the user storage unit USTa can be reduced from the perspective of the host 1100 (for example, from 32 GB to 26 GB).

[0069] In an exemplary embodiment of the inventive concept, the first physical storage space PS1a corresponding to the user storage unit USTa may be implemented using a TLC, and the second physical storage space PS2a corresponding to the turbo write buffer TWBa may be implemented using an SLC. When the same storage space is used as a TLC and an SLC, the capacity ratio may be "3:1".

[0070] In other words, when the size of the turbo write buffer TWBa increases by as much as 1 GB, the size of the logical storage space of the user storage part USTa can be reduced by as much as 3 GB. As described above, when the turbo write buffer TWBa is configured in the user capacity reduction mode, a portion of the physical storage space PS of the storage device 1200 can be allocated to the turbo write buffer TWBa, and thus the capacity of the user storage part USTa recognized by the host 1100 can be reduced.

[0071] In an exemplary embodiment of the inventive concept, the first physical storage space PS1 a corresponding to the user storage part USTa and the second physical storage space PS2 a corresponding to the turbo write buffer TWBa may be physically adjacent to each other or may be physically spaced apart from each other.

[0072] The non-user capacity reduction mode may be a mode in which the logical storage capacity of the user storage unit USTb recognized by the host 1100 is not reduced even if the turbo write buffer TWBb is configured. FIG. 4B As shown in , before configuring the turbo write buffer TWB, the user storage unit UST may have a capacity of 32 GB. In other words, the physical storage space PS of the storage device 1200 may be allocated to the user storage unit UST or may be used for the user storage unit UST.

[0073] In the case of configuring the turbo write buffer TWB based on the no-user capacity reduction mode, a turbo write buffer TWBb having a specific capacity (e.g., 2 GB) may be configured. A second physical storage space PS2b as part of the physical storage space PS may be allocated to the turbo write buffer TWBb or may be used for the turbo write buffer TWBb.

[0074] Unlike the user capacity reduction mode, the user storage unit USTb in the non-user capacity reduction mode can maintain a capacity of 32 GB. In other words, in the non-user capacity reduction mode, even if the turbo write buffer TWBb is configured, the capacity of the user storage unit UST recognized from the perspective of the host 1100 can be equal to the capacity before the turbo write buffer TWBb is configured.

[0075] In an exemplary embodiment of the inventive concept, in the non-user capacity reduction mode, the size or configuration of the turbo write buffer TWBb may be changed by an internal policy of the storage device 1200 or an explicit request from the host 1100. For example, because the second physical storage space PS2b as part of the physical storage space PS is used to configure the turbo write buffer TWBb, the first physical storage space PS1b to be used for the user storage section USTb may be smaller than the capacity of the user storage section USTb.

[0076] In other words, when the entire first physical storage space PS1b is used to store user data or the available free capacity of the first physical storage space PS1b is equal to or less than a reference value, all or part of the second physical storage space PS2b used for the turbo write buffer TWBb can be returned to the user storage unit USTb.

[0077] In other words, in the physical storage space PS, in a case where the turbo write buffer TWBb cannot be maintained due to lack of available space for the user storage USTb, the second physical storage space PS2b allocated for the turbo write buffer TWBb can be returned to the user storage USTb. The above-mentioned returning operation can be performed, for example, by a user data flushing operation and an operation of setting a turbo write buffer size.

[0078] In an exemplary embodiment of the inventive concept, the host 1100 can check the current available size of the turbo write buffer TWB of the storage device 1200. For example, the storage device 1200 can set information about the size of the turbo write buffer TWB at a current turbo write buffer size field (e.g., "dCurrentTurboWriteBufferSzie") of the attribute. Also, the storage device 1200 can set information about the ratio of the current available capacity of the turbo write buffer TWB at an available turbo write buffer size field (e.g., "dAvailableTurboWriteBufferSize") of the attribute.

[0079] The host 1100 can check the current available size of the turbo write buffer TWB by checking the current turbo write buffer size field and the available turbo write buffer size field of the attribute. Based on the checked information, the host 1100 can change a strategy of using turbo write, or can return the physical storage space for the turbo write buffer TWB to the user storage UST.

[0080] As another example, the storage device 1200 can autonomously return the physical storage space for the turbo write buffer TWB to the user storage UST. For example, the storage device 1200 can periodically compare the available space of the user storage UST with a reference value to determine whether the physical storage space for the turbo write buffer TWB needs to be returned to the user storage UST. When the storage device 1200 has returned the physical storage space for the turbo write buffer TWB to the user storage UST, the storage device 1200 can set a status flag indicating that the turbo write buffer TWB is no longer available. The status flag can be stored in a register in the storage device 1200. The host 1100 can check the changed status of the turbo write buffer TWB through the current turbo write buffer size field. When the physical storage space for the turbo write buffer TWB is returned to the user storage UST, the storage device 1200 can set the current turbo write buffer size field to 0.

[0081] In exemplary embodiments of the inventive concept, the storage device 1200 can provide information about the lifetime of the turbo write buffer TWB based on the number of program / erase (P / E) cycles allocated to the turbo write buffer TWB or the physical storage space (or memory block) used for the turbo write buffer TWB. For example, the storage device 1200 can set the information about the lifetime of the turbo write buffer TWB at the turbo write buffer lifetime estimation field (e.g., "dTurboWriteBufferLifeTimeEst") of the attribute.

[0082] The host 1100 can estimate the lifetime of the turbo write buffer TWB by checking the turbo write buffer lifetime estimation field of the attribute of the storage device 1200 through a query request. In exemplary embodiments of the inventive concept, in the user capacity reduction mode, because the user storage UST and the turbo write buffer TWB share the physical storage space PS, the lifetime of the turbo write buffer TWB is reduced in case that a write operation is performed on the user storage UST.

[0083] FIG. 5 is a flowchart illustrating the operation of the storage system of FIG. 1 Referring to FIG. 5 the initialization operation of the storage system 1000 is described. Referring to FIG. 1 , FIG. 2 and FIG. 5 , the host 1100 and the storage device 1200 can perform an operation such as a power-on reset operation, a hardware reset operation, or an end-point reset operation in operation S11.

[0084] The host 1100 and the storage device 1200 can perform a hardware reset and booting in operation S12. For example, the hardware layer of each of the host 1100 and the storage device 1200 can be initialized and booted.

[0085] The host 1100 and the storage device 1200 can perform initialization on a specific layer (e.g., a UFS transport (UTP) layer) in operation S13. For example, the host 1100 can transfer a NOP OUT UPIU to the storage device 1200. The storage device 1200 can transfer a NOP IN UPIU to the host 1100 in response to the NOP OUT UPIU.

[0086] In operation S14, the host 1100 may check the device descriptor from the storage device 1200. For example, the host 1100 may transmit a query request for reading the descriptor to the storage device 1200. In response to the query request, the storage device 1200 may transmit a query response including the device descriptor to the host 1100. The query request may include the read descriptor. For example, the read descriptor may indicate to the storage device 1200 that the external device expects the device descriptor.

[0087] In an exemplary embodiment of the inventive concept, the host 1100 may check the configuration and function of the storage device 1200 through a device descriptor. For example, the device descriptor may include an extended UFS function support field (e.g., "dExtendedUFSFeaturesSupport") containing information on whether the turbo write function is supported. In an exemplary embodiment of the inventive concept, the information on whether the turbo write function is supported may be set to a specific bit (e.g., bit [8]) of the extended UFS function support field.

[0088] The device descriptor may further include a turbo write buffer no user space reduction enable field (e.g., "bTurboWriteBufferNoUserSpaceReductionEn") containing information about the turbo write buffer mode. In the case where the value of the turbo write buffer no user space reduction enable field is "00h", the turbo write buffer TWB may be configured according to the reference FIG. 4A In case the value of the turbo write buffer no user space reduction enable field is "01h", the turbo write buffer TWB can be configured according to the reference FIG. 4B The described no-user capacity reduction mode is configured.

[0089] The device descriptor may further include a turbo write buffer type field (eg, "bTurbowriteBufferType") containing information on the turbo write buffer type. In the case where the value of the turbo write buffer type field is "00h," the turbo write buffer TWB may be configured according to the reference FIG. 3A In case the value of turbo write buffer type field is "01h", turbo write buffer TWB can be configured according to reference FIG. 3B Describes the shared buffer type to configure.

[0090] The device descriptor can further include a shared turbo write buffer allocation number field (e.g., "dNumSharedTurboWriteBufferAllocUnits") containing information about the size of a turbo write buffer. In a case where the number of units allocated to the shared turbo write buffer is set to "0", a turbo write buffer of the shared buffer type can not be configured.

[0091] The above fields are merely exemplary, and the inventive concept is not limited thereto. For example, the device descriptor can include other fields containing information about the configuration, structure, function, etc. of the storage device 1200 in addition to the above fields. The various fields of the device descriptor can indicate values set prior to an initialization operation. The host 1100 can identify the current state of the storage device 1200 by reading the various fields of the device descriptor.

[0092] In exemplary embodiments of the inventive concept, the above fields of the device descriptor (such as "bTurboWriteBufferNoUserSpaceReductionEn", "bTurboWriteBufferType", and "dNumSharedTurboWriteBufferAllocUnits") can be changed by writing values to the corresponding fields of the configuration descriptor. In other words, the host 1100 can change information such as the turbo write buffer type, turbo write buffer no user space reduction enable, and the number of units allocated to the turbo write buffer by writing values to the various fields of the configuration descriptor. In exemplary embodiments of the inventive concept, the geometry descriptor of the storage device 1200 can include information such as a turbo write buffer maximum size field, a turbo write buffer maximum number field, a turbo write buffer capacity adjustment factor field, a support turbo write buffer no user capacity reduction type field, a support turbo write buffer type field, etc.

[0093] For example, the turbo write buffer maximum size field (e.g., "dTurboWriteBufferMaxNAllocUnits") can include information about the maximum size of a turbo write buffer TWB supported by the storage device 1200. The turbo write buffer maximum number field (e.g., "bDeviceMaxTurboWriteLUs") can include information about the maximum number of turbo write buffers supported by the storage device 1200.

[0094] The turbo write buffer capacity adjustment factor field (e.g., "bTurboWriteBufferCapAdjFac") can include information about a capacity reduction factor according to a kind of turbo write buffer memory. For example, in a case where the turbo write buffer TWB is implemented with SLC and the user storage portion UST is implemented with TLC, the value of the turbo write buffer capacity adjustment factor field can be "3". In a case where the turbo write buffer TWB is implemented with SLC and the user storage portion UST is implemented with MLC, the value of the turbo write buffer capacity adjustment factor field can be "2".

[0095] The supported turbo write buffer no user space reduction types field (e.g., "bSupportedTurboWriteBufferNoUserSpaceReductionTypes") can include information about whether the storage device 1200 supports any turbo write buffer mode (e.g., user capacity reduction mode, no user capacity reduction, or both).

[0096] The supported turbo write buffer types field (e.g., "bSupportedTurboWriteBufferTypes") can include information about whether the storage device 1200 supports any turbo write buffer type (e.g., LU dedicated buffer type, shared buffer type, or both).

[0097] The above fields are merely exemplary, and the inventive concepts are not limited thereto.

[0098] In operation S15, the host 1100 can download a boot code from the storage device 1200. For example, the host 1100 can transmit a TEST UNIT READY (TUR) UPIU to the storage device 1200. The storage device 1200 can transmit status information in response to the received TUR UPIU. The host 1100 can determine whether a boot logical unit (or a boot well-known LU) of the storage device 1200 is accessible based on the received status information.

[0099] In a case where the boot logical unit is accessible, the host 1100 can transmit a SCSI READ command to the storage device 1200. In an exemplary embodiment of the inventive concepts, the SCSI READ command can correspond to the boot logical unit. The storage device 1200 can transmit data "DATA" and status information to the host 1100 in response to the received command.

[0100] In operation S16, the host 1100 can complete the initialization operation by setting a flag of the storage device 1200. For example, the host 1100 can transmit a query request to the storage device 1200. The query request can be a request for setting a device initialization field (e.g., "fDeviceInit") included in the flag of the storage device 1200. In response to the query request, the device initialization field included in the flag of the storage device 1200 can be set to a specific value (e.g., "01h"). Thereafter, the storage device 1200 can transmit a query response.

[0101] In operation S17, the host 1100 can poll the device initialization field (e.g., "fDeviceInit") of the flag of the storage device 1200. For example, the host 1100 can transmit a query request for reading the device initialization field of the flag to the storage device 1200, and the storage device 1200 can transmit a query response including the device initialization field to the host 1100.

[0102] In an exemplary embodiment of the inventive concept, after operation S16, in the case where the initialization operation of the storage device 1200 is completed, the device initialization field can be reset to a different value (e.g., "00h"). In other words, the host 1100 can repeatedly perform operation S17 to check whether the device initialization field is reset. In the case where the device initialization field is reset, the initialization operation of the host 1100 and the storage device 1200 can be completed.

[0103] FIG. 6 is a flowchart illustrating an operation of the storage system of FIG. 1 will be described with reference to FIG. 6 A write operation of the storage system 1000 will be described with reference to FIG. 1 and FIG. 6 In operation S21, the host 1100 can transmit a CMD UP IU including a write command WR CMD to the storage device 1200.

[0104] In operation S22, the host 1100 and the storage device 1200 can perform a data transaction. For example, the storage device 1200 can transmit a ready-to-transmit UP IU (RTT UP IU) to the host 1100. The RTT UP IU can include information about a data range in which the storage device 1200 is capable of receiving data. The host 1100 can transmit a DATA OUT UP IU including write data to the storage device 1200 in response to the RTT UP IU. As the above-described operation is repeatedly performed, the write data can be transmitted from the host 1100 to the storage device 1200.

[0105] After receiving all the write data, the storage device 1200 can transmit a RESPONSE UPIU to the host 1100 in operation S23. The RESPONSE UPIU can include information indicating that the operation corresponding to the write command received in operation S21 is completed.

[0106] In an exemplary embodiment of the inventive concept, the storage device 1200 can perform a normal write operation on the write data received in operation S22. For example, in operation S21, the storage device 1200 can determine whether the turbo write function is enabled. More specifically, the storage device 1200 can determine whether the turbo write function is enabled based on the value of the turbo write enable field (e.g., "fTurboWriteEn") of the flag.

[0107] In the case where the value of the turbo write enable field is "0b", the turbo write function can be in a disabled state. In the case where the value of the turbo write enable field is "1b", the turbo write function can be in an enabled state. In an exemplary embodiment of the inventive concept, the value of the turbo write enable field of the flag can be set by a query request of the host 1100 to set the flag.

[0108] The value of the turbo write enable field can not be set by the host 1100. In this case, the write data received in operation S22 can be written into the turbo write buffer TWB or the user storage UST according to a normal write strategy.

[0109] In operation S30, the host 1100 can set the value of the turbo write enable field to a specific value (e.g., "1b"). For example, the host 1100 can transmit a query request for setting the value of the turbo write enable field to a specific value (e.g., "1b") to the storage device 1200. The value of the turbo write enable field can be set to a specific value (e.g., "1b") in response to the query request from the host 1100, and the storage device 1200 can transmit a query response to the host 1100.

[0110] Thereafter, the host 1100 can perform operations S31 to S33. Operations S31 to S33 can be similar to operations S21 to S23 except that the turbo write is performed according to the turbo write enable field, and thus, additional description will be omitted to avoid redundancy.

[0111] In exemplary embodiments of the inventive concept, the write data received in operation S32 can be written to the turbo write buffer TWB. For example, when the value of the turbo write enable field is set to a certain value (e.g., "1b") in operation S30, the turbo write function can be enabled. In this case, the write data received from the host 1100 can be written to the turbo write buffer TWB. For example, in operation S31, the data received from the host 1100 can be stored in the fixed turbo write buffer TWB-p or the non-fixed turbo write buffer TWB-np according to a certain factor value of the command UPIU. It will be described with reference to FIG. 8 A more detailed description will be given of how the turbo write buffer, which is divided into the fixed turbo write buffer TWB-p and the non-fixed turbo write buffer TWB-np, is configured.

[0112] In exemplary embodiments of the inventive concept, even if the turbo write function is enabled, the storage device 1200 can write the received write data to the user storage part UST in the case where the space of the turbo write buffer TWB is insufficient.

[0113] FIG. 7 is a flowchart illustrating the operation of the storage device of FIG. 1 It will be described with reference to FIG. 7 The flushing operation of the storage device 1200 will be described. With reference to FIG. 1 , FIG. 2 and FIG. 7 In operation S41, the storage device 1200 can determine whether the current state is an idle state, a sleep state, or a running state. When the storage device 1200 is in the running state, a separate flushing operation can not be performed.

[0114] For example, when the storage device 1200 is processing a command received from the host 1100, the storage device 1200 can be in the running state. When there is no command (e.g., a pending command) received from the host 1100 and being processed or to be processed, the storage device 1200 can be in the idle state. When the storage device 1200 enters a low power mode called "sleep" by the activation of the storage device 1200 or the host 1100, the storage device 1200 can be in the sleep state.

[0115] When the storage device 1200 is in the idle state, in operation S42, it can be determined whether the first flush operation is enabled. The host 1100 can allow or prohibit the first flush operation of the storage device 1200 by setting a value of a turbo write buffer flush enable field (e.g., "fTurboWriteBufferFlushEn") of a flag. The storage device 1200 can determine whether the first flush operation is enabled by checking a value of the turbo write buffer flush enable field of the flag.

[0116] In an exemplary embodiment of the inventive concept, when the value of the turbo write buffer flush enable field of the flag is "0b", the first flush operation can be disabled or prohibited. When the value of the turbo write buffer flush enable field of the flag is "1b", the first flush operation can be enabled. In the case where the first flush operation is disabled, the storage device 1200 can not perform a separate flush operation.

[0117] In the case where the first flush operation is enabled, in operation S43, the storage device 1200 can perform the first flush operation during the idle state. The first flush operation can be a flush operation that the storage device 1200 performs in the idle state. The flush operation can be an operation of flushing or migrating user data written to the turbo write buffer TWB to the user storage UST according to an internal policy or an explicit command from the host 1100.

[0118] In an exemplary embodiment of the inventive concept, when the user data written to the turbo write buffer TWB is flushed to the user storage UST, a logical address of the flushed user data can be maintained and a physical address can be changed. In this case, the storage device 1200 can update mapping information of the logical address and the physical address of the flushed user data. For example, the physical address can be changed from an address of the turbo write buffer TWB to an address of the user storage UST.

[0119] When the determination result of operation S41 indicates that the storage device 1200 is in the hibernate state, in operation S44, the storage device 1200 can determine whether the second flush operation is enabled. As in the above description, for example, the host 1100 can allow or prohibit the second flush operation of the storage device 1200 by setting a value of a turbo write buffer flush enable field (e.g., "fTurboWriteBufferFlushDuringHibernate") of a flag during hibernation.

[0120] The storage device 1200 can determine whether the second flush operation is enabled by checking the value of the turbo write buffer flush enable field during the sleep period of the flag. In an exemplary embodiment of the inventive concept, when the value of the turbo write buffer flush enable field during the sleep period of the flag is "0b", the second flush operation can be disabled or prohibited. When the value of the turbo write buffer flush enable field during the sleep period of the flag is "1b", the second flush operation can be enabled. In the case where the second flush operation is disabled, the storage device 1200 can not perform a separate flush operation.

[0121] In the case where the second flush operation is enabled, the storage device 1200 can perform the second flush operation during the sleep state in operation S45. The second flush operation can indicate a flush operation performed by the storage device 1200 in the sleep state.

[0122] According to the above flush operations, user data written to the turbo write buffer TWB can be flushed or migrated to the user storage UST. In this way, the available buffer size of the turbo write buffer TWB can be ensured.

[0123] In an exemplary embodiment of the inventive concept, the above flush operations can be suspended under certain conditions. For example, the first flush operation performed in the idle state can be performed only in a state where the command queue of the storage device 1200 is empty. While the first flush operation is being performed, in the case where a command is issued from the host 1100, the storage device 1200 can suspend the first flush operation being performed, and can first process the command issued from the host 1100. In an exemplary embodiment of the inventive concept, in the case where the sleep mode is terminated, the second flush operation performed in the sleep state can be stopped.

[0124] As described above, the flush operation being performed can be suspended according to certain conditions. In this case, the storage device 1200 can set the suspension information (or information on the degree of progress) or the current state of the flush operation in the turbo write buffer flush status field (for example, "bTurboWriteBufferFlushStatus") of the attribute.

[0125] In an exemplary embodiment of the inventive concept, the storage device 1200 can set information indicating that a flush operation of the turbo write buffer TWB is required to a specific value (e.g., bit [5]) of an exception event status (e.g., "dExceptionEventStatus") of an attribute. The host 1100 can check the specific value (e.g., bit [5]) of the exception event status of the attribute, can determine that the flush operation is required at the storage device 1200, and can set specific fields (e.g., "fTurboWriteBufferFlushEn" and "fTurboWriteBufferFlushDuringHibernate") of a flag of the storage device 1200 in accordance with a policy.

[0126] Although reference will be made to FIG. 7 The flush operation will be described as being performed by the storage device 1200 based on a value of the flush enable field (i.e., a value of the turbo write buffer flush enable field or a value of the turbo write buffer flush enable field during hibernation), but the inventive concept is not limited thereto. In an exemplary embodiment, the storage device 1200 performs the flush or migration operation in accordance with an internal policy regardless of the value of the flush enable field (i.e., the value of the turbo write buffer flush enable field or the value of the turbo write buffer flush enable field during hibernation). In this case, the storage device 1200 can perform the flush or migration operation in accordance with a result of a determination made by the storage device 1200 automatically (without external intervention, or in accordance with its own determination).

[0127] FIG. 8 is a block diagram illustrating FIG. 1 a physical storage space of the storage device 1200. Referring to FIG. 1 and FIG. 8 , the physical storage space PS of the storage device 1200 can include the turbo write buffer TWB and the user storage UST. The physical storage space PS, the turbo write buffer TWB, and the user storage UST of the storage device 1200 are described above, and thus additional description can be omitted to avoid redundancy.

[0128] The turbo write buffer TWB can be divided into a fixed turbo write buffer TWB-p and a non-fixed turbo write buffer TWB-np. As in the above description, in a case in which the turbo write function of the storage device 1200 is enabled, write data can be stored in one of the fixed turbo write buffer TWB-p and the non-fixed turbo write buffer TWB-np.

[0129] In one embodiment, data stored in the fixed turbo write buffer TWB-p is not targeted for movement (e.g., migration or flushing) to the user storage UST, and data stored in the non-fixed turbo write buffer TWB-np can be targeted for movement to the user storage UST. That is, the priority of data stored in the fixed turbo write buffer TWB-p can be higher than the priority of data stored in the non-fixed turbo write buffer TWB-np. However, the inventive concept is not limited thereto, as data stored in the fixed turbo write buffer TWB-p can be targeted for movement to the non-fixed turbo write buffer TWB-np or the user storage UST according to the policy or resources of the system. In an exemplary embodiment, the migration or flushing operation is performed periodically to move data from the turbo write buffer TWB to the user storage UST. In this embodiment, all data present in the non-fixed turbo write buffer TWB-np is first migrated or flushed to the user storage UST before any data of the fixed turbo write buffer TWB-p is migrated or flushed to the user storage UST. In another embodiment, during a given migration, first data in the non-fixed turbo write buffer TWB-np is migrated to the user storage UST during a first time period of the migration, and second data in the fixed turbo write buffer TWB-p is migrated to the user storage UST during a second time period after the first time period.

[0130] One of the fixed turbo write buffer TWB-p and the non-fixed turbo write buffer TWB-np in which to store the write data can be determined by various schemes (e.g., an internal policy, a change in the internal policy according to a request of the host, and an explicit request of the host).

[0131] As described above, in an exemplary embodiment of the inventive concept, the size of the turbo write buffer TWB can be determined under the control of the host 1100 or according to an internal policy of the storage device 1200. In this case, the ratio of the fixed turbo write buffer TWB-p and the non-fixed turbo write buffer TWB-np in the turbo write buffer TWB can be determined or changed by various schemes (e.g., an internal policy, a change in the internal policy according to a request of the host, and an explicit request of the host).

[0132] In exemplary embodiments of the inventive concept, user data can be flushed, migrated, or moved between the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, and the user storage UST. For example, user data can be migrated or moved between the fixed turbo write buffer TWB-p and the non-fixed turbo write buffer TWB-np according to an explicit request of the host 1100, an internal policy of the storage device 1200, or a change in the internal policy of the host 1100's request.

[0133] Optionally, user data can be migrated or moved between the non-fixed turbo write buffer TWB-np and the user storage UST according to an explicit request of the host 1100, an internal policy of the storage device 1200, or a change in the internal policy of the host 1100's request. For example, user data can be flushed from the non-fixed turbo write buffer TWB-np to the user storage UST. Optionally, user data can be migrated or moved between the fixed turbo write buffer TWB-p and the user storage UST according to an explicit request of the host 1100, an internal policy of the storage device 1200, or a change in the internal policy of the host 1100's request.

[0134] In exemplary embodiments of the inventive concept, as described with reference to FIG. 7 the storage device 1200 can perform a flush operation during an idle state or a hibernate state. In this case, the storage device 1200 can perform a flush operation on the non-fixed turbo write buffer TWB-np of the turbo write buffer TWB. In other words, the storage device 1200 can flush user data stored in the non-fixed turbo write buffer TWB-np of the turbo write buffer TWB to the user storage UST.

[0135] In this case, user data written to the fixed turbo write buffer TWB-p can not be flushed to the user storage UST. In other words, even though the storage device 1200 performs a flush operation, user data written to the fixed turbo write buffer TWB-p can be maintained.

[0136] As another example, data to be stored in the non-fixed turbo write buffer TWB-np can be written to the fixed turbo write buffer TWB-p according to an internal policy of the storage device 1200. The data can be flushed from the fixed turbo write buffer TWB-p to the user storage UST. In other words, data stored in the fixed turbo write buffer TWB-p can not be flushed by an explicit flush request from the host 1100, but can be selectively flushed to the user storage UST according to an internal flush policy of the storage device 1200.

[0137] In an exemplary embodiment of the inventive concept, in a case where data is flushed, migrated, or moved between the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, and the user storage UST, the controller 1210 can be configured to update a mapping relationship of the moved data. For example, in a case where data corresponding to a first logical block address is flushed or migrated from the fixed turbo write buffer TWB-p to the user storage UST, the controller 1210 can release a mapping relationship of the first logical block address and a physical address of the fixed turbo write buffer TWB-p, and can update a mapping relationship of the first logical block address and a physical address of the user storage UST. The release or update of the mapping relationship can be performed in a scheme similar to the above-described scheme to move between other areas, and thus, additional description will be omitted to avoid redundancy.

[0138] Hereinafter, in order to more clearly explain the inventive concept, a description will be given under the assumption that data to be stored in the fixed turbo write buffer TWB-p needs to be stored in the fixed turbo write buffer TWB-p. However, the inventive concept is not limited thereto.

[0139] Accordingly, in a case where the host 1100 issues a read command for first user data written in the fixed turbo write buffer TWB-p, the first user data can be read from the fixed turbo write buffer TWB-p. In this case, the first user data can be read at a high speed.

[0140] For example, as described above, the fixed turbo write buffer TWB-p can store user data based on an SLC scheme, and the user storage UST can store user data in a TLC scheme. A time taken to read user data stored based on the SLC scheme is shorter than a time taken to read user data stored based on the TLC scheme.

[0141] In other words, because specific user data is reserved in the fixed turbo write buffer TWB-p, a speed of reading the specific user data can be improved. This function of the storage device 1200 can be referred to as "turbo read".

[0142] In an exemplary embodiment of the inventive concept, the physical storage space PS of the storage device 1200 can indicate a storage space of the non-volatile memory device 1220. In other words, the non-volatile memory device 1220 can include the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, or the user storage UST.

[0143] FIG. 9 is a view showing a reference FIG. 8A diagram of logical storage spaces of the physical storage space PS of the storage device 1200 is described. For ease of description, embodiments will be described with reference to one logical unit. FIG. 9 However, the inventive concept can be equally applied to two or more logical units corresponding to the turbo write buffer TWB, or a relationship between a logical unit and a shared turbo write buffer (e.g., TWB0).

[0144] Referring to FIG. 1 and FIG. 9 The logical storage space LS of the storage device 1200 identified by the host 1100 can include a user storage portion UST and a turbo write buffer TWB. The turbo write buffer TWB can include a fixed turbo write buffer TWB-p and a non-fixed turbo write buffer TWB-np.

[0145] A first logical block address range (e.g., LBA0 to LBAa, LBAb+1 to LBAc, and LBAe+1 to LBAn) can correspond to a logical storage space of the user storage portion UST. In this case, user data stored in the first logical block address range (e.g., LBA0 to LBAa, LBAb+1 to LBAc, and LBAe+1 to LBAn) can be stored in the physical storage space of the user storage portion UST.

[0146] A second logical block address range (e.g., LBAa+1 to LBAb and LBAd+1 to LBAe) can correspond to a logical storage space of the non-fixed turbo write buffer TWB-np. In this case, user data stored in the second logical block address range (e.g., LBAa+1 to LBAb and LBAd+1 to LBAe) can be stored in the physical storage space of the non-fixed turbo write buffer TWB-np.

[0147] A third logical block address range (e.g., LBAc+1 to LBAd) can correspond to a logical storage space of the fixed turbo write buffer TWB-p. In this case, user data stored in the third logical block address range (e.g., LBAc+1 to LBAd) can be stored in the physical storage space of the fixed turbo write buffer TWB-p.

[0148] As described above, the user storage UST, the non-fixed turbo write buffer TWB-np, and the fixed turbo write buffer TWB-p can be distributed in various forms on the logical storage space LS recognized by the host 1100. However, the inventive concept is not limited thereto, and a third logical block address range can correspond to the logical storage space of the non-fixed turbo write buffer TWB-np, and a second logical block address range can correspond to the logical storage space of the fixed turbo write buffer TWB-p. In an exemplary embodiment of the inventive concept, user data can be moved / flushed / migrated between the user storage UST, the non-fixed turbo write buffer TWB-np, and the fixed turbo write buffer TWB-p according to an explicit request of the host 1100 or an internal policy of the storage device 1200.

[0149] For example, the host 1100 can designate one of the fixed turbo write buffer TWB-p and the non-fixed turbo write buffer TWB-np at the time of turbo write. As another example, the host 1100 can designate one of the fixed turbo write buffer TWB-p and the non-fixed turbo write buffer TWB-np as a turbo write target before turbo write. As another example, the host 1100 can not designate the fixed turbo write buffer TWB-p or the non-fixed turbo write buffer TWB-np at the time of turbo write.

[0150] The host 1100 can check the distribution state of data changed by the storage device 1200 by periodically or as necessary (e.g., using a query UPIU) requesting information of the fixed turbo write buffer TWB-p and the non-fixed turbo write buffer TWB-np.

[0151] FIG. 10A and FIG. 10B is a diagram illustrating an operation in the physical storage space of the storage device described with reference to FIG. 8 For the sake of brief explanation and ease of description, it is assumed that the fixed turbo write buffer TWB-p includes a first memory block BLK1, the non-fixed turbo write buffer TWB-np includes a second memory block BLK2, and the user storage UST can include a third memory block BLK3. However, the inventive concept is not limited thereto.

[0152] With reference to FIG. 1 , FIG. 8 and FIG. 10A, the storage device 1200 can receive first data DT1 corresponding to a first logical block address LBA1 from the host 1100. In an exemplary embodiment of the inventive concept, the turbo write function of the storage device 1200 can be in an enabled state. In this case, the storage device 1200 can write the received first data DT1 to the turbo write buffer TWB (e.g., a non-persistent turbo write buffer TWB-np).

[0153] In other words, the storage device 1200 can perform turbo write on the first data DT1. In an exemplary embodiment of the inventive concept, whether data is stored in any one of the persistent turbo write buffer TWB-p and the non-persistent turbo write buffer TWB-np can be determined by various schemes in the case where the turbo write function is enabled.

[0154] In an exemplary embodiment of the inventive concept, as shown in FIG. 10A , the persistent turbo write buffer TWB-p and the non-persistent turbo write buffer TWB-np can be filled with user data DTa, DTb, DT0, and DT1. In this case, the storage device 1200 can notify the host 1100 of the need for a flush operation by setting a specific bit (e.g., bit [5]) of the exception event status field (e.g., "wExceptionEventStatus") of the attribute.

[0155] The host 1100 can check the exception event status field of the attribute by a query request, and can check that the storage device 1200 needs a flush operation. The host 1100 can allow the flush operation of the storage device 1200 by setting the turbo write buffer flush enable field of the flag of the storage device 1200 or the turbo write buffer flush enable field during hibernation as described with reference to FIG. 7 .

[0156] When the flushing function is allowed (or enabled) under the control of the host 1100, the storage device 1200 can perform a flushing operation. For example, in an idle state or a sleep state, the storage device 1200 can flush the user data DT0 and DT1 stored in the non-persistent turbo write buffer TWB-np to the third memory block BLK3 of the user storage UST. In the example embodiment of the inventive concept, even though the flushing operation is allowed under the control of the host 1100, the user data DTa and DTb stored in the persistent turbo write buffer TWB-p can not be flushed to the user storage UST. In other words, the user data DTa and DTb stored in the persistent turbo write buffer TWB-p are preserved, while the user data DT0 and DT1 stored in the non-persistent turbo write buffer TWB-np are flushed.

[0157] After that, the storage device 1200 can receive a read command for the first logical address LBA1 from the host 1100. In this case, the storage device 1200 can read the first data DT1 stored in the third memory block BLK3 of the user storage UST, and can output the read first data DT1 to the host 1100.

[0158] In the example embodiment of the inventive concept, because the first data DT1 is written in the non-persistent turbo write buffer TWB-np (e.g., programmed in the non-persistent turbo write buffer TWB-np as SLC), but is flushed to the user storage UST due to the flushing operation, the first data DT1 can be read by a normal read operation (e.g., a TLC read operation). In other words, the first data DT1 can be programmed as SLC but read as TLC.

[0159] Referring to FIG. 1 , FIG. 8 and FIG. 10B , the 0th data DT0 and the first data DT1 can be stored in the second memory block BLK2 of the non-persistent turbo write buffer TWB-np, and the a-th data DTa can be stored in the third memory block BLK3 of the user storage UST.

[0160] Thereafter, the a-th data DTa of the user storage space UST can be moved to the first memory block BLK1 of the fixed turbo write buffer TWB-p according to an explicit request of the host 1100 or an internal policy of the storage device 1200. For example, the storage device 1200 can read the a-th data DTa from the third memory block BLK3 of the user storage UST and can store the read a-th data DTa in the first memory block BLK1 of the fixed turbo write buffer TWB-p. Thereafter, the a-th data DTa stored in the third memory block BLK3 of the user storage UST can be invalidated, deleted, or de-mapped. In an exemplary embodiment of the inventive concept, even though the a-th data DTa is invalidated, deleted, or de-mapped, the a-th logical block address LBAa corresponding to the a-th data DTa can remain mapped to the first memory block BLK1 of the fixed turbo write buffer TWB-p.

[0161] Thereafter, the storage device 1200 can receive a read command for the a-th logical block address LBAa corresponding to the a-th data DTa from the host 1100. In this case, the storage device 1200 can read the a-th data DTa stored in the first memory block BLK1 of the fixed turbo write buffer TWB-p and can transfer the read a-th data DTa to the host 1100.

[0162] In an exemplary embodiment of the inventive concept, an operation of reading the a-th data DTa stored in the first memory block BLK1 of the fixed turbo write buffer TWB-p can be faster than an operation of reading data stored in the third memory block BLK3 of the user storage UST. In other words, the storage device 1200 according to an exemplary embodiment of the inventive concept can support a fast read operation (e.g., a turbo read operation) with respect to specific data by storing and retaining the specific data in the turbo write buffer TWB (or the fixed turbo write buffer TWB-p).

[0163] In an exemplary embodiment of the inventive concept, the storage device 1200 can notify the host 1100 of the remaining (or free) capacity of the turbo write buffer TWB in response to a request of the host 1100. The storage device 1200 can write information about the remaining free capacity of the turbo write buffer TWB to an available turbo write buffer size field (e.g., "dAvailableTurboWriteBufferSize") of an attribute. The host 1100 can obtain capacity information of the turbo write buffer TWB by reading the available turbo write buffer size field (e.g., by using a query UPIU).

[0164] For example, the storage device 1200 can separately record the remaining capacity of the fixed turbo write buffer TWB-p and the remaining capacity of the non-fixed turbo write buffer TWB-np at the available turbo write buffer size field. As another example, the storage device 1200 can record the sum of the remaining capacities of the turbo write buffers TWB at the available turbo write buffer size field. Whether the storage device 1200 records the remaining capacities of the turbo write buffers TWB integrally or separately can be designated by a flag setting of the host 1100.

[0165] For example, the storage device 1200 can record a capacity smaller than the actual free capacity of the turbo write buffer TWB at the available turbo write buffer size field. In a nonvolatile memory device 1220 such as a flash memory, the reliability of data can be reduced in a case where the time between successive erase operations is less than a threshold time.

[0166] Because the capacity of the turbo write buffer TWB is smaller than the capacity of the user storage UST and the turbo write buffer TWB is used in an SLC scheme, the turbo write buffer TWB can be filled with data faster than the user storage UST. Further, in a case where the host 1100 prefers turbo writing at high speed, the turbo write buffer TWB can be filled with data faster.

[0167] In a case where data is intensively written to the turbo write buffer TWB during a short time window, the following series of operations is performed: performing a first erase operation on the turbo write buffer TWB, writing data to the turbo write buffer TWB, flushing the data of the turbo write buffer TWB, performing a second erase operation on the turbo write buffer TWB, and writing data to the turbo write buffer TWB.

[0168] In this case, when the time between the first erase operation and the second erase operation is less than a threshold time, the reliability of the data written to the turbo write buffer TWB after the second erase operation can be reduced. To improve the reliability, when the time elapsed after a previous erase operation of a particular memory block is less than a threshold time, even if the particular memory block of the turbo write buffer TWB does not store valid data after the erase operation and is reusable, the storage device 1200 can record a capacity excluding the capacity of the particular memory block at the available turbo write buffer size field.

[0169] FIG. 11 is a flowchart illustrating the operation of the storage system of FIG. 1 . Referring to FIG. 1 , FIG. 8 andFIG. 11 In operation S111, the host 1100 can determine zone information. For example, the host 1100 can manage attributes or flow information about write data to be written to the storage device 1200. In a case where it is determined from the managed attributes or flow information that a high-speed operation of write data is not needed (e.g., a normal read is appropriate), the host 1100 can determine zone information ARI so that the write data is written to the user storage UST. Alternatively, when a high-speed operation of write data is needed (e.g., when a turbo read is necessary or more appropriate), the host 1100 can determine zone information ARI so that the write data is stored in the fixed turbo write buffer TWB-p or the non-fixed turbo write buffer TWB-np.

[0170] In an exemplary embodiment of the inventive concept, when a continuous high-speed operation is needed for write data, the host 1100 can determine zone information ARI so that the write data is stored in the fixed turbo write buffer TWB-p. When a temporary high-speed operation is needed for write data, the host 1100 can set zone information ARI so that the write data is stored in the non-fixed turbo write buffer TWB-np. The reason is that, as described above, data stored in the non-fixed turbo write buffer TWB-np is flushed to the user storage UST by an explicit flush request from the host 1100, and data stored in the fixed turbo write buffer TWB-p is not flushed to the user storage UST by an explicit flush request from the host 1100. In other words, data stored in the fixed turbo write buffer TWB-p can remain in the turbo write buffer TWB for a longer time than data stored in the non-fixed turbo write buffer TWB-np.

[0171] In operation S112, the host 1100 can transmit a first command UPIU (hereinafter, referred to as "CMD UPIU") to the storage device 1200. The first CMD UPIU can include a write command WR CMD (or a write command descriptor block). The write command WR CMD can include information about a first logical block address LBA1 and zone information ARI.

[0172] In operation S113, the storage device 1200 may determine a first region corresponding to the region information ARI in response to the received first CMD UPIU. For example, if the host 1100 sets the region information ARI to store write data in the fixed turbo write buffer TWB-p or the non-fixed turbo write buffer TWB-np, the storage device 1200 may determine the storage space of the fixed turbo write buffer TWB-p or the non-fixed turbo write buffer TWB-np as the first region corresponding to the region information ARI. If the host 1100 sets the region information ARI to store write data in the user storage unit UST, the storage device 1200 may determine the storage space of the user storage unit UST as the first region corresponding to the region information ARI.

[0173] In an exemplary embodiment of the inventive concept, when the host 1100 sets the area information ARI to store write data in the user storage unit UST, the first CMD UPIU transmitted in operation S112 may not include information about the area information ARI. In this case, the storage device 1200 may determine the storage space of the user storage unit UST as the first area, or may set another storage space as the first area according to an internal policy.

[0174] In operation S114, the host 1100 and the storage device 1200 may perform a write data transaction, and the storage device 1200 may perform a programming operation for storing the received write data in the first area. For example, the storage device 1200 may transmit a Ready to Transfer UPIU (RTT UPIU) to the host 1100, and the host 1100 may transmit a DATA OUT UPIU including the write data to the storage device 1200 in response to the RTT UPIU. The storage device 1200 may store the received write data in the first area corresponding to the area information ARI. In this case, the write data may be data corresponding to the first logical block address LBA1. The storage device 1200 may manage a mapping relationship between the first logical block address LBA1 and the physical address of the first area corresponding to the area information ARI.

[0175] When the write data transaction and the program operation are completed, in operation S115, the memory device 1200 may transmit a RESPONSE UPIU to the host 1100. The RESPONSE UPIU transmitted in operation S115 may be a response to the first CMD UPIU.

[0176] In operation S121, the host 1100 can transfer a second CMD UPIU including a read command RD_CMD (or a read command descriptor block) to the storage device 1200. In this case, the read command RD_CMD can include information about the first logical block address LBA1.

[0177] In operation S122, the storage device 1200 can perform a read operation on the first area to read data corresponding to the first logical block address LBA1. For example, through operations S111 to S115, the data corresponding to the first logical block address LBA1 can be stored in the first area corresponding to the area information ARI. For example, in the case where the first area corresponding to the area information ARI is the fixed turbo write buffer TWB-p or the non-fixed turbo write buffer TWB-np, the storage device 1200 can read the data corresponding to the first logical block address LBA1 by performing a turbo read operation on the first area. In the case where the first area corresponding to the area information ARI is the user storage UST, the storage device 1200 can read the data corresponding to the first logical block address LBA1 by performing a normal read operation on the first area.

[0178] In operation S123, the storage device 1200 can transfer the read data to the host 1100. For example, the storage device 1200 can transfer at least one DATA IN UPIU including the read data to the host 1100. In other words, the storage device 1200 can transfer a plurality of DATA IN UPIUs to the host 1100.

[0179] After the read data is completely transferred to the host 1100, in operation S124, the storage device 1200 can transfer a RESPONSE UPIU to the host 1100. The RESPONSE UPIU transferred in operation S124 can be a response to the second CMD UPIU.

[0180] FIG. 12A to FIG. 12C is a diagram for describing a write operation according to the flowchart of FIG. 11 For convenience of description, it is assumed that the fixed turbo write buffer TWB-p includes a first memory block BLK1, the non-fixed turbo write buffer TWB-np includes a second memory block BLK2, and the user storage UST includes a third memory block BLK3, as described with reference to FIG. 10A and FIG. 10B However, the inventive concept is not limited thereto.

[0181] Further, for convenience of description, the term "write command UPIU" is described. The write command UPIU can mean a CMD UPIU including a write command descriptor block, but the inventive concept is not limited thereto.

[0182] Referring to FIG. 1 , FIG. 8 and FIG. 12A , the storage 1200 can receive a write command UPIU WR CMD UPIU including a first logical block address LBA1 and first area information ARI1 from the host 1100. The first area information ARI1 can be information corresponding to a fixed turbo write buffer TWB-p of the storage 1200.

[0183] As such, the storage 1200 can receive first data DT1 corresponding to the first logical block address LBA1 from the host 1100, and can store the received first data DT1 in a first memory block BLK1 of the fixed turbo write buffer TWB-p corresponding to the first area information ARI1. In this case, as shown in FIG. 12A , the storage 1200 can map the first logical block address LBA1 onto a storage space of the fixed turbo write buffer TWB-p.

[0184] Referring to FIG. 1 , FIG. 8 and FIG. 12B , the storage 1200 can receive a write command UPIU WR CMD UPIU including a second logical block address LBA2 and second area information ARI2 from the host 1100. The second area information ARI2 can be information corresponding to a non-fixed turbo write buffer TWB-np of the storage 1200.

[0185] As such, the storage 1200 can receive second data DT2 corresponding to the second logical block address LBA2 from the host 1100, and can store the received second data DT2 in a second memory block BLK2 of the non-fixed turbo write buffer TWB-np corresponding to the second area information ARI2. In this case, as shown in FIG. 12B , the storage 1200 can map the second logical block address LBA2 onto a storage space of the non-fixed turbo write buffer TWB-np.

[0186] Referring to FIG. 1 , FIG. 8 and FIG. 12CThe storage device 1200 can receive a write command UPIU WR CMD UPIU including a third logical block address LBA3 and third area information ARI3 from the host 1100. The third area information ARI3 can be information corresponding to the user storage portion UST of the storage device 1200.

[0187] In this way, the storage device 1200 can receive third data DT3 corresponding to the third logical block address LBA3 from the host 1100, and can store the received third data DT3 in the third memory block BLK3 of the user storage portion UST corresponding to the third area information ARI3. In this case, as shown in FIG. 17, the storage device 1200 can map the third logical block address LBA3 onto the storage space of the user storage portion UST. FIG. 12C

[0188] In the exemplary embodiment of the inventive concept, a write command UPIU WR CMD UPIU including a third logical block address LBA3 and not including specific area information ARI can be received. In this case, as described above, third data DT3 corresponding to the third logical block address LBA3 can be stored in the third memory block BLK3 of the user storage portion UST.

[0189] In the exemplary embodiment of the inventive concept, in response to a read command UPIU from the storage device 1200, the storage device 1200 can perform a read operation (e.g., a turbo read operation or a normal read operation) on an area corresponding to a logical block address included in the read command UPIU.

[0190] For example, in the case where the storage device 1200 receives a read command UPIU including the first logical block address LBA1 or the second logical block address LBA2 from the host 1100, the storage device 1200 can read the first data DT1 from the fixed turbo write buffer TWB-p or the second data DT2 from the non-fixed turbo write buffer TWB-np based on the managed mapping information. In this case, because the storage device 1200 performs a turbo read operation, a fast operation speed can be ensured.

[0191] Alternatively, in the case where the storage device 1200 receives a read command UPIU including the third logical block address LBA3 from the host 1100, the storage device 1200 can read the third data DT3 from the user storage portion UST based on the managed mapping information. In this case, because the storage device 1200 performs a normal read operation, the operation speed can be relatively slow compared to the above-described turbo read operation.

[0192] ​As described above, the host 1100 of the storage system 1000 according to the exemplary embodiments of the inventive concept can determine a region (e.g., a fixed turbo write buffer TWB-p, a non-fixed turbo write buffer TWB-np, and a user storage UST) to which write data is to be written, and can set region information ARI based on the determined region. The region information ARI can be included in a write command UPIU to be provided to the storage device 1200. The storage device 1200 can write the write data to a region corresponding to the region information ARI, and can manage a mapping relationship between a logical block address of the write data and a physical address of the region corresponding to the region information ARI.

[0193] FIG. 13A and FIG. 13B are diagrams for describing a method of setting region information in a write command UPIU. The exemplary data structure of the write command UPIU will be described with reference to FIG. 13A and FIG. 13B , but the inventive concept is not limited thereto. In the exemplary embodiments of the inventive concept, FIG. 13A and FIG. 13B , the data structures shown in

[0194] With reference to FIG. 1 , FIG. 13A and FIG. 13B , the host 1100 can transmit the CMD UPIU shown in FIG. 13A to the storage device 1200. The CMD UPIU can include the following fields: a transfer type, a flag, a LUN (logical unit number), a task tag, an IID / CST (initiator device identifier / command set type), an EHS (error history source) length, a data segment length, an expected data transfer length, a command descriptor block (CDB), a header, a reserved, etc.

[0195] In an exemplary embodiment of the inventive concept, region information ARI determined by the host 1100 may be set in the "Flag" field of the CMD UPIU. In other words, specific values ​​of the "Flag" field may correspond to the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, and the user storage unit UST of the storage device 1200, respectively. In other words, a first value of the "Flag" field may indicate that the region set by the host 1100 is the fixed turbo write buffer TWB-p; a second value of the "Flag" field may indicate that the region set by the host 1100 is the non-fixed turbo write buffer TWB-np; and a third value of the "Flag" field may indicate that the region set by the host 1100 is the user storage unit UST, but the inventive concept is not limited thereto.

[0196] In the exemplary embodiments of the inventive concept, in addition to referring to FIG. 8 In addition to the fixed turbo write buffer TWB-p, non-fixed turbo write buffer TWB-np, and user storage unit UST described above, the storage device 1200 may also include any other areas. For example, the storage device 1200 may include multiple turbo write buffers TWB. The multiple turbo write buffers TWB may differ from each other in terms of operating speed, number of bits per unit, reliability, compression rate, etc. Each or at least one of the multiple turbo write buffers TWB may include a fixed turbo write buffer TWB-p and a non-fixed turbo write buffer TWB-np. Therefore, the type and number of values ​​to be set in the "Flag" field of the CMD UPIU to set the area information ARI may vary depending on the scheme used to implement the various areas included in the storage device 1200.

[0197] In an exemplary embodiment of the inventive concept, the region information ARI may be included in a specific field of the command descriptor block CDB. FIG. 13B As shown in FIG, the first command descriptor block CDB1 may be associated with a write command WRITE(10) COMMAND. The first command descriptor block CDB1 may include the following fields: Operation Code, WRPROTECT (Write Protect), DPO (Disable Page Out), FUA (Force Unit Access), FUA_NV (Force Unit Access), Void, Logical Block Address, Group Number, Transfer Length, Control, Reserved. The value of the "Operation Code" field of the first command descriptor block CDB1 as a write command may be "2Ah".

[0198] The area information ARI determined by the host 1100 can be included in the "group number" field. For example, the "group number" field can include a context identifier Context ID for writing data. The area to which the data is to be stored (e.g., one of the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, and the user storage UST) can be determined based on the context identifier Context ID set at the "group number" field.

[0199] For example, data corresponding to a first context identifier can be stored at the fixed turbo write buffer TWB-p, data corresponding to a second context identifier can be stored at the non-fixed turbo write buffer TWB-np, and data corresponding to a third context identifier can be stored at the user storage UST. The host 1100 can determine the context identifier based on the area information ARI, and can set the determined context identifier at the "group number" field.

[0200] In an exemplary embodiment of the inventive concept, the number of context identifiers that can be set at the "group number" field can be greater than the number of divided areas of the storage device 1200. In other words, a plurality of first context identifiers can correspond to the fixed turbo write buffer TWB-p, a plurality of second context identifiers can correspond to the non-fixed turbo write buffer TWB-np, and a plurality of third context identifiers can correspond to the user storage UST.

[0201] As described above, the host 1100 of the storage system 1000 according to an exemplary embodiment of the inventive concept can determine an area to which write data is to be stored, and can set area information ARI about the determined area. In this case, the area information ARI can be included in the "flag" field of the CMD UPIU, or can be set as a context identifier at the "group number" field of the write command descriptor block.

[0202] FIG. 14 is a flowchart illustrating operations of the storage device of FIG. 1 In the embodiment described with reference to FIG. 11 to FIG. 13B When the write command UPIU from the host 1100 includes the area information ARI, the storage device 1200 can store write data in an area (e.g., TWB-p, TWB-np, or UST) corresponding to the area information ARI regardless of whether the turbo write function (or turbo write buffer function) is enabled. However, the inventive concept is not limited thereto. For example, the storage device 1200 can be configured to perform the operations described with reference to FIG. 11 to FIG. 13B only when the turbo write function is enabled.

[0203] For example, with reference toFIG. 1 and FIG. 14 In operation S210, the storage device 1200 can receive a CMD UP IU from the host 1100. For example, the CMD UP IU can include a write command WR CMD including a first logical block address LBA1 and area information ARI.

[0204] In operation S220, the storage device 1200 can determine whether a turbo write function is enabled. Referring to FIG. 6 How to enable the turbo write function is described, and thus additional description will be omitted to avoid redundancy.

[0205] When it is determined that the turbo write function is not enabled, in operation S230, the storage device 1200 selects the user storage part UST as an area in which data received from the host 1100 is to be stored. When it is determined that the turbo write function is enabled, in operation S240, the storage device 1200 selects an area corresponding to the area information ARI as an area in which data received from the host 1100 is to be stored.

[0206] In operation S250, the storage device 1200 can receive data corresponding to the first logical block address LBA1 from the host 1100, and can perform a program operation for storing the received data in the selected area.

[0207] In other words, when the turbo write function is not enabled, regardless of the area information ARI, the storage device 1200 can store write data received from the host 1100 in the user storage part UST. When the turbo write function is enabled, the storage device 1200 can store write data in an area corresponding to the area information ARI. However, the inventive concept is not limited thereto. For example, as described above, the storage device 1200 can store write data based on the area information ARI regardless of whether the turbo write function is enabled.

[0208] Further, in a case where a CMD UP IU received from the host 1100 does not include area information ARI and a turbo write function of the storage device 1200 is enabled, the storage device 1200 can preferentially write write data received from the host 1100 to a non-fixed turbo write buffer TWB-np. In this case, the storage device 1200 can manage and maintain a mapping relationship of logical block addresses of stored write data and physical addresses of the non-fixed turbo write buffer TWB-np.

[0209] FIG. 15 is a flowchart illustrating an operation of the storage system of FIG. 1 Referring to FIG. 1 , FIG. 8 and FIG. 15In operation S311, the host 1100 can determine a logical block address range. For example, the host 1100 can determine a portion of the entire logical block address range for managing a storage space of the storage device 1200 to be allocated to the fixed turbo write buffer TWB-p or the non-fixed turbo write buffer TWB-np.

[0210] For example, in the above embodiment, in a case where write data is written, the host 1100 can determine whether a logical block address corresponding to the write data is associated with any zone. In contrast, in the embodiment of the present inventive concept, the host 1100 can determine a logical block address range to be used for the fixed turbo write buffer TWB-p or the non-fixed turbo write buffer TWB-np in advance. In an exemplary embodiment of the present inventive concept, the host 1100 can set a logical block address range to be used for the user storage UST. FIG. 14

[0211] In operation S312, the host 1100 can transfer a first CMD UP IU to the storage device 1200. The first CMD UP IU can include a logical block address range LBA_rg and range zone information ARI_rg corresponding to the logical block address range LBA_rg. The logical block address range LBA_rg can be a partial range of the entire logical block address range determined by the host 1100 to be used as a specific zone (e.g., one of the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, and the user storage UST). The range zone information ARI_rg can be information about the specific zone defined by the logical block address range LBA_rg.

[0212] For example, the first CMD UP IU can have a data structure or a data format shown in FIG. 13A and FIG. 13B In this case, the range zone information ARI_rg can be included in a "flag" field of the CMD UP IU of FIG. 13A or a "group number" field of the first command descriptor block CDB1 of FIG. 13B This is similar to the zone information ARI described with reference to FIG. 13A and FIG. 13B Therefore, additional description will be omitted to avoid redundancy.

[0213] In an exemplary embodiment of the present inventive concept, the logical block address range LBA_rg can be set through a "logical address" field and a "transfer length" field of FIG. 13B For example, a start logical block address of the logical block address range LBA_rg can be set in the "logical address" field of the first command descriptor block CDB1 of FIG. 13B ​At the "logical address" field of the write command UPIU, the size (e.g., range size) of the logical block address range LBA_rg can be set at the "transfer length" field. In other words, the storage device 1200 can identify the logical block address range LBA_rg based on the "logical address" field and the "transfer length" field.

[0214] As described above, the configuration of transmitting the logical block address range LBA_rg and the range area information ARI_rg to the storage device 1200 by using the write command UPIU is an exemplary embodiment of the inventive concept, and the inventive concept is not limited thereto.

[0215] In operation S313, the storage device 1200 can allocate the area corresponding to the logical block address range LBA_rg to the first area corresponding to the range area information ARI_rg in response to the CMD UPIU received from the host 1100. For example, in the case where the range area information ARI_rg indicates the fixed turbo write buffer TWB-p, the storage device 1200 can map the logical block address range LBA_rg onto the storage space of the fixed turbo write buffer TWB-p.

[0216] In operation S315, the storage device 1200 can transmit the RESPONSE UPIU to the host 1100. The RESPONSE UPIU transmitted in operation S315 can be a response to the first CMD UPIU.

[0217] In an exemplary embodiment of the inventive concept, even if the first CMD UPIU includes the write command WR CMD or the write command descriptor block, the data transaction between the host 1100 and the storage device 1200 can be omitted. The reason is that the first CMD UPIU is used to allocate the logical block address range LBA_rg to a specific area. In other words, the host 1100 and the storage device 1200 can determine whether the received write command UPIU is for data writing or for allocating a logical block address range based on a specific field (e.g., a field including the range area information ARI_rg) of the write command UPIU.

[0218] After that, in operation S321, the host 1100 can transmit a second CMD UPIU. The second CMD UPIU can include the write command WR CMD or the write command descriptor block including the first logical block address LBA1. In an exemplary embodiment of the inventive concept, the second CMD UPIU can be similar to the first CMD UPIU on the data structure. However, a specific field of the first CMD UPIU can include the range area information ARI_rg, and the second CMD UPIU can not include the range area information ARI_rg. In other words, the second CMD UPIU can be a normal write command UPIU.

[0219] In operation S322, in response to the second CMD UPIU, the storage device 1200 can perform a write data transaction with the host 1100 and can store the received write data in the first area. For example, the first logical block address LBA1 can be included in the logical block address range LBA_rg received in operation S312. In this case, the storage device 1200 can store the write data corresponding to the first logical block address LBA1 in the first area allocated to the logical block address range LBA_rg as described above. For example, in the case where the logical block address range LBA_rg is allocated to the storage space of the fixed turbo write buffer TWB-p and the first logical block address LBA1 is included in the logical block address range LBA_rg, the storage device 1200 can write the data corresponding to the first logical block address LBA1 to the fixed turbo write buffer TWB-p.

[0220] For the sake of simplicity of explanation, one RTT UPIU and one DATA OUT UPIU are transferred in operation S322 of FIG. 3, but the inventive concept is not limited thereto. For example, as in the description given with reference to FIG. 2, the host 1100 and the storage device 1200 can exchange a plurality of RTT UPIUs and a plurality of DATA OUT UPIUs in operation S322. FIG. 15 FIG. 11 For the sake of simplicity of explanation, one RTT UPIU and one DATA OUT UPIU are transferred in operation S322 of FIG. 3, but the inventive concept is not limited thereto. For example, as in the description given with reference to FIG. 2, the host 1100 and the storage device 1200 can exchange a plurality of RTT UPIUs and a plurality of DATA OUT UPIUs in operation S322.

[0221] After the programming operation is completed, in operation S323, the storage device 1200 can transfer a RESPONSE UPIU to the host 1100. The RESPONSE UPIU transferred in operation S323 can be a response to the second CMD UPIU.

[0222] Thereafter, in operation S331, the host 1100 can transfer a third CMD UPIU to the storage device 1200. The third CMD UPIU can include a read command RDCMD or a read command descriptor block including the first logical block address LBA1.

[0223] ​In operation S332, the storage device 1200 can perform a turbo read operation or a normal read operation on the first area in response to the third CMD UPIU thus received. For example, in a case where the first logical block address LBA1 is included in the logical block address range LBA_rg and the range area information ARI_rg corresponds to the fixed turbo write buffer TWB-p or the non-fixed turbo write buffer TWB-np, the storage device 1200 can perform a turbo read operation on the fixed turbo write buffer TWB-p or the non-fixed turbo write buffer TWB-np to read data corresponding to the first logical block address LBA1. Alternatively, in a case where the first logical block address LBA1 is included in the logical block address range LBA_rg and the range area information ARI_rg corresponds to the user storage UST, the storage device 1200 can perform a normal read operation on the user storage UST to read data corresponding to the first logical block address LBA1.

[0224] Thereafter, in operation S333, the storage device 1200 can transfer the read data to the host 1100 through a DATA IN UPIU. For the sake of brief description, one DATA IN UPIU is transferred in operation S333 of FIG. 15 However, the inventive concept is not limited thereto. For example, as described in the description given with reference to FIG. 11 , a plurality of DATA IN UPIUs can be provided from the storage device 1200 to the host 1100 until all of the read data is transferred to the host 1100.

[0225] After all of the read data is transferred to the host 1100, in operation S334, the storage device 1200 can transfer a RESPONSE UPIU to the host 1100. The RESPONSE UPIU transferred in operation S334 can be a response to the third CMD UPIU.

[0226] FIG. 16A and FIG. 16B are diagrams for describing a logical block address range allocation operation according to the flowchart of FIG. 15 For the sake of brief description, it is assumed that the fixed turbo write buffer TWB-p includes a first memory block BLK1, the non-fixed turbo write buffer TWB-np includes a second memory block BLK2, and the user storage UST includes a third memory block BLK3, as described with reference to FIG. 10A and FIG. 10B or FIG. 12A to FIG. 12C However, the inventive concept is not limited thereto.

[0227] Hereinafter, for convenience of description, the term "write command UPIU" is used. The write command UPIU can mean a CMD UPIU including a write command descriptor block, but the inventive concept is not limited thereto.

[0228] Referring to FIG. 1 , FIG. 8 , FIG. 15 , FIG. 16A and FIG. 16B , the storage 1200 can receive a first write command UPIU from the host 1100. The first write command UPIU can include a first logical block address range LBA_rg1 and first range area information ARI_rg1. As described above, because the storage 1200 receives the first write command WR CMD (e.g., a CMD UPIU including a write command descriptor block) from the host 1100, but the first write command UPIU is a CMD UPIU for setting a logical block address range LBA_rg (e.g., a CMD UPIU including range area information ARI_rg at a specific field), the storage 1200 can not perform a separate write operation.

[0229] The first range area information ARI_rg1 can include information about a fixed turbo write buffer TWB-p. Accordingly, as shown in FIG. 16A , in response to the first write command UPIU, the storage 1200 can allocate an area corresponding to the first logical block address range LBA_rg1 to the fixed turbo write buffer TWB-p. For example, the storage 1200 can map the first logical block address range LBA_rg1 onto a physical address of a storage space of the fixed turbo write buffer TWB-p, and can manage or maintain the mapping relationship. This is shown in the lower part of FIG. 16A , the lower part of FIG. 16A shows the first logical block address range LBA_rg1 associated with the fixed turbo write buffer TWB-p.

[0230] After that, as shown in FIG. 16B , the storage 1200 can receive a second write command UPIU from the host 1100. The second write command UPIU can include a second logical block address range LBA_rg2 and second range area information ARI_rg2. As in the above description, the storage 1200 can not perform a separate write operation in response to the second write command UPIU.

[0231] The second range area information ARI_rg2 can include information about a non-fixed turbo write buffer TWB-np. Accordingly, as shown in FIG. 16BAs shown in , in response to the second write command UPIU, the storage device 1200 may allocate an area corresponding to the second logical block address range LBA_rg2 to the non-fixed turbo write buffer TWB-np. For example, the storage device 1200 may map the second logical block address range LBA_rg2 to the physical address of the storage space of the non-fixed turbo write buffer TWB-np, and may manage or maintain the mapping relationship. This is in FIG. 16B The lower part shows, FIG. 16B The lower part shows a second logical block address range LBA_rg2 associated with the non-fixed turbo write buffer TWB-np.

[0232] FIG. 17A to 17C Is used to describe the FIG. 15 For ease of description, it is assumed that the storage device 1200 is in the state of reference FIG. 17A to FIG. 17C The write operation described was previously completed as FIG. 16B In other words, the storage device 1200 can manage or maintain the allocation of the logical block address ranges LBA-rg1 and LBA-rg2. FIG. 16B The mapping relationship is shown in .

[0233] Reference FIG. 1 、 FIG. 8 、 FIG. 17A 、 FIG. 17B and FIG. 17C , the storage device 1200 may perform a write operation on the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, or the user storage unit UST based on the logical block address included in the write command UPIU received from the host 1100.

[0234] like FIG. 17A , the memory device 1200 may receive a third write command UPIU including a first logical block address LBA1 from the host 1100. In an exemplary embodiment of the inventive concept, since the third write command UPIU does not include range region information ARI_rg, the memory device 1200 may perform a write operation in response to the third write command UPIU.

[0235] For example, the first logical block address LBA1 may be included in the first logical block address range LBA_rg1. In this case, the storage device 1200 may receive the first data DT1 corresponding to the first logical block address LBA1 from the host 1100, and the received first data DT1 may be written into the first memory block BLK1 of the fixed turbo write buffer TWB-p.

[0236] Alternatively, as FIG. 17BAs shown in FIG. 12, the storage device 1200 can receive a fourth write command UPIU including a second logical block address LBA2 from the host 1100. In an exemplary embodiment of the inventive concept, since the fourth write command UPIU does not include the range area information ARI_rg, the storage device 1200 can perform a write operation in response to the fourth write command UPIU.

[0237] For example, the second logical block address LBA2 can be included in a second logical block address range LBA_rg2. In this case, the storage device 1200 can receive second data DT2 corresponding to the second logical block address LBA2 from the host 1100, and can write the received second data DT2 to the non-persistent turbo write buffer TWB-np.

[0238] In an exemplary embodiment of the inventive concept, as FIG. 17C As shown in FIG. 12, the storage device 1200 can receive a fourth write command UPIU including a second logical block address LBA2 from the host 1100. In an exemplary embodiment of the inventive concept, since the fourth write command UPIU does not include the range area information ARI_rg, the storage device 1200 can perform a write operation in response to the fourth write command UPIU.

[0239] However, the fifth write command UPIU can further include the first area information ARI1. The first area information ARI1 can include information about the persistent turbo write buffer TWB-p. In this case, as described in the description given with reference to FIG. 12A As shown in FIG. 12, the storage device 1200 can receive a fourth write command UPIU including a second logical block address LBA2 from the host 1100. In an exemplary embodiment of the inventive concept, since the fourth write command UPIU does not include the range area information ARI_rg, the storage device 1200 can perform a write operation in response to the fourth write command UPIU.

[0240] Further, in an embodiment of FIG. 17C In the case where the fifth write command UPIU including the third logical block address LBA3 does not include the first area information ARI1, the storage device 1200 can write third data DT3 corresponding to the third logical block address LBA3 to the user storage UST.

[0241] According to the above-described embodiments of the inventive concept, the host 1100 of the storage system 1000 can determine a logical block address range corresponding to the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, or the user storage UST in advance, and can provide the range area information and information about the determined logical block address range to the storage device 1200. The storage device 1200 can allocate or map the logical block address range to or on an area (e.g., one of the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, and the user storage UST) corresponding to the range area information based on the range area information and the information about the determined logical block address range received from the host 1100. The host 1100 can instruct or request a write operation to each area of the storage device 1200 based on the pre-designated logical block address range. Accordingly, the performance of the storage system 1000 can be improved.

[0242] FIG. 18 is a flowchart illustrating an operation of the storage system of FIG. 1 . FIG. 19 is a diagram for describing the operation S412 of FIG. 18 . The operation in which the host 1100 allocates or designates a logical block address range to an area (e.g., the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, or the user storage UST) of the storage device 1200 will be described with reference to FIG. 18 and FIG. 19 . For the sake of brief explanation and easy description, only the configuration of allocating or designating a logical block address range will be described with reference to the flowchart of FIG. 18 . The write operation or the read operation is described above, and thus additional description will be omitted to avoid redundancy.

[0243] With reference to FIG. 1 , FIG. 8 , FIG. 18 and FIG. 19 , the host 1100 can determine a logical block address range in operation S411. The operation S411 is similar to the operation S311 of FIG. 15 , and thus additional description will be omitted to avoid redundancy.

[0244] The host 1100 can transmit a query request UPIU including the determined logical block address range LBA_rg and the range area information ARI_rg to the storage device 1200 in operation S412. The storage device 1200 can allocate a first area corresponding to the range area information ARI_rg to the logical block address range LBA_rg in operation S413. With reference to FIG. 15 to FIG. 17COperation S413 is described, and thus additional description will be omitted to avoid redundancy. In operation S415, the storage 1200 can transfer a QUERY RESPONSE UPIU to the host 1100. The QUERY RESPONSE UPIU can be a response to the query request UPIU transferred in operation S412.

[0245] In the embodiments described with reference to FIG. 15 to FIG. 17C In the embodiments described with reference to FIG. 18 In the embodiments described with reference to

[0246] The query request UPIU is a data structure or data packet for exchanging data between the host 1100 and the storage 1200, separately from normal data exchange for read and write operations.

[0247] As shown in FIG. 19 The query request UPIU can include the following fields: transfer type (xx010110b), flags, task tag, query function, EHS (Error History Source) length, data segment length, transaction specific field, header E2E CRC (End-to-End CRC), data, data E2E CRC, reserved. Additional description regarding the fields of the query request UPIU will be omitted for brevity.

[0248] In the exemplary embodiments of the inventive concept, the host 1100 can set the range area information ARIRg or information regarding the logical block address range LBA_rg at a specific field of the query request UPIU. For example, the host 1100 can set information regarding the logical block address range LBA_rg at the transaction specific field or the "data" field. For example, the information regarding the logical block address range LBA_rg can include a start logical block address and information regarding the length of the logical block address, and the host 1100 can write or set the start logical block address and the information regarding the length of the logical block address at the "data" field or the "transaction specific field".

[0249] The host 1100 can set the range area information ARIRg at the "flags" field of the query request UPIU. Alternatively, the host 1100 can set the range area information ARIRg at the "transaction specific field". Alternatively, the host 1100 can set the range area information ARIRg at the "query function" field.

[0250] In an exemplary embodiment of the inventive concept, when the host 1100 sets a pre-defined value at a specific field of the query request UPIU, the storage device 1200 can recognize that the query request UPIU is information for designating a logical block address range. For example, the "transaction specific field" can include an "OPCODE" field, and the host 1100 can set information for designating a logical block address range at the "OPCODE" field. Alternatively, the range area information ARlg can be included in the "OPCODE" field of the "transaction specific field".

[0251] The above-described manner of designating a logical block address range by using a query request UPIU is merely exemplary, and the inventive concept is not limited thereto. The host 1100 and the storage device 1200 of the storage system 1000 according to an exemplary embodiment of the inventive concept can support an operation for designating a logical block address range by setting range area information and information about a logical block address range at a write command UPIU, a query request UPIU, or any other specific command UPIU supported at a pre-defined interface (e.g., a UFS interface).

[0252] FIG. 20 is a diagram illustrating a hierarchical structure of the storage system 1000 of FIG. 1 Referring to FIG. 20 , the storage system 1000 can include a host 1100 and a storage device 1200. The host 1100 can include an application AP-h, a file system FS-h, a device manager DM-h, a UFS application layer UAP-h, a UFS transport protocol layer UTP-h, and a UFS interconnect layer UIC-h.

[0253] The application AP-h can include various application programs, processes, etc. driven by the host 1100. The file system FS-h can be configured to organize and manage various data generated by the application AP-h. In an exemplary embodiment of the inventive concept, as described with reference to FIG. 15 to FIG. 19 , the application AP-h or the file system FS-h can be configured to determine a logical block address range to designate a logical block address range for a specific area. Information about the determined logical block address range can be provided to a lower layer (e.g., the device manager DM-h or the UFS application layer UAP-h).

[0254] The UFS application layer UAP-h is configured to support various commands between the host 1100 and the storage device 1200. For example, the UFS application layer UAP-h can include an input / output (I / O) stream manager IOSM-h and a UFS command set UCS-h. The I / O stream manager IOSM-h is configured to manage requests from the application AP-h or the file system FS-h.

[0255] In exemplary embodiments of the inventive concept, the I / O flow manager IOSM-h can be configured to identify a specific value of input / output from the application AP-h or the file system FS-h. The I / O flow manager IOSM-h can be configured to manage a priority of requests from the application AP-h or the file system FS-h, or to support various functions according to requests from the application AP-h or the file system FS-h. In exemplary embodiments of the inventive concept, the I / O flow manager IOSM-h can be configured to support a turbo write function or a turbo read function.

[0256] In exemplary embodiments of the inventive concept, a specific application or process designated by the host 1100 or a user of the host 1100 can use turbo write or turbo read. The I / O flow manager IOSM-h can determine whether to perform turbo write or turbo read in response to a write request or a read request made by the specific application or process with respect to the storage device 1200.

[0257] Further, a specific data managed by the file system FS-h can use turbo write or turbo read. The I / O flow manager IOSM-h can determine whether to perform turbo write or turbo read in response to a write request or a read request with respect to the specific data (e.g., metadata) for the storage device 1200.

[0258] Further, the I / O flow manager IOSM-h can instruct movement of data written to the storage device 1200. The I / O flow manager IOSM-h can adjust a read speed of data written to the storage device 1200 by moving the data to the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, or the user storage UST.

[0259] In exemplary embodiments of the inventive concept, as described with reference to FIG. 11 to FIG. 14 the I / O flow manager IOSM-h can determine an area (e.g., the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, or the user storage UST) to store specific data according to attributes of the specific data, and can provide information (e.g., area information ARI) about the determination to the UFS command set UCS-h.

[0260] In exemplary embodiments of the inventive concept, as described with reference to FIG. 15 to FIG. 19 the I / O flow manager IOSM-h can determine a logical block address to store specific data based on attributes of the specific data and a predetermined logical block address range, and can provide information about the determined logical block address range to the UFS command set UCS-h.

[0261] The UFS command set UCS-h can support various command sets supported between the host 1100 and the storage device 1200. In an exemplary embodiment of the inventive concept, the UFS command set UCS-h can include a UFS native command set and a UFS SCSI command set. The UFS command set UCS-h can configure commands to be transferred to the storage device 1200 according to a request from the application AP-h or the file system FS-h.

[0262] In an exemplary embodiment of the inventive concept, the UFS command set UCS-h can be configured to receive various information (e.g., a logical block address, zone information, a logical block address range, or range zone information) from the I / O stream manager IOSM-h and generate various commands according to the methods described with reference to FIG. 11 to FIG. 19

[0263] The UFS application layer UAP-h can further include a task manager that processes commands to control a command queue.

[0264] The device manager DM-h can manage device-level operations and device-level configurations. In an exemplary embodiment of the inventive concept, the device manager DM-h can manage a query request for setting or checking various information of the storage device 1200.

[0265] The UFS transport protocol layer UTP-h can provide services for upper layers. The UFS transport protocol layer UTP-h can generate commands or information provided from the UFS application layer UAP-h or generate a query request provided from the device manager DM-h in the form of a UPIU (UFS protocol information unit) packet.

[0266] In an exemplary embodiment of the inventive concept, the UFS transport protocol layer UTP-h and the device manager DM-h can communicate with each other through a UDM-SAP (UDM-Service Access Point). The UFS transport protocol layer UTP-h and the UFS application layer UAP-h can communicate with each other through a UTP_CMD_SAP or a UTP_TM_SAP.

[0267] The UFS interconnect layer UIC-h can manage connection with the storage device 1200. In an exemplary embodiment of the inventive concept, the UFS interconnect layer UIC-h can include a hardware configuration (such as MIPI UniPro or MIPI M-PHY) physically connected with the UFS interconnect layer UIC-d of the storage device 1200. In this way, the host 1100 and the storage device 1200 can establish a communication channel with each other. In an exemplary embodiment of the inventive concept, the UFS interconnect layer UIC-h and the UFS transport protocol layer UTP-h can communicate through a UIC-SAP, and the UFS interconnect layer UIC-h and the device manager DM-h can communicate through a UIO-SAP.

[0268] ​The storage device 1200 can include a memory region manager MAM-d, a memory region attribute manager MAPM-d, a device manager DM-d, a UFS application layer UAP-d, a UFS transport protocol layer UTP-d, and a UFS interconnect layer UIC-d. In an exemplary embodiment of the inventive concept, the configurations of the UFS application layer UAP-d, the UFS transport protocol layer UTP-d, and the UFS interconnect layer UIC-d can be similar to those of the UFS application layer UAP-h, the UFS transport protocol layer UTP-h, and the UFS interconnect layer UIC-h of the host 1100 and allow the respective layers to logically communicate with each other, and the configurations of the I / O stream manager IOSM-d and the UFS command set UCS-d are similar to those of the I / O stream manager IOSM-h and the UFS command set UCS-h, and thus, additional description will be omitted to avoid redundancy.

[0269] The memory region attribute manager MAPM-d of the storage device 1200 can designate and manage a region in which to store write data received from the host 1100. For example, as described above, the write data received from the host 1100 can be written in the space of at least one of the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, and the user storage UST according to an explicit request of the host 1100 or an internal policy. The memory region attribute manager MAPM-d can select a space in which to store the write data received from the host 1100 based on the various schemes described above, and can store the write data in the selected space.

[0270] As described above, the memory region manager MAM-d of the storage device 1200 can control the movement / flushing / migration of data between the fixed turbo write buffer TWB-p, the non-fixed turbo write buffer TWB-np, and the user storage UST according to an explicit request of the host 1100 or an internal policy.

[0271] The above hierarchical structures and functions of each of the host 1100 and the storage device 1200 are merely exemplary, and the inventive concept is not limited thereto.

[0272] FIG. 21 is a block diagram illustrating in detail the storage system 1000 according to an exemplary embodiment of the inventive concept. Referring to FIG. 20 and FIG. 21 , the storage system 1000 can include the host 1100 and the storage device 1200. The host 1100 and the storage device 1200 can operate as described with reference to FIG. 1 to FIG. 20 .

[0273] The host 1100 can include an application processor 1110, a random access memory (RAM) 1120, a modem 1130, a device driver 1140, a speaker 1150, a display 1160, a touch panel 1170, a microphone 1180, and an image sensor 1190.

[0274] The application processor 1110 can execute an application AP-h and a file system FS-h. The application processor 1110 can use the RAM 1120 as a system memory. The application processor 1110 can communicate with an external device in a wired manner or wirelessly through the modem 1130. For example, the modem 1130 can be embedded in the application processor 1110.

[0275] The application processor 1110 can communicate with peripheral devices through the device driver 1140. For example, the application processor 1110 can communicate with the speaker 1150, the display 1160, the touch panel 1170, the microphone 1180, the image sensor 1190, and the storage device 1200 through the device driver 1140.

[0276] The device driver 1140 can include a device manager DM-h, a UFS application layer UAP-h, a UFS transport protocol layer UTP-h, and a UFS interconnect layer UIC-h. For example, the device driver 1140 can be embedded in the application processor 1110.

[0277] The speaker 1150 and the display 1160 can be user output interfaces that deliver information to a user. The touch panel 1170, the microphone 1180, and the image sensor 1190 can be user input interfaces that receive information from a user.

[0278] In an exemplary embodiment of the inventive concept, the storage device 1200 can serve as a high-capacity storage medium of the host 1100. The storage device 1200 can be an embedded type UFS device or a storage card type UFS device. The storage card type UFS device can be inserted into or detached from a UFS slot included in the host 1100.

[0279] FIG. 22 A diagram in which an exemplary embodiment of the inventive concept is applied to the storage system 1000 is illustrated. Referring to FIG. 21 and FIG. 22 The storage system 1000 can provide a setting screen through the display 1160. One of the setting screens can provide information on an acceleration mode to a user.

[0280] The storage system 1000 can display a list of the first application APP1 to the nth application APPn to which the acceleration mode is applicable through the display 1160. Also, the storage system 1000 can display a switch that allows a user to adjust the acceleration mode of the first application APP1 to the nth application APPn through the display 1160.

[0281] In operation S1100, the user can touch the enabled position of the acceleration mode of the third application APP3. The storage system 1000 can sense the user's touch (in other words, activate the direction of the third application APP3) through the touch panel 1170. In operation S1200, information of the third application APP3 or the process of the third application APP3 can be transferred to the I / O stream manager IOSM-h.

[0282] When receiving the information of the third application APP3 or the information of the process of the third application APP3, in operation S1300, the I / O stream manager IOSM-h can reserve a moving operation of a subsequent read of the third application APP3 or the process thus selected. For example, the I / O stream manager IOSM-h can set a moving attribute MA for data associated with the third application APP3 through a query request UPIU, and when a read operation associated with the third application APP3 is required, the I / O stream manager IOSM-h can include a moving flag as moving information MV in a CMD UPIU.

[0283] As another example, when a read operation associated with the third application APP3 is required, the I / O stream manager IOSM-h can include a moving flag and a moving attribute MA as moving information MV in a CMD UPIU. For example, the I / O stream manager IOSM-h can designate a fixed turbo write buffer TWB-p or a non-fixed turbo write buffer TWB-np as destination information DST of the moving attribute MA.

[0284] When data associated with the third application APP3 is moved to the fixed turbo write buffer TWB-p or the non-fixed turbo write buffer TWB-np, an operation of reading the data associated with the third application APP3 is accelerated. Accordingly, the performance of the third application APP3 can be accelerated.

[0285] According to exemplary embodiments of the inventive concept, a host of a storage system can designate one of various regions of a storage device, and can store data in the selected region. Accordingly, a storage device having improved performance, and an operating method of a storage system including a host device that controls the storage device and the storage device are provided.

[0286] While the inventive concept has been described with reference to exemplary embodiments, it will be clear to those of ordinary skill in the art that various changes and modifications can be made therein without departing from the spirit and scope of the inventive concept as set forth in the following claims.

Claims

1. A storage device comprising: A non-volatile memory device comprising a non-fixed buffer area, a fixed buffer area and a user storage area; and a controller configured to: receive a first write command including a first logical block address from a host device, receive first data corresponding to the first logical block address in response to the first write command, and store the first data in a nonvolatile memory device; wherein, when the first write command includes the first region information, the controller stores the first data in the non-fixed buffer region, and when the first write command includes the second region information, the controller stores the first data in the fixed buffer region, When the first write command does not include the first region information and the second region information, the controller stores the first data in the user storage area. wherein each of the non-fixed buffer area and the fixed buffer area includes memory cells each configured to store "n" bits, and the user storage area includes memory cells each configured to store "m" bits, n being a positive integer, m being a positive integer greater than n, and The controller is further configured as follows: flushing the data stored in the fixed buffer area to the user storage area in response to a flush request from the host device; and The data stored in the non-fixed buffer area is flushed to the user storage area according to the flushing policy.

2. The storage device according to claim 1, wherein The controller is further configured to enable or disable the turbo write function in response to a turbo write function enable request from the host device.

3. The storage device according to claim 2, wherein: The flush request or the turbo write function enable request is received from the host device through a query request Universal Flash Protocol Information Unit UPIU. The storage device according to claim 2 , wherein: When the turbo write function is disabled and the first write command includes the first region information or the second region information, the controller stores the first data in the user memory area.

5. The storage device according to claim 2, wherein: When the turbo write function is enabled and the first write command does not include the first region information and the second region information, the controller stores the first data in the fixed buffer area. The storage device according to claim 1 , wherein: The first write command is a command Universal Flash Protocol Information Unit UPIU including a first write command descriptor block.

7. The storage device according to claim 6, wherein: The first region information or the second region information is included in the “flag” field of the command UPIU. The storage device according to claim 6 , wherein: The first region information or the second region information is included in a “group number” field of the first write command descriptor block.

9. The storage device according to claim 1, wherein The controller transmits a prepare-to-transmit RTT universal flash protocol information unit UPIU to the host device, and receives a DATA OUT UPIU including first data from the host device.

10. The storage device according to claim 1, wherein The controller is also configured to: receiving a first read command including a first logical block address from a host device; When the first data exists in the non-fixed buffer area or the fixed buffer area, the first data is read by performing a first read operation on the non-fixed buffer area or the fixed buffer area, and when the first data exists in the user storage area, the first data is read by performing a second read operation on the user storage area; and The read first data is transmitted to the host device via the DATA IN universal flash protocol information unit UPIU, and The first read operation is faster than the second read operation.

11. A storage device comprising: A non-volatile memory device comprising a non-fixed buffer area, a fixed buffer area and a user storage area; and a controller configured to: receive a first command including a first logical block address range and first range region information from a host device, and in response to the first command, allocate an area corresponding to the first range region information among a non-fixed buffer area, a fixed buffer area, and a user storage area to the first logical block address range; The controller is further configured to receive a first write command including a first logical block address from a host device, and store first data corresponding to the first logical block address in the allocated area. Wherein, the first logical block address is included in the first logical block address range, wherein each of the non-fixed buffer area and the fixed buffer area includes memory cells each configured to store "n" bits, and the user storage area includes memory cells each configured to store "m" bits, n being a positive integer, m being a positive integer greater than n, and The controller is further configured as follows: flushing the data stored in the fixed buffer area to the user storage area in response to a flush request from the host device; and The data stored in the non-fixed buffer area is flushed to the user storage area according to the flushing policy.

12. The storage device according to claim 11, wherein The first command is a first command Universal Flash Protocol Information Unit (UPIU) including a first write command descriptor block; and The first write command is a second command UPIU, and the second command UPIU includes a second write command descriptor block having the same “operation code” field as the first write command descriptor block.

13. The storage device according to claim 12, wherein: The first logical block address range is included in the "logical block address" field and the "transfer length" field of the first write command descriptor block, and The first range area information is included in the “group number” field of the first write command descriptor block or the “flag” field of the first command UPIU.

14. The storage device according to claim 12, wherein: The controller is also configured to: After receiving the first command, transmitting a first response UPIU to the first command to the host device without exchanging data with the host device; and After receiving the first write command, a prepare-to-transmit RTT UPIU is transmitted to the host device, and after receiving a DATA OUT UPIU including the first data from the host device, a second response UPIU to the first write command is transmitted to the host device.

15. The storage device according to claim 11, wherein The first command is a query request Universal Flash Protocol Information Unit UPIU, and Among them, the first logical block address range is included in the "data" field or the "transaction specific field" of the query request UPIU, and the first range area information is included in the "flag" field of the query request UPIU, the "query function" field of the query request UPIU, or the "OPCODE" field of the "transaction specific field" of the query request UPIU.

16. A method for operating a storage system, the storage system comprising a storage device including a non-fixed buffer area, a fixed buffer area, and a user storage area, and a host device configured to communicate with the storage device, the method comprising: transmitting, by the host device, a first write command including a first logical block address and region information to the storage device; receiving, through the storage device, a first write command, and selecting an area corresponding to the area information from among the non-fixed buffer area, the fixed buffer area, and the user storage area; Transmitting, via the storage device, a Universal Flash Protocol Information Unit (UPIU) to be transmitted to the host device; transmitting, by the host device, a DATA OUT UPIU including first data corresponding to the first logical block address to the storage device; In response to preparing to transmit the UPIU, receiving, by the storage device, a DATA OUT UPIU and storing the first data in an area corresponding to the area information; transmitting the first response UPIU to the host device via the storage device; and Managing, by means of a storage device, a mapping relationship between a first logical block address and a physical address of an area corresponding to the area information, Each of the non-fixed buffer area and the fixed buffer area includes memory cells each configured to store "n" bits, and the user storage area includes memory cells each configured to store "m" bits, where n is a positive integer and m is a positive integer greater than n. wherein, in response to a flush request from a host device, data stored in the fixed buffer area is flushed to the user storage area, and According to the flushing policy of the storage device, data stored in the non-fixed buffer area is flushed to the user storage area.

17. The operating method according to claim 16, further comprising: transmitting, by the host device, a first read command including a first logical block address to the storage device; In response to a first read command, when it is determined based on the mapping relationship that the area corresponding to the area information is the non-fixed buffer area or the fixed buffer area, the first data is read by performing a first read operation on the non-fixed buffer area or the fixed buffer area via the storage device; and when it is determined based on the mapping relationship that the area corresponding to the area information is the user storage area, the first data is read by performing a second read operation on the user storage area via the storage device; transmitting, via the storage device, a DATA IN UPIU including first data to the host device; and When all the first data are transmitted to the host device, a second response UPIU is transmitted to the host device through the storage device, and The first read operation is faster than the second read operation.

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