A step pulse confirmation method, device, electronic device and storage medium

Abstract

The present invention relates to a method for confirming a step pulse, comprising: determining a current equation containing a first unknown parameter and a second unknown parameter based on a determined resistance equation and a temperature equation; determining a first step pulse corresponding to a first resistance value from a plurality of resistance values ​​corresponding to a plurality of first step pulses; the pulse width and amplitude of a first pulse of a first step pulse corresponding to a first resistance value are a first pulse width and a first amplitude; determining a second step pulse corresponding to a second resistance value from a plurality of resistance values ​​corresponding to a plurality of second step pulses; the pulse width of a non-first pulse of a second step pulse corresponding to a second resistance value is a second pulse width; determining a current equation based on the second pulse width and the first amplitude; adjusting the amplitude of a non-first pulse of a second step pulse corresponding to a second resistance value based on the current equation, and obtaining a target step pulse matching the current equation. The target step pulse obtained by this design can improve the success rate of the erase operation and increase the speed.

Description

Technical Field

[0001] The present invention relates to the field of electronic circuits, and in particular to a method, device, electronic equipment and storage medium for confirming a step pulse. Background Art

[0002] Phase Change Memory (PCM) technology is based on the idea proposed by Ovshinsky in the late 1960s and early 1970s that phase change films can be used as phase change storage media. It is a low-cost, stable storage device. Phase change memory can be made on a silicon wafer substrate, and its core function comes from phase change materials that can be quickly and repeatedly operated. Phase change memory has the advantages of high-speed reading, high erasable times, non-volatility, small component size, low power consumption, strong vibration and radiation resistance. The International Semiconductor Industry Association believes that phase change memory is the most likely to replace the current flash memory and become the mainstream memory product in the future and the first device to become a commercial product.

[0003] The basic principle of phase change memory is to use an electrical pulse signal to act on the device unit to convert electrical energy into Joule heat, so that the phase change material presents two completely different forms, amorphous and crystalline. By distinguishing the huge resistance difference between the amorphous state and the crystalline state, the writing, erasing and reading operations of information can be realized. The write operation (RESET) is to apply a voltage square wave or current with a high amplitude and a short pulse width to the phase change memory unit. Under the action of Joule heat, the phase change material becomes a molten state and is quickly quenched to below the crystallization temperature. The long-range ordered structure of the crystalline state is destroyed, and then the phase change material reaches a high resistance state, which is recorded as "1". The erase operation (SET) is to apply an electrical pulse with a low amplitude and a wide pulse width to the phase change memory, so that the internal temperature of the phase change material is maintained at the crystallization temperature and after a period of continuous action, the phase change material crystallizes and is placed in a stable low-resistance crystalline state, which is recorded as "0". In addition, the read operation is to apply a very weak electrical pulse to keep the material below the crystallization temperature, so as to achieve the purpose of measuring the resistance value of the phase change memory without affecting the logical state of the phase change memory.

[0004] Compared with the phase change memory, the erase operation is more complicated and changeable, which is due to the fact that the crystallization process of the phase change material can be divided into multiple parts and more influencing factors need to be considered. In the prior art, many improved SET operation modes have been proposed and applied in phase change memory chips. STMicroelectronics proposed an improved step pulse operation method. The step pulse is one of the most commonly used erase operation methods, but the Joule heat change it provides cannot correspond to the crystallization process of the phase change material, which will lead to incomplete crystallization of the phase change memory, and then make the unit resistance of the entire phase change memory unevenly distributed. This step pulse makes the erase operation have a low success rate and slow speed. Summary of the invention

[0005] The present invention aims to solve the technical problem that the Joule heat change provided by the step pulse during the erase operation cannot correspond to the crystallization process of the phase change material, resulting in incomplete crystallization of the phase change memory, and then making the unit resistance distribution of the entire phase change memory uneven, resulting in a low erase operation success rate and a slow speed.

[0006] In order to solve the above technical problems, the present application discloses a step pulse confirmation method, which comprises:

[0007] Determining a current equation including a first unknown parameter and a second unknown parameter based on the determined resistance equation and temperature equation;

[0008] Determine a first step pulse corresponding to a first resistance value from the plurality of first step pulses according to a plurality of resistance values ​​corresponding to the plurality of first step pulses; the pulse width of a first pulse of the first step pulse corresponding to the first resistance value is a first pulse width, and the amplitude of the first pulse is a first amplitude;

[0009] Determine a second step pulse corresponding to a second resistance value from the plurality of second step pulses according to a plurality of resistance values ​​corresponding to the plurality of second step pulses; a first pulse of the second step pulse matches a first pulse of the first step pulse corresponding to the first resistance value; a pulse width of a non-first pulse of the second step pulse corresponding to the second resistance value is a second pulse width; the first step pulse and the second step pulse are used to transform the phase change memory unit from an amorphous state to a crystalline state;

[0010] Determine the first unknown parameter and the second unknown parameter based on the first pulse width, the second pulse width and the first amplitude, and then determine the current equation;

[0011] The amplitude of the non-first pulse of the second step pulse corresponding to the second resistor value is adjusted based on the current equation to obtain a target step pulse matching the current equation.

[0012] Optionally, the step pulse confirmation method also includes a method for determining a resistance equation.

[0013] The resistance determination equation includes:

[0014] A resistance equation is determined based on a plurality of first pulses obtained and applied to a phase change memory cell and a resistance corresponding to each first pulse; the first pulse is used to change the phase change memory cell from an amorphous state to a crystalline state; the resistance is the resistance of the phase change memory cell.

[0015] Optionally, determining the resistance equation according to the acquired multiple first pulses applied to the phase change memory unit and the resistance corresponding to each first pulse includes:

[0016] acquiring a plurality of first pulses applied to the phase change memory unit;

[0017] Obtaining a resistance corresponding to each first pulse in the plurality of first pulses;

[0018] Determine a voltage corresponding to each first pulse according to each first pulse and a resistance corresponding to each first pulse;

[0019] Determine a voltage-current equation according to each first pulse and a voltage corresponding to each first pulse;

[0020] The voltage-current equation is fitted using a fitting rule to obtain the resistance equation.

[0021] Optionally, the plurality of first step pulses include a plurality of first step pulses in a first set and a plurality of first step pulses in a second set;

[0022] The method of determining a first step pulse corresponding to a first resistance value from the plurality of first step pulses according to the plurality of resistance values ​​corresponding to the plurality of first step pulses includes:

[0023] When the plurality of first step pulses in the first set are applied to the phase change memory unit, the resistance value corresponding to each of the plurality of first step pulses in the first set is determined; the pulse width of the first pulse of each of the plurality of first step pulses in the first set is a preset pulse width;

[0024] Determine the amplitude of the first pulse of the first step pulse corresponding to the minimum resistance value among the multiple resistance values ​​corresponding to the multiple first step pulses in the first set as the first amplitude;

[0025] When the plurality of first step pulses in the second set are applied to the phase change memory unit, a resistance value corresponding to each of the plurality of first step pulses in the second set is determined; the amplitude of the first pulse of the plurality of first step pulses in the second set is the first amplitude;

[0026] Determine the minimum resistance value among the plurality of resistance values ​​corresponding to the plurality of first step pulses in the second set as the first resistance value;

[0027] A first step pulse is determined according to the resistance value of the first resistor, and the pulse width of a first pulse of the first step pulse is determined as the first pulse width.

[0028] Optionally, the plurality of first step pulses include a plurality of first step pulses in a third set and a plurality of first step pulses in a fourth set;

[0029] The method of determining a first step pulse corresponding to a first resistance value from the plurality of first step pulses according to the plurality of resistance values ​​corresponding to the plurality of first step pulses includes:

[0030] When the plurality of first step pulses in the third set are applied to the phase change memory unit, a resistance value corresponding to each of the plurality of first step pulses in the third set is determined; an amplitude of a first pulse of each of the plurality of first step pulses in the third set is a preset amplitude;

[0031] Determine the pulse width of the first pulse of the first step pulse corresponding to the minimum resistance value among the multiple resistance values ​​corresponding to the multiple first step pulses in the third set as the first pulse width;

[0032] When the plurality of first step pulses in the fourth set are applied to the phase change memory unit, the resistance value corresponding to each of the plurality of first step pulses in the fourth set is determined; the pulse width of the first pulse of the plurality of first step pulses in the fourth set is the first pulse width;

[0033] Determine the minimum resistance value among the plurality of resistance values ​​corresponding to the plurality of first step pulses in the fourth set as the first resistance value;

[0034] A first step pulse is determined according to the resistance value of the first resistor, and the amplitude of a first pulse of the first step pulse is determined to be a first amplitude.

[0035] Optionally, the determining of a second step pulse corresponding to a second resistance value from the plurality of second step pulses according to the plurality of resistance values ​​corresponding to the plurality of second step pulses includes:

[0036] When the plurality of second step pulses are applied to the phase change memory unit, determining a resistance value corresponding to each second step pulse in the plurality of second step pulses;

[0037] Determine the minimum resistance value among the multiple resistance values ​​corresponding to the multiple second step pulses as the second resistance value;

[0038] A second step pulse is determined according to the resistance value of the second resistor, wherein the determined pulse width of the non-first pulse of the second step pulse is the second pulse width.

[0039] Optionally, the second step pulse includes a first pulse and at least one non-first pulse;

[0040] The pulse width of each pulse of the at least one non-first pulse is equal;

[0041] The amplitude of the latter pulse between any two adjacent non-first pulses of the at least one non-first pulse is smaller than the amplitude of the former pulse;

[0042] The amplitude of the last pulse of the at least one non-first pulse tends to zero.

[0043] A device for determining a step pulse equation of a phase change memory unit, the device comprising:

[0044] A first determining unit, configured to determine a current equation including a first unknown parameter and a second unknown parameter based on the determined resistance equation and temperature equation;

[0045] a second determining unit, configured to determine a first step pulse corresponding to a first resistance value from among the plurality of first step pulses according to a plurality of resistance values ​​corresponding to the plurality of first step pulses; the pulse width of a first pulse of the first step pulse corresponding to the first resistance value is a first pulse width, and the amplitude of the first pulse is a first amplitude;

[0046] A third determining unit is used to determine a second step pulse corresponding to a second resistance value from the plurality of second step pulses according to a plurality of resistance values ​​corresponding to the plurality of second step pulses; a first pulse of the second step pulse matches a first pulse of the first step pulse corresponding to the first resistance value; a pulse width of a non-first pulse of the second step pulse corresponding to the second resistance value is a second pulse width; the first step pulse and the second step pulse are used to transform the phase change memory unit from an amorphous state to a crystalline state;

[0047] A fourth determination unit, configured to determine the first unknown parameter and the second unknown parameter based on the first pulse width, the second pulse width and the first amplitude; and further determine the current equation;

[0048] The fifth determining unit is used to adjust the amplitude of the non-first pulse of the second step pulse corresponding to the second resistance value based on the current equation to obtain a target step pulse matching the current equation.

[0049] An electronic device includes a processor and a memory, wherein the memory stores at least one instruction, at least one program, a code set or an instruction set, and the at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by the processor to implement the method for determining the step pulse equation of the phase change storage unit.

[0050] A computer-readable storage medium stores at least one instruction, at least one program, a code set or an instruction set, and the at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by a processor to implement the method for determining the step pulse equation of the phase change storage unit.

[0051] By adopting the above technical solution, the present invention has the following beneficial effects:

[0052] Determine the first unknown parameter and the second unknown parameter based on the first pulse width, the second pulse width and the first amplitude, and then determine the current equation, and obtain a current equation that meets the crystallization requirements;

[0053] Based on the current equation, the amplitude of the non-first pulse of the second step pulse corresponding to the second resistor value is adjusted to obtain a target step pulse matching the current equation, thereby obtaining a target step pulse meeting the crystallization requirements.

[0054] The Joule heat change provided by the target step pulse during the erase operation corresponds to the crystallization process of the phase change material, which meets the crystallization requirements of the phase change memory unit, thereby making the resistance distribution of the entire phase change memory unit uniform, which can improve the success rate of the erase operation and speed up the speed.

[0055] Furthermore, the above technical solution conceived by the present invention is compared with the prior art. Since the present invention can confirm the current equation of the phase change storage unit through instrument measurement combined with calculation, the optimization solution of the step pulse can be obtained by comparing the step pulse to be optimized with the current equation, which solves the problem that only relying on instrument measurement requires a lot of time, saving manpower and time costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0057] Figure 1 is a schematic diagram of an application environment provided by an embodiment of the present application;

[0058] Figure 2This is a flow chart of a step pulse confirmation method provided in one embodiment of the present application;

[0059] Figure 3 It is a schematic diagram of fitting the IV curve of the phase change memory unit obtained by experiment in one embodiment of the present application into a resistance equation;

[0060] Figure 4 middle Figure 4 (a) is a schematic diagram comparing the curves of the second step pulse and the current equation in one embodiment of the present application; Figure 4 (b) is a schematic diagram comparing the curves of the target step pulse and the current equation in one embodiment of the present application;

[0061] Figure 5 It is a schematic diagram comparing the temperature-time variation curve of the current equation obtained in one embodiment of the present application and the temperature-time variation curve of the target step pulse;

[0062] Figure 6 It is a schematic diagram of the structure of a step pulse confirmation device in one embodiment of the present application; DETAILED DESCRIPTION

[0063] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0064] The term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure or characteristic that may be included in at least one implementation of the present invention. In the description of the present invention, it should be understood that the orientation or positional relationship indicated by the terms "upper", "lower", "top", "bottom", etc. is based on the orientation or positional relationship shown in the accompanying drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention. In addition, the terms "first" and "second" are used only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may include one or more of the features explicitly or implicitly. Moreover, the terms "first", "second", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein.

[0065] See also Figure 1 , Figure 1 It is a schematic diagram of an application environment provided by an embodiment of the present application, including a phase change storage unit 101, a resistance sensing unit 102, a pulse sending unit 103 and a server 104.

[0066] In the embodiment of the present application, the phase change memory unit 101 is connected to the resistance sensing unit 102 and the pulse sending unit 103 respectively;

[0067] The connection server 104 is connected to the resistance sensing unit 102 and the pulse sending unit 103 respectively;

[0068] The resistance sensing unit 102 is used to measure the resistance data of the phase change memory unit 101 and transmit the resistance data to the server 104 . The pulse sending unit 103 is used to apply a pulse signal to the phase change memory unit 101 and transmit the data parameters of the pulse signal to the server 104 .

[0069] Optionally, the server 104 , the resistance sensing unit 102 and the pulse sending unit 103 may be connected via a wired link or a wireless connection.

[0070] Optionally, the resistance sensing unit 102 and the pulse sending unit 103 may be integrated in the server 104 , and an interface provided on the server 104 is connected to the phase change storage unit 101102 .

[0071] The following describes a specific embodiment of the step pulse confirmation method of the present application. Figure 2 It is a flowchart of the step pulse confirmation method provided in the embodiment of the present application. This specification provides method operation steps such as the embodiment or flowchart, but may include more or fewer operation steps based on conventional or non-creative labor. The order of steps listed in the embodiment is only one way of executing the order of many steps and does not represent the only execution order. When the actual system or server 104 product is executed, it can be executed in the order of the method shown in the embodiment or the figure or in parallel (for example, in a parallel processor or multi-threaded processing environment). Specifically, Figure 2 As shown, the method may include:

[0072] S201: Determine a current equation including a first unknown parameter and a second unknown parameter based on the determined resistance equation and temperature equation;

[0073] In the embodiment of the present application, determining the resistance equation includes:

[0074] The resistance equation is determined based on the obtained multiple first pulses applied to the phase change memory unit 101 and the resistance corresponding to each first pulse; the first pulse is used to transform the phase change memory unit 101 from an amorphous state to a crystalline state; the resistance is the resistance of the phase change memory unit 101.

[0075] Optionally, determining the resistance equation according to the acquired multiple first pulses applied to the phase change memory unit 101 and the resistance corresponding to each first pulse includes:

[0076] Acquire a plurality of first pulses applied to the phase change memory unit 101;

[0077] Obtaining a resistance corresponding to each first pulse in the plurality of first pulses;

[0078] Determine a voltage corresponding to each first pulse according to each first pulse and a resistance corresponding to each first pulse;

[0079] Determine a voltage-current equation according to each first pulse and a voltage corresponding to each first pulse;

[0080] The voltage-current equation is fitted using a fitting rule to obtain the resistance equation.

[0081] In specific application scenarios, see Figure 3 ,

[0082] a. The pulse sending unit 103 applies a plurality of first pulses with increasing amplitudes to the phase change memory unit 101. The value of the first pulse may be 500 microamperes, and may be increased by 0.1 microamperes each time. The server 104 obtains the resistance of the phase change memory unit 101 corresponding to each first pulse measured by the resistance sensing unit 102. Then, the server 104 confirms the voltage of the phase change memory unit 101 corresponding to each first pulse according to Ohm's law, and then derives the IV curve (current-voltage curve) of the phase change memory unit 101;

[0083] The steps of applying a plurality of first pulses by the pulse sending unit 103 to the phase change memory unit 101 specifically include:

[0084] Applying a RESET pulse to amorphize the phase change memory cell 101;

[0085] Applying an i-th SET pulse with an amplitude of j microamperes to crystallize the phase change layer of the phase change memory unit 101;

[0086] Applying a READ pulse, and reading the resistance of the phase change memory cell 101 after applying the i-th SET pulse, and calculating the voltage according to Ohm's law;

[0087] By repeating the above measurement process and increasing the number i and amplitude j of the SET pulses in the second step, the voltage of the phase change memory unit 101 corresponding to the i-th first pulse can be obtained.

[0088] b. The server 104 fits the IV curve to the straight line portion to obtain the resistance equation of the phase change memory unit 101;

[0089] Among them, the resistance equation Rd=A / I+B; Rd represents dynamic resistance, I represents current, A represents the intercept of the straight line equation with the X-axis, and A is an intrinsic parameter of the phase change material, B is the inverse of the slope of the equation, and B is a parameter related to the physical scale of the phase change memory unit 101.

[0090] c. Determine the current equation containing the first unknown parameter and the second unknown parameter based on the determined resistance equation and temperature equation

[0091] Among them, I(t) is the current equation that changes with time, Rd is the dynamic resistance of the phase change memory unit 101, Rth is the thermal resistance of the phase change memory unit 101, A and B are parameters of the dynamic resistance equation, a is a positive parameter that can control the pulse width of the cooling current curve, and b is a positive parameter that can control the amplitude of the cooling current curve.

[0092] The server 104 needs to use the following steps to obtain the current equation, which needs to be derived from the internal temperature equation of the phase change memory unit 101. The internal temperature equation of the phase change memory unit 101 is:

[0093] T=RthPinp+Text……(1)

[0094] Wherein T represents the internal temperature of the phase change memory unit 101, Rth represents the thermal resistance of the phase change memory unit 101, Pinp represents the input current power, and Text represents the external temperature of the phase change memory.

[0095] Using the power calculation formula combined with formula (1), we can get:

[0096] T=RthRdI2+Text……(2)

[0097] Wherein Rd represents the dynamic resistance of the phase change memory unit 101, and I represents the input current.

[0098] Taking the derivative of formula (2) with respect to time t and substituting it into the dynamic resistance equation, we can obtain:

[0099]

[0100] According to the principle that linear temperature drop is beneficial to the crystallization of the phase change memory unit 101, dT / dt is equal to a constant. The server 104 can obtain the current equation of the phase change memory unit 101 by integrating the time, which can be expressed by formula (4):

[0101]

[0102] In formula (4), a and b are both positive parameters.

[0103] S202: determining a first step pulse corresponding to a first resistance value from the plurality of first step pulses according to a plurality of resistance values ​​corresponding to the plurality of first step pulses; a pulse width of a first pulse of the first step pulse corresponding to the first resistance value is a first pulse width, and an amplitude of the first pulse is a first amplitude;

[0104] Optionally, the plurality of first step pulses include a plurality of first step pulses in a first set and a plurality of first step pulses in a second set;

[0105] The method of determining a first step pulse corresponding to a first resistance value from the plurality of first step pulses according to the plurality of resistance values ​​corresponding to the plurality of first step pulses includes:

[0106] When the plurality of first step pulses in the first set are applied to the phase change memory unit 101, the resistance value corresponding to each of the plurality of first step pulses in the first set is determined; the pulse width of the first pulse of each of the plurality of first step pulses in the first set is a preset pulse width;

[0107] Determine the amplitude of the first pulse of the first step pulse corresponding to the minimum resistance value among the multiple resistance values ​​corresponding to the multiple first step pulses in the first set as the first amplitude;

[0108] When the plurality of first step pulses in the second set are applied to the phase change memory unit 101, the resistance value corresponding to each of the plurality of first step pulses in the second set is determined; the amplitude of the first pulse of the plurality of first step pulses in the second set is the first amplitude;

[0109] Determine the minimum resistance value among the plurality of resistance values ​​corresponding to the plurality of first step pulses in the second set as the first resistance value;

[0110] A first step pulse is determined according to the resistance value of the first resistor, and the pulse width of a first pulse of the first step pulse is determined as the first pulse width.

[0111] In a specific application scenario, the step of the server 104 determining the first step pulse corresponding to the first resistance value includes:

[0112] D1. The pulse sending unit 103 applies a RESET pulse to the phase change memory cell 101 to amorphize the phase change memory cell 101;

[0113] E1. The pulse sending unit 103 applies the first step pulse in the first set to the phase change memory unit 101; the initial value of the pulse width of the first pulse of the first step pulse is set to the first preset pulse width, where the first preset pulse width is the pulse width at which the phase change memory unit 101 starts to crystallize;

[0114] F1. The pulse transmitting unit 103 applies a READ pulse to the phase change memory unit 101, and reads the resistance value of the phase change memory unit 101 after the pulse is applied;

[0115] G1. Repeat the above acquisition process, gradually increase the amplitude of the first pulse, and increase it by 0.1 microampere each time, compare the resistance values ​​of the phase change memory unit 101 to which different first pulses are applied, and determine the amplitude of the first pulse of the first step pulse corresponding to the minimum resistance value among the multiple resistance values ​​as the first amplitude;

[0116] H1. The pulse sending unit 103 applies a RESET pulse to the phase change memory cell 101 to amorphize the phase change memory cell 101;

[0117] I1. The pulse sending unit 103 applies the first step pulse in the second set to the phase change memory unit 101; the initial value of the amplitude of the first pulse of the first step pulse is set to the first amplitude;

[0118] J1. The pulse sending unit 103 applies a READ pulse to the phase change memory cell 101, and reads the resistance value of the phase change memory cell 101 after the pulse is applied;

[0119] K1. Repeat the above acquisition process, gradually increase the pulse width of the first pulse, and increase it by 0.1 microampere each time. Compare the resistance values ​​of the phase change memory unit 101 with different first pulses applied. The pulse width of the first pulse of the first step pulse corresponding to the minimum resistance value among multiple resistance values ​​is determined as the first pulse width.

[0120] Optionally, the plurality of first step pulses include a plurality of first step pulses in a first set and a plurality of first step pulses in a second set;

[0121] The method of determining a first step pulse corresponding to a first resistance value from the plurality of first step pulses according to the plurality of resistance values ​​corresponding to the plurality of first step pulses includes:

[0122] When the plurality of first step pulses in the first set are applied to the phase change memory unit 101, the resistance value corresponding to each of the plurality of first step pulses in the first set is determined; the amplitude of the first pulse of each of the plurality of first step pulses in the first set is a preset amplitude;

[0123] Determine the pulse width of the first pulse of the first step pulse corresponding to the minimum resistance value among the multiple resistance values ​​corresponding to the multiple first step pulses in the first set as the first pulse width;

[0124] When the plurality of first step pulses in the second set are applied to the phase change memory unit 101, the resistance value corresponding to each of the plurality of first step pulses in the second set is determined; the pulse width of the first pulse of the plurality of first step pulses in the second set is the first pulse width;

[0125] Determine the minimum resistance value among the plurality of resistance values ​​corresponding to the plurality of first step pulses in the second set as the first resistance value;

[0126] A first step pulse is determined according to the resistance value of the first resistor, and the amplitude of a first pulse of the first step pulse is determined to be a first amplitude.

[0127] In a specific application scenario, the step of determining a first step pulse corresponding to the first resistance value includes:

[0128] D2. The pulse sending unit 103 applies a RESET pulse to the phase change memory cell 101 to amorphize the phase change memory cell 101;

[0129] E2. The pulse sending unit 103 applies the first step pulse in the first set to the phase change memory unit 101; the initial value of the amplitude of the first pulse of the first step pulse is set to the first preset amplitude, where the first preset amplitude is the amplitude at which the phase change memory unit 101 starts to crystallize;

[0130] F2. The pulse sending unit 103 applies a READ pulse to the phase change memory unit 101, and the resistance sensing unit 102 measures the resistance value of the phase change memory unit 101 after the pulse is applied and transmits the resistance value to the server 104;

[0131] G2. Repeat the above acquisition process, gradually increase the pulse width of the first pulse, and increase it by 1 millisecond each time. The server 104 compares the resistance values ​​of the phase change storage unit 101 with different first pulses, and determines the pulse width of the first pulse of the first step pulse corresponding to the minimum resistance value among multiple resistance values ​​as the first pulse width.

[0132] H2. The pulse sending unit 103 applies a RESET pulse to the phase change memory cell 101 to amorphize the phase change memory cell 101;

[0133] I2. The pulse sending unit 103 applies the first step pulse in the second set to the phase change memory unit 101; the initial value of the pulse width of the first pulse of the first step pulse is set to the first pulse width;

[0134] J2. The pulse sending unit 103 applies a READ pulse to the phase change memory unit 101, and the resistance sensing unit 102 measures the resistance value of the phase change memory unit 101 after the pulse is applied and transmits the resistance value to the server 104;

[0135] k2. Repeat the above acquisition process, gradually increase the pulse width of the first pulse, and increase it by 1 millisecond each time. The server 104 compares the resistance values ​​of the phase change storage unit 101 with different first pulses, and determines the amplitude of the first pulse of the first step pulse corresponding to the minimum resistance value among multiple resistance values ​​as the first amplitude.

[0136] S203: determining a second step pulse corresponding to a second resistance value from the plurality of second step pulses according to a plurality of resistance values ​​corresponding to the plurality of second step pulses; a first pulse of the second step pulse matches a first pulse of the first step pulse corresponding to the first resistance value; a pulse width of a non-first pulse of the second step pulse corresponding to the second resistance value is a second pulse width; the first step pulse and the second step pulse are used to transform the phase change memory unit 101 from an amorphous state to a crystalline state;

[0137] The first pulse of the second step pulse matches the first pulse of the first step pulse corresponding to the first resistor value, which means that the pulse width of the first pulse of the second step pulse is the first pulse width, and the amplitude of the second step pulse is the first amplitude.

[0138] Optionally, the determining of a second step pulse corresponding to a second resistance value from the plurality of second step pulses according to the plurality of resistance values ​​corresponding to the plurality of second step pulses includes:

[0139] When the plurality of second step pulses are applied to the phase change memory unit 101, determining a resistance value corresponding to each second step pulse in the plurality of second step pulses;

[0140] Determine the minimum resistance value among the multiple resistance values ​​corresponding to the multiple second step pulses as the second resistance value;

[0141] Specifically, the second step pulse is determined according to the resistance value of the second resistor, wherein the determined pulse width of the non-first pulse of the second step pulse is the second pulse width.

[0142] Wherein, the second step pulse includes a first pulse and at least one non-first pulse;

[0143] Characterized in that the second step pulse includes a first pulse and at least one non-first pulse;

[0144] The pulse width of each pulse of the at least one non-first pulse is equal;

[0145] The amplitude of the latter pulse between any two adjacent non-first pulses of the at least one non-first pulse is smaller than the amplitude of the former pulse;

[0146] The amplitude of the last pulse of the at least one non-first pulse tends to zero.

[0147] In a specific application scenario, determining a second step pulse corresponding to a second resistance value from the plurality of second step pulses according to a plurality of resistance values ​​corresponding to the plurality of second step pulses includes:

[0148] L. The pulse sending unit 103 applies a RESET pulse to the phase change memory unit 101 to make the phase change memory unit 101 amorphous;

[0149] M. The pulse sending unit 103 applies a second step pulse to the phase change memory unit 101; the pulse width of the first pulse of the second step pulse is the first pulse width, the amplitude of the first pulse is the first amplitude, and the amplitude of the last pulse of at least one non-first pulse tends to 0;

[0150] N. The pulse sending unit 103 applies a READ pulse to the phase change memory unit 101, and reads the resistance of the phase change memory unit 101 after the pulse is applied;

[0151] O. Repeat the above measurement process, the pulse sending unit 103 gradually increases the pulse width of the at least one non-first pulse of the phase change memory unit 101, and each time it can be increased by 1 millisecond, and the server 104 sets the pulse width of the non-first pulse of the second step pulse corresponding to the second resistance value as the second pulse width;

[0152] S204: Determine the first unknown parameter and the second unknown parameter based on the first pulse width, the second pulse width and the first amplitude; and then determine the current equation.

[0153] In one application scenario, the server 104 substitutes two sets of data, I = first amplitude, t = 0; and I = 0, t = second pulse width, into the current equation: Determine the parameters a, b, and thus determine the current equation.

[0154] In this embodiment, if Figure 4 (b) shows that the first amplitude is 520uA, the first pulse width is 200ns, and the second pulse width is 250ns.

[0155] S205: Based on the current equation, the amplitude of the non-first pulse of the second step pulse corresponding to the second resistor value is adjusted to obtain a target step pulse matching the current equation.

[0156] In one application scenario, see Figure 4 (b) Figure 4(b) is a schematic diagram comparing the target step pulse and the curve of the current equation in one embodiment of the present application. Specifically, the server 104 adjusts the amplitude of the non-first pulse of the second step pulse corresponding to the second resistance value based on the current equation, and adjusts the amplitude of the non-first pulse of the second step pulse corresponding to the second pulse width to the target step pulse matching the current equation, that is, at least one point of each pulse in the non-first pulse of the second step pulse corresponding to the second pulse width coincides with a point on the current equation curve.

[0157] See also Figure 5 , Figure 5 It is a comparative diagram of the temperature-time variation curve of the phase change memory unit 101 corresponding to the current equation obtained by COMSOL simulation in one embodiment of the present application and the temperature-time variation curve of the phase change memory unit 101 of the target step pulse; it can be found that the temperature drop of the current equation is linear, which meets the requirement of maximum crystallization, and the temperature drop curve of the target step pulse is similar to the temperature drop curve of the current equation, and a better crystallization condition can also be obtained.

[0158] Based on the first pulse width, the second pulse width and the first amplitude, the first unknown parameter and the second unknown parameter are determined, and then the current equation is determined, and a current equation that meets the crystallization requirements is obtained; based on the current equation, the amplitude of the non-first pulse of the second step pulse corresponding to the second resistance value is adjusted to obtain a target step pulse matching the current equation, and a target step pulse that meets the crystallization requirements is obtained.

[0159] The Joule heat change provided by the target step pulse during the erase operation corresponds to the crystallization process of the phase change material, which meets the crystallization requirements of the phase change memory unit 101, thereby making the resistance distribution of the entire phase change memory unit 101 uniform, the erase operation success rate high and the speed fast.

[0160] Furthermore, the above technical solution conceived by the present invention is compared with the prior art. Since the present invention can confirm the current equation of the phase change memory unit 101 through instrument measurement combined with calculation, an optimization solution for the step pulse can be obtained by comparing the step pulse to be optimized with the current equation, thereby solving the problem of relying solely on instrument measurement and requiring a lot of time, and saving manpower and time costs.

[0161] The present application also provides a device for determining a step pulse equation of a phase change memory unit 101, Figure 5 is a schematic diagram of a structure of a device for determining a step pulse equation of a phase change memory unit 101 provided in an embodiment of the present application, such as Figure 6 As shown, the device comprises:

[0162] A first determining unit 301 is used to determine a current equation including a first unknown parameter and a second unknown parameter based on the determined resistance equation and temperature equation;

[0163] The second determining unit 302 is used to determine a first step pulse corresponding to a first resistance value from the plurality of first step pulses according to the plurality of resistance values ​​corresponding to the plurality of first step pulses; the pulse width of a first pulse of the first step pulse corresponding to the first resistance value is a first pulse width, and the amplitude of the first pulse is a first amplitude;

[0164] A third determining unit 303 is used to determine a second step pulse corresponding to a second resistance value from the plurality of second step pulses according to the plurality of resistance values ​​corresponding to the plurality of second step pulses; the first pulse of the second step pulse matches the first pulse of the first step pulse corresponding to the first resistance value; the pulse width of the non-first pulse of the second step pulse corresponding to the second resistance value is the second pulse width; the first step pulse and the second step pulse are used to transform the phase change memory unit 101 from an amorphous state to a crystalline state;

[0165] A fourth determining unit 304 is used to determine the first unknown parameter and the second unknown parameter based on the first pulse width, the second pulse width and the first amplitude; and then determine the current equation;

[0166] The fifth determining unit 305 is used to adjust the amplitude of the non-first pulse of the second step pulse corresponding to the second resistance value based on the current equation to obtain a target step pulse matching the current equation.

[0167] The device and method embodiments in the embodiments of the present application are based on the same application concept.

[0168] The present application also provides an electronic device, which includes a processor and a memory, wherein the memory stores at least one instruction, at least one program, a code set or an instruction set, and the at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by the processor to implement the method for determining the step pulse equation of the above-mentioned phase change storage unit 101.

[0169] The electronic device and method embodiments in the embodiments of the present application are based on the same application concept.

[0170] An embodiment of the present application also provides a storage medium, which can be set in the server 104 to store at least one instruction, at least one program, code set or instruction set related to the method for confirming the step pulse in the method embodiment. The at least one instruction, the at least one program, the code set or instruction set is loaded and executed by the processor to implement the method for determining the step pulse equation of the above-mentioned phase change storage unit 101.

[0171] Optionally, in this embodiment, the storage medium may be located in at least one of the multiple network servers 104 of the computer network. Optionally, in this embodiment, the storage medium may include, but is not limited to, various media that can store program codes, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0172] The device and method embodiments in the embodiments of the present application are based on the same application concept.

[0173] The above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for confirming a step pulse, characterized in that: The method comprises: Determining a current equation including a first unknown parameter and a second unknown parameter based on the determined resistance equation and temperature equation; Determine a first step pulse corresponding to a first resistance value from the plurality of first step pulses according to a plurality of resistance values ​​corresponding to the plurality of first step pulses; the pulse width of a first pulse of the first step pulse corresponding to the first resistance value is a first pulse width, and the amplitude of the first pulse is a first amplitude; Determine a second step pulse corresponding to a second resistance value from the plurality of second step pulses according to a plurality of resistance values ​​corresponding to the plurality of second step pulses; a first pulse of the second step pulse matches a first pulse of the first step pulse corresponding to the first resistance value; a pulse width of a non-first pulse of the second step pulse corresponding to the second resistance value is a second pulse width; the first step pulse and the second step pulse are used to transform the phase change memory unit from an amorphous state to a crystalline state; Determine the first unknown parameter and the second unknown parameter based on the first pulse width, the second pulse width and the first amplitude, and then determine the current equation; The amplitude of the non-first pulse of the second step pulse corresponding to the second resistance value is adjusted based on the current equation to obtain a target step pulse matching the current equation.

2. The step pulse confirmation method according to claim 1, characterized in that Also included is a method for determining the resistance equation, The determination of the resistance equation comprises: A resistance equation is determined based on a plurality of first pulses applied to a phase change memory cell and a resistance corresponding to each first pulse; the first pulse is used to change the phase change memory cell from an amorphous state to a crystalline state; and the resistance is the resistance of the phase change memory cell.

3. The step pulse confirmation method according to claim 2, characterized in that: The step of determining a resistance equation according to the obtained plurality of first pulses applied to the phase change memory unit and the resistance corresponding to each first pulse comprises: acquiring a plurality of first pulses applied to the phase change memory unit; Obtaining a resistance corresponding to each first pulse in the plurality of first pulses; Determine a voltage corresponding to each first pulse according to each first pulse and a resistance corresponding to each first pulse; Determine a voltage-current equation according to each first pulse and a voltage corresponding to each first pulse; The voltage-current equation is fitted using a fitting rule to obtain the resistance equation.

4. The step pulse confirmation method according to claim 1, characterized in that: The plurality of first step pulses include a plurality of first step pulses in a first set and a plurality of first step pulses in a second set; The method of determining a first step pulse corresponding to a first resistance value from the plurality of first step pulses according to the plurality of resistance values ​​corresponding to the plurality of first step pulses comprises: When the plurality of first step pulses in the first set are applied to the phase change memory unit, the resistance value corresponding to each of the plurality of first step pulses in the first set is determined; the pulse width of the first pulse of each of the plurality of first step pulses in the first set is a preset pulse width; Determine the amplitude of the first pulse of the first step pulse corresponding to the minimum resistance value among the plurality of resistance values ​​corresponding to the plurality of first step pulses in the first set as the first amplitude; When the plurality of first step pulses in the second set are applied to the phase change memory unit, the resistance value corresponding to each of the plurality of first step pulses in the second set is determined; the amplitude of the first pulse of the plurality of first step pulses in the second set is the first amplitude; Determine the minimum resistance value among the plurality of resistance values ​​corresponding to the plurality of first step pulses in the second set as the first resistance value; A first step pulse is determined according to the resistance value of the first resistor, and the determined pulse width of a first pulse of the first step pulse is the first pulse width.

5. The step pulse confirmation method according to claim 1, characterized in that: The plurality of first step pulses include a plurality of first step pulses in a third set and a plurality of first step pulses in a fourth set; The method of determining a first step pulse corresponding to a first resistance value from the plurality of first step pulses according to the plurality of resistance values ​​corresponding to the plurality of first step pulses comprises: When the plurality of first step pulses in the third set are applied to the phase change memory unit, a resistance value corresponding to each of the plurality of first step pulses in the third set is determined; an amplitude of a first pulse of each of the plurality of first step pulses in the third set is a preset amplitude; Determine the pulse width of the first pulse of the first step pulse corresponding to the minimum resistance value among the multiple resistance values ​​corresponding to the multiple first step pulses in the third set as the first pulse width; When the plurality of first step pulses in the fourth set are applied to the phase change memory unit, a resistance value corresponding to each of the plurality of first step pulses in the fourth set is determined; the pulse width of the first pulse of the plurality of first step pulses in the fourth set is the first pulse width; Determine the minimum resistance value among the plurality of resistance values ​​corresponding to the plurality of first step pulses in the fourth set as the first resistance value; A first step pulse is determined according to the resistance value of the first resistor, and the amplitude of a first pulse of the first step pulse is determined to be a first amplitude.

6. The step pulse confirmation method according to claim 1, characterized in that: The method of determining a second step pulse corresponding to a second resistance value from the plurality of second step pulses according to the plurality of resistance values ​​corresponding to the plurality of second step pulses comprises: When the plurality of second step pulses are applied to the phase change memory unit, determining a resistance value corresponding to each second step pulse in the plurality of second step pulses; Determine the minimum resistance value among the plurality of resistance values ​​corresponding to the plurality of second step pulses as the second resistance value; A second step pulse is determined according to the resistance value of the second resistor, wherein the determined pulse width of the non-first pulse of the second step pulse is the second pulse width.

7. The step pulse confirmation method according to claim 6, characterized in that: The second step pulse includes a first pulse and at least one non-first pulse; The pulse width of each pulse of the at least one non-first pulse is equal; The amplitude of the latter pulse between any two adjacent non-first pulses in the at least one non-first pulse is smaller than the amplitude of the former pulse; The amplitude of the last pulse of the at least one non-first pulse tends to zero.

8. A device for determining a step pulse equation of a phase change memory cell, characterized in that: The device comprises: A first determining unit, configured to determine a current equation including a first unknown parameter and a second unknown parameter based on the determined resistance equation and temperature equation; a second determining unit, configured to determine a first step pulse corresponding to a first resistance value from among the plurality of first step pulses according to a plurality of resistance values ​​corresponding to the plurality of first step pulses; the pulse width of a first pulse of the first step pulse corresponding to the first resistance value is a first pulse width, and the amplitude of the first pulse is a first amplitude; a third determining unit, configured to determine a second step pulse corresponding to a second resistance value from the plurality of second step pulses according to the plurality of resistance values ​​corresponding to the plurality of second step pulses; a first pulse of the second step pulse matches a first pulse of the first step pulse corresponding to the first resistance value; a pulse width of a non-first pulse of the second step pulse corresponding to the second resistance value is a second pulse width; and the first step pulse and the second step pulse are configured to transform the phase change memory unit from an amorphous state to a crystalline state; a fourth determining unit, configured to determine the first unknown parameter and the second unknown parameter based on the first pulse width, the second pulse width and the first amplitude; and further determine the current equation; A fifth determination unit is used to adjust the amplitude of the non-first pulse of the second step pulse corresponding to the second resistance value based on the current equation to obtain a target step pulse matching the current equation.

9. An electronic device, characterized in that: The electronic device includes a processor and a memory, wherein the memory stores at least one instruction, at least one program, a code set or an instruction set, and the at least one instruction, the at least one program, the code set or the instruction set is loaded and executed by the processor to implement the method for determining the step pulse equation of the phase change memory unit as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that: The storage medium stores at least one instruction, at least one program, a code set or an instruction set, and the at least one instruction, the at least one program, the code set or the instruction set are loaded and executed by the processor to implement the method for determining the step pulse equation of the phase change storage unit as described in any one of claims 1-7.

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