Tunability of dopant concentration in thin hafnium oxide films

Abstract

A method of depositing a hafnium oxide thin film having strong ferroelectricity is described. A monolayer of hafnium oxide is formed in a first process cycle, the first process cycle comprising sequentially exposing a substrate to a hafnium precursor, a purge gas, a first oxidant, and a purge gas. A monolayer of doped hafnium oxide is formed in a second process cycle, the second process cycle comprising sequentially exposing a substrate to a hafnium precursor, a purge gas, a dopant precursor, a purge gas, a second oxidant, and a purge gas. A hafnium oxide thin film is also described.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to the field of electronic device manufacturing, and in particular, to integrated circuit (IC) manufacturing. More particularly, embodiments of the present disclosure provide doped hafnium oxide thin films, wherein the doping dose can be particularly controlled. Background Art

[0002] Integrated circuits have evolved into complex devices that may include millions of transistors, capacitors, and resistors on a single chip. During the evolution of integrated circuits, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be manufactured using a manufacturing process) has decreased.

[0003] A transistor is a circuit component or element generally formed on a semiconductor device. In addition to capacitors, inductors, resistors, diodes, wires, or other elements, there are many transistors that can be formed on a semiconductor device, depending on the circuit design. A metal oxide semiconductor field effect transistor (MOSFET) is a type of field effect transistor (FET). A MOSFET has an insulated gate, and the gate voltage determines the conductivity of the device. The ability to change the conductivity with the amount of applied voltage is used to amplify or switch electronic signals.

[0004] Generally speaking, a transistor includes a gate stack formed between a source region and a drain region. The source region and the drain region may include doped regions of the substrate and may exhibit a doping profile suitable for a particular application. The gate stack is located above the channel region and may include a gate dielectric interposed between a gate electrode and the channel region in the substrate.

[0005] Negative capacitance FET (NCFET) has been proposed as an alternative transistor. NCFET has the same structure as MOSFET, except that a ferroelectric thin film is used as the gate insulator. Negative capacitance is generated when ferroelectric material is used as the gate insulator.

[0006] Doped hafnium oxide films exhibit ferroelectricity that is sensitive to dopant concentration. For films as thin as 2 nanometers (nm), HfO 2 The total number of monolayers and dopant monolayers does not exceed 20-30. If almost the entire dopant film monolayer is inserted to dope HfO 2 If the dopant concentration in these stacks is an integer multiple of about 3-5 mol % as is the case with typical atomic layer deposition (ALD). Therefore, the conventional method of adding dopants one monolayer after another will result in a rarely achievable doping level in the range of 1-10 mol %, which is required for most doped hafnium oxide films to achieve ferroelectricity. Therefore, precise control / fine tuning of the dopant concentration and ferroelectricity of the thin films is required. Summary of the invention

[0007] Apparatus and methods for manufacturing integrated circuits are described. In one or more embodiments, methods for depositing films are described. In one embodiment, a first deposition cycle includes exposing a substrate to a hafnium precursor in a processing chamber to deposit a hafnium-containing monolayer, purging the processing chamber of the hafnium precursor, exposing the substrate to a first oxidant to react with the hafnium-containing monolayer to form a hafnium oxide monolayer, and purging the processing chamber of the first oxidant. A second deposition cycle includes exposing the substrate to a hafnium precursor in the processing chamber to deposit a second hafnium-containing monolayer, purging the processing chamber of the hafnium precursor, exposing the substrate to a dopant precursor to deposit a dopant-containing layer on the substrate having the second hafnium-containing monolayer, purging the processing chamber of the dopant precursor, exposing the substrate to a second oxidant to react with the hafnium-containing monolayer and the dopant-containing layer to form a doped hafnium oxide film on the substrate, and purging the substrate of the second oxidant.

[0008] In one or more embodiments, a method of depositing a film is described. A monolayer of hafnium oxide is formed in a first process cycle, the first process cycle comprising sequentially exposing a substrate to a hafnium precursor, a purge gas, a first oxidant, and a purge gas. A monolayer of doped hafnium oxide is formed in a second process cycle, the second process cycle comprising sequentially exposing a substrate to a hafnium precursor, a purge gas, a dopant precursor, a purge gas, a second oxidant, and a purge gas. The first process cycle or the second process cycle is repeated one or more times to form a doped hafnium oxide film having a thickness of about 0.5 nm to about 10 nm.

[0009] In one or more embodiments, a thin film on a substrate is described. The thin film includes less than or equal to about 50 HfO doped with a dopant. 2 The monolayer, the dopant includes one or more of aluminum (Al), silicon (Si), zirconium (Zr), yttrium (Y), lanthanum (La), gadolinium (Gd), or strontium (Sr). The dopant is present in an amount of about 1 mol % to about 9 mol %, wherein the film has a Cd / D ratio of about 10 to about 50 microcoulombs per square centimeter (50 μC cm -2 )’s remanent polarization. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above-mentioned features of the present disclosure can be understood in detail by referring to the embodiments (some of which are illustrated in the accompanying drawings), and the more specific description of the present disclosure briefly summarized above. However, it should be noted that the accompanying drawings only illustrate typical embodiments of the present disclosure and are therefore not to be considered as limiting the scope of the present disclosure, as the present disclosure may allow other equivalent embodiments. The embodiments described herein are shown by way of example and not limitation in the various figures of the accompanying drawings, wherein similar reference numerals represent similar elements.

[0011] Figure 1 A flow chart illustrating one embodiment of a method of forming a thin film according to embodiments described herein;

[0012] Figure 2A illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0013] Figure 2B illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0014] Figure 2C illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0015] Figure 2D illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0016] Figure 2E illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0017] Figure 2F illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0018] Figure 3A illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0019] Figure 3B illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0020] Figure 3C illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0021] Figure 3D illustrates a cross-sectional view of a substrate according to one or more embodiments;

[0022] Figure 4 is a block diagram of a processing chamber according to one or more embodiments of the present disclosure; and

[0023] Figure 5 is a block diagram of a cluster tool system according to one or more embodiments of the present disclosure. DETAILED DESCRIPTION

[0024] Before describing several exemplary embodiments of the present disclosure, it should be understood that the present disclosure is not limited to the details of construction or processing steps described below. The present disclosure is capable of other embodiments and of being practiced or carried out in various ways.

[0025] As used in this specification and the appended claims, the term "substrate" refers to a surface or portion of a surface on which processing is performed. It will also be understood by those skilled in the art that reference to a substrate may refer to only a portion of a substrate unless the context clearly indicates otherwise. In addition, reference to depositing onto a substrate may refer to both a bare substrate and a substrate having one or more films or features deposited or formed thereon.

[0026] As used herein, "substrate" refers to any substrate or material surface formed on a substrate on which film processing is performed during a manufacturing process. For example, substrate surfaces on which processing may be performed include materials such as silicon, silicon oxide, strained silicon, silicon on insulator (SOI), carbon-doped silicon oxide, amorphous silicon, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Substrates include, but are not limited to, semiconductor wafers. The substrate may be exposed to a pretreatment process to polish, etch, reduce, oxidize, hydroxylate (or generate or graft a target chemical moiety to impart chemical functionality), anneal, and / or bake the substrate surface. In addition to directly treating the substrate surface itself, in the present disclosure, any of the film processing steps disclosed may also be performed on an underlayer formed on the substrate, as disclosed in more detail below, and the term "substrate surface" is intended to include the underlayer referred to in the context. Thus, for example, when a film / layer or a portion of a film / layer is deposited onto a substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface. What is contained on a given substrate surface will depend on the material being deposited and the specific chemistry used.

[0027] As used in this specification and the appended claims, the terms "precursor," "reactant," "reactant gas," and similar terms are used interchangeably to refer to any gaseous species that can react with a substrate surface.

[0028] As used herein, "atomic layer deposition" or "cyclic deposition" refers to sequential exposure to two or more reactive compounds to deposit a layer of material onto a substrate surface. The substrate or a portion of the substrate is exposed to two or more reactive compounds separately, and the reactive compounds are introduced into a reaction zone of a processing chamber. In a time-domain ALD process, exposure to each reactive compound is separated by a delay so that each compound adheres and / or reacts to the substrate surface and is then removed from the processing chamber. These reactive compounds are referred to as being exposed to the substrate sequentially. In a spatial ALD process, different portions of the substrate surface or materials on the substrate surface are simultaneously exposed to two or more reactive compounds so that any given point on the substrate is not substantially exposed to more than one reactive compound at the same time. As used in this specification and the appended claims, the term "substantially" used in this regard means, as understood by those skilled in the art, that a small portion of the substrate may be simultaneously exposed to multiple reactive gases due to diffusion, but the simultaneous exposure is not intended.

[0029] In one aspect of the time-domain ALD process, a first reactive gas (i.e., a first precursor or compound A) is pulsed into the reaction zone followed by a first delay. Next, a second precursor or compound B is pulsed into the reaction zone followed by a second delay. During each delay, a purge gas (such as argon) is introduced into the processing chamber to purge the reaction zone or remove any residual reactive compounds or reaction byproducts from the reaction zone. Alternatively, the purge gas may continue to flow throughout the deposition process so that only the purge gas flows during the delay between pulses of the reactive compounds. The reactive compounds are pulsed alternately until a predetermined film or film thickness is formed on the substrate surface. In either case, the ALD process of pulsing compound A, purge gas, compound B, and purge gas is a cycle. The cycle may begin with compound A or compound B and continue the corresponding order of cycles until a film having a predetermined thickness is obtained.

[0030] In an embodiment of a spatial ALD process, a first reactant gas and a second reactant gas (e.g., nitrogen) are simultaneously delivered to a reaction zone, but separated by an inert gas curtain and / or a vacuum curtain. The substrate moves relative to the gas delivery device so that any given point on the substrate is exposed to the first reactant gas and the second reactant gas.

[0031] Generally speaking, the transistor includes a gate stack formed between a source region and a drain region. The source region and the drain region may include doped regions of the substrate and may present a doping profile suitable for a particular application. The gate stack is located above the channel region and may include a gate dielectric interposed between the gate electrode and the channel region in the substrate. A negative capacitance field effect transistor (NCFET) has the same structure as a MOSFET, except that a ferroelectric film (or a stack of ferroelectric / dielectric films) is used as a gate insulator. A negative capacitance FET is generated when a ferroelectric material is used as a gate insulator. In one or more embodiments, the hafnium oxide film advantageously has ferroelectric properties, particularly when a dopant (e.g., aluminum) is incorporated into the host lattice.

[0032] As used herein, "ferroelectric" refers to the property of a material having a spontaneous electric polarization that can be reversed by the application of an external electric field.

[0033] Composite thin films of one or more embodiments fabricated by ALD have many applications, including but not limited to logic and memory applications. More specifically, thin films such as those doped with a dopant (e.g., ZrO 2 、Al 2 O 3 , Y 2 O 3 and similar) hafnium oxide (HfO 2 )) exhibit ferroelectric properties, which are of great interest for low-power logic and memory applications.

[0034] Conventionally, doped hafnium oxide ALD films are formed by an [AB]-[CB] deposition process. Conventionally, a monolayer of hafnium oxide is formed in a first process cycle, the first process cycle comprising: sequentially exposing a substrate to a hafnium precursor, a purge gas, a first oxidant, and a purge gas. The monolayer of doped hafnium oxide is formed in a second process cycle, the second process cycle comprising: sequentially exposing a substrate to a dopant precursor, a purge gas, a second oxidant, and a purge gas. The first process cycle or the second process cycle may be repeated one or more times to form a film.

[0035] The second conventional process involves co-flowing a hafnium precursor and a dopant precursor in an [AC]-[B] process. Specifically, a doped hafnium oxide monolayer is formed by exposing the substrate to both a hafnium precursor and a dopant precursor, followed by a purge gas, an oxidant, and a purge gas in sequence.

[0036] Most doped hafnium oxide (HfO 2 The ferroelectricity of the ) film reaches a maximum at about 4 mol % to about 9 mol % dopant. For lower and higher dopant concentration levels, the ferroelectricity drops off sharply.

[0037] Embodiments described herein advantageously provide doped hafnium oxide films with the ability to precisely control / fine tune dopant concentrations. According to one or more embodiments, the dopant tunability in the thin film can be significantly improved by varying the dopant concentration in each monolayer. This dopant tunability, in turn, advantageously provides excellent control over the ferroelectric properties of the doped hafnium oxide film. In particular, embodiments provide dopant tunability as low as about 1.5 mol % in a thin film (i.e., a film having a thickness of about 2 nm and comprising about 30 monolayers).

[0038] Without intending to be bound by theory, it is believed that the significance of the method of one or more embodiments described herein is that for very thin films of 2 nm or up to 30 cycles, this method advantageously enables multiple concentrations (in increments of 1.5 mol %) in the range of about 1.5 to about 9 mol %, enabling fine tuning of ferroelectric film properties.

[0039] For one or more embodiments of doped hafnium oxide (HfO 2 ) film, each dopant-containing layer involves pulsing and purging a hafnium-containing precursor followed by a pulse of an oxidant prior to pulsing and purging a dopant precursor. Thus, each dopant-containing layer is composed of less than 100% of the dopant.

[0040] In one or more embodiments, a method of depositing a film is described. In one embodiment, a first deposition cycle includes: exposing a substrate to a hafnium precursor in a processing chamber to deposit a hafnium-containing monolayer, purging the processing chamber of the hafnium precursor, exposing the substrate to a first oxidant to react with the hafnium-containing monolayer to form a hafnium oxide monolayer, and purging the processing chamber of the first oxidant. A second deposition cycle includes: exposing the substrate to a hafnium precursor in the processing chamber to deposit a second hafnium-containing layer, purging the processing chamber of the hafnium precursor, exposing the substrate to a dopant precursor to deposit a dopant-containing layer on the substrate having the second hafnium-containing layer, purging the processing chamber of the dopant precursor, exposing the substrate to a second oxidant to react with the hafnium-containing monolayer and the dopant-containing layer to form a doped hafnium oxide monolayer on the substrate, and purging the substrate of the second oxidant.

[0041] Figure 1 A flow chart of a method 100 for depositing a film according to one or more embodiments of the present disclosure is shown. Figure 1 The method 100 includes a first deposition cycle 110 and a second deposition cycle 130. The method 100 begins at operation 105 by placing a substrate into a processing chamber.

[0042] The substrate may be any substrate known to those skilled in the art. In one or more embodiments, the substrate comprises silicon (Si), silicon oxide (SiO 2 ), germanium (Ge), silicon germanium (SiGe), molybdenum disulfide (MoS 2), Molybdenum diselenide (MoSe 2 ), tungsten disulfide (WS 2 ), tungsten diselenide (WSe 2 ), one or more of titanium nitride (TiN), tantalum nitride (TaN), tungsten (W), platinum (Pt) or iridium (Ir).

[0043] In operation 114, the substrate is exposed to a hafnium precursor in a processing chamber to deposit a hafnium-containing monolayer.

[0044] In one or more embodiments, the hafnium precursor is selected from tetrakis(ethylmethylamido)hafnium(IV) (TEMAHf), tetrakis(dimethylamido)hafnium(IV) (TDMAHf), tetrakis(diethylamido)hafnium(IV) (TDEAHf), hafnium tetrachloride (HfCl 4 ), isopropanol adduct of hafnium isopropoxide, tert-butyl hafnium (IV) oxide, dimethylbis (cyclopentadienyl) hafnium (IV), bis (trimethylsilyl) amido hafnium (IV) chloride, bis (methyl-η 5 -cyclopentadienyl)methoxymethyl hafnium, or bis(methyl-η 5 -cyclopentadienyl)dimethyl hafnium.

[0045] In operation 116, the processing chamber is purged of the hafnium precursor. Purging may be accomplished with any suitable gas that does not react with the substrate, the film on the substrate, and / or the walls of the processing chamber. Suitable purge gases include, but are not limited to, nitrogen (N 2 ), helium (He) and argon (Ar).

[0046] In operation 118, the substrate is exposed to a first oxidant to react with the hafnium-containing monolayer to form a hafnium oxide monolayer. In one or more embodiments, the first oxidant is selected from water (H 2 O), molecular oxygen (O 2 ), ozone (O 3 ), Direct O 2 Plasma or remote O 2 Plasma. In operation 120, the processing chamber is purged of the first oxidant.

[0047] The second deposition cycle 130 begins at operation 132 by exposing the substrate to a hafnium precursor in a processing chamber to deposit a second hafnium-containing monolayer.

[0048] In one or more embodiments, the hafnium precursor is selected from tetrakis(ethylmethylamido)hafnium(IV) (TEMAHf), tetrakis(dimethylamido)hafnium(IV) (TDMAHf), tetrakis(diethylamido)hafnium(IV) (TDEAHf), hafnium tetrachloride (HfCl 4), isopropanol adduct of hafnium isopropoxide, tert-butyl hafnium (IV) oxide, dimethylbis (cyclopentadienyl) hafnium (IV), bis (trimethylsilyl) amide hafnium (IV) chloride, bis (methyl-η 5 -cyclopentadienyl)methoxymethyl hafnium, or bis(methyl-η 5 -cyclopentadienyl)dimethyl hafnium.

[0049] As known to those skilled in the art, the hafnium precursor for the second deposition cycle can be the same precursor as used for the first deposition cycle, or the hafnium precursor can be a different precursor. In one or more embodiments, the hafnium precursor for the first deposition cycle is the same as the hafnium precursor for the second deposition cycle.

[0050] In operation 134, the processing chamber is purged of the hafnium precursor. In operation 136, the substrate is exposed to a dopant precursor to deposit a dopant-containing layer on the substrate having the second hafnium-containing monolayer.

[0051] In one or more embodiments, the dopant is selected from one or more of aluminum (Al), silicon (Si), zirconium (Zr), yttrium (Y), lanthanum (La), gadolinium (Gd) or strontium (Sr). In one or more embodiments, the dopant is selected from one or more of aluminum oxide, silicon oxide, zirconium oxide, yttrium oxide, lanthanum oxide, gadolinium oxide or strontium oxide.

[0052] In one or more embodiments, the dopant precursor is selected from trimethylaluminum (TMA), triethylaluminum (TEA), aluminum chloride (AlCl 3 ), silicon tetrachloride (SiCl 4 ), hexachlorodisilane (Si 2 Cl 6 ), bis(diethylamino)silane, tris(dimethylamino)silane, tri(isopropylcyclopentadienyl)lanthanum, tris(2,2,6,6-tetramethyl-3,5-heptanedioate)lanthanum(III) (La(thd) 3 ), tri(cyclopentyldienyl)lanthanum(III) (LaCp 3 ), tri(isopropylcyclopentadienyl)lanthanum(III) (La(CpiPr) 3 ), tetrakis(ethylmethylamido)zirconium(IV) (TEMAZr), tetrakis(dimethylamido)zirconium(IV) (TDMAZr), tetrakis(2,2,6,6-tetramethyl-3,5-heptanedioate)zirconium, 2-ethylhexanoate zirconium(IV), dibutyl oxide(bis-2,4-pentanedioate)zirconium(IV), tetrakis(diethylamido)zirconium(IV) (TDEAZr), dimethylbis(pentamethylcyclopentadienyl)zirconium(IV), bis(methyl-η 5-cyclopentadienyl) methoxymethyl zirconium, bis(cyclopentadienyl) zirconium dihydride (IV), zirconium tetrachloride (ZrCl 4 ), tris(cyclopentadienyl)yttrium(III) (YCp 3 ), tri(methylcyclopentadienyl)yttrium(III)((MeCp) 3 Y), tri(ethylcyclopentadienyl)yttrium(III)((EtCp) 3 Y), tris(2,2,6,6-tetramethyl-3,5-heptanedioate)yttrium(III) (Y(thd) 3 ), tris(2,2,6,6-tetramethyl-3,5-heptanedioate)gadolinium(III) (Gd(thd) 3 ), tris(methylcyclopentadienyl)gadolinium(III)((MeCp) 3 Gd), tris(ethylcyclopentadienyl)gadolinium(III)((EtCp) 3 Gd), bis(triisopropylcyclopentadienyl)strontium(II) ((i-Pr 3 Cp) 2 Sr), bis(trimethyl-n-propylcyclopentadienyl)strontium(II) ((n-PrMe 3 Cp) 2 Sr), or bis(methylcyclopentadienyl)strontium(II) (Sr(thd) 2 )

[0053] In operation 138, the dopant precursor is purged from the processing chamber. In operation 140, the substrate is exposed to a second oxidant to react with the hafnium-containing and dopant-containing species that form the doped hafnium-containing layer to form a doped hafnium oxide film on the substrate.

[0054] In one or more embodiments, the second oxidant is selected from H 2 O, molecular oxygen (O 2 ), ozone (O 3 ), Direct O 2 Plasma or remote O 2 As known to those skilled in the art, the oxidant used in the second deposition cycle can be the same oxidant used in the first deposition cycle, or the oxidant used in the second deposition cycle can be different from the oxidant used in the first deposition cycle. In one or more embodiments, the first oxidant and the second oxidant are independently selected from H 2 O, molecular oxygen (O 2 ), ozone (O 3 ), Direct O 2 Plasma or remote O 2 Plasma. In one or more embodiments, the oxidant used in the first deposition cycle is the same as the oxidant used in the second deposition cycle.

[0055] In operation 142, the second oxidant is cleaned from the substrate.

[0056] As known to those skilled in the art, purging the processing chamber includes flowing a purge gas over the substrate. In one or more embodiments, the purge gas is selected from Ar, N 2 The purge gas may be used to purge the process chamber of the hafnium precursor, the first oxidant, the dopant precursor, or the second oxidant. In some embodiments, the same purge gas is used for each purge operation. In other embodiments, different purge gases are used for different purge operations.

[0057] Reference FIG. 2A to FIG. 2F , one or more embodiments relate to a film stack 200. In some embodiments, the film stack 200 is part of a gate stack of a negative capacitance field effect transistor (NCFET).

[0058] The film stack 200 is formed on a substrate 210, which may be any suitable material or shape. In the illustrated embodiment, the substrate 210 is a flat surface, and the film stack 200 is represented by a box. However, those skilled in the art will appreciate that the substrate 210 may have one or more feature structures (e.g., grooves or vias), and the film stack 200 may be formed to conform to the surface shape of the substrate 210.

[0059] In one or more embodiments, the substrate 210 includes silicon (Si), silicon oxide (SiO 2 ), germanium (Ge), silicon germanium (SiGe), molybdenum disulfide (MoS 2 ), Molybdenum diselenide (MoSe 2 ), tungsten disulfide (WS 2 ), tungsten diselenide (WSe 2 ), one or more of titanium nitride (TiN), tantalum nitride (TaN), platinum (Pt), iridium (Ir) or tungsten (W).

[0060] In one or more embodiments, the substrate 210 includes a silicon wafer or a silicon fin and has a 0.5-2 nm silicon oxide interlayer dielectric.

[0061] In one or more embodiments, during a first deposition cycle, the substrate 210 is placed in the processing chamber 250 and exposed to a hafnium precursor to deposit the hafnium-containing monolayer 220 onto the substrate 210. Figure 2A The hafnium precursor may be any suitable hafnium precursor, including but not limited to Figure 1 The method relates to a hafnium precursor.

[0062] The hafnium precursor is purged from the processing chamber 250. In one or more embodiments, purging the processing chamber 250 includes flowing a purge gas (not shown) over the substrate 210. In one or more embodiments, the purge gas is selected from Ar, N 2 Or one or more of He.

[0063] Reference Figure 2B The substrate 210 is exposed to a first oxidant (not shown) in the processing chamber 250 to react with the hafnium-containing monolayer 220 to form the hafnium oxide monolayer 230. In one or more embodiments, the first oxidant is selected from H 2 O, molecular oxygen (O 2 ), ozone (O 3 ), Direct O 2 Plasma or remote O 2 The first oxidant in the processing chamber 250 is then purged.

[0064] Reference Figure 2C In the second deposition cycle, the substrate 210 is exposed to a hafnium precursor in the processing chamber 250a to deposit a second hafnium-containing monolayer 240. As known to those skilled in the art, the processing chamber 250 used for the first deposition cycle may be the same as or different from the processing chamber 250a used for the second deposition cycle. In one or more embodiments, the processing chamber used for the first deposition cycle is the same processing chamber as that used for the second deposition cycle. In one or more embodiments, the processing chamber used for the first deposition cycle is a different processing chamber from that used for the second deposition cycle. The hafnium precursor is then removed from the processing chamber 250a. In one or more embodiments, purging the processing chamber 250a includes flowing a purge gas (not shown) over the substrate 210. In one or more embodiments, the purge gas is selected from Ar, N 2 Or one or more of He.

[0065] Reference Figure 2D The substrate 210 is exposed to a dopant precursor in the processing chamber 250a to deposit a dopant-containing layer 260 on the substrate 210 having the second hafnium-containing single layer 240. FIG. 3A to FIG. 3D Without intending to be bound by theory, it is believed that the dopant precursor does not react with the hafnium precursor, but rather adsorbs on unreacted sites during the hafnium pulse supply or displaces some of the adsorbed hafnium precursor. Figure 3A The substrate 210 is shown with a hafnium oxide monolayer 230. The surface of the hafnium oxide monolayer 230 has a number of active sites 232. Although the active sites 232 are depicted as being evenly spaced, those skilled in the art will appreciate that this is for illustration purposes only. Figure 3BIn FIG. 2 , a hafnium precursor is exposed to substrate 210 and hafnium species 242 are chemisorbed on active sites 232. Although the reaction of the hafnium precursor with the substrate surface is self-limiting, at least some active sites 244 are still available but inaccessible to the hafnium precursor (e.g., due to steric hindrance). Figure 3C In the embodiment, the dopant precursor is exposed to the substrate 210 and combines with the available active sites 244 to form the dopant species 262 on the surface having the hafnium species 242. After oxidation, as Figure 3D As shown, the hafnium species 242 and the dopant species 262 are oxidized to form a doped hafnium oxide film 255. The doped hafnium oxide film 255 is depicted as a conglomeration of a hafnium oxide film 256 and a dopant oxide film 257. In one or more embodiments, the doped hafnium oxide film 255 includes or consists essentially of about 40 mol % aluminum dopant. The doped hafnium oxide film 270 may have many layers of the doped hafnium oxide film 255, and thus, the concentration of the film stack 200 may be adjusted from about 1.5 mol % dopant concentration increments up to about 40 mol %. Although discrete boundaries are shown, it will be understood by those skilled in the art that the dopant atoms, hafnium atoms, and oxygen atoms are randomly dispersed throughout the doped hafnium oxide film 255.

[0066] The aluminum-containing layer of one or more embodiments contains about 1 mol % to about 9 mol % aluminum oxide (Al 2 O 3 ). The mole % can be measured by any mechanism known to those skilled in the art. For example, the mole % can be measured using one or more of X-ray photoelectron spectroscopy (XPS), atomic emission spectroscopy (AES), secondary ion mass spectrometry (SIMS), Rutherford backscatter spectrometry (RBS), energy dispersive X-ray spectroscopy (EDX), or electron energy loss spectroscopy (EELS), but is not limited thereto.

[0067] The dopant precursor is then purged from the processing chamber 250a. As described above, in one or more embodiments, purging the processing chamber 250a includes flowing a purge gas (not shown) over the substrate 210. In one or more embodiments, the purge gas is selected from one or more of Ar, N 2 Or He.

[0068] Reference Figure 2E The substrate 210 is exposed to a second oxidant in the processing chamber 250a to react with the second hafnium-containing single layer 240 and the dopant-containing layer 260 to form a doped hafnium oxide film 270 on the substrate 210. In one or more embodiments, the second oxidant is selected from H 2 O, molecular oxygen (O2 ), ozone (O 3 ), Direct O 2 Plasma or remote O 2 The second oxidant is then purged from the processing chamber 250a. As described above, in one or more embodiments, purging the processing chamber 250a includes flowing a purge gas (not shown) over the substrate 210. In one or more embodiments, the purge gas is selected from Ar, N 2 Or one or more of He.

[0069] As known to those skilled in the art, the oxidant used in the second deposition cycle may be the same oxidant used in the first deposition cycle, or the oxidant used in the second deposition cycle may be different from the oxidant used in the first deposition cycle.

[0070] In one or more embodiments, the doped hafnium oxide film 270 includes about 1 mol % to about 40 mol % of a dopant. In one or more specific embodiments, the doped hafnium oxide film 270 includes about 1 mol % to about 9 mol % of a dopant. Mol % is a measure of the amount of an oxide-type dopant present in the doped hafnium oxide film. For example, in one or more embodiments, the dopant includes aluminum (Al), and the doped hafnium oxide film is an aluminum-doped hafnium oxide film. The aluminum-doped hafnium oxide film of one or more embodiments contains about 1 mol % to about 40 mol % of aluminum oxide (Al). 2 O 3 ). The aluminum-doped hafnium oxide film of one or more specific embodiments contains about 1 mol % to about 9 mol % aluminum oxide (Al 2 O 3 ). The mole % can be measured by any mechanism known to those skilled in the art. For example, the mole % can be measured using one or more of X-ray photoelectron spectroscopy (XPS), atomic emission spectroscopy (AES), secondary ion mass spectroscopy (SIMS), Rutherford backscattering spectroscopy (RBS), energy dispersive X-ray spectroscopy (EDX), or electron energy loss spectroscopy (EELS), but is not limited thereto.

[0071] In one or more embodiments, the thickness of the doped hafnium oxide film 270 ranges from about 0.5 nanometers (nm) to about 10 nm, including about 0.5 nm to about 8 nm, about 0.5 nm to about 7 nm, about 0.5 nm to about 6 nm, about 0.5 nm to about 5 nm, about 0.5 nm to about 4 nm, about 0.5 nm to about 3 nm, and about 0.5 nm to about 2 nm. In some embodiments, the thickness of the doped hafnium oxide film is less than about 10 nm, including less than about 9 nm, less than about 8 nm, less than about 7 nm, less than about 6 nm, less than about 5 nm, less than about 4 nm, less than about 3 nm, and less than about 2 nm. In some embodiments, the thickness of the doped hafnium oxide film is about 0.5 nm, about 1 nm, about 1.5 nm, about 2 nm, about 2.5 nm, about 3 nm, about 3.5 nm, about 4 nm, about 4.5 nm, about 5 nm, about 5.5 nm, about 6 nm, about 6.5 nm, about 7 nm, about 7.5 nm, about 8 nm, about 8.5 nm, about 9 nm, about 9.5 nm, and about 10 nm.

[0072] In one or more embodiments, the doped hafnium oxide film has a total of less than or equal to about 150 monolayers, including a total of less than or equal to about 140 monolayers, including a total of less than or equal to about 130 monolayers, a total of less than or equal to about 120 monolayers, a total of less than or equal to about 110 monolayers, a total of less than or equal to about 100 monolayers, a total of less than or equal to about 90 monolayers, a total of less than or equal to about 80 monolayers, a total of less than or equal to about 70 monolayers, a total of less than or equal to about 60 monolayers, a total of less than or equal to about 50 monolayers, including a total of less than or equal to about 45 monolayers, a total of less than or equal to about 40 monolayers, a total of less than or equal to about 35 monolayers, a total of less than or equal to about 30 monolayers, a total of less than or equal to about 25 monolayers, or a total of less than or equal to about 20 monolayers.

[0073] Reference Figure 2F The method may include repeating the first deposition cycle or the second deposition cycle one or more times to form a doped hafnium oxide film 270 having a thickness T of about 0.5 nm to about 10 nm and having a total of less than or equal to about 150 monolayers.

[0074] Reference FIG. 2A to FIG. 2FIn one or more embodiments, the method of depositing a film includes forming a hafnium oxide monolayer 230 in a first process cycle, the first process cycle including sequentially exposing a substrate 210 to a hafnium precursor, a purge gas, a first oxidant, and a purge gas. A doped hafnium oxide film 270 is formed in a second process cycle, the second process cycle including sequentially exposing the substrate 210 to a hafnium precursor, a purge gas, a dopant precursor, a purge gas, a second oxidant, and a purge gas. The first process cycle or the second process cycle may be repeated one or more times to form a doped hafnium oxide film having a thickness of about 0.5 nm to about 10 nm.

[0075] One or more embodiments are directed to a thin film, also referred to as a film stack. In some embodiments, the thin film is part of a gate stack of a negative capacitance field effect transistor (NCFET). In one or more embodiments, the thin film includes less than or equal to about 30 HfO doped with a dopant. 2 A monolayer, a dopant comprising one or more of aluminum (Al), silicon (Si), zirconium (Zr), yttrium (Y), lanthanum (La), gadolinium (Gd), or strontium (Sr), the dopant being present in an amount of about 2 mol % to about 9 mol %, wherein the film has a C 2 O 2 of about 10 to about 50 μC cm -2 The residual polarization.

[0076] In one or more embodiments, the film has a thermal conductivity of about 10 to about 50 μC cm -2 The remnant polarization includes about 10 μC cm -2 , about 15μC cm -2 , about 20μC cm -2 , about 25μC cm -2 , about 30μC cm -2 , about 35μC cm -2 , about 40μC cm -2 , about 45μC cm -2 , and about 50 μC cm -2 .

[0077] The film contains a total of 1 mol % to about 40 mol % of the dopant. In one or more specific embodiments, the film includes less than about 30 hafnium oxide (HfO 2 ) monolayer, aluminum oxide is present in an amount of about 4 mol % to about 8 mol %. The thickness of the film ranges from about 0.5 nm to about 10 nm.

[0078] Figure 4A block diagram of a plasma system 800 is shown for performing at least some of the methods of one or more embodiments. The plasma system 800 shown has a processing chamber 801. A movable pedestal 802 is used to hold a substrate 803 placed in the processing chamber 801. The pedestal 802 may include an electrostatic chuck (ESC), a direct current (DC) electrode embedded in the ESC, and a cooling / heating base. In one embodiment, the pedestal 802 is used as a mobile cathode. In one embodiment, the ESC includes an Al 2 O 3 Material, Y 2 O 3 , or other ceramic materials known to those of ordinary skill in the art of electronic device manufacturing. A DC power source 804 can be connected to a DC electrode of the pedestal 802. In some embodiments, the pedestal 802 includes a heater (not shown) that can raise the temperature of the substrate to a first temperature. Although an electrostatic chuck is depicted as the pedestal 802, those skilled in the art will understand that this is merely an example and that other pedestal types are also within the scope of the present disclosure.

[0079] like Figure 4 As shown, a substrate 803 is loaded and placed on a pedestal 802 via an opening 808. The plasma system 800 includes an inlet to input one or more process gases 812 to a plasma source 813 via a mass flow controller 811. The plasma source 813 including a showerhead 814 is coupled to the processing chamber 801 to receive one or more process gases 812 to generate plasma. The plasma source 813 is coupled to a radio frequency (RF) power supply 810. The plasma source 813 generates a plasma 815 from one or more process gases 812 in the processing chamber 801 using a high frequency electric field via the showerhead 814. The plasma 815 includes plasma particles such as ions, electrons, free radicals, or any combination thereof. In one embodiment, the power supply 810 supplies a power of about 50 watts (W) to about 3000 W at a frequency of about 400 kilohertz to about 162 megahertz to generate the plasma 815.

[0080] The plasma bias power 805 is coupled to the pedestal 802 (e.g., cathode) via an RF match 807 to ignite the plasma. In one embodiment, the plasma bias power 805 provides a bias power of no more than 1000 W at a frequency of about 2 MHz to 60 MHz, and in one embodiment, about 13 MHz. A plasma bias power 806 may also be provided, such as another bias power of no more than 1000 W at a frequency of about 400 kHz to about 60 MHz, and in one embodiment, about 60 MHz. The plasma bias power 806 and the plasma bias power 805 are connected to the RF match 807 to provide a dual frequency bias power. In one embodiment, the total bias power applied to the pedestal 802 is about 10 W to about 3000 W.

[0081] like Figure 4 As shown, a pressure control system 809 provides pressure to a processing chamber 801. The chamber 801 has one or more exhaust outlets 816 to exhaust volatile products produced during chamber processing. In one embodiment, the plasma system 800 is an inductively coupled plasma (ICP) system. In one embodiment, the plasma system 800 is a capacitively coupled plasma (CCP) system.

[0082] In some embodiments, a control system 817 is coupled to the processing chamber 801. The control system 817 includes a processor 818, a temperature controller 819 coupled to the processor 818, a memory 820 coupled to the processor 818, and an input / output device 821 coupled to the processor 818. The memory 820 may include one or more of a transitory memory (e.g., random access memory) and a non-transitory memory (e.g., storage).

[0083] In one embodiment, the processor 818 is configured to control one or more of: exposing the substrate to a hafnium precursor in a processing chamber; purging the substrate in the processing chamber; exposing the substrate to a dopant precursor in the processing chamber; or forming a thin film on the substrate, the thin film comprising less than or equal to about 50 HfO doped with a dopant. 2 Single layer.

[0084] The control system 817 may be configured to perform at least some of the methods described herein, and may be software or hardware or a combination of both. The plasma system 800 may be any type of high performance processing plasma system known in the art, such as but not limited to an etcher, a cleaner, a furnace, or any other plasma system used to manufacture electronic devices.

[0085] Figure 5 A system 900 is shown that can be used to process substrates according to one or more embodiments of the present disclosure. The system 900 can be referred to as a cluster tool. The system 900 includes a central transfer station 910 containing a robot 912. The robot 912 is depicted as a single blade robot; however, one skilled in the art will appreciate that other configurations of the robot 912 are also within the scope of the present disclosure. The robot 912 is configured to move one or more substrates between chambers connected to the central transfer station 910.

[0086] At least one pre-cleaning chamber 920 is connected to the central transfer station 910. The pre-cleaning chamber 920 may include one or more of a heater, a radiation source, or a plasma source. The pre-cleaning chamber 920 is in fluid communication with an activator. An exemplary pre-cleaning chamber 920 is Figure 4The plasma system 800 shown in FIG.

[0087] In some embodiments, there are two pre-cleaning chambers 920 connected to the central transfer station 910. Figure 5 In the illustrated embodiment, the pre-clean chamber 920 can be used as a pass through chamber between a factory interface 905 and a central transfer station 910. The factory interface 905 can include one or more robots 906 to move substrates from a cassette to the pre-clean chamber 920. Robots 912 then move the substrates from the pre-clean chamber 920 to other chambers within the system 900.

[0088] The deposition chamber 930 may be connected to the central transfer station 910. The deposition chamber 930 includes a susceptor to hold the substrate. The deposition chamber 930 is in fluid communication with one or more reactive gas sources to provide one or more reactive gas flows to the deposition chamber 930. The reactive gas of the deposition chamber includes molecules that can form a monolayer on the substrate.

[0089] The deposition chamber 930 may be any suitable chamber to provide molecular flow and control the temperature of the substrate. Figure 4 The plasma system 800 shown in FIG. 8 can also be used as a deposition chamber 930. A robot 912 can be used to move substrates into and out of the deposition chamber 930 through an isolation valve 914.

[0090] The selective deposition chamber 940 may also be connected to the central transfer station 910. The selective deposition chamber 940 may be any suitable deposition chamber, including but not limited to a CVD, ALD, PECVD, PEALD, or PVD chamber. In some embodiments, the selective deposition chamber 940 comprises an ALD chamber. The ALD chamber may be a time domain chamber, in which the reactant gases are sequentially exposed to the substrate so that only one reactant gas is present in the chamber at any given time. In some embodiments, the ALD chamber is a spatial ALD chamber, in which the reactant gases flow simultaneously into different regions of the processing chamber and the reactant gases are separated by gas curtains to prevent gas phase reactions between the reactant gases. In a spatial ALD chamber, the substrate moves between regions of the processing chamber containing different reactant gases to deposit a film.

[0091] Other processing chambers may be connected to the central transfer station 910. In the embodiment shown, an ashing chamber 960 is connected to the central transfer station 910 via an isolation valve 914. The ashing chamber 960 may be any suitable chamber for removing thin films after selective deposition.

[0092] At least one controller 950 is coupled to the central transfer station 910, the pre-clean chamber 920, the deposition chamber 930, the selective deposition chamber 940, or the ashing chamber 960. In some embodiments, more than one controller 950 is coupled to each chamber or station, with a master processor coupled to each independent processor to control the system 900. The controller 950 can be any type of general purpose computer processor, microcontroller, microprocessor, etc. used in an industrial setting to control the various chambers and sub-processors.

[0093] At least one controller 950 may have a processor 952, a memory 954 coupled to the processor 952, an input / output device 956 coupled to the processor 952, and support circuits 958 for communication between different electronic components. The memory 954 may include one or more of a transient memory (e.g., random access memory) and a non-transient memory (e.g., storage).

[0094] The processor's memory 954 or computer readable medium may be one or more readily accessible memories such as random access memory (RAM), read only memory (ROM), floppy disk, hard disk, or any other type of local or remote digital storage. The memory 954 may store instruction sets that are operated by the processor 952 to control the parameters and components of the system 900. Support circuits 958 are coupled to the processor 952 to support the processor in a conventional manner. The circuits may include, for example, cache, power supplies, clock circuits, input / output circuits, subsystems, and the like.

[0095] The process may typically be stored in a memory as a software program that is executed by a processor to cause a processing chamber to perform the process of the present disclosure. The software program may also be stored and / or executed by a second processor (not shown) that is remote from the hardware controlled by the processor. Some or all of the methods of the present disclosure may also be performed in hardware. Thus, the process may be implemented in software and executed using a computer system, implemented in hardware (e.g., an application specific integrated circuit) or other hardware type, or a combination of software and hardware. When executed by a processor, the software program converts a general purpose computer into a special purpose computer (controller) to control chamber operations to perform the process.

[0096] Unless otherwise specified herein or clearly contradicted by the context, the materials and methods described herein (especially the claims below) with the terms "a", "an", "the" and similar terms should be interpreted as covering both the singular and the plural. Unless otherwise specified herein, the numerical ranges mentioned herein are intended only as a shorthand expression for individually referring to each independent numerical value falling within the range, and each independent numerical value is incorporated into the specification as if it were individually mentioned herein. Unless otherwise specified herein or clearly contradicted by the context, all methods described herein can be performed in any suitable order. Unless otherwise stated, any and all examples or exemplary language (such as "for example") provided herein are intended only to better illustrate the materials and methods, and will not limit the scope. No language in the specification should be interpreted as indicating that any unclaimed element is a necessary condition for practicing the materials and methods.

[0097] References throughout this specification to "one embodiment", "certain embodiments", "one or more embodiments" or "an embodiment" mean that the specific features, structures, materials or characteristics described in the embodiment are included in at least one embodiment of the present disclosure. Therefore, phrases such as "in one or more embodiments", "in certain embodiments", "in an embodiment" or "in an embodiment" appearing throughout the specification do not necessarily refer to the same embodiment of the present disclosure. In addition, in one or more embodiments, specific features, structures, materials or characteristics may be combined in any suitable manner.

[0098] Although the present disclosure has been described with reference to specific embodiments, it should be understood that these embodiments are only for the purpose of illustrating the principles and applications of the present disclosure. It will be appreciated by those skilled in the art that various modifications and variations may be made to the methods and apparatus of the present disclosure without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure is intended to include modifications and variations that fall within the scope of the appended claims and their equivalents.

Claims

1. A method for depositing a doped hafnium oxide film, the method comprising the following steps: The first deposition cycle includes the following steps: exposing the substrate to a hafnium precursor in a processing chamber to deposit a hafnium-containing monolayer; clearing the processing chamber of the hafnium precursor; exposing the substrate to a first oxidant to react with the hafnium-containing monolayer to form a hafnium oxide monolayer; purging the processing chamber of the first oxidant; and The second deposition cycle includes the following steps: exposing the substrate to a hafnium precursor in a processing chamber to deposit a second hafnium-containing monolayer on the hafnium oxide monolayer; clearing the processing chamber of the hafnium precursor; exposing the substrate to a dopant precursor to deposit a dopant-containing layer on the substrate having the second hafnium-containing monolayer; clearing the processing chamber of the dopant precursor; exposing the substrate to a second oxidant to react with the second hafnium-containing single layer and the dopant-containing layer to form a doped hafnium oxide film on the substrate; and clearing the processing chamber of the second oxidant, and The first deposition cycle or the second deposition cycle is repeated one or more times to form a doped hafnium oxide film having a thickness of 0.5 nm to 10 nm and a total of less than or equal to 150 monolayers, wherein the concentration of the dopant in each monolayer of the doped hafnium oxide film is changed.

2. The method of claim 1, wherein the dopant is selected from one or more of aluminum (Al), silicon (Si), zirconium (Zr), yttrium (Y), lanthanum (La), gadolinium (Gd) or strontium (Sr).

3. The method of claim 1, wherein the hafnium precursor is selected from tetrakis(ethylmethylamido)hafnium(IV) (TEMAHf), tetrakis(dimethylamido)hafnium(IV) (TDMAHf), tetrakis(diethylamido)hafnium(IV) (TDEAHf), hafnium tetrachloride (HfCl4), isopropanol adduct of hafnium isopropoxide, tert-butyl hafnium(IV) oxide, dimethylbis(cyclopentadienyl)hafnium(IV), bis(trimethylsilyl)amido hafnium(IV) chloride, bis(methyl-η-butyl) oxide 5 -cyclopentadienyl)methoxymethyl hafnium, or bis(methyl-η 5 -cyclopentadienyl)dimethyl hafnium.

4. The method of claim 1, wherein the dopant precursor is selected from trimethylaluminum (TMA), triethylaluminum (TEA), aluminum chloride (AlCl3), silicon tetrachloride (SiCl4), hexachlorodisilane (Si2Cl6), bis(diethylamino)silane, tris(dimethylamino)silane, tri(isopropylcyclopentadienyl)lanthanum, tris(2,2,6,6-tetramethyl-3,5-heptanediate)lanthanum (III) (La(thd)3), tris(cyclopentadienyl)lanthanum (III) (LaCp3), tris(tri(cyclopentadienyl)lanthanum) ...6), tris(diethylamino)silane, tris(dimethylamino)silane, tris(isopropylcyclopentadienyl)lanthanum (III) (LaCp6), tris(2,2,6,6-tetramethyl-3,5-heptanediate)lanthanum (III) (La(thd)3), tris(cyclopentadienyl)lanthanum (III) (LaCp3), tris(tri(cyclopentadienyl)lanthanum) (III) (LaCp6), tris(diethylamino)silane, tris(dimethylamino)silane, tris(dimethylamino)silane, tris( (Isopropylcyclopentadienyl)lanthanum (III) (La(CpiPr)3), tetrakis(ethylmethylamido)zirconium (IV) (TEMAZr), tetrakis(dimethylamido)zirconium (IV) (TDMAZr), tetrakis(2,2,6,6-tetramethyl-3,5-heptanedioate)zirconium, 2-ethylhexanoate zirconium (IV), dibutyl oxide (bis-2,4-pentanedioate) zirconium (IV), tetrakis(diethylamido)zirconium (IV) (TDEAZr), dimethylbis(pentamethylcyclopentadienyl)zirconium (IV), bis(methyl-η 5 -cyclopentadienyl) methoxymethyl zirconium, bis(cyclopentadienyl) zirconium(IV), zirconium tetrachloride (ZrCl4), tri(cyclopentadienyl) yttrium(III) (YCp3), tri(methylcyclopentadienyl) yttrium(III) ((MeCp)3Y), tri(ethylcyclopentadienyl) yttrium(III) ((EtCp)3Y), tri(2,2,6,6-tetramethyl-3,5-heptanedione) yttrium(III) (Y(thd)3), tri(2,2,6,6-tetramethyl-3,5-heptanedione) yttrium(III) (Y(thd)3), One or more of tri(methylcyclopentadienyl)gadolinium(III) ((MeCp)3Gd), tri(ethylcyclopentadienyl)gadolinium(III) ((EtCp)3Gd), bis(triisopropylcyclopentadienyl)strontium(II) ((i-Pr3Cp)2Sr), bis(trimethyl-n-propylcyclopentadienyl)strontium(II) ((n-PrMe3Cp)2Sr), or bis(methylcyclopentadienyl)strontium(II) (Sr(thd)2). 5 . The method of claim 1 , wherein the doped hafnium oxide film comprises 1 mol % to 40 mol % of a dopant.

6. The method of claim 1, wherein the first oxidant and the second oxidant are independently selected from H2O, molecular oxygen (O2), ozone (O3), direct O2 plasma, or remote O2 plasma.

7. The method of claim 1, wherein purging the processing chamber comprises flowing a purge gas over the substrate.

8. The method of claim 7, wherein the purge gas is selected from one or more of Ar, N2 or He.

9. The method of claim 1, wherein the substrate comprises one or more of silicon, SiO2, Ge, SiGe, MoS2, MoSe2, WS2, WSe2, TiN, TaN, Pt, Ir, or W.

10. A method for depositing a doped hafnium oxide film, the method comprising the following steps: forming a hafnium oxide monolayer in a first process cycle, the first process cycle comprising sequentially exposing the substrate to a hafnium precursor, a purge gas, a first oxidant, and a purge gas; forming a doped hafnium oxide monolayer in a second process cycle, the second process cycle comprising sequentially exposing the substrate to a hafnium precursor, a purge gas, a dopant precursor, a purge gas, a second oxidant, and a purge gas; and The first process cycle or the second process cycle is repeated one or more times to form a doped hafnium oxide film having a thickness of 0.5 nm to 10 nm, wherein the concentration of the dopant in each single layer is changed.

11. The method of claim 10, wherein the hafnium precursor is selected from tetrakis(ethylmethylamido)hafnium(IV) (TEMAHf), tetrakis(dimethylamido)hafnium(IV) (TDMAHf), tetrakis(diethylamido)hafnium(IV) (TDEAHf), hafnium tetrachloride (HfCl4), hafnium isopropoxide isopropanol adduct, hafnium(IV) tert-butyl oxide, dimethylbis(cyclopentadienyl)hafnium(IV), bis(trimethylsilyl)amido hafnium(IV) chloride, bis(methyl-η-butyl oxide), 5 -cyclopentadienyl)methoxymethyl hafnium, bis(methyl-η 5 -cyclopentadienyl)dimethyl hafnium.

12. The method of claim 10, wherein the dopant precursor is selected from trimethylaluminum (TMA), triethylaluminum (TEA), aluminum chloride (AlCl3), silicon tetrachloride (SiCl4), hexachlorodisilane (Si2Cl6), bis(diethylamino)silane, tris(dimethylamino)silane, tri(isopropylcyclopentadienyl)lanthanum, tris(2,2,6,6-tetramethyl-3,5-heptanediate)lanthanum (III) (La(thd)3), tris(cyclopentadienyl)lanthanum (III) (LaCp3), tri(isopropylcyclopentadienyl)lanthanum(III) (La(CpiPr)3), tetrakis(ethylmethylamido)zirconium(IV) (TEMAZr), tetrakis(dimethylamido)zirconium(IV) (TDMAZr), tetrakis(2,2,6,6-tetramethyl-3,5-heptanedioate)zirconium, 2-ethylhexanoate zirconium(IV), dibutyl oxide(bis-2,4-pentanedioate)zirconium(IV), tetrakis(diethylamido)zirconium(IV) (TDEAZr), dimethylbis(pentamethylcyclopentadienyl)zirconium(IV), bis(methyl-η 5 -cyclopentadienyl) methoxymethyl zirconium, bis(cyclopentadienyl) zirconium(IV), zirconium tetrachloride (ZrCl4), tri(cyclopentadienyl) yttrium(III) (YCp3), tri(methylcyclopentadienyl) yttrium(III) ((MeCp)3Y), tri(ethylcyclopentadienyl) yttrium(III) ((EtCp)3Y), tri(2,2,6,6-tetramethyl-3,5-heptanedione) yttrium(III) (Y(thd)3), tri(2,2,6,6-tetramethyl-3,5-heptanedione) yttrium(III) (Y(thd)3), One or more of tri(methylcyclopentadienyl)gadolinium(III) ((MeCp)3Gd), tri(ethylcyclopentadienyl)gadolinium(III) ((EtCp)3Gd), bis(triisopropylcyclopentadienyl)strontium(II) ((i-Pr3Cp)2Sr), bis(trimethyl-n-propylcyclopentadienyl)strontium(II) ((n-PrMe3Cp)2Sr), or bis(methylcyclopentadienyl)strontium(II) (Sr(thd)2).

13. The method of claim 10, wherein the doped hafnium oxide film comprises 1 mol% to 40 mol% of a dopant oxide.

14. The method of claim 10, wherein the first oxidant and the second oxidant are selected from H2O, molecular oxygen (O2), ozone (O3), direct O2 plasma, or remote O2 plasma.

15. The method of claim 10, wherein the purge gas is selected from one or more of Ar, N2 or He.

16. The method of claim 10, wherein the doped hafnium oxide film has a total of less than or equal to 30 monolayers.

17. A thin film on a substrate, the thin film comprising less than or equal to 30 monolayers of HfO2 doped with a dopant formed by the method of claim 1 or 10, the dopant comprising one or more of aluminum (Al), silicon (Si), zirconium (Zr), yttrium (Y), lanthanum (La), gadolinium (Gd), or strontium (Sr), the dopant being present in an amount ranging from 1 mol % to 9 mol %, wherein the thin film has a C 2 O 2 of 10 to 50 μC cm -2 The amount of remnant polarization is different, and the concentration of the dopant in each single layer of the thin film is different.

18. The thin film of claim 17, wherein the thin film comprises less than 30 monolayers of HfO2 doped with aluminum oxide, and the aluminum oxide is present in an amount ranging from 4 mol% to 8 mol%.

19. The thin film of claim 18, wherein the thin film has a thickness in the range of 0.5 nm to 10 nm.

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