Semiconductor Structure and Method of Forming the Same

Abstract

A semiconductor structure and a method for forming the same. The forming method includes: providing a substrate; forming an initial fin layer on the substrate; forming a plurality of discrete hard mask structures on the initial fin layer; forming a first oxide layer on the sidewalls of the hard mask structures; performing oxygen ion implantation on the first oxide layer by using a plasma implantation process; and etching the initial fin layer to form a plurality of fins protruding from the substrate. The present invention helps to increase the thickness of the fins in the lateral direction, where the lateral direction is perpendicular to the extending direction of the fins and parallel to the top surface of the substrate.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and particularly to a semiconductor structure and a method for forming the same. Background Art

[0002] In semiconductor manufacturing, as the feature size of integrated circuits continues to decrease, the channel length of MOSFETs also continuously shortens accordingly. However, as the device channel length shortens, the distance between the source and drain of the device also shortens, resulting in a deterioration of the gate's control ability over the channel and making short-channel effects (SCEs) more likely to occur.

[0003] Fin field-effect transistors (FinFETs) have outstanding performance in suppressing short-channel effects. The gate of a FinFET can control the fin from at least two sides, so compared with planar MOSFETs, the gate of a FinFET has a stronger control ability over the channel and can well suppress short-channel effects.

[0004] However, existing fin field-effect transistors and methods for forming the same still need to be improved. Summary of the Invention

[0005] The problem solved by the present invention is to provide a semiconductor structure and a method for forming the same, which helps to increase the thickness of the fin in the transverse direction, where the transverse direction is perpendicular to the extending direction of the fin and parallel to the top surface of the substrate.

[0006] To solve the above problems, the present invention provides a method for forming a semiconductor structure, including: providing a substrate; forming an initial fin layer on the substrate; forming a plurality of discrete hard mask structures on the initial fin layer; forming a first oxide layer on the sidewalls of the hard mask structures; performing oxygen ion implantation on the first oxide layer by using a plasma implantation process; and etching the initial fin layer to form a plurality of fins protruding from the substrate.

[0007] Optionally, the material of the first oxide layer is silicon oxide.

[0008] Optionally, the thickness of the first oxide layer is 1 nm to 7 nm.

[0009] Optionally, after forming the initial fin layer and before forming the hard mask structure, it further includes: forming an insulating layer on the initial fin layer.

[0010] Optionally, after performing oxygen ion implantation on the first oxide layer and before etching the initial fin layer, the method further includes: using the hard mask structure as a mask to etch the insulating layer to form a first through hole in the insulating layer; forming a second oxide layer on the sidewall of the first through hole; and performing oxygen ion implantation on the second oxide layer by means of a plasma implantation process.

[0011] Optionally, after forming the initial fin layer and before forming the insulating layer, the method further includes: forming a liner layer on the surface of the initial fin layer, and the insulating layer covers the surface of the liner layer.

[0012] Optionally, after performing oxygen ion implantation on the second oxide layer and before etching the initial fin layer, the method further includes: etching the liner layer to form a second through hole in the liner layer, and the second through hole is located at the bottom of the first through hole.

[0013] Optionally, the material of the liner layer is silicon oxide.

[0014] Optionally, the material of the insulating layer is silicon nitride, silicon carbonitride, silicon carbon oxynitride, silicon oxynitride, boron nitride or boron carbonitride.

[0015] Optionally, after forming the insulating layer and before forming the hard mask structure, the method further includes: forming an etch stop layer on the surface of the insulating layer, and the hard mask structure covers a part of the surface of the etch stop layer.

[0016] Optionally, after performing oxygen ion implantation on the first oxide layer and before etching the insulating layer, the method further includes: using the hard mask structure as a mask to etch the etch stop layer to form a second through hole in the etch stop layer; forming a third oxide layer on the sidewall of the second through hole; and performing oxygen ion implantation on the third oxide layer by means of a plasma implantation process.

[0017] Optionally, in the process of etching the etch stop layer, the method further includes: etching and removing the first oxide layer.

[0018] Optionally, in the process of forming the third oxide layer, the third oxide layer also covers the top of the hard mask structure, the sidewall of the hard mask structure and the bottom of the second through hole.

[0019] Optionally, in the process of etching the insulating layer, the method further includes: etching and removing the hard mask structure and the third oxide layer.

[0020] Optionally, in the process of forming the second oxide layer, the second oxide layer also covers the top of the etch stop layer, the sidewall of the etch stop layer and the bottom of the first through hole.

[0021] Optionally, in the process of forming the first oxide layer, the first oxide layer also covers the top of the etch stop layer and the top of the hard mask structure.

[0022] Optionally, the process gas for the plasma implantation process includes oxygen plasma and argon plasma.

[0023] Optionally, the process parameters for the plasma implantation process include: the process temperature is 50°C to 100°C; the chamber pressure is 5 mTorr to 50 mTorr.

[0024] Correspondingly, the present invention also provides a semiconductor structure, including: a substrate; and a plurality of fins protruding from the substrate.

[0025] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0026] After forming the first oxide layer, oxygen ions are implanted into the first oxide layer by using a plasma implantation process to increase the oxygen content of the first oxide layer. In the process of etching the initial fin layer, the etching resistance of the first oxide layer is related to the oxygen content of the first oxide layer. The higher the oxygen content of the first oxide layer, the stronger the etching resistance of the first oxide layer. Therefore, by means of the plasma implantation process to increase the oxygen content of the first oxide layer, it helps to improve the etching resistance of the first oxide layer, reduces the etching rate of the etching gas in the lateral direction, and thus can increase the thickness of the fin in the lateral direction, where the lateral direction is perpendicular to the extending direction of the fin and parallel to the top surface of the substrate. Description of the Drawings

[0027] Figures 1 to 6 are the schematic structural diagrams corresponding to each step in the first embodiment of the method for forming a semiconductor structure of the present invention;

[0028] Figures 7 to 17 are the schematic structural diagrams corresponding to each step in the second embodiment of the method for forming a semiconductor structure of the present invention;

[0029] Figures 18 to 23 are the schematic structural diagrams corresponding to each step in the third embodiment of the method for forming a semiconductor structure of the present invention. Detailed Embodiments

[0030] Now, an analysis is carried out in combination with a method for forming a semiconductor structure. The process steps for forming the semiconductor structure mainly include: providing a substrate; forming an initial fin layer on the substrate; forming a plurality of discrete hard mask structures on the initial fin layer; forming an oxide layer on the sidewalls of the hard mask structures; and etching the initial fin layer to form a plurality of fins protruding from the substrate.

[0031] In the process of etching the initial fin layer, the etching rate in the lateral direction is high, such that the oxide layer is quickly etched away, resulting in the sidewalls of the hard mask structure being exposed to the etching environment. Subsequently, the sidewalls of the hard mask structure are etched, causing the spacing between adjacent hard mask structures to be too large. Then, the initial fin layer is etched to form fins. The spacing between adjacent fins is related to the spacing between adjacent hard mask structures. If the spacing between adjacent hard mask structures is too large, the spacing between adjacent fins will be too large, resulting in the fins having too small a thickness in the lateral direction, where the lateral direction is perpendicular to the extending direction of the fins and parallel to the top surface of the substrate.

[0032] The inventors studied the method for forming the above semiconductor structure. Through creative work, the inventors noticed that by using a plasma implantation process, the oxygen content of the oxide layer can be significantly increased, thereby reducing the lateral etching rate of the oxide layer, which helps to increase the thickness of the fins in the lateral direction.

[0033] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following detailed description of specific embodiments of the present invention will be given with reference to the accompanying drawings.

[0034] First Embodiment

[0035] Refer to Figure 1 , and a substrate 100 is provided.

[0036] In this embodiment, the material of the substrate 100 is silicon. In other embodiments, the material of the substrate is germanium.

[0037] Refer to Figure 2 , and an initial fin layer 200 is formed on the substrate 100.

[0038] The material of the initial fin layer 200 is the same as that of the substrate 100. In this embodiment, the material of the initial fin layer 200 is silicon. In other embodiments, the material of the initial fin layer is germanium.

[0039] Refer to Figure 3 , and a plurality of discrete hard mask structures 400 are formed on the initial fin layer 200.

[0040] In this embodiment, the material of the hard mask structure 400 is silicon nitride. In other embodiments, the material of the hard mask structure is silicon carbonitride, silicon carbon oxynitride, silicon oxynitride, boron nitride, or boron carbonitride.

[0041] The method for forming the hard mask structure 400 includes: forming an initial hard mask structure (not shown in the figure) covering the surface of the initial fin layer 200; forming a patterned layer (not shown in the figure) covering the surface of a part of the initial hard mask structure; etching the initial hard mask structure to form the hard mask structure 400; and removing the patterned layer.

[0042] Reference Figure 4 , a first oxide layer 510 is formed on the sidewalls of the hard mask structure 400.

[0043] Subsequently, the initial fin layer 200 is etched to form fins, and the size of the fins is related to the size of the gap between adjacent hard mask structures 400. Since the first oxide layer 510 covers the sidewalls of the hard mask structure 400, the first oxide layer 510 can reduce the size of the gap to increase the thickness of the fins 210 in the lateral direction x. Wherein, the lateral direction x is parallel to the top surface of the substrate 100 and perpendicular to the sidewall surface of the hard mask structure 400.

[0044] In this embodiment, the first oxide layer 510 is formed by an atomic layer deposition process. In other embodiments, the first oxide layer is formed by a chemical vapor deposition process.

[0045] In this embodiment, the first oxide layer 510 also covers the top of the initial fin layer 200 and the top surface of the hard mask structure 400. In other embodiments, the first oxide layer only covers the sidewalls of the hard mask structure 400.

[0046] In this embodiment, the material of the first oxide layer 510 is silicon oxide.

[0047] If the thickness of the first oxide layer 510 is too thick, the distance between the first oxide layers 510 on the sidewalls of adjacent hard mask structures 400 is too small, and bridging defects and line merging defects are likely to occur. The bridging defects and line merging defects will affect the subsequent etching of the initial fin layer 200. Among them, the bridging defect is the point connection of the first oxide layers 510 on the sidewalls of adjacent hard mask structures 400; the line merging defect is the large number of point connections of the first oxide layers 510 on the sidewalls of adjacent hard mask structures 400 to form line merging. If the thickness of the first oxide layer 510 is too thin, the gap between the first oxide layers 510 on the sidewalls of adjacent hard mask structures 400 is too large, resulting in too large a distance between the subsequently formed fins, and the thickness of the fins 210 in the lateral direction x is lower than the process requirements. In this embodiment, the thickness of the first oxide layer 510 is 1 nm to 7 nm.

[0048] Reference Figure 5, an oxygen ion implantation is performed on the first oxide layer 510 by a plasma implantation process.

[0049] Through the plasma implantation process, oxygen ions are implanted into the material of the first oxide layer 510 to increase the oxygen content of the first oxide layer 510. Subsequently, the initial fin layer 200 is etched to form fins, and the etching rate of the etching gas in the transverse direction x is related to the oxygen content of the first oxide layer 510. A high oxygen content in the first oxide layer 510 helps to reduce the etching rate of the etching gas in the transverse direction x, thereby reducing the etching rate of the first oxide layer 510 on the sidewalls of the hard mask structure 400, preventing the sidewalls of the hard mask structure 400 from being prematurely exposed to the etching environment, and making the fins thicker in the transverse direction x. Furthermore, by performing oxygen ion implantation on the first oxide layer 510, the etching rate in the transverse direction x can be regulated, and the uniformity of the thickness of each fin in the transverse direction x can be improved.

[0050] In this embodiment, the process gas of the plasma implantation process includes oxygen plasma 700 and argon plasma 700. The argon plasma 700 is used to bombard the surface of the first oxide layer 510, facilitating the implantation of oxygen plasma 700 into the material of the first oxide layer 510.

[0051] In this embodiment, the process parameters of the plasma implantation process include: the process temperature is 50°C to 100°C; the chamber pressure is 5 mTorr to 50 mTorr.

[0052] Reference Figure 6 , the initial fin layer 200 (reference Figure 5 ) is etched to form a plurality of fins 210 protruding from the substrate 100.

[0053] In this embodiment, during the process of etching the initial fin layer 200 (reference Figure 5 ), it further includes: etching and removing the first oxide layer 510 (reference Figure 5 ); etching and removing a part of the thickness of the hard mask structure 400 (reference Figure 5 ).

[0054] In this embodiment, the initial fin layer 200 is etched until the top surface of the substrate 100 is exposed.

[0055] In this embodiment, a dry etching process is used to etch the initial fin layer 200 (reference Figure 5 ). In other embodiments, a wet etching process is used to etch the initial fin layer.

[0056] During the etching process of forming the fin 210, since the first oxide layer 510 has a high oxygen content, the first oxide layer 510 has good etching resistance to etching in the lateral direction x, enabling the etching process to mainly proceed in the longitudinal direction y, which helps to reduce the pitch between adjacent fins 210 and increase the thickness of the fin 210 in the lateral direction x.

[0057] Second Embodiment

[0058] Reference Figure 7 , a substrate 100 is provided.

[0059] In this embodiment, the material of the substrate 100 is silicon. In other embodiments, the material of the substrate is germanium.

[0060] Reference Figure 8 , an initial fin layer 200 is formed on the substrate 100.

[0061] The material of the initial fin layer 200 is the same as that of the substrate 100. In this embodiment, the material of the initial fin layer 200 is silicon. In other embodiments, the material of the initial fin layer is germanium.

[0062] Reference Figure 9 , an insulating layer 310 is formed on the initial fin layer 200.

[0063] In this embodiment, the material of the insulating layer 310 is silicon nitride. In other embodiments, the material of the insulating layer is silicon carbonitride, silicon carbon oxynitride, silicon oxynitride, boron nitride, or boron carbonitride.

[0064] The insulating layer 310 is formed by chemical vapor deposition process, atomic layer deposition process, or physical vapor deposition process. In this embodiment, the insulating layer 310 is formed by chemical vapor deposition process.

[0065] In this embodiment, before forming the insulating layer 310, it further includes: forming a cushion layer 300 on the surface of the initial fin layer 200, and the insulating layer 310 covers the surface of the cushion layer 300.

[0066] The cushion layer 300 is located between the initial fin layer 200 and the insulating layer 310, and can improve the lattice matching degree between the material of the initial fin layer 200 and the material of the insulating layer 310 to enhance the bonding ability between the initial fin layer 200 and the insulating layer 310.

[0067] In this embodiment, the material of the cushion layer 300 is silicon oxide.

[0068] Reference Figure 10 , an etch stop layer 320 is formed on the surface of the insulating layer 310.

[0069] In this embodiment, the material of the etch stop layer 320 is silicon oxide. In other embodiments, the material of the etch stop layer may also be silicon oxynitride, silicon carbon oxynitride, boron nitride, or boron carbonitride.

[0070] Subsequently, an initial hard mask structure covering the surface of the etch stop layer 320 is formed, and the initial hard mask structure is etched to form a mask layer. During the process of etching the initial hard mask structure, the etch stop layer 320 can protect the top surface of the insulating layer 310 and reduce the damage to the top surface of the insulating layer 310 caused by the etching process.

[0071] Reference Figure 11 , a plurality of spaced-apart hard mask structures 400 are formed, and the hard mask structures 400 cover a part of the surface of the etch stop layer 320.

[0072] In this embodiment, the material of the hard mask structure 400 is silicon nitride. In other embodiments, the material of the hard mask structure is silicon carbonitride, silicon carbon oxynitride, silicon oxynitride, boron nitride, or boron carbonitride.

[0073] The method for forming the hard mask structure 400 includes: forming an initial hard mask structure covering the surface of the etch stop layer 320 (not shown in the figure); forming a patterned layer covering a part of the surface of the initial hard mask structure (not shown in the figure); etching the initial hard mask structure to form the hard mask structure 400; and removing the patterned layer.

[0074] Reference Figure 12 , a first oxide layer 510 is formed on the sidewalls of the hard mask structure 400.

[0075] In this embodiment, the first oxide layer 510 also covers the top of the etch stop layer 320 and the top of the hard mask structure 400. In other embodiments, the first oxide layer only covers the sidewalls of the hard mask structure 400.

[0076] In this embodiment, the material of the first oxide layer 510 is silicon oxide.

[0077] The first oxide layer 510 is formed by atomic layer deposition process or chemical vapor deposition process. In this embodiment, the first oxide layer 510 is formed by atomic layer deposition process.

[0078] Subsequent etching of the initial fin layer 200 forms fins. The etching gas mainly etches along the longitudinal direction y through the gaps between adjacent hard mask structures 400 until the top surface of the substrate 100 is exposed, thereby separating adjacent fins 210. Wherein, the longitudinal direction y is perpendicular to the top surface of the substrate 100. Therefore, the pitch between adjacent fins 210 is related to the size of the gap. The smaller the width of the gap, the smaller the pitch between adjacent fins 210. Correspondingly, the thickness value of the fins 210 in the transverse direction x is larger. The first oxide layer 510 covers the sidewalls of the hard mask structure 400 to reduce the gap between the sidewalls of adjacent hard mask structures 400, which helps to increase the thickness of the fins 210 in the transverse direction x, thereby improving the performance of the semiconductor structure.

[0079] In this embodiment, the thickness of the first oxide layer 510 is 1 nm to 7 nm. On the one hand, the appropriate thickness of the first oxide layer 510 makes the pitch of the first oxide layer 510 on the sidewalls of adjacent hard mask structures 400 appropriate, so as to reduce the risk of bridging defects or line merging defects. On the other hand, in the process of subsequent etching of the initial fin layer 200 to form fins, the appropriate thickness of the first oxide layer 510 can further delay the process time of etching and removing the first oxide layer 510 on the sidewalls of the hard mask structure 400, so as to delay the moment when the sidewalls of the hard mask structure 400 are etched, thereby prolonging the time for the sidewalls of the hard mask structure 400 to limit the thickness of the fins 210 in the transverse direction x, which helps to increase the thickness of the fins 210 in the transverse direction x.

[0080] Reference Figure 13 , oxygen ion implantation is performed on the first oxide layer 510 by using a plasma implantation process.

[0081] If the first oxide layer 510 is oxygen-doped by using a doping process, the oxygen content is easily saturated. Compared with the doping process, more oxygen ions can be implanted by performing oxygen ion implantation on the first oxide layer 510 by using a plasma implantation process. Therefore, the improvement effect of the oxygen content of the first oxide layer 510 is more significant.

[0082] Subsequent etching of the initial fin layer 200 forms fins. In the longitudinal direction y (reference Figure 12 ), etching is performed at a first etching rate. In the transverse direction x (reference Figure 12)Etch at the second etch rate. If the second etch rate is too fast, the first oxide layer 510 on the sidewalls of the hard mask structure 400 will be quickly etched away, exposing the sidewalls of the hard mask structure 400, and then the sidewalls of the hard mask structure 400 will be etched. If the sidewalls of the hard mask structure 400 are etched too quickly, the gap width between adjacent hard mask structures 400 will be too large, causing the hard mask structure 400 to lose its restrictive effect on the spacing between adjacent fins 210, and then resulting in too small a thickness value of the fin 210 in the transverse direction x. The second etch rate is related to the oxygen content of the first oxide layer 510. The higher the oxygen content of the first oxide layer 510, the smaller the second etch rate. Therefore, by increasing the oxygen content of the first oxide layer 510 formed by oxygen ion implantation, the second etch rate can be reduced, thereby increasing the thickness of the fin 210 in the transverse direction x.

[0083] In this embodiment, the process gas of the plasma implantation process includes oxygen plasma 700 and argon plasma 700. By bombarding the surface of the first oxide layer 510 with the argon plasma 700, the oxygen plasma 700 is easily implanted into the material of the first oxide layer 510.

[0084] In this embodiment, the process parameters of the plasma implantation process include: the process temperature is 50°C to 100°C; the chamber pressure is 5 mTorr to 50 mTorr.

[0085] Reference Figure 14 , using the hard mask structure 400 (reference Figure 13 ) as a mask, etch the insulating layer 310 to form a first through hole 610 in the insulating layer 310.

[0086] In this embodiment, in the process of etching the insulating layer 310, it further includes: etching away the hard mask structure 400 (reference Figure 13 ); etching away the first oxide layer 510 (reference Figure 13 ); etching away a part of the thickness of the etch stop layer 320.

[0087] In this embodiment, the top surface of the liner layer 300 is exposed at the bottom of the first through hole 610.

[0088] In this embodiment, the number of the first through holes 610 is multiple. The intervals between the first through holes 610 correspond to those between adjacent hard mask structures 400.

[0089] In this embodiment, a dry etching process is used to etch the insulating layer 310. In other embodiments, a wet etching process is used to etch the insulating layer.

[0090] Since the hard mask structure 400 (refer to Figure 13 ) and the first oxide layer 510 (refer to Figure 13 ) are etched away during the process of forming the first through hole 610, subsequently when etching the initial fin layer 200 to form fins, the hard mask structure 400 (refer to Figure 13 ) and the first oxide layer 510 (refer to Figure 13 ) cannot directly restrict the pitch between adjacent fins 210. Since the material of the insulating layer 310 is the same as that of the hard mask structure 400 (refer to Figure 13 ), and the interval between the first through hole 610 and the adjacent hard mask structure 400 corresponds, thus the insulating layer 310 can replace the hard mask structure 400 to achieve the function of restricting the pitch between adjacent fins 210.

[0091] Refer to Figure 15 , a second oxide layer 520 is formed on the sidewall of the first through hole 610.

[0092] Subsequently, when etching the initial fin layer 200 to form fins, the second oxide layer 520 covers the sidewall of the first through hole 610, making the width of the first through hole 610 in the transverse direction x smaller, which helps to reduce the pitch between adjacent fins 210, thereby increasing the thickness of the fins 210 in the transverse direction x.

[0093] In this embodiment, the second oxide layer 520 also covers the top of the etch stop layer 320, the sidewall of the etch stop layer 320, and the bottom of the first through hole 610. In other embodiments, the second oxide layer only covers the sidewall of the insulating layer and the sidewall of the etch stop layer. In another embodiment, the second oxide layer only covers the sidewall of the insulating layer.

[0094] In this embodiment, the material of the second oxide layer 520 is silicon oxide.

[0095] The second oxide layer 520 is formed by atomic layer deposition process or chemical vapor deposition process. In this embodiment, the second oxide layer 520 is formed by atomic layer deposition process.

[0096] In this embodiment, the thickness of the second oxide layer 520 is 1 nm to 7 nm.

[0097] Refer to Figure 16 , oxygen ion implantation is performed on the second oxide layer 520 by plasma implantation process.

[0098] Perform oxygen ion implantation on the second oxide layer 520 to increase the oxygen content of the second oxide layer 520, so that the formed second oxide layer 520 has a high oxygen content value. Subsequently, etch the initial fin layer 200 to form fins. The second oxide layer 520 having a high oxygen content value helps to reduce the etching rate in the lateral direction x (refer to Figure 15 ), thereby delaying the moment when the sidewall of the insulating layer 310 is exposed to the etching environment, so as to ensure the limiting effect of the insulating layer 310 on the pitch between adjacent fins 210, thereby increasing the thickness of the fins 210 in the lateral direction x (refer to Figure 15 ).

[0099] In this embodiment, the process gas for the plasma implantation process includes oxygen plasma 700 and argon plasma 700.

[0100] Refer to Figure 17 , etch the initial fin layer 200 (refer to Figure 16 ) to form a plurality of fins 210 protruding from the substrate 100.

[0101] Before etching the initial fin layer 200 (refer to Figure 16 ), it further includes: etching the liner layer 300.

[0102] In this embodiment, etch the initial fin layer 200 until the top surface of the substrate 100 is exposed.

[0103] In this embodiment, a dry etching process is used to etch the initial fin layer 200. In other embodiments, a wet etching process is used to etch the initial fin layer.

[0104] During the process of etching the initial fin layer 200, due to the high oxygen content of the second oxide layer 520 (refer to Figure 16 ), the etching rate in the lateral direction x (refer to Figure 15 ) is low. The low etching rate in the lateral direction x (refer to Figure 15 ) helps to reduce the pitch between adjacent fins 210, thereby increasing the width of the fins 210 in the lateral direction x (refer to Figure 15 ).

[0105] Third Embodiment

[0106] The difference between this embodiment and the second embodiment is that: when performing processing on the first oxide layer 510 (refer to Figure 13After performing oxygen ion implantation and before etching the insulating layer 310, it further includes: etching the etch stop layer 320 to form a second through hole in the etch stop layer 320; forming a third oxide layer on the sidewall of the second through hole; and performing oxygen ion implantation on the third oxide layer by a plasma implantation process.

[0107] The differences between this embodiment and the second embodiment will be described in detail below. The process steps of performing oxygen ion implantation on the first oxide layer 510 and the previous process steps can refer to the second embodiment and will not be elaborated here.

[0108] Refer to Figure 18 , after performing oxygen ion implantation on the first oxide layer 510 (refer to Figure 13 ) by a plasma implantation process, using the hard mask structure 400 as a mask, etch the etch stop layer 320 to form a second through hole 620 in the etch stop layer 320.

[0109] In this embodiment, in the process of etching the etch stop layer 320, it further includes: etching and removing the first oxide layer 510 (refer to Figure 13 ).

[0110] In this embodiment, the top surface of the insulating layer 310 is exposed at the bottom of the second through hole 620.

[0111] Refer to Figure 19 , form a third oxide layer 530 on the sidewall of the second through hole 620 (refer to Figure 18 ).

[0112] Since the first oxide layer 510 (refer to Figure 13 ) is removed during the etching process of forming the second through hole 620 (refer to Figure 18 ), by forming the third oxide layer 530, the sidewalls of the hard mask structure 400 are covered, thereby reducing the spacing between adjacent sidewalls of the hard mask structure 400.

[0113] In this embodiment, the third oxide layer 530 also covers the top of the hard mask structure 400, the sidewalls of the hard mask structure 400, and the bottom of the second through hole 620. In other embodiments, the third oxide layer only covers the sidewalls of the hard mask structure and the sidewalls of the etch stop layer. In another embodiment, the third oxide layer only covers the sidewalls of the etch stop layer.

[0114] In this embodiment, the material of the third oxide layer 530 is silicon oxide.

[0115] The third oxide layer 530 is formed by an atomic layer deposition process or a chemical vapor deposition process. In this embodiment, the third oxide layer 530 is formed by an atomic layer deposition process.

[0116] In this embodiment, the thickness of the third oxide layer 530 is 1 nm to 7 nm.

[0117] Reference Figure 20 , oxygen ion implantation is performed on the third oxide layer 530 by using a plasma implantation process.

[0118] By performing oxygen ion implantation on the third oxide layer 530, the percentage of oxygen element in the material of the formed third oxide layer 530 is increased. Subsequently, etching the insulating layer 310 helps to reduce the etching rate in the lateral direction x (reference Figure 15 ).

[0119] Reference Figure 21 , using the hard mask structure 400 (reference Figure 20 ) as a mask, the insulating layer 310 is etched to form a first through hole 610 in the insulating layer 310.

[0120] In this embodiment, in the process of etching the insulating layer 310, it further includes: etching and removing the hard mask structure 400 (reference Figure 20 ) and the third oxide layer 530 (reference Figure 20 ).

[0121] In this embodiment, the number of the first through holes 610 is multiple. The interval between the first through holes 610 and the adjacent hard mask structure 400 (reference Figure 20 ) corresponds.

[0122] In this embodiment, the top surface of the liner layer 300 is exposed at the bottom of the first through hole 610.

[0123] Reference Figure 22 , after forming the first through hole 610, a second oxide layer 520 is formed on the sidewall of the first through hole 610. Oxygen ion implantation is performed on the second oxide layer 520 by using a plasma implantation process.

[0124] Reference Figure 23 , the initial fin layer 200 is etched to form a plurality of fins 210 protruding from the substrate 100.

[0125] The present invention also provides a semiconductor structure obtained by using the above formation method, Figure 6 which is the semiconductor structure obtained in the first embodiment of the formation method of the present invention.

[0126] Reference Figure 6 , in this embodiment, the semiconductor structure includes: a substrate 100; a plurality of fins 210 protruding from the substrate 100.

[0127] In this embodiment, the semiconductor structure further includes a hard mask structure 400 covering the top of the fin portion 210.

[0128] In this embodiment, the material of the hard mask structure 400 is silicon nitride. In other embodiments, the material of the hard mask structure is silicon carbonitride, silicon carbon oxynitride, silicon oxynitride, boron nitride, or boron carbonitride.

[0129] Figure 17 It is the semiconductor structure obtained in the second embodiment of the formation method of the present invention.

[0130] In this embodiment, the semiconductor structure includes a substrate 100; a plurality of fin portions 210 protruding from the substrate 100; a liner layer 300 covering the top surface of the fin portion 210 layer; an insulating layer 310 covering the surface of the liner layer 300; and an etch stop layer 320 covering the top surface of the insulating layer 310.

[0131] Figure 23 It is the semiconductor structure obtained in the third embodiment of the formation method of the present invention.

[0132] In this embodiment, the semiconductor structure is the same as the semiconductor structure obtained in the second embodiment of the formation method of the present invention.

[0133] In this embodiment, the semiconductor structure includes a substrate 100; a plurality of fin portions 210 protruding from the substrate 100; a liner layer 300 covering the top surface of the fin portion 210 layer; the insulating layer 310 covering the surface of the liner layer 300; and an etch stop layer 320 covering the top surface of the insulating layer 310.

[0134] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that, comprising: providing a substrate; forming an initial fin layer on the substrate; forming an insulating layer on the initial fin layer; forming a plurality of discrete hard mask structures on the insulating layer; forming a first oxide layer on the sidewalls of the hard mask structures; performing oxygen ion implantation on the first oxide layer by using a plasma implantation process; using the hard mask structures as masks to etch the insulating layer to form first through holes in the insulating layer; forming a second oxide layer on the sidewalls of the first through holes; performing oxygen ion implantation on the second oxide layer by using a plasma implantation process; etching the initial fin layer to form a plurality of fins protruding from the substrate; wherein the process gas of the plasma implantation process includes oxygen plasma and argon plasma.

2. The forming method according to claim 1, characterized in that, the material of the first oxide layer is silicon oxide.

3. The forming method according to claim 1, characterized in that, the thickness of the first oxide layer is 1 nm to 7 nm.

4. The forming method according to claim 1, characterized in that, after forming the initial fin layer and before forming the insulating layer, further comprising: forming a liner layer on the surface of the initial fin layer, and the insulating layer covers the surface of the liner layer.

5. The forming method according to claim 4, characterized in that, after performing oxygen ion implantation on the second oxide layer and before etching the initial fin layer, further comprising: etching the liner layer.

6. The forming method according to claim 4, characterized in that, the material of the liner layer is silicon oxide.

7. The forming method according to claim 1, characterized in that, the material of the insulating layer is silicon nitride, silicon carbonitride, silicon carbon oxynitride, silicon oxynitride, boron nitride or carbon boron nitride.

8. The forming method according to claim 1, characterized in that, after forming the insulating layer and before forming the hard mask structures, further comprising: forming an etch stop layer on the surface of the insulating layer, and the hard mask structures cover a part of the surface of the etch stop layer.

9. The forming method according to claim 8, characterized in that, after performing oxygen ion implantation on the first oxide layer and before etching the insulating layer, further comprising: using the hard mask structures as masks to etch the etch stop layer to form second through holes in the etch stop layer; forming a third oxide layer on the sidewalls of the second through holes; performing oxygen ion implantation on the third oxide layer by using a plasma implantation process.

10. The forming method according to claim 9, characterized in that, in the process of etching the etch stop layer, further comprising: etching and removing the first oxide layer.

11. The forming method according to claim 10, characterized in that, in the process of forming the third oxide layer, the third oxide layer further covers the top of the hard mask structures, the sidewalls of the hard mask structures and the bottoms of the second through holes.

12. The forming method according to claim 9, characterized in that, in the process of etching the insulating layer, further comprising: etching and removing the hard mask structures and the third oxide layer.

13. The forming method according to claim 12, It is characterized in that In the process of forming the second oxide layer, the second oxide layer also covers the top of the etch stop layer, the sidewalls of the etch stop layer, and the bottom of the first through hole.

14. The forming method according to claim 8, It is characterized in that In the process of forming the first oxide layer, the first oxide layer also covers the top of the etch stop layer and the top of the hard mask structure.

15. The forming method according to claim 1, It is characterized in that The process parameters of the plasma implantation process include: the process temperature is 50°C to 100°C; the chamber pressure is 5 mTorr to 50 mTorr.

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