Drive device, power supply, chip and electronic device

Abstract

The present disclosure relates to a driving device, a power supply, a chip, and an electronic device. The device includes: a first driving module configured to receive a first input voltage and, when the logic voltage of the chip reaches a preset potential, generate a first output voltage using the first input voltage to drive the chip, where the first input voltage and the first output voltage are positive voltages; and a second driving module configured to receive a second input voltage and, when the logic voltage of the chip reaches a preset potential, generate a second output voltage using the second input voltage to drive the chip, where the second input voltage and the second output voltage are negative voltages. Embodiments of the present disclosure can avoid directly driving a circuit component using the first input voltage and the second input voltage when the logic voltage of the circuit component does not reach the preset potential, which may cause a large current or a latch-up effect due to a logic control error inside the IC and damage the circuit, thereby improving the stability and safety of the circuit component.

Description

Technical Field

[0001] The present disclosure relates to the field of power supply technologies, and particularly to a driving device, a power supply, a chip, and an electronic device. Background Art

[0002] Currently, before the voltage used to control logic inside an integrated circuit (IC) is generated, all internal controls are in an uncertain state. If the voltage provided externally is poured in at this time, it may cause a large current or latch up inside the IC due to logic control errors, damaging the circuit. Summary of the Invention

[0003] In view of this, the present disclosure provides a driving device, a power supply, a chip, and an electronic device, which can avoid large currents or latch up inside the IC due to logic control errors.

[0004] According to one aspect of the present disclosure, a driving device is provided. The device is applied to a circuit component, and the device includes:

[0005] A first driving module, configured to receive a first input voltage, and when the logic voltage of the circuit component reaches a preset potential, generate a first output voltage using the first input voltage to drive the circuit component, where the first input voltage and the first output voltage are positive voltages;

[0006] A second driving module, configured to receive a second input voltage, and when the logic voltage of the circuit component reaches a preset potential, generate a second output voltage using the second input voltage to drive the circuit component, where the second input voltage and the second output voltage are negative voltages.

[0007] In a possible implementation manner, the first driving module includes a first transistor, a second transistor, and a first resistor, where

[0008] A first end of the first resistor is configured to receive the first input voltage,

[0009] A second end of the first resistor is electrically connected to a drain of the first transistor and a gate of the second transistor,

[0010] A gate of the first transistor is configured to receive the logic voltage, a source of the first transistor is grounded,

[0011] A drain of the second transistor is configured to receive the first input voltage,

[0012] A source of the second transistor is configured to output the first output voltage.

[0013] In a possible implementation, if the logic voltage is a positive voltage, the first transistor is an NMOS transistor and the second transistor is a PMOS transistor.

[0014] In a possible implementation, if the logic voltage is a negative voltage, the first transistor is a PMOS transistor and the second transistor is a PMOS transistor.

[0015] In a possible implementation, the second driving module includes a third transistor, a fourth transistor, and a second resistor. Among them,

[0016] The first end of the second resistor is used to receive the second input voltage.

[0017] The second end of the second resistor is electrically connected to the source of the third transistor and the gate of the fourth transistor.

[0018] The gate of the third transistor is grounded, and the drain of the third transistor is used to receive the logic voltage.

[0019] The drain of the fourth transistor is used to input the second input voltage.

[0020] The source of the fourth transistor is used to output the second output voltage.

[0021] In a possible implementation, if the logic voltage is a positive voltage, the third transistor is a PMOS transistor and the fourth transistor is an NMOS transistor.

[0022] In a possible implementation, if the logic voltage is a negative voltage, the third transistor is an NMOS transistor and the fourth transistor is an NMOS transistor.

[0023] According to another aspect of the present disclosure, a power supply is provided, and the power supply includes the driving device described above.

[0024] According to another aspect of the present disclosure, a chip is provided, and the chip includes the power supply described above.

[0025] According to another aspect of the present disclosure, an electronic device is provided, and the electronic device includes the chip described above.

[0026] In a possible implementation, the electronic device includes one of a display, a smart phone, a smart watch, a smart bracelet, a tablet computer, a notebook computer, an all-in-one computer, an access control device, a desktop computer, an industrial computer, or a portable device.

[0027] Through the above device, in the embodiments of the present disclosure, when the first input voltage and the second input voltage input externally reach inside the circuit component, the first output voltage and the second output voltage can be generated according to the establishment of the logic voltage of the circuit component. When the logic voltage of the circuit component reaches the preset potential, the first driving module generates the first output voltage by using the first input voltage, and the second driving module generates the second output voltage by using the second input voltage, so as to avoid directly driving the circuit component by using the first input voltage and the second input voltage when the logic voltage of the circuit component does not reach the preset potential, which may cause large current or latch-up effect due to logic control error inside the IC and damage the circuit, thereby improving the stability and safety of the circuit component.

[0028] Other features and aspects of the present disclosure will become apparent from the following detailed description of the exemplary embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The drawings included in and constituting a part of this specification, together with the specification, illustrate exemplary embodiments, features, and aspects of the present disclosure and are used to explain the principles of the present disclosure.

[0030] Figure 1 FIG. shows a block diagram of a driving device according to an embodiment of the present disclosure.

[0031] Figure 2 FIG. shows a schematic diagram of a first driving module of a driving device according to an embodiment of the present disclosure.

[0032] Figure 3 FIG. shows a schematic diagram of a second driving module of a driving device according to an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0033] Various exemplary embodiments, features, and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the drawings denote elements having the same or similar functions. Although various aspects of the embodiments are shown in the drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0034] As used in this disclosure, the terms "first", "second" and similar terms do not denote any order, quantity or importance, but are only used to distinguish different components. Similarly, terms such as "a", "an" or "the" do not denote a quantity limitation, but mean that there is at least one. Terms such as "comprising" or "including" mean that the elements or items appearing before this term cover the elements or items listed after this term and their equivalents, without excluding other elements or items. Terms such as "connected" or "coupled" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. Terms such as "upper", "lower", "left" and "right" are only used to represent relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0035] The term "exemplary" used herein means "serving as an example, embodiment or illustration". Any embodiment described as "exemplary" herein need not be construed as superior to or better than other embodiments.

[0036] In addition, for a better illustration of this disclosure, numerous specific details are given in the following detailed description. Those skilled in the art should understand that this disclosure can also be implemented without some specific details. In some instances, methods, means, elements and circuits well known to those skilled in the art are not described in detail so as to highlight the gist of this disclosure.

[0037] Please refer to Figure 1 , Figure 1 which shows a block diagram of a driving device according to an embodiment of this disclosure.

[0038] The device can be applied to circuit components, such as Figure 1 shown, the device may include:

[0039] A first driving module 10, configured to receive a first input voltage Vin1, and when the logic voltage of the circuit component reaches a preset potential, generate a first output voltage Vout1 using the first input voltage Vin1 to drive the circuit component, wherein the first input voltage Vin1 and the first output voltage Vout1 are positive voltages;

[0040] A second driving module 20, configured to receive a second input voltage Vin2, and when the logic voltage of the circuit component reaches a preset potential, generate a second output voltage Vout2 using the second input voltage Vin2 to drive the circuit component, wherein the second input voltage Vin2 and the second output voltage Vout2 are negative voltages.

[0041] With the above device, in the embodiments of the present disclosure, when the first input voltage and the second input voltage input externally reach inside the circuit component, the first output voltage and the second output voltage can be generated according to the establishment of the logic voltage of the circuit component. When the logic voltage of the circuit component reaches the preset potential, the first driving module generates the first output voltage by using the first input voltage, and the second driving module generates the second output voltage by using the second input voltage, so as to avoid directly driving the circuit component by using the first input voltage and the second input voltage when the logic voltage of the circuit component does not reach the preset potential, which may cause large current or latch-up effect due to logic control error inside the IC and damage the circuit, thereby improving the stability and safety of the circuit component.

[0042] When the logic voltage of the circuit component does not reach the preset potential, the first driving module and the second driving module do not output voltage signals.

[0043] In one example, the first input voltage Vin1 and the second input voltage Vin2 can come from a power supply device outside the circuit component, and their magnitudes can be arbitrary.

[0044] In one example, the first output voltage Vout1 can be equal to or different from the first input voltage Vin1.

[0045] In one example, the second output voltage Vout2 can be equal to or different from the second input voltage Vin2.

[0046] In one example, the circuit component includes but is not limited to a single chip, or discrete components, or a combination of a chip and discrete components. The embodiments of the present disclosure do not limit the types of chips and discrete components.

[0047] In a possible implementation manner, the chip may include a processor, and the processor may include a controller in the electronic device that has the function of executing instructions. The processor may be implemented in any suitable manner. For example, it may be implemented by using a microprocessor, a central processing unit (CPU), the control logic part in a memory controller, etc. Inside the processor 101, the executable instructions may be executed through hardware circuits such as logic gates, switches, application specific integrated circuits (ASICs), programmable logic controllers, and embedded microcontrollers.

[0048] In one example, the device may be disposed in a terminal or other electronic device having a touch display panel. A terminal is also referred to as a user equipment (UE), a mobile station (MS), a mobile terminal (MT), etc. It is a device that provides voice and / or data connectivity to users. For example, it can be a handheld device with wireless connection function, a vehicle-mounted device, etc. Currently, some examples of terminals are: mobile phone, tablet computer, laptop computer, palm computer, mobile internet device (MID), wearable device, virtual reality (VR) device, augmented reality (AR) device, wireless terminal in industrial control, wireless terminal in self-driving, wireless terminal in remote medical surgery, wireless terminal in smart grid, wireless terminal in transportation safety, wireless terminal in smart city, wireless terminal in smart home, wireless terminal in vehicle-to-everything, etc.

[0049] Please refer to Figure 2 , Figure 2 which shows a schematic diagram of a first driving module of a driving device according to an embodiment of the present disclosure.

[0050] In a possible implementation manner, as Figure 2 shown, the first driving module may include a first transistor Q1, a second transistor Q2, and a first resistor R1. Among them,

[0051] a first end of the first resistor R1 is used to receive the first input voltage Vin1,

[0052] a second end of the first resistor R1 is electrically connected to a drain of the first transistor Q1 and a gate of the second transistor Q2,

[0053] a gate of the first transistor Q1 is used to receive the logic voltage Vs, and a source of the first transistor Q1 is grounded,

[0054] a drain of the second transistor Q2 is used to receive the first input voltage Vin1,

[0055] a source of the second transistor Q2 is used to output the first output voltage Vout1.

[0056] In a possible implementation, if the logic voltage Vs is a positive voltage (logic 1), the first transistor is an NMOS transistor and the second transistor is a PMOS transistor.

[0057] In an example, assuming that the logic voltage Vs is a positive voltage, before the logic voltage Vs reaches the potential of logic 1, the first transistor Q1 is turned off and the second transistor Q2 is turned off. At this time, no voltage signal is output from the drain of the second transistor. That is, when the logic voltage Vs does not reach the preset potential, the first input voltage Vin1 is not used to drive the circuit components.

[0058] In an example, when the logic voltage Vs reaches the potential of logic 1, the first transistor Q1 is turned on and the second transistor Q2 is turned on. At this time, after the first input voltage Vin1 passes through the second transistor Q2, a first output voltage Vout1 is generated, and the drain of the second transistor Q2 outputs the first output voltage Vout1.

[0059] In a possible implementation, if the logic voltage Vs is a negative voltage (logic 0), the first transistor is a PMOS transistor and the second transistor is a PMOS transistor.

[0060] In an example, assuming that the logic voltage Vs is a negative voltage, before the logic voltage Vs reaches the potential of logic 0, the first transistor Q1 is turned off and the second transistor Q2 is turned off. At this time, no voltage signal is output from the drain of the second transistor. That is, when the logic voltage Vs does not reach the preset potential, the first input voltage Vin1 is not used to drive the circuit components.

[0061] In an example, when the logic voltage Vs reaches the potential of logic 0, the first transistor Q1 is turned on and the second transistor Q2 is turned on. At this time, after the first input voltage Vin1 passes through the second transistor Q2, a first output voltage Vout1 is generated, and the drain of the second transistor Q2 outputs the first output voltage Vout1.

[0062] Please refer to Figure 3 , Figure 3 which shows a schematic diagram of a second driving module of a driving device according to an embodiment of the present disclosure.

[0063] In a possible implementation, as Figure 3 shown, the second driving module may include a third transistor Q3, a fourth transistor Q4, and a second resistor R2, where

[0064] the first end of the second resistor R2 is used to receive the second input voltage Vin2,

[0065] The second terminal of the second resistor R2 is electrically connected to the source of the third transistor Q3 and the gate of the fourth transistor Q4.

[0066] The gate of the third transistor Q3 is grounded, and the drain of the third transistor Q3 is used to receive the logic voltage Vs.

[0067] The drain of the fourth transistor Q4 is used to input the second input voltage Vin2.

[0068] The source of the fourth transistor Q4 is used to output the second output voltage Vout2.

[0069] In a possible implementation, if the logic voltage is a positive voltage (logic 1), the third transistor is a PMOS transistor, and the fourth transistor is an NMOS transistor.

[0070] In an example, assuming that the logic voltage Vs is a positive voltage, before the logic voltage Vs reaches the potential of logic 1, the third transistor Q3 is turned off, and the fourth transistor Q4 is turned off. At this time, the drain of the fourth transistor Q4 does not output any voltage signal. That is, when the logic voltage Vs does not reach the preset potential, the second input voltage Vin2 will not be used to drive the circuit components.

[0071] In an example, when the logic voltage Vs reaches the potential of logic 1, the third transistor Q3 is turned on, and the fourth transistor Q4 is turned on. At this time, after the second input voltage Vin2 passes through the fourth transistor Q4, the second output voltage Vout2 is generated, and the drain of the second transistor Q2 outputs the second output voltage Vout2.

[0072] In a possible implementation, if the logic voltage is a negative voltage (logic 0), the third transistor is an NMOS transistor, and the fourth transistor is an NMOS transistor.

[0073] In an example, assuming that the logic voltage Vs is a negative voltage, before the logic voltage Vs reaches the potential of logic 0, the third transistor Q3 is turned off, and the fourth transistor Q4 is turned off. At this time, the drain of the fourth transistor Q4 does not output any voltage signal. That is, when the logic voltage Vs does not reach the preset potential, the second input voltage Vin2 will not be used to drive the circuit components.

[0074] In an example, when the logic voltage Vs reaches the potential of logic 0, the third transistor Q3 is turned on, and the fourth transistor Q4 is turned on. At this time, after the second input voltage Vin2 passes through the fourth transistor Q4, the second output voltage Vout2 is generated, and the drain of the second transistor Q2 outputs the second output voltage Vout2.

[0075] With the above device, the embodiments of the present disclosure can prohibit the use of an external input voltage to drive a resistor component before the logic voltage inside the circuit component is established (has not reached a preset potential), which can avoid abnormal large currents caused by incorrect control and further avoid damage to the IC.

[0076] The embodiments of the present disclosure have been described above. The above description is exemplary and not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations are obvious to those of ordinary skill in the art in the technical field without departing from the scope and spirit of the described embodiments. The selection of the terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other ordinary skill in the art in the technical field to understand the disclosed embodiments.

Claims

1. A driving device, characterized in that, the device is applied to a circuit component, and the device includes: A first driving module, configured to receive a first input voltage, and when the logic voltage of the circuit component reaches a preset potential, generate a first output voltage using the first input voltage to drive the circuit component, wherein the first input voltage and the first output voltage are positive voltages; A second driving module, configured to receive a second input voltage, and when the logic voltage of the circuit component reaches a preset potential, generate a second output voltage using the second input voltage to drive the circuit component, wherein the second input voltage and the second output voltage are negative voltages, the first driving module includes a first transistor, a second transistor, and a first resistor. The first end of the first resistor is used to receive the first input voltage, the second end of the first resistor is electrically connected to the drain of the first transistor and the gate of the second transistor. The gate of the first transistor is used to receive the logic voltage, the source of the first transistor is grounded, the drain of the second transistor is used to receive the first input voltage, and the source of the second transistor is used to output the first output voltage, the second driving module includes a third transistor, a fourth transistor, and a second resistor. The first end of the second resistor is used to receive the second input voltage, the second end of the second resistor is electrically connected to the source of the third transistor and the gate of the fourth transistor. The gate of the third transistor is grounded, the drain of the third transistor is used to receive the logic voltage, the drain of the fourth transistor is used to input the second input voltage, and the source of the fourth transistor is used to output the second output voltage, wherein, when the logic voltage of the circuit component does not reach the preset potential, the first driving module and the second driving module do not output voltage signals.

2. The device according to claim 1, characterized in that, if the logic voltage is a positive voltage, the first transistor is an NMOS transistor and the second transistor is a PMOS transistor.

3. The device according to claim 1, characterized in that, if the logic voltage is a negative voltage, the first transistor is a PMOS transistor and the second transistor is a PMOS transistor.

4. The device according to claim 1, characterized in that, if the logic voltage is a positive voltage, the third transistor is a PMOS transistor and the fourth transistor is an NMOS transistor.

5. The device according to claim 1, characterized in that, if the logic voltage is a negative voltage, the third transistor is an NMOS transistor and the fourth transistor is an NMOS transistor.

6. A power supply, characterized in that, the power supply includes the driving device according to any one of claims 1-5.

7. A chip, characterized in that, the chip includes the power supply according to claim 6.

8. An electronic device, characterized in that, the electronic device includes the chip according to claim 7.

9. The electronic device according to claim 8, characterized in that, The electronic device includes one of a display, a smart phone, a smart watch, a smart bracelet, a tablet computer, a notebook computer, an all-in-one computer, an access control device, a desktop computer, an industrial computer, or a portable device.

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