Package with integrated multi-tap impedance structure

Abstract

A package (100) is disclosed, comprising: a carrier (102) having a plurality of leads (116); an electronic device (104) mounted on the carrier (102) and comprising at least one solder pad (106); and an impedance structure (108) that electrically couples the at least one solder pad (106) to the carrier (102) so that different impedance values ​​of the impedance structure (108) can be tapped out at different leads among the leads (116).

Description

Technical Field

[0001] The present invention relates to a package and a method for manufacturing the package. Background Art

[0002] A package may refer to an encapsulated electronic chip with electrical connections extending out of the encapsulant and mounted to peripheral electronics such as a printed circuit board.

[0003] Packaging cost is an important driver for the industry. Related to this are performance, size and reliability. Different packaging solutions are varied and must meet the needs of the application. Summary of the invention

[0004] It may be necessary to manufacture the package with appropriate electrical properties.

[0005] According to an exemplary embodiment, a package is provided, comprising: a carrier having a plurality of leads; an electronic device mounted on the carrier and comprising at least one pad; and an impedance structure electrically coupling the at least one pad with the carrier so that different impedance values ​​of the impedance structure can be tapped out at different ones of the leads.

[0006] According to another exemplary embodiment, a package is provided, comprising: a carrier including a mounting section and a plurality of leads; an electronic device mounted on the mounting section and including at least one solder pad; and a plurality of bonding wires connected between the at least one solder pad and the leads to form an impedance structure having a selectable impedance value.

[0007] According to yet another exemplary embodiment, a method for manufacturing a package is provided, wherein the method comprises mounting an electronic device including at least one solder pad on a carrier having a plurality of leads; electrically coupling the at least one solder pad with the carrier via an impedance structure so that different impedance values ​​of the impedance structure can be tapped out at different ones of the leads; and at least partially encapsulating the electronic device, the carrier and the impedance structure via an encapsulant.

[0008] According to an exemplary embodiment, a package and a manufacturing method for manufacturing such a package can be provided in a manner that can simply implement a selectable impedance, such as for providing a damping inductor. Such an impedance structure can be positioned very close to a designated pad of an electronic device (e.g., a gate pad of a transistor chip), for example, by simply using bonding wires to form the impedance structure. Since an adjustable value of impedance can be provided by the impedance structure, the impedance structure, in particular, the impedance structure formed by interconnecting bonding wires, can improve the electrical performance within the package (e.g., including one or more discrete power MOSFETs). Descriptively speaking, a circuit designer can select a corresponding adjustable value of impedance by simply selecting which of a plurality of leads should be used to connect the electronic circuit to the package. At this time, the corresponding impedance value will be provided by the portion of the impedance structure connected between the pad of the electronic device and the selected lead. Advantageously, providing different leads (which can be exposed relative to the encapsulant so as to be accessible to the circuit designer) can make it possible to connect different leads to different sections of the impedance structure. Therefore, the circuit designer can tap out a specific section of the integrated impedance structure, thereby selecting one of a plurality of different values ​​of impedance between the electronic device and the selected external lead. Very simply, this can enable an efficient design of an electronic circuit provided by a package having a multi-tap inductor. For example, by providing an impedance with an appropriate value, undesirable electronic phenomena such as parasitic ringing artifacts can be efficiently suppressed. Additionally or alternatively, providing an impedance structure integrated in the package can also improve the EMI (electromagnetic interference) characteristics of the package.

[0009] Description of Other Exemplary Embodiments

[0010] In the following, further exemplary embodiments of packages and methods will be explained.

[0011] The gist of the exemplary embodiment can be seen in providing a multi-tap impedance structure integrated in a package. More specifically, with the continued miniaturization of packages (particularly discrete high voltage switch packages), it may happen that multiple leads of a carrier are available, but the leads are not required to provide the electronic functions of such a package. Advantageously, such available but unused leads can be functionalized by creating an impedance structure between the leads in the interior of the package (e.g., by connecting bonding wires or other conductive structures) to form a variable impedance. By simply selecting one of the multiple leads, for example, not providing any, partial or complete connection to the impedance structure, the impedance can be changed. Thus, a tapped inductor can be integrated into a package containing leads essentially without additional effort.

[0012] In the context of the present application, the term "package" may particularly denote an electronic device that may include one or more electronic devices mounted on a carrier. Optionally, at least a portion of the components of the package may be at least partially encapsulated by an encapsulant. Further optionally, one or more conductive interconnects (e.g. bonding wires and / or clips) may be implemented in the package, for example for electrically coupling the electronic device to the carrier.

[0013] In the context of the present application, the term "electronic device" may include in particular semiconductor chips (in particular power semiconductor chips), active electronic devices (such as transistors), passive electronic devices (such as capacitors or inductors or ohmic resistors), sensors (such as microphones, light sensors or gas sensors), actuators (such as loudspeakers) and micro-electromechanical systems (MEMS). In particular, the electronic device may be a semiconductor chip having at least one integrated circuit element (such as a diode or a transistor) in its surface portion. The electronic device may be a bare die, or may have been packaged or encapsulated. The semiconductor chip implemented according to the exemplary embodiment may be formed with silicon technology, gallium nitride technology, silicon carbide technology, etc.

[0014] In the context of the present application, the term "encapsulant" may particularly denote a substantially electrically insulating and preferably thermally conductive material surrounding the electronic device and optionally a part of the carrier to provide mechanical protection, electrical insulation and optionally facilitate heat removal during operation.

[0015] In the context of the present application, the term "carrier" may particularly refer to a support structure (preferably but not necessarily conductive) that is used to mechanically support one or more electronic devices and may also facilitate electrical interconnection between the electronic devices and peripheral devices of the package. In other words, the carrier may fulfill both a mechanical support function and an electrical connection function.

[0016] In the context of the present application, the term "mounting section" may particularly denote a support structure of a carrier on which the electronic device is to be mounted. When the carrier is a lead frame, the mounting section may be a die pad.

[0017] In the context of the present application, the term "lead" may particularly denote an electrically conductive (e.g. strip-shaped) element of a carrier (which may be planar or curved) for contacting an electronic device from the outside of the package. For example, a lead may be completely exposed relative to the encapsulant, or may be partially encapsulated and partially exposed. When the carrier is a lead frame, the lead may surround a die pad.

[0018] In the context of the present application, the term "impedance structure" may particularly denote a physical and at least partially conductive structure configured to provide an impedance between an electronic device and a carrier. Impedance may denote a complex valued profile of resistance. One or more components of the impedance provided by the impedance structure may be an ohmic resistor, a capacitor and / or an inductor. For example, such an impedance may be an inductor (which may, for example, be formed by forming a loop of a conductive wire). Additionally or alternatively, such an impedance may be a capacitor and / or an ohmic resistor.

[0019] In the context of the present application, the term "bonding wire" may particularly denote a tiny conductive wire that can be used to contact a carrier with an electronic device mounted on the carrier. In the context of exemplary embodiments, additionally or alternatively, such bonding wires may be used to create an impedance structure, particularly in an inductor structure.

[0020] In a preferred embodiment, the impedance structure is an inductor structure, which is configured so that different inductance values ​​can be tapped at different ones of the leads. Tapping one of the different inductance values ​​on different leads of the package has been shown to be an efficient mechanism for suppressing ringing of the package. In the context of the present application, the term "ringing" may particularly refer to an undesirable or parasitic phenomenon, according to which a signal applied to an electronic device oscillates, for example, in terms of a turn-on effect and / or a turn-off effect. When providing a package with an encapsulated electronic device, an integrated multi-tap inductor may be advantageous for suppressing ringing. As a result of this configuration, ringing phenomena that may occur when a signal is applied to an electronic device with very low impedance may be suppressed or even eliminated. Therefore, the impedance structure may provide a sufficiently large impedance in order to suppress undesirable ringing.

[0021] However, selecting the gate pin among the multiple leads may not only change the inductance, but also the gate resistance. Furthermore, there may be situations where even different capacitance values ​​of the impedance structure may result in improved filter performance. Thus, the impedance structure may provide selectable values ​​of ohmic resistance, capacitance and / or inductance.

[0022] In one embodiment, the package may include an encapsulant that at least partially encapsulates at least one of the group consisting of an electronic device, a carrier and an impedance structure (which may in particular be implemented as an inductor structure). Thus, in particular, the impedance structure may be integrated in the encapsulant so that it can be appropriately protected from the environment. Thus, circuit elements external to the package for providing a multi-tap impedance structure may be dispensable. Thus, in particular, the impedance structure may be at least partially encapsulated by the encapsulant and therefore not only appropriately mechanically protected from damage during manufacture and operation of the package, but may also be formed in a miniature manner within the encapsulant in order to provide a compact package. The impedance structure may be connected between the electronic device (which may also be encapsulated) and the carrier (which may be partially encapsulated) on which the electronic device is mounted.

[0023] In one embodiment, the impedance structure is formed by a plurality of interconnected conductive elements. Descriptively speaking, by interconnecting a plurality of conductive elements, a three-dimensional structure can be formed that effectively creates an impedance inside the package. Thus, the described configuration can form an impedance structure with low effort.

[0024] In one embodiment, the interconnecting conductive elements are arranged to form at least one turn (particularly a plurality of turns). Forming the impedance structure as a turn with one or more windings inside the package may be particularly advantageous, since the inductance value of the impedance structure may be larger the greater the number of turns. Therefore, adjusting the number of turns is also a simple way to adjust the desired value of the inductance.

[0025] In another embodiment, the interconnected conductive elements are arranged to form a spiral. For example, such a spiral can be formed based on bonding wires, bonding strips and / or clips. The spiral shape allows for providing sufficiently high inductance values ​​in a compact configuration. The tapping of the spiral can be done at different windings of the spiral so that a user can select one of a plurality of discrete values ​​of inductance by correspondingly contacting one of a plurality of leads connected to different windings of the spiral.

[0026] However, in other embodiments, other shapes of the interconnecting conductive elements are possible, such as at least one meandering shape, at least one Z-shaped structure, etc. The track defined by the interconnecting conductive elements may in particular be a Z-shaped track, which facilitates high inductance with low space consumption.

[0027] In one embodiment, at least a portion of the interconnecting conductive element extends between different leads of the carrier. Advantageously, an array of leads that are always present at two opposite sides of the package can be used to connect the interconnecting conductive elements to each other. For example, bonding wires can be used to connect the leads of the lead frame on two opposite sides of the device of the package.

[0028] In one embodiment, said at least part of the interconnecting conductive element extends across over the electronic device between said different ones of said leads of the carrier.This may enable a space saving and compact configuration of the package.

[0029] In one embodiment, another of the interconnecting conductive elements extends between the at least one pad and the lead of the carrier. Thus, the other interconnecting conductive element can be used to connect the pad of the electronic device (particularly of semiconductor chip type) to the impedance structure at the common lead. This is a very simple way to connect an embedded or encapsulated electronic device to an electronic environment via an impedance structure.

[0030] In one embodiment, the electronic device is mounted on a mounting section of the carrier that is separated from the different leads (e.g., a die pad). Thus, the interconnecting conductive element may span between the opposing leads and extend over the centrally positioned electronic device on the central mounting section. By taking this measure, the impedance structure may be spatially arranged close to the electronic device. This may be particularly advantageous for suppressing undesirable ringing effects and may contribute to a compact design.

[0031] In one embodiment, at least a portion of the main surface of the mounting section of the carrier on which the electronic device is mounted is exposed relative to the encapsulant to facilitate the removal of heat generated during the operation of the electronic device. The mounting section can be spatially separated from the leads. For example, at least a portion of the main surface of the mounting section can be exposed relative to the encapsulant to remove the heat generated during the operation of the at least one electronic device. Therefore, an electronic device (such as a power semiconductor chip) can be mounted on one main surface of the mounting section, and the other opposite main surface of the mounting section can be exposed relative to the encapsulant to efficiently remove heat to the outside of the package. This can ensure efficient cooling of the package.

[0032] In one embodiment, the interconnecting conductive element is a bonding wire. For example, such a bonding wire can have a circular, rectangular or flat cross section. Therefore, the bonding wire can be a conductive rectangular structure with any desired cross section. They can, for example, have a circular cross section. However, conductive tapes can also be used as bonding wires with a strip or flat cross section. Using bonding wires to form the impedance structure is a particularly simple and space-saving embodiment.

[0033] However, configuring the impedance structure by bonding wires is not the only option. In another embodiment, two or more clips or other electrical conductors may also be connected to provide an impedance structure.

[0034] In one embodiment, the electronic device is a power semiconductor chip. Accordingly, the package can be configured as a power package. The problem of ringing effect is particularly prominent in power conductor chips. Therefore, the integration of impedance structures made of interconnected bonding wires is particularly advantageous for power semiconductor devices.

[0035] In one embodiment, the electronic device is a transistor chip, in particular a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) chip. In particular, the gate pad of the transistor chip may be prone to ringing. Therefore, the impedance structure can be connected between the gate pad of the transistor chip and the external lead of the lead frame type carrier.

[0036] In one embodiment, the electronic device is configured to be able to withstand vertical current during operation. In such an embodiment, for example, the source pad and the gate pad can be arranged on one main surface of the semiconductor chip-type electronic device, and the drain pad can be arranged on the other opposite main surface. In particular, connecting the gate pad to the impedance structure can be beneficial to obtain appropriate electrical performance. During operation, current can flow vertically between one or more pads on the upper main surface of the electronic device and one or more pads on the lower main surface.

[0037] In one embodiment, the impedance structure electrically couples the gate pad of the electronic device with an optional gate lead of the carrier. When the impedance structure is connected to the gate pad, the improvement of the electronic performance of the package is particularly obvious, and one of the multiple leads can be selected from the outside of the package to be used as the gate lead according to the expected value of impedance (especially inductance).

[0038] In one embodiment, when implemented as an inductor structure, the impedance structure is configured to be able to provide at least two different inductance values ​​in the range between 5 nH and 500 nH, in particular in the range between 10 nH and 50 nH. For example, the inductor structure can provide an inductance of at least 10 nH, in particular at least 40 nH. It turns out that in particular the mentioned inductance values ​​are advantageous for efficient ringing suppression.

[0039] In one embodiment, different values ​​of the impedance of the impedance structure can be selected by selecting an assigned one of the leads. More specifically, a corresponding one of the different discrete values ​​of the impedance of the impedance structure can be selected by selecting an assigned one of the leads. For example, the selected lead can define a selected value of the impedance provided by part or all of the access impedance structure by forming a conductive connection with the selected lead and a mounting base (e.g., a printed circuit board) on which the package is to be mounted.

[0040] In one embodiment, the impedance structure is connected to attenuate the ringing of the electronic device. Descriptively, the selected value of the impedance (particularly inductance) provided by the impedance structure in combination with the gate-source capacitance of the electronic device (e.g., a high power discrete switch type) can effectively form a frequency filter to attenuate the ringing effect in the form of an undesirable oscillation phenomenon, such as when the package is turned off.

[0041] In one embodiment, the carrier comprises a lead frame, in particular a die pad and a plurality of leads. Such a lead frame can be a sheet-like metal structure, which can be patterned to form one or more die pads or mounting sections for mounting one or more electronic devices of the package and one or more lead sections for electrically connecting the package to the electronic environment when the electronic device is mounted on the lead frame. In one embodiment, the lead frame can be a metal plate (in particular made of copper), which can be patterned, for example, by stamping or etching. It is cost-effective and mechanically and electrically advantageous to form the chip carrier as a lead frame, wherein the low-ohmic connection of the at least one electronic device can be combined with the sturdy support capacity of the lead frame. In addition, due to the high thermal conductivity of the metal (in particular copper) material of the lead frame, the lead frame can contribute to the thermal conductivity of the package and can remove the heat generated during the operation of the electronic device. The lead frame can include, for example, aluminum and / or copper. In the context of the present application, the term "die pad" can particularly refer to a part of a lead frame, the shape and size of which are suitable for accommodating electronic devices such as semiconductor chips. Accordingly, the surface area of ​​the die pad is generally flat and planar, and is large enough to fully receive the chip or die thereon. In contrast, the term "lead" can particularly represent another part of the lead frame, which can at least partially extend beyond the encapsulant (if present) and serve as a connecting element to the peripheral electronic devices of the package. For example, it is possible that one or more terminals of the electronic device mounted on the die pad are electrically connected to a corresponding one of the leads, for example, by a clip, a bonding wire or a bonding tape. For example, it is possible that the die pad is encapsulated and the leads are partially or completely exposed relative to the encapsulant. The die pad can also form the central portion of a lead frame type carrier, while the leads can form the peripheral portion of the lead frame. Both the die pad and the leads can at least partially include a metal material. More generally, the carrier can be a partial or complete metal structure.

[0042] In another embodiment, the carrier comprises a stack consisting of a central electrically insulating and thermally conductive layer (e.g. a ceramic layer), a direct copper bonding (DCB) substrate and a direct aluminum bonding (DAB) substrate, wherein the two opposite main surfaces of the central electrically insulating and thermally conductive layer are covered with corresponding conductive layers (e.g. a copper layer or an aluminum layer, wherein the corresponding conductive layers can be continuous or patterned layers).

[0043] In one embodiment, the package includes an encapsulant, in particular a molding compound, that encapsulates only a portion of the carrier, at least a portion of the electronic device, and at least a portion of the bonding wire or other type of impedance structure. When encapsulated by molding, injection molding or transfer molding can be performed, for example. Therefore, the encapsulant can include a molded object, in particular a plastic molded object. For example, a corresponding encapsulated structure (in particular an electronic device with a carrier) can be provided by placing one or more structures between an upper mold and a lower mold and injecting a liquid molding material therein. After the molding material solidifies, the formation of the encapsulant is completed. If necessary, the molded object can be filled with particles that improve its performance, such as its heat removal performance. In other exemplary embodiments, the encapsulant can also be a casting component.

[0044] In one embodiment, all leads or terminals may protrude laterally from the encapsulant (which may correspond to a leaded package architecture). However, the package may also be a leadless package.

[0045] In one embodiment, the connection between the electronic device, the carrier and / or the impedance structure is formed by a connection medium. For example, the connection medium can be a soldering structure, a sintering structure, a welding structure and / or a gluing structure. Therefore, the electronic device can be mounted on the carrier and / or the impedance structure can be connected between the electronic device and the carrier by soldering, sintering or welding, or by adhesion or gluing.

[0046] In one embodiment, the package comprises a plurality of electronic devices mounted on a carrier.Thus, the package may comprise one or more electronic devices (eg at least one passive device such as a capacitor and at least one active component such as a semiconductor chip).

[0047] In one embodiment, the at least one electronic device includes at least one of the group consisting of a controller circuit, a driver circuit and a power semiconductor circuit. All these circuits can be integrated into one semiconductor chip, or integrated into different chips respectively. For example, a corresponding power semiconductor application can be implemented by a chip, wherein the integrated circuit element of such a power semiconductor chip can include at least one transistor (especially MOSFET, metal oxide semiconductor field effect transistor), at least one diode, etc. In particular, circuits that implement half-bridge functions, full-bridge functions, etc. can be manufactured.

[0048] In one embodiment, the package is configured as a power converter, in particular one of an AC / DC power converter and a DC / DC power converter. However, other electronic applications such as inverters are also possible.

[0049] As a substrate or wafer for a semiconductor chip, a semiconductor substrate, i.e. a silicon substrate, can be used. Alternatively, a silicon oxide or another insulator substrate can be provided. A germanium substrate or a III-V semiconductor material can also be implemented. For example, exemplary embodiments can be implemented with GaN or SiC technology.

[0050] The above and other objects, features and advantages of the present invention will become apparent from the following description and appended claims taken in conjunction with the accompanying drawings in which like parts or elements are designated by like reference numerals. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] The accompanying drawings, which are included to provide a further understanding of exemplary embodiments of the invention and constitute a part of this specification, illustrate exemplary embodiments of the invention.

[0052] In the attached picture:

[0053] Figure 1 A three-dimensional view of a package according to an exemplary embodiment is shown.

[0054] Figure 2 Shown according to Figure 1 A transparent 3D view of the package.

[0055] Figure 3 Shown according to Figure 1 and Figure 2 A cross-sectional view of a package body.

[0056] Figure 4 A circuit diagram schematically illustrating a circuit of a package according to another exemplary embodiment is shown.

[0057] Figure 5 and Figure 6 The attenuation effect of the integrated inductor structure of a package according to an exemplary embodiment on the gate-source voltage is shown for two external gate resistor values.

[0058] Figure 7 A cross-sectional view of a package according to another exemplary embodiment is shown. DETAILED DESCRIPTION

[0059] The illustrations in the drawings are schematic and not to scale.

[0060] Before the exemplary embodiments will be described in more detail with reference to the accompanying drawings, some general considerations based on which exemplary embodiments have been developed will be summarized.

[0061] According to an exemplary embodiment, an integrated impedance structure (preferably implemented as an inductor structure) of the package can be provided. In particular, the impedance structure can be implemented as an integrated bond wire impedance structure. Such a configuration may be particularly advantageous for power applications and may suppress undesirable phenomena such as ringing. Advantageously, such an impedance structure may be provided so that the impedance value between the electronic device of the package and the external lead can be adjusted by selecting one of a plurality of leads connected to different sections or portions of the impedance structure for external electrical connection of the package.

[0062] Advantageously, exemplary embodiments can be implemented in medium voltage and high voltage discrete power MOSFETs. MOSFET chips are becoming smaller and smaller, thanks to the optimization of work related to the manufacturing process. A direct result of this miniaturization of the package is higher efficiency, in particular faster switching and reduced capacitance.

[0063] On the other hand, ease of use can be affected by further miniaturization of the package, in particular due to ringing effects. In electronics and signal processing, ringing can denote the oscillation of a signal, in particular in response to a sudden change of an input signal. Usually ringing is undesirable. In transistor chips in particular, gate-to-source voltage ringing can lead to undesired switch-on or switch-off effects or malfunctions of the gate driver. Gate-to-source voltage ringing can also be considered as a decisive parameter for quality assessment of the package.

[0064] An exemplary embodiment may improve the ease of use of a package while achieving high efficiency by implementing an integrated multi-tap impedance structure.

[0065] The gist of one exemplary embodiment relates to the implementation of an integrated high impedance impedance structure (preferably implemented as a high inductance inductor structure) positioned very close to the corresponding pads of the electronic device (particularly the chip gate electrode). In a particularly preferred embodiment, this can be achieved by a series of additional bonding wires within the package. Advantageously, such an integrated impedance structure can eliminate any need for external surface mounted devices (SMDs) such as external inductors, resistors, etc. In addition, such an embodiment can provide superior performance and is less laborious in terms of implementation.

[0066] The exemplary embodiments are compatible with significantly different package designs. In particular, the exemplary embodiments can be implemented with DDPACK, QDPACK, DSO and TOLL type packages. Basically, the exemplary embodiments implementing the impedance structure can be applied to any package, especially a package with free leads or pins.

[0067] Exemplary embodiments can be implemented with low effort. In one embodiment, such an implementation can be implemented by simply adding a series of bonding wire loops between the inner portion of the gate lead and the gate pad on the chip-type electronic device. Via the gate lead, a gate signal can be applied to the package.

[0068] Figure 1 A three-dimensional view of a package 100 according to an exemplary embodiment is shown. Figure 2 Shown according to Figure 1 A transparent three-dimensional view of the package body 100. Figure 3 Shown according to Figure 1 and Figure 2 1 is a cross-sectional view of a package 100. The illustrated embodiment relates to a bonded wire inductor of the package 100 (as described in detail below). As just one example, Figure 1 The package 100 is designed as a DDPACK type package.

[0069] exist Figures 1 to 3 , a semiconductor package 100 is shown, which includes a lead frame type carrier 102 , an electronic device 104 (eg a semiconductor chip, in particular a power transistor chip) mounted on the carrier 102 , and a molded encapsulant 110 encapsulating the electronic device 104 and only a portion of the carrier 102 .

[0070] The electronic device 104 is configured to have a vertical current (i.e., according to Figure 3 The electronic device 104 has three pads 106. A gate pad 106a and a source pad 106b are provided on the top main surface of the electronic device 104. A drain pad 106c is formed on the bottom main surface of the electronic device 104.

[0071] The lead frame type carrier 102 includes a mounting section 114 implemented as a die pad and a plurality of leads 116. The carrier 102 may be made of copper. As shown, the mounting section 114 of the carrier 102 is spatially separated from some of the leads 116. The mounting section 114 is located between a first group of leads 116 on the left side of the mounting section 114 and a second group of leads 116 on the right side of the mounting section 114. The electronic device 104 is mounted on one main surface of the mounting section 114, for example, by soldering. Figure 1 and Figure 3 As shown, the opposite other major surface of the mounting section 114 is exposed relative to the encapsulant 110 to facilitate removal of heat generated by the power semiconductor chip-type electronic device 104 during operation of the package 100 .

[0072] For example, to avoid ringing of the power transistor type electronic device 104 during operation of the package 100, the impedance structure 108 is electrically connected between the electronic device 104 and some of the leads 116 and encapsulated in the encapsulant 110. In the illustrated embodiment, the impedance structure 108 is implemented as an inductor structure providing different inductance values, and the user can individually tap different inductances by selecting one of the leads 116a to 116e to provide a signal to the gate pad 106a. The impedance structure 108 electrically couples the gate pad 106a with the carrier 102. Here, the impedance structure 108 is composed of a plurality of bonding wires 112a to 112e connected between the gate pad 106a and some of the leads 116a to 116e. As shown in FIG. Figure 2 As shown, the bonding wires 112a to 112e are arranged to form a plurality of turns constituting a conductive coil structure, thereby providing inductance. As shown, each of the bonding wires 112b to 112e extends between two corresponding leads 116a to 116e of the carrier 102 along a zigzag trajectory. Figure 2 As can be seen in the figure, the interconnecting conductive elements implemented here in the form of bonding wires 112b to 112e extend across the electronic device 104 between the leads 116a to 116e, but are still located within the encapsulant 110. Therefore, the package 100 with the impedance structure 108 shown can be manufactured in a compact manner. Another of the bonding wires 112a extends between the gate pad 106a of the carrier 102 and the lead 116c. The number of turns of the bonding wire 112 or other interconnecting conductive elements, the cross-sectional area of ​​the turns, and other geometric parameters can be adjusted to obtain a desired impedance value. For example, a suitable value for the impedance of the impedance structure 108 that can be tapped out at the lead 116a connected to the conductive connection element 159 can be 45nH.

[0073] As shown in the illustrated example, the plurality of bonding wires 112 include a bonding wire 112a connecting the gate pad 106a to a lead 116c, additional bonding wires 112b to 112d connecting the lead 116c to additional leads 116d, 116b, 116e respectively to each other, and a final bonding wire 112e providing a connection to the lead 116a, which is selected here for connection to a conductive connection element 159.

[0074] Advantageously and as Figure 2As best shown in , by electrically connecting a selected one of the leads 116a to 116e connected to a corresponding number of the bonding wires 112a to 112e to a peripheral electronic device of the package 100 via a conductive connection element 159, a selectable value of the impedance provided by a portion of the bonding wires 112a to 112e extending between the gate pad 106a and the selected lead (in the example shown, the lead 116a connected to the conductive connection element 159) can be adjusted. In other words, different leads 116a to 116e are connected to different sections of the bonding wires 112a to 112e arranged in series, so that different impedance values ​​of the impedance structure 108 can be tapped out at different ones of the leads 116a to 116e. For example and again with reference to Figure 2 By forming a conductive connection in the form of conductive connection element 159 to lead 116a, all bond wires 112a to 112e effectively contribute to the inductance between gate pad 106a and lead 116a. Therefore, a maximum inductance of, for example, 45nH can be tapped out at lead 116a. In contrast, by forming a conductive connection (not shown) to, for example, lead 116b, a smaller portion of the bond wires 112a to 112e, i.e., only bond wires 112a to 112c, effectively contribute to the inductance between gate pad 106c and lead 116b. Therefore, a smaller inductance of, for example, 30nH can be tapped out at lead 116b. By forming a conductive connection to lead 116c, an even smaller portion of bond wires 112a to 112e, i.e., only bond wire 112a, effectively contributes to the impedance between gate pad 106a and lead 116c. Other values ​​of inductance may still be tapped out by connecting the conductive connection element 159 to one of the leads 116d, 116e. Thus, the impedance structure 108 provides the user with the opportunity to select selectable values ​​of impedance (or more specifically inductance) depending on the requirements of a particular application.

[0075] In connection with its electronic function, the impedance structure 108 electrically couples the gate pad 106a of the electronic device 104 with the selectable gate leads 116a to 116e of the carrier 102. Depending on which of the leads 116a to 116e is electrically connected as the gate lead for providing the gate signal, the value of the inductance added between the gate pad 106a and the selected gate lead 116 can be selected. Figure 2 , the gate lead selected is lead 116a because conductive connection element 159 is already electrically connected to lead 116a (e.g., by welding). Figures 1 to 3 It can be seen that the package 100 is thus provided with an integrated multi-tap impedance structure 108 without increasing the size.

[0076] like Figure 2As best shown in , the impedance structure 108 is configured as an array of (substantially but not completely parallel) aligned interconnected conductive elements in the form of bond wires 112a to 112e that extend back and forth between leads 116a to 116e of the lead frame type carrier 102. The connecting element or bond wire 112a extends from the gate pad 106a to a lead 116c of the lead frame type carrier 102 on the left side of the package body 100. The conductive connecting element or bond wire 112b extends from the mentioned lead 116c to another lead 116d on the opposite side of the package body 100. The conductive connecting element or bond wire 112b also extends across the electronic device 104 mounted on the mounting section 114 of the carrier 102. As shown, any desired number of additional conductive connecting elements or bonding wires 112c, 112d, 112e can now be used to form one or more additional turns of the impedance structure 108b between the additional leads 116a, 116b, 116e until the desired impedance value is obtained. The last conductive connecting element or bonding wire 112e of the impedance structure 108 is connected to the gate lead 116a. This provides an external electrical connection to the selected gate lead 116a with the maximum impedance of the impedance structure 108 being fully tapped. As a result of the illustrated architecture, the impedance structure 108 provides an adjustable inductance of, for example, up to 45nH without a lot of additional effort and without increasing the size of the package 100 to, for example, suppress ringing.

[0077] Figure 2 Also shown is an optional additional lead 116 f which is not electrically coupled to connecting elements of the impedance structure 108 , such as the bonding wires 112 a to 112 e .

[0078] Figure 4 A cross-sectional view of a circuit diagram schematically illustrating a circuit of a package 100 according to another exemplary embodiment is shown.

[0079] Figure 4 shows that providing a similar Figures 1 to 3 The electronic circuit of the package 100 is shown. As shown, the electronic device 104 is configured as a MOSFET chip, see the gate pad 106a. The power supply voltage V DD Provided to the package 100. As shown in the figure, the MOSFET has a gate-source capacitance C GS The impedance structure 108 is interconnected between a plurality of leads 116 and the gate pad 106a. By selecting a corresponding one of the leads 116 for electrical connection to provide a gate signal to tap a portion of the impedance structure 108, different values ​​of the inductance L1, L2 or L3 can be selected. In the case of L1>L2>L3, the uppermost lead 116 can correspond to, for example, Figure 2The middle lead 116 may correspond to, for example, Figure 2 The lowermost lead 116 may correspond to, for example, Figure 2 Wire 116c.

[0080] Gate-source capacitance C GS Together with the selected values ​​of inductance L1, L2 or L3, a frequency filter can be formed to effectively dampen the undesired ringing. Since the ringing frequency may be related to the specific design of package 100, it may be desirable to select a specific one of the values ​​of inductance L1, L2 or L3 to effectively dampen the ringing in a specific package design. This can be achieved by simply selecting Figure 4 This is accomplished by connecting one of the leads 116 to the peripheral electronic device, selecting one of the values ​​of inductance L1, L2 or L3, and finally selecting a frequency filter range for suppressing ringing.

[0081] Figure 5 and Figure 6 Graphs 170 , 180 are shown illustrating the attenuation effect of the integrated inductor 108 of the package 100 on the ringing of the gate-source voltage for two different external gate resistor values ​​according to an exemplary embodiment.

[0082] Figure 5 170 is shown, which illustrates the attenuation effect of the integrated inductor 108 of the package 100 according to an exemplary embodiment. Figure 5 Graph 170 has an abscissa 172 along which time is plotted in seconds. Along ordinate 174, the gate-source voltage is plotted in volts. Graph 180 has an abscissa 172 along which time is also plotted in seconds. Along ordinate 174 of graph 180, the gate-source voltage is also plotted in volts. Graph 170 relates to an external gate resistor of 10 ohms and a drain current of 46 A. Graph 180 relates to an external gate resistor of 0.5 ohms and a drain current of 52 A. Figure 5 and Figure 6 In FIG. 1 , the performance of a conventional package is shown by reference numeral 176. In contrast, the performance of a package 100 with an integrated impedance structure 108 according to an exemplary embodiment is shown by curve 178. Figure 5 and Figure 6 As can be seen in FIG. 1 , a ringing effect in the form of a parasitic oscillation, indicated by reference numeral 182 , can be significantly suppressed with the integrated impedance structure 108 according to an exemplary embodiment.

[0083] Therefore, an analysis has been conducted to assess the Figures 1 to 3FIG. 1 is an illustration of the effect of the integrated impedance structure 108 on the ringing characteristics of the 180 mOhm MOSFET switch package 100 . Figure 5 and Figure 6 The gate to source voltage waveforms are shown with and without the additional bonding wire 112 providing the impedance structure 108. Under both switching conditions, the attenuation effect on the gate to source voltage ringing amplitude can be clearly observed. As shown, the difference in the attenuation characteristics is significant. The test system selected for this experiment has been carefully calibrated through measurements of a variety of prior art techniques. Therefore, the model is considered to be accurate in predicting the switching characteristics of the power MOSFET.

[0084] Figure 7 A cross-sectional view of a package 100 according to another exemplary embodiment is shown.

[0085] according to Figure 7 , the impedance structure 108 is formed by a spirally wound conductive interconnection element. For example, such a spiral can be formed by patterning a metal plate or by winding a metal wire. At different windings of the spiral, a corresponding one of the plurality of leads 116 taps off part of the impedance (particularly the inductance) of the spiral. Therefore, the circuit designer can select the impedance provided by the corresponding section of the spiral between the pad 106 and the corresponding one of the leads 116 by selecting one of the plurality of leads 116 for connection within the peripheral electronic device. For example, the appropriate value of the impedance can be selected according to the corresponding value of the inlet capacitance of the electronic device 104.

[0086] It should be noted that the term "comprising" does not exclude other elements or features, and "one" or "an" does not exclude a plurality. Likewise, elements described in connection with different embodiments may be combined. It should also be noted that the reference numerals should not be interpreted as limiting the scope of the claims. Furthermore, the scope of the present application is not intended to be limited to the particular embodiments of the processes, machines, manufactures, compositions of matter, means, methods and steps described in the specification. Therefore, the appended claims are intended to include such processes, machines, manufactures, compositions of matter, means, methods or steps within their scope.

Claims

1. A package (100), comprising: A carrier (102) having a plurality of leads (116); An electronic device (104) mounted on the carrier (102) and comprising at least one pad (106); and an impedance structure (108) electrically coupling the at least one pad (106) to the carrier (102) such that different impedance values ​​of the impedance structure (108) can be tapped at different ones of the leads (116); wherein the impedance structure (108) is formed by a plurality of interconnected conductive elements (112), wherein at least a portion of the interconnecting conductive elements (112) extend between different leads (116) of the carrier (102), wherein at least a portion of the interconnecting conductive element (112) extends across an electronic device (104) disposed between different ones of the leads (116).

2. The package (100) according to claim 1, wherein: The impedance structure (108) is an inductor structure, so that different inductance values ​​can be tapped at different leads among the leads (116).

3. The package (100) according to claim 1 or 2, wherein: The interconnected conductive elements (112) are arranged to form at least one of the following group: at least one turn, at least one spiral structure, at least one meander structure and at least one zigzag structure.

4. The package (100) according to claim 3, wherein: The at least one circle is a plurality of circles.

5. The package (100) according to any one of claims 1 to 2 and 4, wherein: At least a portion of the interconnecting conductive element (112) extends along a zigzag trajectory between different ones of the leads (116) of the carrier (102).

6. The package (100) according to any one of claims 1 to 2 and 4, wherein: Another of the interconnecting conductive elements (112) extends between the at least one pad (106) and one of the leads (116) of the carrier (102).

7. The package (100) according to any one of claims 1 to 2 and 4, wherein: The interconnecting conductive element (112) is a bonding wire.

8. The package (100) according to claim 7, wherein: The bonding wire has one of a circular, rectangular or flat cross section.

9. The package (100) according to any one of claims 1 to 2, 4 and 8, wherein: The package (100) includes an encapsulant (110) that at least partially encapsulates at least one of the following group: an electronic device (104), a carrier (102), and an impedance structure (108).

10. The package (100) according to claim 9, wherein: At least a portion of a major surface of a mounting section (114) of the carrier (102) on which the electronic device (104) is mounted is exposed relative to the encapsulant (110) to facilitate removal of heat generated during operation of the electronic device (104).

11. The package (100) according to any one of claims 1 to 2, 4, 8, 10, wherein: The package (100) comprises at least one of the following features: The electronic device (104) is a transistor chip; The electronic device (104) is configured to withstand a vertical current during operation; The electronic device (104) is a power semiconductor chip.

12. The package (100) according to claim 11, wherein: The transistor chip is a MOSFET chip.

13. The package (100) according to any one of claims 1 to 2, 4, 8, 10, 12, wherein: The impedance structure (108) electrically couples a gate pad (106a) of the electronic device (104) with selectable gate leads (116a to 116e) of the carrier (102).

14. The package (100) according to any one of claims 1 to 2, 4, 8, 10, 12, wherein: The impedance structure (108) is configured to provide at least two different inductance values ​​within a range between 5 nH and 500 nH.

15. The package (100) according to any one of claims 1 to 2, 4, 8, 10, 12, wherein: The impedance structure (108) is configured to provide at least two different inductance values ​​within a range between 10 nH and 50 nH.

16. A package (100), comprising: A carrier (102) comprising a mounting section (114) and a plurality of leads (116); An electronic device (104) mounted on the mounting section (114) and comprising at least one solder pad (106); and a plurality of bonding wires (112) connected between the at least one pad (106) and the lead (116) to form an impedance structure (108) having a selectable impedance value; The plurality of bonding wires (112) include a first bonding wire (112a) connecting one of the at least one solder pad (106a) to a first lead (116c), at least one second bonding wire connecting the first lead to at least one second lead, and a third bonding wire connecting at least one of the second leads to a third lead.

17. The package (100) according to claim 16, wherein: A respective one of the different discrete values ​​of the impedance of the impedance structure (108) is selectable by selecting an assigned one of the leads (116).

18. The package (100) according to claim 16 or 17, wherein: The impedance structure (108) is connected to attenuate ringing of the electronic device (104).

19. The package (100) according to claim 16 or 17, wherein: The carrier (102) is a lead frame.

20. The package (100) according to claim 16 or 17, wherein: The impedance structure (108) is an inductor structure having a selectable inductance value.

21. The package (100) according to claim 16 or 17, wherein: The plurality of bonding wires (112) include at least two second bonding wires (112b, 112c) connecting the first lead (116c) with at least two second leads (116d, 116b).

22. The package (100) according to claim 16 or 17, wherein: The package (100) includes an encapsulant (110) encapsulating only a portion of a carrier (102), at least a portion of an electronic device (104), and at least a portion of a bonding wire (112).

23. The package (100) according to claim 22, wherein: The encapsulant (110) is a molding compound.

24. A method for manufacturing a package (100), wherein: The method comprises: Mounting an electronic device (104) including at least one pad (106) on a carrier (102) having a plurality of leads (116); The at least one pad (106) is electrically coupled to the carrier (102) via an impedance structure (108) such that different impedance values ​​of the impedance structure (108) can be tapped at different ones of the leads (116); and At least partially encapsulating the electronic device (104), the carrier (102) and the impedance structure (108) by an encapsulant (110); wherein the impedance structure (108) is formed by a plurality of interconnected conductive elements (112), wherein at least a portion of the interconnecting conductive element (112) extends between different ones of the leads (116) of the carrier (102), wherein at least a portion of the interconnecting conductive element (112) extends across an electronic device (104) disposed between different ones of the leads (116).

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