Evaluating intermediate products related to 3D NAND memory cells

Abstract

A method, non-transitory computer-readable medium, and evaluation system for evaluating an intermediate product related to a three-dimensional NAND memory cell. The evaluation system may include an imager and processing circuitry. The imager may be configured to obtain an electronic image of a portion of a structural element belonging to the intermediate product via an open gap. The structural element may include a series of layers, the series of layers including a top layer followed by alternating non-conductive layers and recessed conductive layers. The imager may include an electron optics configured to scan a portion of the structural element using an electron beam, the electron beam being inclined with respect to a longitudinal axis of the open gap. The processing circuitry is configured to evaluate the intermediate product based on the electronic image. The open gap (a) exhibits a high aspect ratio, (b) has a width on the order of nanometers, and (c) is formed between the structural elements of the intermediate product.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of application No. 16 / 917,304, filed June 30, 2020, and application No. 62 / 895,917, filed September 4, 2019. The disclosures of those applications are incorporated herein by reference in their entirety and for all purposes. Background Art

[0003] A three-dimensional NAND (NAND) memory cell comprises a three-dimensional array of memory cells. The abbreviation "NAND" stands for the NAND logical operation. A three-dimensional NAND memory cell can be manufactured through a manufacturing process involving multiple stages. The results of each stage (except for the final stage of the manufacturing process) can be considered an intermediate product related to the three-dimensional NAND memory cell.

[0004] These manufacturing stages should be monitored. Faults introduced during one or more manufacturing stages can significantly reduce the yield of the entire manufacturing process. Monitoring intermediate products and manufacturing stages can be problematic because the structural elements of the intermediate products are separated by gaps that are nanometer-scale and exhibit high aspect ratios.

[0005] There is an increasing need to provide an accurate and efficient way to evaluate intermediate products produced by one or more stages of the fabrication of three-dimensional NAND memory cells. Summary of the Invention

[0006] An evaluation system may be provided, the evaluation system comprising an imager and processing circuitry. The imager may be configured to obtain an electronic image of a portion of a structural element belonging to an intermediate product through an open gap. The structural element may comprise a series of layers, wherein the series of layers may comprise a top layer followed by alternating non-conductive layers and recessed conductive layers. The image may comprise an electron optic configured to scan a portion of the structural element using an electron beam, the electron beam being inclined with respect to a longitudinal axis of the open gap. The processing circuitry may be configured to evaluate the intermediate product based on the electronic image. The open gap (a) exhibits a high aspect ratio, (b) has a width on the order of nanometers, and (c) is formed between the structural elements of the intermediate product. The intermediate product may be manufactured by one or more manufacturing stages of a manufacturing process for a three-dimensional NAND memory cell.

[0007] A method for evaluating an intermediate product may be provided, the method comprising: (i) obtaining an electron image of a portion of a structural element belonging to the intermediate product through an open gap; wherein the structural element comprises a series of layers, wherein the series of layers comprises a top layer followed by alternating non-conductive layers and recessed conductive layers; and (ii) evaluating the intermediate product based on the electron image. The open gap (a) has a longitudinal axis, (b) exhibits a high aspect ratio, (c) has a width on the order of nanometers, and (d) is formed between the structural elements of the intermediate product. The intermediate product is manufactured through one or more manufacturing stages of a manufacturing process for a three-dimensional NAND memory cell. Acquiring the electron image may comprise scanning the portion of the structural element using an electron beam, wherein the electron beam is tilted relative to the longitudinal axis of the open gap.

[0008] A non-transitory computer-readable medium may be provided, the non-transitory computer-readable medium storing instructions for the following operations: (i) obtaining an electronic image of a portion of a structural element belonging to an intermediate product through an open gap; wherein the structural element includes a series of layers, wherein the series of layers includes a top layer followed by alternating non-conductive layers and recessed conductive layers; and (ii) evaluating the intermediate product based on the electronic image. The open gap (a) has a longitudinal axis, (b) exhibits a high aspect ratio, (c) has a width on the order of nanometers, and (d) is formed between the structural elements of the intermediate product. The intermediate product is manufactured through one or more manufacturing stages of a manufacturing process for a three-dimensional NAND memory cell. Acquiring the electronic image may include scanning the portion of the structural element using an electron beam, the electron beam being tilted with respect to the longitudinal axis of the open gap. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] What is particularly pointed out and distinctly claimed in the concluding portion of the specification is regarded as the subject matter of the embodiments of the present disclosure. Figure 1 The embodiments of the present disclosure, both as to organization and method of operation, together with objects, features and advantages thereof, may be best understood by reference to the following detailed description when read in conjunction with the accompanying drawings:

[0010] Figure 1 Examples of intermediate products are shown;

[0011] Figure 2 An example of four structural elements is shown;

[0012] Figure 3 An example of an electron beam scanning a portion of a third structural element is shown;

[0013] Figure 4 An example of a scan pattern is shown;

[0014] Figure 5 An example of a path illuminated by an electron beam is shown;

[0015] Figure 6 An example of an electron beam and electrons emitted from a structural element is shown;

[0016] Figure 7 Examples of electronic images and structural elements are shown;

[0017] Figure 8 shows an example of the relationship between gray level and position along one or more scan lines obtained from illumination of three pairs of structural elements;

[0018] Figure 9 An example of an evaluation system and two structural elements is shown; and

[0019] Figure 10 An example of a method is shown. DETAILED DESCRIPTION

[0020] In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of embodiments of the present disclosure.

[0021] However, it will be understood by those skilled in the art that the present embodiments of the present disclosure can be practiced without these specific details.In other instances, well-known methods, procedures, and components have not been described in detail to avoid obscuring the present embodiments of the present disclosure.

[0022] What is particularly pointed out and distinctly claimed in the concluding portion of the specification is regarded as the subject matter of the embodiments of the present disclosure. Figure 1 The embodiments of the disclosure, both as to organization and method of operation, together with objects, features, and advantages thereof, may be best understood by reference to the following detailed description when read in conjunction with the present disclosure.

[0023] It will be understood that for simplicity and clarity of illustration, the elements shown in the figures are not necessarily drawn to scale. For example, the dimensions of some elements may be exaggerated relative to other elements for clarity. Furthermore, where deemed appropriate, reference numerals may be repeated among the drawings to indicate corresponding or similar elements.

[0024] Because the illustrated embodiments of the present disclosure can be implemented to a large extent using electronic components and circuits known to those skilled in the art, the details will not be explained to any greater extent than is deemed necessary as described above in order to understand and appreciate the basic concepts of the current embodiments of the present disclosure and in order not to obscure or deviate from the teachings of the current embodiments of the present disclosure.

[0025] Any reference in the specification to a method shall apply mutatis mutandis to a system capable of performing the method and shall apply mutatis mutandis to a computer-readable medium that is non-transitory and stores instructions for performing the method.

[0026] Any reference in the specification to a system shall apply mutatis mutandis to a method executable by the system and shall apply mutatis mutandis to a computer-readable medium that is non-transitory and stores instructions executable by the system.

[0027] Any reference in the specification to a non-transitory computer-readable medium shall apply mutatis mutandis to methods applicable when executing instructions stored in the computer-readable medium and shall apply mutatis mutandis to systems configured to execute instructions stored in the computer-readable medium.

[0028] The term "and / or" means additionally or alternatively.

[0029] The term "aspect ratio" means the ratio between the depth and width of a component. A high aspect ratio may be considered to be an aspect ratio exceeding, for example, 10:1.

[0030] The term "nanoscale" means that values ​​can range from tens of nanometers to less than one nanometer.

[0031] The term "electron image" means an image generated by applying an electronic image acquisition process, which involves (a) illuminating one or more intermediate products (or one or more portions of the one or more intermediate products) using one or more electron beams and (b) detecting electrons emitted as a result of the illumination.

[0032] The electronic image acquisition process may also include processing a detection signal indicative of the detection of the detected electrons.

[0033] Processing the detection signal may include applying at least one of a noise reduction operation, a smoothing operation, and / or providing the electronic image in a certain format. The certain format may be a grayscale format, but other formats may be provided.

[0034] The detected electrons may be secondary electrons, backscattered electrons, and the like.

[0035] The electron image acquisition process may be performed by a scanning electron microscope (SEM), by a critical dimension SEM, by a defect inspection SEM, by an electron beam image, and the like.

[0036] Evaluation systems, methods, and non-transitory computer-readable media for evaluating intermediate products may be provided.

[0037] The manufacturing process of a three-dimensional NAND memory device may include at least some of the following manufacturing stages:

[0038] a. Deposit various layers, such as a top layer followed by alternating conductive and non-conductive layers. The various layers form a substrate.

[0039] b. Forming an open gap. Forming an open gap can involve drilling vertical cell holes through various layers. The depth of the cell holes is at least ten times greater than the width of the cell holes. Therefore, the cell holes have a high aspect ratio.

[0040] c. Selectively etching the conductive layer to form a recessed conductive layer including a groove.

[0041] d. Depositing intermediate material in the grooves.

[0042] e. Depositing a floating gate over the intermediate material.

[0043] f. Etch away the excess material and leave an isolated floating gate in the recess.

[0044] g. Deposit the outer layer defining the empty tunnel.

[0045] h. Fill empty tunnels.

[0046] The method may be performed before fabrication stage (e) involving depositing a floating gate over the intermediate material deposited in the recess of the recessed conductive layer.

[0047] The method may be performed after completion of fabrication stage (c), which involves selectively etching the conductive layer to form recesses in the conductive layer.

[0048] Figure 1 An example of an intermediate product 10 is shown. Intermediate product 10 is the result of manufacturing stage (c). Intermediate product 10 includes a plurality of spaced-apart structural elements (denoted as 11(1,1)-1(J,K)) arranged in a two-dimensional grid of J rows and K columns. J and K are integers greater than two. J and K are typically much greater than two and can exceed one thousand, ten thousand, one hundred thousand, and so on.

[0049] The structural elements are spaced apart from each other by open gaps 20. Each open gap (i) has a longitudinal axis, (ii) exhibits a high aspect ratio, (iii) has a width on the order of nanometers, and (iv) is formed between structural elements of the intermediate product.

[0050] Each of the structural elements 11(1,1)-11(J,K) comprises a series of layers. Each series of layers comprises a top layer 12 followed by alternating non-conductive layers and recessed conductive layers. The alternating layers are collectively designated 13. It should be noted that the structural elements can be arranged in any manner.

[0051] Figure 2 An example of four structural elements is shown: a first structural element 11 (1, 1), a second structural element 11 (1, 2), a third structural element 11 (2, 1), and a fourth structural element 11 (2, 2). The four structural elements are close to each other.

[0052] Figure 2 Also shown is the width 22 of the open gap 20. The width of the open gap may be equal to the distance between the third structural element 11 (2, 1) and the fourth structural element 11 (2, 2). Width 22 has nanometer-scale dimensions. The height of each structural element far exceeds the width 22 of the open gap. The open gap 20 has an optical axis indicated at 24.

[0053] The structural element (2,1) includes a top layer 12(2,1) followed by alternating non-conductive layers and recessed conductive layers. The alternating layers are collectively designated 13(2,1) and include: (i) eight non-conductive layers, such as a first non-conductive layer 14(2,1,1), a second non-conductive layer 14(2,1,2), and an eighth non-conductive layer 14(2,1,8); and (iii) eight recessed conductive layers, such as a first recessed conductive layer 15(2,1,1), a second recessed conductive layer 15(2,1,2), and an eighth recessed conductive layer 15(2,1,8).

[0054] Figure 2 Also shown are enlarged views of the first non-conductive layer 14(2,1,1), the first recessed conductive layer 15(2,1,1), and the second non-conductive layer 14(2,1,2). A first groove 16(2,1,1) is formed on the right side of the first recessed conductive layer 15(2,1,1), and another groove is formed on the left side of the first recessed conductive layer 15(2,1,1). The first recessed conductive layer 15(2,1,1) is the highest recessed conductive layer in the alternating layers, and the first groove 16(2,1,1) can be considered the top groove of the alternating layers.

[0055] In some cases, the electronic image may include more accurate information about the top groove relative to information about the lower groove. In other cases, the electronic image may include more accurate information about the lower groove.

[0056] The depth D(2,1,1) of the first groove is represented as 18(2,1,1) and may be equal to the distance between (i) the rightmost edge of the first recessed conductive layer 15(2,1,1) and (ii) the rightmost edge of either the first non-conductive layer 14(2,1,1) or the second non-conductive layer 14(2,1,2).

[0057] Figure 2 The alternating layers define a plurality of grooves on the left side of the recessed conductive layer and on the right side of the recessed conductive layer. Evaluation of the intermediate product can be based at least in part on the depth of one or more of the plurality of grooves.

[0058] Figure 3 An example of an electron beam 31 scanning a portion of the third structural element 11 ( 2 , 1 ) is shown. The electron beam 31 is tilted to the longitudinal axis 21 of the open gap 20 .

[0059] Figure 4 An example of a scan pattern 40 followed by the electron beam 31 when scanning the portion of the third structural element 11 ( 2 , 1 ) and a portion of the fourth structural element 11 ( 2 , 2 ) is shown. The raster scan pattern includes a plurality of scan lines and a reverse scan line. The first scan line is designated 40 ( 1 ). Other scan patterns may be used.

[0060] Figure 5 An example of a path illuminated by the electron beam 31 as it scans along the first scan line 40(1) is shown. The path 50 comprises:

[0061] a. A first path segment 51 in which the electron beam scans the top layer of the third structural element 11 (2, 1).

[0062] b. A second path segment 52, in which the electron beam scans (at least) the first non-conductive layer of the alternating layers.

[0063] c. A third path segment 53, in which the electron beam scans the other non-conductive layers in the alternating layers (and may scan portions of the recessed conductive layers in the alternating layers).

[0064] d. A fourth path segment 54, in which the electron beam scans the top layer of the fourth structural element 11 (2, 2).

[0065] Figure 6 An example of an electron beam 31 and electrons 32 and 33 emitted from a structural element is shown. Electrons can be emitted from a three-dimensional area affected by illumination. The electron beam can illuminate one of the alternating layers and electrons can be emitted from another of the alternating layers.

[0066] Figure 7 An example of an electronic image 150 and a structural element is shown.

[0067] The electronic image 150 comprises a pixel for each illuminated point of the first and second structure elements.

[0068] From left to right: top layer pixel 150(1) represents electrons emitted from the top layer of the left structural element, highest recessed conductive layer pixel 150(2) represents electrons emitted from the highest groove, additional recessed conductive layer electron pixel 150(3) represents electrons emitted from a groove different from the highest groove, and additional top layer pixel 150(4) represents electrons emitted from the top layer of the right structural element.

[0069] The pixels of a slice of an electronic image are processed to provide a curve of intensity at each location, such as Figure 8 The curves shown in .

[0070] Figure 8 An example of the relationship between grayscale and position along one or more scan lines acquired from illuminated portions of three pairs of structural elements is shown.

[0071] For signal-to-noise considerations, it may be beneficial to generate one curve per multiple scan lines (eg by averaging the detection signals obtained from multiple scans of the electron beam).

[0072] The structural elements of each pair differ from the structural elements of the other pair by the depth of the grooves of the recessed conductive layer.

[0073] Figure 8 It consists of three curves, one for each pair of structural elements. Curve 60(1) consists of:

[0074] a. The second highest peak 61 (1), represents the radiation emitted as a result of illuminating the top layer of the first structural element of the first pair of structural elements.

[0075] b. A first highest peak 62(1), representing radiation emitted as a result of illuminating the first non-conductive layer of the first structure element of the first pair of structure elements.

[0076] c. Roughened, sloping areas 63 ( 1 ), representing radiation emitted as a result of illuminating at least the other non-conductive layer of the first structure element of the first pair of structure elements.

[0077] d. A third peak 61 (1) representing radiation emitted as a result of illuminating the top layer of the second structural element of the first pair of structural elements.

[0078] Curves 60(2) and 60(3) have the same parts (61(2), 62(2), 63(2), 64(2), 61(3), 62(3), 63(3) and 64(3)), but at least one of the difference between the first and second highest peaks, the roughness of the rough inclined area, the curvature and / or the slope of at least a portion of the curve is different from curve 60(1).

[0079] It has been found that for a given conductive recessed area material, shallower grooves emit a stronger signal. This may be attributed to the higher emissivity of the recessed conductive layer and the fact that shallower grooves are formed when the edge of the recessed conductive layer is closer (compared to deeper grooves) to the edge of the non-conductive layer adjacent to the recessed conductive layer.

[0080] With respect to curves 60(1), 60(2) and 60(3), a stronger signal may be represented by a more intense first higher peak, a higher ratio between the first highest peak and the second highest peak, increased roughness of the rough sloped region, and so on.

[0081] Figure 9 An example of an evaluation system 100 and two structural elements is shown. The evaluation system 100 may include an imager 110 and a processing circuit 120. The imager 110 may be configured to obtain an electronic image (150) of a portion of a structural element belonging to an intermediate product through an open gap. Figures 1 to 2 Examples of structural elements are provided in .

[0082] Imager 110 may include electron optics 112 configured to scan a portion of the structural element using an electron beam that is tilted relative to the longitudinal axis of the open gap. Imager 110 may also include a frame grabber 114 or other circuitry that can convert the detection signal into an electronic image in any manner. Processing circuitry 130 is configured to evaluate the intermediate product based on the electronic image.

[0083] Figure 10 An example of method 200 is shown. Method 200 can be performed by evaluation system 100. Method 200 can include measuring or estimating the depth of one or more grooves formed in one or more recessed conductive layers. The depth of the groove can be equal to the distance between the edge of the exposed portion of the recessed conductive layer and the edge of the adjacent non-conductive layer. The groove is formed within the high aspect ratio hole and is hidden from normal lighting (by the exposed portion of the non-conductive layer).

[0084] Therefore, oblique illumination should be used to measure the groove depth. The illumination is oblique in the sense that the incident electron beam is neither parallel nor perpendicular to the longitudinal axis of the hole.

[0085] Method 200 may include steps 210, 220, and further step 230. Method 200 may begin at step 210 by obtaining an electronic image of a portion of a structural element belonging to an intermediate product through an open gap. The structure may include a series of layers. The series of layers may include a top layer followed by alternating non-conductive layers and recessed conductive layers.

[0086] The open gap has a longitudinal axis, exhibits a high aspect ratio, has a width on the order of nanometers, and is formed between structural elements of the intermediate product. The intermediate product is manufactured through one or more manufacturing stages of a three-dimensional NAND memory cell manufacturing process.

[0087] Step 210 may include step 212 of scanning a portion of the structural element using an electron beam that is tilted relative to the longitudinal axis of the open gap. Step 210 may be followed by step 220 of evaluating the intermediate product based on the electron image.

[0088] Step 220 may include at least one of the following steps:

[0089] a. Step 221 , estimating a depth of at least one groove formed in one or more of the recessed conductive layers.

[0090] b. Step 222 , estimating the depth of the groove formed in the highest recessed conductive layer among the recessed conductive layers.

[0091] c. Step 223, calculating a relationship between (a) intensity attributes of pixels of the top layer of the electronic image and (b) intensity attributes of pixels of the electronic image associated with at least one layer in the series of alternating layers. The relationship indicates the depth of the top groove.

[0092] d. Step 224, calculate the relationship between (a) the intensity attribute of the top pixel of the electronic image and (b) the intensity attribute of the pixel of the electronic image associated with the highest recessed conductive layer. The relationship indicates the depth of the top recess.

[0093] e. Step 225, calculating the relationship between the first highest peak value of the electronic image and the second highest peak value of the electronic image. The relationship indicates the depth of the top groove.

[0094] f. Step 226 , determining a depth of at least one groove formed in one or more of the recessed conductive layers based on the relationship.

[0095] Step 220 may include finding peaks and verifying the peaks. A peak may be defined as a significant maximum value, thereby preventing peak detection associated with local noise. Peaks may be detected and verified in various ways, such as by waveform filtering, defining a peak as a maximum value within a window, and filtering local peaks based on a minimum distance between the nearest possible peak parameters.

[0096] Any of the above relationships can be learned in any manner. For example, a reference structural element having a groove of known size can be illuminated to provide measurements associated with the known size of the groove. Additionally or alternatively, the relationship can be learned by simulating electronic images obtained when scanning the structural element.

[0097] The relationship can be measured on conductive and non-conductive layers of certain materials and then estimated for conductive and non-conductive layers made of other materials.

[0098] The relationship may be based on the difference between the emissivity of the conductive layer and the non-conductive layer, and may apply mutatis mutandis to other conductive and non-conductive layers having similar emissivity differences, or having different similar emissivity differences.

[0099] Step 220 may include classifying the grooves into a plurality of categories based on groove depth. Each category may be associated with certain properties of the electronic image. The classification may take into account at least some of the following: local curvature at the peak location, a second derivative of the signal at the peak location, and local curvature (the slope of the signal near the peak).

[0100] Step 220 may be followed by step 230, responsive to evaluating the intermediate product. Step 230 may include evaluating at least one of manufacturing stages (a), (b), and (c).

[0101] In the foregoing specification, embodiments of the present disclosure have been described with reference to specific examples thereof. However, it will be evident that various modifications and changes may be made herein without departing from the broader spirit and scope of embodiments of the present disclosure as set forth in the appended claims.

[0102] Furthermore, the terms "front," "back," "top," "bottom," "above," "below," and the like, if any, in the specification and claims are used for descriptive purposes and are not necessarily intended to describe permanent relative positions. It is understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the disclosure described herein are, for example, capable of operation in other orientations than those illustrated or otherwise described herein.

[0103] As discussed herein, a connection may be any type of connection suitable for transmitting signals to and from a corresponding node, unit, or device (e.g., via an intermediate device). Thus, unless otherwise implied or stated, a connection may be, for example, a direct connection or an indirect connection. Connections may be shown or described with reference to a single connection, multiple connections, a unidirectional connection, or a bidirectional connection. However, different embodiments may vary the manner in which the connections are implemented. For example, a separate unidirectional connection may be used instead of a bidirectional connection, or vice versa. Furthermore, multiple connections may be replaced by a single connection that transmits multiple signals serially or in a time-division multiplexed manner. Similarly, a single connection carrying multiple signals may be separated into various different connections that carry subsets of these signals. Therefore, there are many options for transmitting signals.

[0104] Any arrangement of components to achieve the same functionality is effectively "associated" such that the desired functionality is achieved. Thus, any two elements combined herein to achieve a particular functionality may be considered to be "associated" with each other such that the desired functionality is achieved, regardless of architectures or intermediary components. Likewise, any two components so associated may also be considered to be "operably connected" or "operably coupled" to each other such that the desired functionality is achieved.

[0105] Furthermore, those skilled in the art will recognize that the boundaries between the operations described above are illustrative only. Multiple operations may be combined into a single operation, a single operation may be distributed among additional operations, and operations may be performed with at least partial overlap in time. Furthermore, alternative embodiments may include multiple instances of a particular operation, and the order of the operations may be changed in various other embodiments.

[0106] Also for example, in one embodiment, the examples shown may be implemented as circuits located on a single integrated circuit or within the same device. Alternatively, the examples may be implemented as any number of separate integrated circuits or separate devices interconnected with each other in a suitable manner.

[0107] However, other modifications, variations, and substitutions are possible. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense.

[0108] In the claims, any reference numerals between brackets should not be interpreted as limiting the claims. The word 'comprising' does not exclude the presence of other elements or steps other than those listed in the claims. In addition, as used herein, the term "a" or "an" is defined as one or more than one. In addition, even when the same claim includes the introductory phrases "one or more" or "at least one" and indefinite articles such as "a" or "an", the use of introductory phrases such as "at least one" and "one or more" in the claims should not be interpreted as implying that any particular claim introduced by the indefinite article "a" or "an" will contain the introduced claim element to limit the embodiment of the present disclosure to only one such element. The same is true for the use of definite articles. Unless otherwise stated, terms such as "first" and "second" are used to arbitrarily distinguish between the elements described by such terms. Therefore, these terms do not necessarily intend to indicate the timing or other priority of such elements. The fact that certain measures are described in mutually different claims does not indicate that a combination of these measures cannot be used advantageously.

[0109] While certain features of the embodiments of the present disclosure have been illustrated and described herein, many modifications, substitutions, changes, and equivalents will now occur to those skilled in the art. It will therefore be understood that the appended claims are intended to cover all such modifications and changes that fall within the true spirit of the embodiments of the present disclosure.

Claims

1. An evaluation system comprising: an imager configured to obtain an electronic image of a portion of a structural element belonging to an intermediate product, the intermediate product being manufactured by one or more manufacturing stages of a process for manufacturing a three-dimensional NAND memory cell, through an open gap, the structural element comprising a series of layers including a top layer followed by alternating non-conductive layers and recessed conductive layers, wherein the imager comprises electron optics configured to scan the portion of the structural element using an electron beam, the electron beam being tilted with respect to a longitudinal axis of the open gap; as well as processing circuitry configured to evaluate the intermediate product based on the electronic image; The open gaps (a) exhibit a high aspect ratio, (b) have a width on the order of nanometers, and (c) are formed between structural elements of the intermediate product.

2. The evaluation system according to claim 1, wherein: The processing circuit is configured to evaluate the intermediate product by estimating a depth of at least one groove formed within one or more of the recessed conductive layers.

3. The evaluation system according to claim 1, wherein: The processing circuit is configured to evaluate the intermediate product by estimating a depth of a groove formed in a highest recessed conductive layer among the recessed conductive layers.

4. The evaluation system according to claim 1, wherein: The processing circuit is configured to evaluate the intermediate product by calculating a relationship between (a) intensity attributes of pixels of a top layer of the electronic image and (b) intensity attributes of pixels of the electronic image associated with at least one of the alternating non-conductive layers and recessed conductive layers.

5. The evaluation system according to claim 1, wherein: The processing circuit is configured to evaluate the intermediate product by calculating a relationship between (a) intensity attributes of pixels of a top layer of the electronic image and (b) intensity attributes of pixels of the electronic image associated with the most highly recessed conductive layer.

6. The evaluation system according to claim 1, wherein: The processing circuit is configured to evaluate the intermediate product by calculating a relationship between a first highest peak value of the electronic image and a second highest peak value of the electronic image.

7. The evaluation system according to claim 1, wherein: The processing circuit is configured to evaluate the intermediate product by calculating a roughness of a curve representing the intensity of electronic image pixels located along a scan line running across at least two of the alternating non-conductive layers and recessed conductive layers.

8. A non-transitory computer-readable medium comprising computer-readable instructions that, upon execution by a computerized evaluation system, cause the computerized evaluation system to perform a process comprising: obtaining an electronic image of a portion of a structural element belonging to the intermediate product through the open gap; wherein the structural element comprises a series of layers, wherein the series of layers comprises a top layer followed by alternating non-conductive layers and recessed conductive layers; as well as evaluating the intermediate product based on the electronic image; wherein the open gap (a) has a longitudinal axis, (b) exhibits a high aspect ratio, (c) has a width on the order of nanometers, and (d) is formed between structural elements of the intermediate product, wherein the intermediate product is manufactured by one or more manufacturing stages of a three-dimensional NAND memory cell manufacturing process; and The obtaining of the electron image comprises scanning the portion of the structural element using an electron beam, the electron beam being inclined with respect to a longitudinal axis of the open gap.

9. A method for evaluating an intermediate product, the method comprising: obtaining an electronic image of a portion of a structural element belonging to the intermediate product through the open gap; wherein the structural element comprises a series of layers, wherein the series of layers comprises a top layer followed by alternating non-conductive layers and recessed conductive layers; as well as evaluating the intermediate product based on the electronic image; wherein the open gap (a) has a longitudinal axis, (b) exhibits a high aspect ratio, (c) has a width on the order of nanometers, and (d) is formed between structural elements of the intermediate product, wherein the intermediate product is manufactured by one or more manufacturing stages of a three-dimensional NAND memory cell manufacturing process; and The obtaining of the electron image comprises scanning the portion of the structural element using an electron beam, the electron beam being inclined with respect to a longitudinal axis of the open gap.

10. The method according to claim 9, wherein The evaluating includes estimating a depth of at least one groove formed within one or more of the recessed conductive layers.

11. The method according to claim 9, wherein The evaluating includes estimating a depth of a groove formed in a highest recessed conductive layer among the recessed conductive layers.

12. The method according to claim 9, wherein The evaluating includes calculating a relationship between (a) intensity attributes of pixels of a top layer of the electronic image and (b) intensity attributes of pixels of the electronic image associated with at least one of the alternating non-conductive layer and recessed conductive layer.

13. The method according to claim 9, wherein The evaluation includes calculating a relationship between (a) an intensity attribute of pixels of a top layer of the electronic image and (b) an intensity attribute of pixels of the electronic image associated with the most highly recessed conductive layer.

14. The method according to claim 9, wherein The evaluating includes calculating a relationship between a first highest peak value of the electronic image and a second highest peak value of the electronic image.

Images