Method of forming a semiconductor device

Abstract

The present invention provides a method for forming a semiconductor device. The forming method includes: providing a substrate, on which an interlayer dielectric layer is provided; etching the interlayer dielectric layer to form a contact hole, the contact hole exposing the surface of the substrate; forming an adhesion layer on the bottom and side walls of the contact hole; forming a metal seed layer on the bottom and side walls of the adhesion layer by using a selective growth method; and forming a metal layer on the metal seed layer, the metal layer filling the contact hole completely. The present invention enables a better forming quality between the formed metal layer and the contact hole, ensuring that the formed semiconductor device has good performance and yield.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and particularly to a method for forming a semiconductor device. Background Art

[0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. As the most basic semiconductor devices, they are currently widely used. The traditional planar devices have a weakened ability to control the channel current, resulting in a short-channel effect and leakage current, ultimately affecting the electrical performance of the semiconductor device.

[0003] During the manufacturing process of semiconductor devices, contact holes need to be formed on the source region, drain region, or gate structure of the transistor, etc., and then a metal layer is filled in the contact holes to form metal plugs, so that components such as transistors are electrically connected to the interconnect metal layer through the metal plugs. However, currently, the formed metal layer and the contact holes have poor forming quality.

[0004] How to make the metal layer and the contact holes have good forming quality, so as to ensure that the formed semiconductor device has good performance, is an urgent problem to be solved currently. Summary of the Invention

[0005] The problem solved by the present invention is to provide a method for forming a semiconductor device, so that the formed metal layer and the contact holes have good forming quality, and ensure that the formed semiconductor device has good performance and yield.

[0006] To solve the above problems, the present invention provides a method for forming a semiconductor device, including: providing a substrate, on which there is an interlayer dielectric layer; etching the interlayer dielectric layer to form contact holes, the contact holes exposing the surface of the substrate; forming an adhesion layer on the bottom and side walls of the contact holes; forming a metal seed layer on the bottom and side walls of the adhesion layer by selective growth; forming a metal layer on the metal seed layer, the metal layer filling the contact holes.

[0007] Optionally, the process parameters of the selective growth method include: the organic source is CODCP, the reaction gases include hydrogen, ammonia, and argon, where the gas flow rate of hydrogen is 1000 - 8000 sccm, the gas flow rate of ammonia is 1000 - 5000 sccm, and the gas flow rate of argon is 10 - 500 sccm; the source radio frequency power is 100 - 2000 watts, the temperature is 100 - 400 °C, and the pressure is 10 - 40 Torr.

[0008] Optionally, the material of the metal seed layer is cobalt.

[0009] Optionally, the material of the metal layer is cobalt.

[0010] Optionally, the metal layer is formed by an electroplating method.

[0011] Optionally, the adhesion layer is a single-layer adhesion layer or a stacked adhesion layer.

[0012] Optionally, when the adhesion layer is a stacked adhesion layer, the stacked adhesion layer includes a reactive metal layer and a first diffusion barrier layer. The steps of forming the stacked adhesion layer include: forming the reactive metal layer on the bottom and sidewalls of the contact hole; forming the first diffusion barrier layer on the reactive metal layer.

[0013] Optionally, after forming the first diffusion barrier layer, it further includes: forming a second diffusion barrier layer on the first diffusion barrier layer.

[0014] Optionally, when the adhesion layer is a single-layer adhesion layer, the material of the single-layer adhesion layer is tungsten, tantalum or titanium.

[0015] Optionally, when the material of the single-layer adhesion layer is tungsten or tantalum, before forming the single-layer adhesion layer, it further includes: forming a silicide layer on the substrate in the contact hole.

[0016] Optionally, when the material of the single-layer adhesion layer is titanium, after forming the metal layer, it further includes: forming a silicide layer on the substrate in the contact hole.

[0017] Optionally, the method for forming the single-layer adhesion layer is atomic layer chemical vapor deposition.

[0018] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0019] The metal seed layer is formed on the bottom and sidewalls of the contact hole by a selective growth method, so that the formed metal seed layer can adhere well to the adhesion layer. When the metal layer is formed on the metal seed layer, the metal seed layer and the adhesion layer will not peel off, thereby avoiding the defect of holes during the formation of the metal layer, ensuring that the formed metal layer has a good forming quality with the contact hole, and improving the performance and yield of the formed semiconductor device. This is because the surface of the metal seed layer formed by the selective growth method has properties similar to those of the adhesion layer surface. When the metal seed layer is formed, an adsorption force for the metal seed layer will be formed on the adhesion layer surface, which not only makes it easier for the metal seed layer to fill into the bottom of the contact hole to form a metal seed layer with good adhesion quality, but also the adhesion force between the metal seed layer and the adhesion layer is strong, and the two are not easy to peel off. Therefore, during the formation of the metal layer, there will be no defect of holes caused by the peeling between the metal seed layer and the adhesion layer, ensuring that the formed semiconductor device has high quality and performance stability. Description of the Drawings

[0020] Figures 1 to 5 is a schematic structural diagram of the formation process of a semiconductor device in an embodiment;

[0021] Figures 6 to 10 is a schematic structural diagram of the formation process of a semiconductor device in the first embodiment of the present invention;

[0022] Figures 11 to 14 is a schematic structural diagram of the formation process of a semiconductor device in the second embodiment of the present invention;

[0023] Figures 15 to 18 is a schematic structural diagram of the formation process of a semiconductor device in the third embodiment of the present invention. Detailed implementation manners

[0024] In the process of forming a semiconductor device, it is necessary to fill a metal layer in a contact hole to form a metal plug. However, in the process of forming the metal plug, the forming quality between the metal layer and the contact hole is poor, and there are defects such as holes between the metal layer and the contact hole, resulting in phenomena such as easy leakage or failure during the use of the semiconductor device, which limits the use of the semiconductor device. For the specific formation process, refer to Figures 1 to 5 .

[0025] First, refer to Figure 1 , provide a substrate 1, and an interlayer dielectric layer 2 is formed on the substrate 1.

[0026] Refer to Figure 2 , etch the interlayer dielectric layer 2 to form a contact hole 3 in the interlayer dielectric layer 2.

[0027] Refer to Figure 3 , sequentially form a reactive metal layer 4 and a diffusion barrier layer 5 on the bottom, sidewall of the contact hole 3, and the surface of the interlayer dielectric layer 2.

[0028] A silicide layer 41 is formed on the surface of the reactive metal layer 4 and the substrate 1.

[0029] Refer to Figure 4 , a metal seed layer 6 is formed on the diffusion barrier layer 5 in the contact hole 3 by physical vapor deposition or chemical vapor deposition.

[0030] Refer to Figure 5 , a metal layer 7 is formed on the metal seed layer 6 in the contact hole 3.

[0031] The inventors found that the stability of the performance of semiconductor devices formed by this method is poor, and phenomena such as failure are likely to occur, which limits the use of semiconductor devices. This is because the size of the contact hole 3 is small. When forming the metal seed layer 6, the structure and internal environment inside the contact hole 3 have a strong effect on the metal seed layer 6, preventing the deposition of the metal seed layer 6, resulting in a poor coverage effect of the formed metal seed layer 6 on the diffusion barrier layer 5 and a small adhesion force between the two. When forming the metal layer subsequently, the metal seed layer and the diffusion barrier layer are prone to peeling, resulting in defects such as holes between the formed metal layer and the contact hole, causing a reduction in the performance of the formed semiconductor device.

[0032] The inventors' research found that by using the selective growth method to form a metal seed layer on the bottom and side walls of the adhesion layer, the adhesion force between the formed metal seed layer and the adhesion layer is strong and the attachment effect of the metal seed layer on the bottom and side walls of the contact hole is good. This ensures that during the process of forming the metal layer, no holes will appear between the contact hole and the metal layer, thereby improving the quality of the formed semiconductor device.

[0033] To make the above objects, features, and advantages of the present invention more obvious and understandable, the following will describe the specific embodiments of the present invention in detail with reference to the accompanying drawings.

[0034] First Embodiment

[0035] Figures 6 to 10 It is a schematic structural diagram of the process of forming a semiconductor device in the first embodiment of the present invention.

[0036] First, refer to Figure 6 , provide the substrate 100, and an interlayer dielectric layer 200 is provided on the substrate 100.

[0037] In this embodiment, the substrate 100 includes a substrate, and storage devices, logic devices, etc. are located on the substrate.

[0038] In this embodiment, the material of the interlayer dielectric layer 200 is silicon oxide.

[0039] In other embodiments, the material of the interlayer dielectric layer 200 can also be silicon nitride, silicon boron nitride, silicon carbon oxynitride, silicon oxynitride, etc.

[0040] In this embodiment, the interlayer dielectric layer 200 is formed on the substrate 100 by chemical vapor deposition. The process parameters of the chemical vapor deposition process include that the gases used include oxygen, ammonia (NH3), and N(SiH3)3 gas, the flow rate of oxygen is 20 sccm to 10,000 sccm, the flow rate of ammonia (NH3) gas is 20 sccm to 10,000 sccm, the flow rate of N(SiH3)3 gas is 20 sccm to 10,000 sccm, the chamber pressure is 0.01 to 10 Torr, and the temperature is 30 °C to 90 °C.

[0041] Reference Figure 7 , etch the interlayer dielectric layer 200 to form a contact hole 210 in the interlayer dielectric layer 200, and the bottom of the contact hole 210 exposes the surface of the substrate 100.

[0042] In this embodiment, the dry etching process is used to form the contact hole 210; the parameters of the dry etching process include: the gases used include CF4 and CH3F, the flow rate of CF4 is 20 sccm to 200 sccm, the flow rate of CH3F is 20 sccm to 50 sccm, the source radio frequency power is 200 watts to 500 watts, and the chamber pressure is 1 Torr to 10 Torr.

[0043] In this embodiment, the contact hole 210 exposes the source / drain region on the substrate 100; in other embodiments, the contact hole 210 may also expose the gate structure on the substrate 100, etc.

[0044] Reference Figure 8 , form an adhesion layer on the bottom and side walls of the contact hole 210, and the adhesion layer is a single-layer adhesion layer 300.

[0045] In this embodiment, the material of the single-layer adhesion layer 300 is tungsten (W); in other embodiments, the material of the single-layer adhesion layer 300 is tantalum (Ta).

[0046] In this embodiment, the single-layer adhesion layer 300 extends onto the interlayer dielectric layer 200.

[0047] In this embodiment, the single-layer adhesion layer 300 is formed by atomic layer vapor deposition.

[0048] In this embodiment, the single-layer adhesion layer 300 is formed by atomic layer deposition (ALD); in other embodiments, the single-layer adhesion layer 300 can also be formed by chemical vapor deposition (CVD) or physical vapor deposition (PVD).

[0049] In this embodiment, the reason for forming the single-layer adhesion layer 300 by atomic layer chemical vapor deposition is that the single-layer adhesion layer 300 formed by atomic layer chemical vapor deposition has a high density, which can play a role in improving the blocking of ion diffusion.

[0050] In this embodiment, since the surface of the single-layer adhesion layer 300 has a large amount of charge and polar bonds under the action of the precursor process, when the metal seed layer is formed by selective growth method subsequently, an adsorption force for adsorbing the metal seed layer can be provided, ensuring the formation of a metal seed layer with good quality on the bottom and side walls of the contact hole, and at the same time enabling a strong adhesion force between the single-layer adhesion layer 300 and the metal seed layer.

[0051] In this embodiment, before forming the single-layer adhesion layer 300, it further includes forming the reactive metal layer (not shown in the figure) on the bottom and side walls of the contact hole 210, and forming a diffusion barrier layer (not shown in the figure) on the reactive metal layer. The formed reactive metal layer reacts with the substrate 100 to form a silicide layer 220, and the silicide layer 220 is formed in a heat treatment process. After forming the silicide layer 220, the unreacted reactive metal layer and the diffusion barrier layer formed are removed.

[0052] In this embodiment, the reason for removing the reactive metal layer and the diffusion barrier layer is that the reactive metal layer and the diffusion barrier layer have a large resistance. When the metal layer is formed subsequently, there will be a large contact resistance between the metal layer and the device at the bottom of the contact hole, and the semiconductor device formed is prone to heat generation and reduced operating speed during use, thus limiting the use of the semiconductor device.

[0053] Reference Figure 9 , the metal seed layer 400 is formed on the bottom and side walls of the single-layer adhesion layer 300 by selective growth method.

[0054] In this embodiment, the material of the metal seed layer 400 is cobalt (Co).

[0055] In this embodiment, the process parameters of the selective growth method include: the organic source is CODCP, the reaction gases include hydrogen (H2), ammonia (NH3), and argon (Ar), where the flow rate of hydrogen (H2) is 1000 - 8000 sccm, the flow rate of ammonia (NH3) is 1000 - 5000 sccm, and the gas flow rate of argon (Ar) is 10 - 500 sccm; the source radio frequency power is 100 - 2000 watts, the temperature is 100 - 400 °C, and the pressure is 10 - 40 Torr.

[0056] In this embodiment, the selective growth method is adopted to make the surface of the formed metal seed layer 400 have a large number of polar bonds or charges, etc. At the same time, due to the action of the precursor process, the surface of the formed single-layer adhesion layer 300 also has a large number of polar bonds or charges. In this way, the surface properties of the metal seed layer 400 and the adhesion layer 300 attract each other. Then, when the metal seed layer 400 is formed, the metal seed layer 400 is easily adhered to the single-layer adhesion layer 300. At the same time, the single-layer adhesion layer 300 can also provide an adsorption force when the metal seed layer 400 is filled, so that the metal seed layer 400 can better adhere to the bottom and side walls of the contact hole 210. Therefore, the formed metal seed layer 400 not only has a high forming quality in the contact hole 210, but also has a high adhesion force between the metal seed layer 400 and the single-layer adhesion layer 300 due to the similar properties between the surface of the metal seed layer 400 and the single-layer adhesion layer 300.

[0057] In this embodiment, the precursor process is a process of treating each surface before the metal seed layer 400 is formed.

[0058] In this embodiment, the metal seed layer 400 extends onto the single-layer adhesion layer 300 on the interlayer dielectric layer 200.

[0059] Reference Figure 10 , a metal layer 410 is formed on the metal seed layer 400, and the metal layer 410 fills the contact hole 210.

[0060] In this embodiment, the material of the metal layer 410 is cobalt (Co).

[0061] In this embodiment, due to the strong adhesion force between the formed metal seed layer 400 and the single-layer adhesion layer 300, the metal seed layer 400 and the single-layer adhesion layer 300 are not easily separated from each other during the formation of the metal layer 410, so as to ensure that there are no hole defects between the metal layer 410 and the contact hole 210 during the formation of the metal layer 410, and the performance and yield of the formed semiconductor device are improved.

[0062] In this embodiment, the metal layer 410 is formed by an electroplating method.

[0063] In this embodiment, the process of forming the metal layer 410 by the electroplating method is a conventional process means, which will not be described in detail here.

[0064] In this embodiment, after forming the metal layer 410, an annealing treatment is performed, and the annealing temperature is between 400°C and 450°C. After the annealing treatment, an amorphous phase of W / Co-W-Si / WSi is formed at the interface where the metal layer contacts the contact hole as a diffusion barrier layer of the metal layer, which not only prevents the diffusion of ions, but also reduces the contact resistance of the formed semiconductor device because the amorphous phase of W / Co-W-Si / WSi has a relatively small resistance, thereby improving the electrical performance of the formed semiconductor device.

[0065] In this embodiment, after forming the metal layer 410, the chemical mechanical polishing method is used to planarize the metal layer 410.

[0066] Correspondingly, a semiconductor device formed by using the above method includes: a substrate 100; an interlayer dielectric layer 200 located on the substrate 100; a contact hole 210 located in the interlayer dielectric layer 200 and exposing the surface of the substrate 100 at the bottom; a silicide layer 220 located on the substrate 100 in the contact hole 210; a single-layer adhesion layer 300 located on the bottom and side walls of the contact hole 210; a metal seed layer 400 located on the bottom and side walls of the single-layer adhesion layer 300 in the contact hole 210; and a metal layer 410 located on the metal seed layer 400 and filling the contact hole 210.

[0067] Second Embodiment

[0068] Figures 11 to 14 It is a schematic structural diagram of the formation process of a semiconductor device in the second embodiment of the present invention.

[0069] The difference between this embodiment and the first embodiment is that the adhesion layer is a laminated adhesion layer.

[0070] In this embodiment, the process from providing the substrate to forming the contact hole is the same as that in the first embodiment, for specific reference Figures 6 to 7 .

[0071] Reference Figure 11 , an adhesion layer 500 is formed on the bottom and side walls of the contact hole, the adhesion layer 500 is a laminated adhesion layer, and the material of the laminated adhesion layer includes a reactive metal layer 510 and a first diffusion barrier layer 520.

[0072] In this embodiment, the step of forming the adhesion layer 500 includes: forming the reactive metal layer 510 on the bottom and side walls of the contact hole 210, and forming the first diffusion barrier layer 520 on the reactive metal layer 510.

[0073] In this embodiment, the material of the reactive metal layer 510 is Ti; in other embodiments, the material of the reactive metal layer 510 can also be cobalt or NiPt, etc.

[0074] In this embodiment, the reactive metal layer 510 reacts with the substrate 100 to form a silicide layer 220.

[0075] In this embodiment, the silicide layer 220 is formed by a directed self-assembly (DSA) process.

[0076] In this embodiment, the material of the first diffusion barrier layer 520 is TiN; in other embodiments, the material of the diffusion barrier layer 520 can also be TaN or the like.

[0077] In this embodiment, the purpose of forming the first diffusion barrier layer 520 on the surface of the reactive metal layer 510 is to prevent the reactive metal layer 510 from being oxidized during the formation of the silicide layer 220, resulting in defects such as holes in the formed silicide layer, which affects the performance of the formed semiconductor device.

[0078] Reference Figure 12 , after forming the first diffusion barrier layer 520, a second diffusion barrier layer 530 is formed on the first diffusion barrier layer 520.

[0079] In this embodiment, after forming the silicide layer 220 and before forming the metal seed layer 400, a new diffusion barrier layer, namely the second diffusion barrier layer 530, is formed on the first diffusion barrier layer 520. The reason for forming the second diffusion barrier layer 530 is that during the process of forming the silicide layer 220 by the directed self-assembly (DSA) process, the materials inside the first diffusion barrier layer 520 will also undergo directed self-assembly, thereby forming gaps or breakages on the surface of the first diffusion barrier layer 520, which affects the blocking effect of the first diffusion barrier layer 520 on diffusing ions. Therefore, the second diffusion barrier layer 530 is needed to improve the blocking ability of the diffusion barrier layer and enhance the blocking effect on diffusing ions.

[0080] Reference Figure 13 , a metal seed layer 400 is formed on the bottom and sidewalls of the adhesion layer 500 by selective growth.

[0081] In this embodiment, the metal seed layer 400 is formed on the sidewalls and bottom of the second diffusion barrier layer 530.

[0082] In this embodiment, the process parameters for forming the metal seed layer 400 are the same as those in the first embodiment and will not be elaborated here.

[0083] Reference Figure 14 , a metal layer 410 is formed on the metal seed layer 400, and the metal layer 410 fills the contact hole 210.

[0084] In this embodiment, after forming the metal layer 410, the chemical mechanical polishing method is used to planarize the metal layer 410.

[0085] Correspondingly, a semiconductor device formed by the above method includes: a substrate 100; an interlayer dielectric layer 200 located on the substrate 100; a contact hole 210 located in the interlayer dielectric layer 200, and the bottom of the contact hole exposes the surface of the substrate 100; an adhesion layer 500 including a reactive metal layer 510 and a first diffusion barrier layer 520, wherein the reactive metal layer 510 is located on the bottom and side walls of the contact hole 210; a first diffusion barrier layer 520 located on the reactive metal layer 510; a second diffusion barrier layer 530 located on the first diffusion barrier layer 520; a silicide layer 220 located on the substrate 100 at the bottom of the contact hole 210; a metal seed layer 400 located on the bottom and side walls of the second diffusion barrier layer 530 in the contact hole 210; a metal layer 410 located on the metal seed layer 400 and filling the contact hole 210.

[0086] Third Embodiment

[0087] Figures 15 to 18 It is a schematic structural diagram of the formation process of a semiconductor device in the third embodiment of the present invention.

[0088] The difference between this embodiment and the first embodiment is that the material of the single-layer adhesion layer is titanium, and the silicide layer is formed after the metal layer is formed.

[0089] In this embodiment, the process from providing the substrate to forming the contact hole is the same as that in the first embodiment, for specific reference Figures 6 to 7 .

[0090] Reference Figure 15 , a single-layer adhesion layer 300 is formed on the bottom and side walls of the contact hole 210.

[0091] In this embodiment, the single-layer adhesion layer 300 extends to the surface of the interlayer dielectric layer 200.

[0092] In this embodiment, the material of the single-layer adhesion layer 300 is titanium.

[0093] In this embodiment, the single-layer adhesion layer 300 is formed by atomic layer chemical vapor deposition; in other embodiments, the single-layer adhesion layer 300 can also be formed by chemical vapor deposition or physical vapor deposition.

[0094] In this embodiment, the single-layer titanium layer 500 with high density can be formed by atomic layer chemical vapor deposition, improving the blocking effect on diffusing ions.

[0095] Reference Figure 16, the metal seed layer 400 is formed on the bottom and side walls of the single-layer adhesion layer 300 by selective growth method.

[0096] In this embodiment, the process parameters for forming the metal seed layer 400 by selective growth method are the same as those in the first embodiment.

[0097] Reference Figure 17 , a metal layer 410 is formed on the metal seed layer 400, and the metal layer 410 fills the contact hole 210.

[0098] Reference Figure 18 , after forming the metal layer 410, a silicide layer 220 is formed on the substrate 100 in the contact hole 210.

[0099] In this embodiment, the substrate 100 after forming the metal layer 410 is heat-treated, and a silicide layer 220 is formed on the substrate 100 in the contact hole 210.

[0100] In this embodiment, after forming the metal layer, a chemical reaction is carried out between the single-layer adhesion layer 300 and the substrate 100 to form the silicide layer 220, ensuring that the formed silicide layer 220 has a high forming quality. This is because the metal seed layer and metal layer formed on the single-layer adhesion layer 300 play a protective role for the single-layer adhesion layer 300. When the single-layer adhesion layer 300 reacts with the substrate 100 to form the silicide layer 220 during the heat treatment process, the metal seed layer and metal layer isolate the single-layer adhesion layer 300 from oxygen, so that the single-layer adhesion layer 300 will not be oxidized during the formation of the silicide layer 220, ensuring the quality of the formed silicide layer and improving the performance of the formed semiconductor device.

[0101] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for forming a semiconductor device, characterized in that, Comprising: Providing a substrate, on which an interlayer dielectric layer is provided; Etching the interlayer dielectric layer to form a contact hole, the contact hole exposing the surface of the substrate; Forming an adhesion layer on the bottom and side walls of the contact hole, the surface of the adhesion layer having charges and polar bonds; Adopting a selective growth method to form a metal seed layer on the bottom and side walls of the adhesion layer, such that the surface of the metal seed layer has a large number of polar bonds or charges, and the surface properties of the metal seed layer and the adhesion layer attract each other; Forming a metal layer on the metal seed layer, the metal layer filling the contact hole.

2. The forming method according to claim 1, characterized in that, The process parameters of the selective growth method include: the organic source is CODCP, the reaction gases include hydrogen, ammonia, and argon, wherein the gas flow rate of hydrogen is 1000 - 8000 sccm, the gas flow rate of ammonia is 1000 - 5000 sccm, and the gas flow rate of argon is 10 - 500 sccm; the source radio frequency power is 100 - 2000 watts, the temperature is 100 - 400 °C, and the pressure is 10 - 40 torr.

3. The forming method according to claim 1, characterized in that, The material of the metal seed layer is cobalt.

4. The forming method according to claim 1, characterized in that, The material of the metal layer is cobalt.

5. The forming method according to claim 1, characterized in that, The metal layer is formed by an electroplating method.

6. The forming method according to claim 1, characterized in that, The adhesion layer is a single-layer adhesion layer or a laminated adhesion layer.

7. The forming method according to claim 6, characterized in that, When the adhesion layer is a laminated adhesion layer, the laminated adhesion layer includes a reactive metal layer and a first diffusion barrier layer, and the steps of forming the laminated adhesion layer include: Forming the reactive metal layer on the bottom and side walls of the contact hole; Forming the first diffusion barrier layer on the reactive metal layer.

8. The forming method according to claim 7, characterized in that, After forming the first diffusion barrier layer, it further includes: forming a second diffusion barrier layer on the first diffusion barrier layer.

9. The forming method according to claim 6, characterized in that, When the adhesion layer is a single-layer adhesion layer, the material of the single-layer adhesion layer is tungsten or tantalum or titanium.

10. The forming method according to claim 9, characterized in that, When the material of the single-layer adhesion layer is tungsten or tantalum, before forming the single-layer adhesion layer, it further includes: forming a silicide layer on the substrate in the contact hole.

11. The forming method according to claim 9, characterized in that, When the material of the single-layer adhesion layer is titanium, after forming the metal layer, it further includes: forming a silicide layer on the substrate in the contact hole.

12. The forming method according to claim 9, characterized in that, The method of forming the single-layer adhesion layer is atomic layer chemical vapor deposition.

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