Insulation jacket for top coil of isolation transformer
By using a micro isolator packaged with wide bandgap dielectric material, the problem of insufficient breakdown voltage during operation between different voltage domains is solved, and higher electrical signal isolation capability and lower electrostatic charge injection are achieved, improving the stability between circuits.
Patent Information
- Application Number
- CN202010885735.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-08-28
- Filing Date
- 2020-08-28
- Publication Date
- 2025-04-01
- Estimated Expiration
- 2040-08-28
AI Technical Summary
When existing circuit isolators operate between different voltage domains, the breakdown voltage is insufficient, resulting in unstable electrical signal coupling and serious problems with electrostatic charge injection.
Using a micro isolator packaged by a wide bandgap dielectric material, by providing a first dielectric material and a second dielectric material, the electrostatic charge injection is reduced and the formation of three-point junctions is prevented, thereby increasing the breakdown voltage.
It significantly improves the breakdown voltage of the microisolator, enhances the isolation ability of the electrical signal, reduces the injection of electrostatic charges, and improves the stability between circuits.
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Figure CN112447678B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to galvanic isolators that provide galvanic isolation between electrical circuits. Background Art
[0002] Isolators provide electrical isolation between circuits that are communicating with each other. In some cases, the circuits that are communicating with each other operate at different voltages, such as one operating at a relatively high voltage and the other operating at a relatively low voltage. In some cases, the circuits may or may not operate at different voltages from each other, but are referenced to different ground potentials. In both cases, isolators can be used to electrically isolate the circuits. Connecting multiple isolators in series can increase the amount of isolation between circuits. Summary of the invention
[0003] A microisolator is described. The microisolator may include a first isolator element, a second isolator element, and a first dielectric material, the first dielectric material including a polymer disposed between the first isolator element from the second isolator element. The second dielectric material may fully or partially encapsulate the second isolator element. The second dielectric material may be configured to reduce electrostatic charge injection into the first dielectric material. The microisolator may be formed using microfabrication techniques.
[0004] In some embodiments, a micro isolator with enhanced isolation voltage is provided. The micro isolator includes a first isolator element, a second isolator element, and a first dielectric material disposed between the first and second isolator elements. The micro isolator also includes a second dielectric material disposed at an outer corner of the second isolator element.
[0005] In some embodiments, a micro isolator with enhanced isolation voltage is provided. The micro isolator includes a first isolator element, a second isolator element, and a first dielectric material disposed between the first and second isolator elements. The micro isolator also includes a second dielectric material encapsulating the first isolator element, wherein the second dielectric material does not extend laterally beyond a maximum lateral dimension of the first isolator element.
[0006] In some embodiments, an isolation system is provided. The isolation system includes a transmission circuit. The isolation system also includes at least one micro isolator coupled to the transmission circuit, the micro isolator including a first isolator element, a second isolator element, a first dielectric material between the first and second isolator elements, and a second dielectric material disposed at an outer corner of the first isolator element, the second dielectric material having a wider bandgap than the first dielectric material. The isolation system also includes a receiving circuit coupled to the at least one micro isolator. BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Various aspects and embodiments of the present application will be described with reference to the following drawings. It should be understood that the drawings are not necessarily drawn to scale. Items appearing in multiple figures are represented by the same reference numerals in all the figures in which they appear.
[0008] Figure 1 A schematic diagram of an isolator having two isolator elements separated by a first dielectric material, with one of the isolator elements encapsulated by a second dielectric material, according to some embodiments is shown.
[0009] Figure 2 A schematic diagram of an isolator having two isolator elements separated by a first dielectric material, wherein one of the isolator elements has a corner covered by a second dielectric material, according to some embodiments.
[0010] Figure 3A A schematic diagram of an isolator having two isolator coil elements separated by a first dielectric material, with one of the isolator coil elements encapsulated by a second dielectric material, according to some embodiments.
[0011] Figure 3B According to some embodiments Figure 3A Schematic diagram of a cross section of an isolator coil element.
[0012] Figure 3C According to some embodiments Figure 3A Schematic diagram of a cross section of an isolator coil element.
[0013] Figure 4 A schematic diagram of an isolator having two isolator coil elements separated by a first dielectric material, with one of the isolator coil elements encapsulated by a second dielectric material, according to some embodiments.
[0014] Figure 5 A schematic diagram of an isolator having two isolator coil elements separated by a first dielectric material, wherein one isolator coil element has an outer corner covered by a second dielectric material, according to some embodiments.
[0015] Figure 6 A schematic diagram of an isolator having two isolator capacitive elements separated by a first dielectric material, with one of the isolator capacitive elements encapsulated by a second dielectric material, according to some embodiments is shown.
[0016] Figure 7 A schematic diagram of an isolator having two isolator coil elements separated by a first dielectric material and both isolator coil elements encapsulated by a second dielectric material is shown in accordance with some embodiments.
[0017] Figure 8A schematic diagram of an isolation system having a transmit circuit, a receive circuit, and an isolator having two isolator elements separated by a first dielectric material, wherein a corner of one of the isolator elements is covered by a second dielectric material, according to some embodiments.
[0018] Fig. 9 is a flow chart of a method of manufacturing an isolator device having two isolator elements separated by a first dielectric material, wherein one of the isolator elements is encapsulated by a second dielectric material, according to some embodiments. DETAILED DESCRIPTION
[0019] Microisolators provide electronic isolation between microelectronic circuit components. Some applications of microelectronic circuits require signal communication between components operating in different high and low voltage domains. Other applications of microelectronic circuits require electronic isolation between circuit components to prevent the propagation of high voltage in the event of a circuit fault. Microisolators are used to electrically isolate a first circuit, which may be a microelectronic circuit, from a second circuit, which may be a microelectronic circuit, operating in a relatively low voltage domain, or to electrically isolate circuits for safety reasons. The isolation barrier between the two circuits prevents undesirable voltage crossover, and the microisolator provides signal communication across the isolation barrier.
[0020] Micro-isolators are often referred to as having a breakdown voltage. When the voltage difference between circuits operating in different voltage domains exceeds the breakdown voltage of the micro-isolator, the dielectric material between the micro-isolator components may undergo electrical breakdown and become conductive. Therefore, it is desirable to increase the breakdown voltage of the micro-isolator.
[0021] According to one aspect of the present technology, an isolator exhibiting an increased breakdown voltage is provided. The isolator includes an isolator element, such as a coil or a capacitor plate, configured to be connected to a high voltage, and the isolator element is encapsulated in a dielectric material having a wide bandgap. The isolator may further include another dielectric material disposed between the coil and a second coil of the isolator. The wide bandgap material may be provided to prevent the formation of a three-point junction between the isolator element and the surrounding dielectric material. In some embodiments, the second isolator element may also be at least partially encapsulated by the wide bandgap material.
[0022] According to another aspect of the present technology, an isolator exhibiting an increased breakdown voltage is provided. The isolator includes an isolator element, such as a coil or a capacitor plate, configured to be connected to a high voltage, the isolator element having an outermost corner and a wide bandgap dielectric material disposed at the outermost corner. The isolator may further include another dielectric material between the coil and the second coil of the isolator. The wide bandgap material may be provided to prevent the formation of a three-point junction between the isolator element and the surrounding dielectric material. In some embodiments, the second isolator element may also be at least partially encapsulated by the wide bandgap material.
[0023] According to another aspect of the present technology, an isolator system showing an increased breakdown voltage is provided. The isolator system includes the isolator device of the first aspect or the second aspect. The isolator system may further include a transmission circuit coupled to a first isolation element of the isolator device. The isolator system may also include a receiving circuit coupled to a second isolation element of the isolator device, the isolation device spanning an isolation barrier with the first isolation element. In some embodiments, the two isolator elements may be at least partially encapsulated by a wide bandgap material.
[0024] As described above, according to one aspect of the present application, an isolator for isolating two circuits is provided, the isolator including an isolator element encapsulated by a wide bandgap material. Figure 1 1 is a non-limiting example showing a cross-section of a micro-isolator device 100 formed on a substrate 102, which may be a semiconductor substrate such as a semiconductor die (e.g., a silicon substrate) or any other suitable material. The micro-isolator device 100 includes a first isolator element 110 disposed in the substrate 102. A first dielectric material 104 is located between the substrate 102 and a second dielectric material 106, which encapsulates a second isolator element 112. The first dielectric material 104 may provide galvanic isolation to reduce or completely prevent current flow between the first isolator element 110 and the second isolator element 112. The first dielectric material 104 may include one or more layers. Another dielectric layer 108 may be disposed over the second dielectric material 106 and the second isolator element 112, and may serve as a passivation layer or protective layer in at least some embodiments.
[0025] In the example shown, isolator elements 110 and 112 are formed in two layers of the micro-isolator device 100, wherein the first isolator element 110 is formed in the substrate 102 and the second isolator element 112 is formed above the first dielectric material 104. In some embodiments, the micro-isolator 100 can be a capacitive isolator configured to provide communication through capacitive coupling between capacitive plates, wherein the isolator elements 110 and 112 are capacitive plates. The isolator elements can be one of various types, can be formed from various materials, be located in various locations, and can be included in any suitable number. In some embodiments, the micro-isolator can be an inductive isolator configured to provide communication through inductive coupling between inductive coils, wherein the isolator elements 110 and 112 are inductive coils. Although in Figure 1 One micro-isolator is shown in FIG, but it should be understood that multiple micro-isolators may be formed in the same device package.
[0026] The first dielectric material 104 can provide a desired level of electrical isolation between the isolator elements 110 and 112 while allowing electrical signal coupling (e.g., inductive coupling, capacitive coupling) to occur between the isolator elements 110 and 112. To allow coupling to occur, the isolator elements 110 and 112 can be positioned in relatively close proximity. In addition to coupling between the isolation elements 110 and 112, one or more characteristics (e.g., material, thickness) of the first dielectric material 104 can allow for galvanic isolation. Examples of suitable materials for the first dielectric material 104 include one or more polyimides. As a non-limiting example, the thickness of the first dielectric material 104 can be in the range of 0.1 microns to 1 micron, or any value or range of values within that range.
[0027] When the isolator elements 110 and 112 are operated under a DC voltage bias, the performance of the micro-isolator device 100 may be affected by electrostatic charge injected into the first dielectric material 104. The second dielectric material 106 can act as a charge injection barrier to prevent the formation of a three-point junction formed by the metal and the boundary between the two different dielectric materials. Preventing the formation of a three-point junction can prevent large electric fields from being emitted from the isolator element 112 into the first dielectric material 104. One or more features (e.g., material, thickness, location) of the second dielectric material 106 can prevent electrostatic charge injection into the first dielectric material 104.
[0028] The second dielectric material 106 may take any suitable configuration to prevent the formation of a three-point junction. In the non-limiting example shown, the second dielectric material 106 may encapsulate or substantially encapsulate the second isolator element 112 to prevent the formation of a three-point junction. In certain embodiments, substantial encapsulation may include covering greater than 95% of the surface area of the isolator element, greater than 90% of the surface area of the isolator element, or greater than 85% of the surface area of the isolator element. However, other configurations of the second dielectric material 106 are possible, some non-limiting examples of which are shown in the subsequent figures. The second dielectric material 106 may extend over the entire first dielectric material 104, or may be disposed only below the second isolator element 112. The second dielectric material 106 may have any suitable thickness that may prevent electrostatic charge injection into the first dielectric material 104. For example, the thickness of the second dielectric material 106 may be in the range of 0.1 μm to 1 μm, or in the range of 0.1 μm to 5 μm, or any value or range of values within those ranges.
[0029] The second dielectric material 106 may include any suitable material that can prevent electrostatic charge injection into the first dielectric material 104. For example, in some embodiments, the second dielectric material 106 may be a material having a band gap wider than the band gap of the first dielectric material 104. In some embodiments, the second dielectric material 106 may be a material having a band gap greater than 5.0 eV, some non-limiting examples of which include silicon nitride, SiO2, and Al2O3.
[0030] The second dielectric material 106 may have another dielectric layer 108 disposed over the second dielectric material 106. The dielectric layer 108 may protect the second dielectric material 106 and the isolator element 112 from environmental damage. In some embodiments, the dielectric layer 108 may be composed of the same material as the first dielectric material 104. In some embodiments, the dielectric layer 108 is composed of a different material than the first dielectric material 104 or the second dielectric material 106, which are some non-limiting examples of the dielectric layer 108, including Si3N4, SiO2, Al2O3, and / or TaO5.
[0031] According to one aspect of the present application, a micro-isolator includes two different dielectrics between isolator elements, wherein one dielectric is located at an outer corner of a second isolator element. Figure 2 are non-limiting examples and are similar to Figure 1 The micro isolator 100 is different in that the second dielectric material 106 is only provided at the corners of the second isolator element 112, rather than encapsulating all of the second isolator element 112. Figure 1As discussed, positioning the second dielectric material 106 only at the corners of the second isolator element 112 can prevent the formation of triple junctions and reduce electrostatic charge injection into the first dielectric material 104 without completely encapsulating the isolator element. The second dielectric material 106 can have any suitable thickness that can prevent electrostatic charge injection into the first dielectric material 104. For example, the second dielectric material 106 can have a thickness in the range of 0.1 um to 1 um, or any value or values within this range.
[0032] As described above, according to one aspect of the present application, there is provided a micro isolator for isolating two circuits, the isolator comprising an isolator element including a coil and being packaged by a wide bandgap material. Figure 3A is a non-limiting example showing a cross section of a micro isolator 300 formed on a substrate 102. The micro isolator device 300 includes a first isolator element 310 including a coil arranged in the substrate 102 and covered by a passivation layer 320. As non-limiting examples, the passivation layer 320 may be formed of any one of silicon nitride, SiO2, Al2O3, or TaO5.
[0033] As a non-limiting example, Figure 3A Conductive elements are shown that can electrically connect the first isolator element 310 to another device. The first isolator element 310 can be electrically coupled to a contact area 314 through an electrical connection 318. The contact area 314 can allow another device to be electrically coupled to the first isolator element 310. The electrical coupling to the contact area 314 can be made through a hole 322 in the passivation layer 320. The electrical coupling to the external element (e.g., a circuit, a device, a chip) can be achieved through wire bonding, bump bonding, or any other suitable electrical coupling method.
[0034] According to some embodiments described herein, the first dielectric material 104 may be located between the passivation layer 320 and the second isolator element 312 including the coil. Figure 3A As shown in the illustrative example of , the first dielectric material 104 can be formed as a series of layers (e.g., in a series of deposition and thermal curing steps to increase the overall thickness of the first dielectric material 104). It will be appreciated that any suitable number of layers can be formed, including a single layer or a number of layers other than four layers, such as Figure 3A illustrative example shown.
[0035] According to some embodiments described herein, a protective layer 321 may be formed on the passivation layer 320 and / or one or more layers of the first dielectric material 104. The protective layer 321 may prevent mechanical damage to one or more components of the device and / or may serve as a moisture barrier. The protective layer 321 may be formed of, for example, Si3N4, SiO2, Al2O3, and / or TaO5.
[0036] As in Figure 1 In the example of FIG. 3 , the second dielectric material 106 may completely or at least substantially encapsulate the coil element of the second isolator element 312 . The second dielectric material 106 may prevent static charge from entering the first dielectric material 104 from the isolator element 312 .
[0037] Additionally, in accordance with some embodiments, electrical contact can be made to the second isolator element 106. A hole 324 in the dielectric layer 108 can provide access to the contact region 316. Electrical coupling to the second isolator element 312 can occur at the contact region 316. The electrical connection to the second isolator element 106 can be achieved through wire bonding, bump bonding, or any other suitable electrical coupling means.
[0038] According to aspects of the present application, a micro-isolator includes a dielectric material that can encapsulate an isolator element and one or more adhesive layers disposed between the isolator element and the dielectric material. Figure 3B is a non-limiting example of an expanded cross-sectional view of the second isolator element 312 encapsulated in the second dielectric material 106, such as Figure 3A , as shown in box B in . In some embodiments, first adhesive layer 326 can be disposed below second isolator element 312 and above lower portion 106b of second dielectric material 106. Second adhesive layer 328 can be disposed between second isolator element 312 and upper portion 106a of second dielectric material 106. First adhesive layer 326 and second adhesive layer 328 can be present in any of the previous or subsequent embodiments described herein.
[0039] According to aspects of the present application, the first adhesive layer can assist in the bonding of the second isolation element 312 to the lower portion 106b of the second dielectric material 106. The first adhesive layer 326 can take any suitable configuration to assist in the bonding. In the non-limiting example shown, the first adhesive layer 326 can be disposed under a portion of the second isolator element 312. The first adhesive layer can be disposed under a portion or all of the second isolator element 312. In some embodiments, the first adhesive layer 326 may not be present. The first adhesive layer 326 can take any suitable thickness to assist in the bonding of the second isolator element 312 to the lower portion 106b. For example, the first adhesive layer 326 can have a thickness between 10nm and 3000nm, or any value or range of values within this range. The first adhesive layer 326 can be composed of any suitable material to help the second isolator element 312 bond to the lower portion 106b. As a non-limiting example, the first adhesive layer 326 can be formed of any one of Ti, W, Ta, Cr, Al, Cu, or TiW.
[0040] According to some embodiments, the second adhesive layer can help the upper portion 106a to be bonded to the second isolator element 312. The second adhesive layer 328 can take any suitable configuration. In the non-limiting example shown, the second adhesive layer 328 can encapsulate the second isolator element 312 and extend beyond the second isolator element 312, thereby separating the upper portion 106a and the lower portion 106b of the second dielectric material 106. However, in some embodiments, the second adhesive layer 328 can be configured only so that it seals the second isolator element 312, or the second adhesive layer 328 can not exist at all. The second adhesive layer 328 can take any suitable thickness to assist in bonding the upper portion 106a to the second isolator element 312. For example, the second adhesive layer 328 can have a thickness between 10nm and 5000nm, or any value or range of values within this range. The second adhesive layer 328 can be composed of any suitable material to help bond the upper portion 106a to the second isolator element 312. As non-limiting examples, the second adhesive layer 328 may be formed of any one of Al 2 O 3 , SiO 2 , or TiO 2 .
[0041] According to aspects of the present application, the thickness of the upper portion 106a and the lower portion 106b can be different. As a non-limiting example, the upper portion 106a and the lower portion 106b can have different thicknesses T1 and T2, wherein T1 is thinner than T2. The thicknesses T1 and T2 can be between 10nm and 5000nm, or any value or range of values within this range. Changing the thicknesses T1 and T2 can change the electrostatic charge injected into the first dielectric 104. In addition, in some embodiments, the upper portion 106a and the lower portion 106b can be formed of the same dielectric material, or they can be formed of different dielectric materials. As a non-limiting example, the upper portion 106a and the lower portion 106b can be formed of any combination of silicon nitride, SiO2 and / or Al2O3.
[0042] According to aspects of the present application, a micro-isolator includes a dielectric material that can encapsulate an isolator element and one or more adhesive layers and / or nanoparticles disposed between the isolator element and the dielectric material. Figure 3C is a non-limiting example of an expanded cross-sectional view of the second isolator element 312 encapsulated in the second dielectric material 106, such as Figure 3A In some embodiments, the first adhesive layer 326 may be disposed below the second isolator element 312 and above the lower portion 106 b of the second dielectric material 106 . The upper portion 106 a of the second dielectric material 106 may be disposed above the lower portion 106 b and the second isolator element 312 .
[0043] According to aspects of the present application, there may be a nanoparticle layer within the second dielectric material 106. The nanoparticles 330 may be formed of the same material as the adhesive layer (e.g., Ti, W, Ta, Cr, Al, Cu, or TiW) and may have a diameter between 0.1 and 100 nm. The nanoparticles 330 may provide field gradient properties to the isolator structure such that the conductivity in the second dielectric material 106 may be a function of the electric field. These properties may reduce the electric field experienced at the edge of the second isolator element 312.
[0044] In addition, although Figure 3C The example of FIG. 3 shows nanoparticles 330 extending from the second isolator element 312 to the edge of the second dielectric material 106 as shown, but the nanoparticles may alternatively be selectively removed (e.g., by chemical or physical etching). Selective removal of the nanoparticles 330 may leave spaces between the individual coil elements of the second isolator element 312, wherein the nanoparticles 330 are not present between the upper portion 106a and the lower portion 106b of the second dielectric material 106. Thus, the selective removal of the nanoparticles 330 may change the conductivity of the second dielectric material 106 by removing the conductive path between the upper portion 106a and the lower portion 106b of the second dielectric material 106.
[0045] According to aspects of the present application, a micro-isolator includes two different dielectrics between isolator elements including a coil, wherein one dielectric encapsulates a second isolator element but does not extend beyond the second isolator element. Figure 4 3 in that the second dielectric material 106 is disposed only below the second isolator element, rather than extending laterally from the second isolator element to one or more edges of the first dielectric material 104. This configuration can prevent the formation of a conductive path along the boundary between the first dielectric material 104 and the further dielectric layer 108 and between the second isolator element 312 and the outer edge of the first dielectric material 104. Preventing the formation of such a conductive path can increase the breakdown voltage of the micro isolator 400.
[0046] According to aspects of the present application, a micro-isolator includes two different dielectrics between isolator elements containing a coil, with one dielectric located at an outer corner of a second isolator element. Figure 5 is a non-limiting example and is similar to the micro isolator 300 of FIG. 3 and Figure 4 The micro-isolator 400 of the present invention differs in that the second dielectric material 106 is disposed only at the corners of the second isolator element 312, rather than encapsulating all of the second isolator element 312. Positioning the second dielectric material 106 only at the corners of the second isolator element 312 can also prevent the formation of triple junctions and reduce charge injection into the first dielectric material 104 without fully encapsulating the isolator element. Limiting the second dielectric material 106 to only the corners of the second isolator element 312 can further reduce the possibility of conductive paths forming along the boundaries between the first dielectric material 104 and the other dielectric layer 108 and between the second isolator element 312 and the outer edges of the first dielectric material 104.
[0047] According to aspects of the present application, a micro-isolator includes two different dielectrics between isolator elements comprising capacitive plates, one dielectric encapsulating a second isolator element. Figure 6 is a non-limiting example showing a cross section of a micro-isolator 600 formed on a substrate 102. The micro-isolator 600 may include a first isolator element 610 including a capacitive plate disposed in the substrate 102 and covered with a passivation layer 620. As non-limiting examples, the passivation layer 620 may be formed of any one of silicon nitride, SiO2, Al2O3, or TaO5.
[0048] As a non-limiting example, Figure 6Conductive elements are shown that can electrically connect the first isolator element 310 to another device. The first isolator element 310 can be electrically coupled to a contact area 614 through an electrical connection 618. The contact area 614 can allow another device to be electrically coupled to the first isolator element 610. The electrical coupling to the contact area 614 can be achieved through a hole 622 in the passivation layer 620. The electrical coupling to an external element (e.g., a circuit, a device, a chip) can be achieved through wire bonding, bump bonding, or any other suitable electrical coupling method.
[0049] According to some embodiments described herein, the first dielectric material 104 can be located between the passivation layer 620 and the second isolator element 612 including the capacitive plates. The first and second isolator elements 610, 612 can be formed of any suitable material (eg, Au, Al) and can have a thickness of 5 microns.
[0050] As in Figure 1 In the example of FIG. 6 , the second dielectric material 106 can completely or at least substantially encapsulate the capacitive plate element of the second isolator element 612. The second dielectric material 106 can be disposed only below the second isolator element 612 and may not extend to one or more outer edges of the first dielectric material 104. The second dielectric material 106 can prevent static charge from entering the first dielectric material 104 from the isolator element 612.
[0051] Additionally, according to some embodiments, electrical contact can be made to the second isolator element 106. A hole 624 in the dielectric layer 108 can provide access to the contact region 616. Electrical coupling to the second isolator element 612 can occur at the contact region 616. The electrical connection to the second isolator element 106 can be achieved through wire bonding, bump bonding, or any other suitable electrical coupling means.
[0052] According to aspects of the present application, a micro-isolator includes two different dielectrics between isolator elements including a coil, wherein one dielectric encapsulates the two isolator elements. Figure 7 3 is a non-limiting example showing a cross section of a micro isolator 700 formed on a substrate 102. Compared to the example of FIG. 3 , the first isolator element 310 may be disposed above the passivation layer 320 and at Figure 7 The first isolator element 310 may be encapsulated in the second dielectric material 107 , just as the second isolator element 312 may be encapsulated in the second dielectric material 106 .
[0053] The second dielectric material 107 may take any suitable configuration to prevent the formation of a three-point junction. In the non-limiting example shown, the second dielectric material 107 may encapsulate or substantially encapsulate the second isolator element 310 to prevent the formation of a three-point junction. However, other configurations of the second dielectric material 107 are possible, some non-limiting examples of which are shown in the previous figures. The second dielectric material 107 may extend over the entire first dielectric material 104, or may be disposed only below the first isolator element 310. The second dielectric material 107 may have any suitable thickness that may prevent electrostatic charge injection into the first dielectric material 104. For example, the thickness of the second dielectric material 107 may be in the range of 0.1 μm to 1 μm, or any value or range of values within this range.
[0054] The second dielectric material 107 may include any suitable material that can prevent electrostatic charge injection into the first dielectric material 104. For example, in some embodiments, the second dielectric material 107 may be a material having a band gap wider than the band gap of the first dielectric material 104. In some embodiments, the second dielectric material 107 may be a material having a band gap greater than 5.0 eV, some non-limiting examples of which include silicon nitride, SiO2, and Al2O3. In addition, the second dielectric material 107 may be formed of the same material as the second dielectric material 106, or may be formed of a different material from the second dielectric material 107.
[0055] According to aspects of the present application, an isolator system includes transmit and receive circuits communicatively coupled through a micro-isolator. Figure 8 800 is a non-limiting example of a schematic diagram of an isolation system 800. The isolation system 800 can include a transmit circuit 802 and a receive circuit 804 that are both coupled to a micro isolator 810 via wire bonds 806. However, any suitable technique for forming an electrical connection can be used to couple the transmit circuit 802 and the receive circuit 804 to the micro isolator 810.
[0056] exist Figure 8 In the example of FIG. 8 , the micro-isolator 810 may include a first isolator element 812 and a second isolator element 814 separated by a first dielectric material 814. In this example, the second isolator element 814 is shown as having a second dielectric material 818 disposed at an outer corner thereof, but it is understood that any embodiment of the improved micro-isolator described herein may be used in the isolation system 800.
[0057] According to some embodiments described herein, the isolation system 800 may include any suitable transmission and reception circuits to transmit signals through the micro-isolator 810. The isolation system 800 may be, for example, a power transmission system and / or a data transmission system, and the transmission circuit 802 and the reception circuit 804 may include suitable circuits for transmitting power and / or data signals. For example, the transmission circuit 802 and the reception circuit 804 may include a modulation circuit, a driver circuit, a rectification circuit, and / or a feedback circuit.
[0058] In some embodiments, an isolation system may be provided. The isolation system may include a transmission circuit, at least one micro isolator coupled to the transmission circuit, and a receiving circuit coupled to the at least one micro isolator. The micro isolator may include a first isolator element, a second isolator element, a first dielectric material between the first isolator element and the second isolator element, and a second dielectric material disposed at an outer corner of the first isolator element. The second dielectric material may have a wider bandgap than the first dielectric material.
[0059] In some embodiments, the first dielectric material includes a polymer and the second dielectric material may include a material having a band gap greater than a band gap of the first dielectric material. The second dielectric material may have a thickness between 0.1 and 5 microns and may be disposed within the first dielectric material.
[0060] In some embodiments, the first isolator element and the second isolator element can be at least one of a coil or a capacitive plate. The first isolator element can be further configured to operate at a first voltage, and the second isolator component can be configured to operate at a second voltage different from the first voltage. The receiving circuit can be configured to operate at the first voltage, and the transmitting circuit can be configured to operate at the second voltage.
[0061] According to aspects of the present application, a method of manufacturing a micro-isolator device is described. Fig. 9 9 is a non-limiting example of a process 900 for manufacturing a micro isolator device according to some embodiments described herein. In act 902, a first isolator element can be formed in and / or on a substrate. As known to those skilled in the art, the first isolator element can be formed by steps such as patterning (e.g., photolithography), etching, and / or depositing a material (e.g., Au, Al, Cu) to form a first isolator. The first isolator element can be, for example, one of an inductive coil or a capacitive plate.
[0062] According to some embodiments described herein, in act 902, one or more passivation layers may be formed over the isolator element. The passivation layers may be formed of any suitable material, such as SiO2 and / or Al2O3. One or more holes may be formed through the passivation layers (e.g., by an etching process) to provide one or more locations through which electrical contact may be made to the first isolator element. Act 902 may be performed, for example, in a facility such as a semiconductor foundry.
[0063] In some embodiments, process 900 may then proceed to act 904, where a first dielectric material is formed on the substrate. In some embodiments, the first dielectric material may be formed on one or more passivation layers covering the substrate and / or the first isolator element. The first dielectric material may also be formed directly on the substrate and / or the first isolator element.
[0064] According to some embodiments described herein, the first dielectric material can be formed in the same or different manner as the first isolator element, depending on the choice of dielectric material used. For example, the first dielectric material can be formed from a polymer such as polyimide, which can be formed outside of a typical semiconductor foundry environment. Reducing the number of steps of process 900 that can be performed in a semiconductor foundry environment can reduce the overall cost of manufacturing a micro isolator device.
[0065] According to some embodiments described herein, the first dielectric material can be deposited in one or more layers. There can be, for example, a thermal curing step between the layers to harden the first dielectric material. The thermal curing step may require heating the first dielectric material to a temperature between 200° C. and 400° C. for 1 to 10 hours. In some embodiments, the first dielectric material can be deposited to form a layer having a thickness between 1 and 100 microns.
[0066] According to some embodiments described herein, process 900 can then proceed to act 906, where a lower portion of a second dielectric material can be formed. The lower portion of the second dielectric material can be formed of, for example, silicon nitride, SiO2, and Al2O3. The lower portion can be formed in any suitable manner known to those skilled in the art, and may depend on the material used. For example, the lower portion of the second dielectric material can be formed using one of a thermal evaporation process, a physical deposition process (e.g., sputtering), or a chemical vapor deposition process. The lower portion of the second dielectric material can be formed to have a thickness between 0.1 and 5 microns.
[0067] According to some embodiments described herein, process 900 can then proceed to act 908, where a second isolator element can be formed. As known to those skilled in the art, the second isolator element can be formed by steps of patterning (e.g., photolithography) and material deposition (e.g., thermal evaporation, sputtering, and / or chemical vapor deposition). The second isolator element can be formed, for example, as one of an inductive coil or a capacitive plate.
[0068] In some embodiments, an adhesive layer may be formed between the lower portion of the second dielectric material and the second separator element. The adhesive layer may be used to ensure adhesion between the second separator element and the second dielectric material. The adhesive layer may be, for example, any one of Ti, W, Ta, Cr, Al, Cu, and / or TiW.
[0069] According to some embodiments described herein, process 900 can then proceed to act 910, where an upper portion of a second dielectric material can be formed. The upper portion of the second dielectric material can be formed in the same or different manner as the lower portion of the second dielectric material. For example, the upper portion of the second dielectric material can be formed of a different dielectric material than the lower portion, or can be formed to a different thickness than the lower portion.
[0070] In some embodiments, an additional adhesive layer may be formed between the second separator element and the upper portion of the second dielectric material. The additional adhesive layer may be formed to ensure adhesion between the upper portion of the second dielectric material and the second separator element. The additional adhesive layer may be formed of, for example, one of Al2O3, SiO2, and / or TiO2.
[0071] According to some embodiments described herein, process 900 can then proceed to act 912, where a dielectric cap layer can be formed. The dielectric cap layer can be formed of a dielectric material having a narrower band gap than the second dielectric material. The dielectric cap layer can be formed of the same dielectric material as the first dielectric material, or can be formed of a dielectric material different from the first dielectric material. For example, the dielectric cap layer can be formed of a polymer such as polyimide. In addition, the dielectric cap layer can be deposited and then thermally cured in the same or similar manner as the first dielectric material.
[0072] It is understood that the actions of process 900 may be appropriately altered based on the choice of materials. In some embodiments, different actions may be performed in different facilities and / or using different processes. In addition, it is understood that, depending on the embodiment, the actions may be performed in a different order or other actions may be inserted between the described actions. These choices of manufacturing equipment and behavior may result in speed and / or cost benefits.
[0073] The integrated isolator devices described herein can be used in a variety of applications (e.g., industrial, medical, consumer). For example, data transmission and / or power transmission between electrically isolated systems can be accomplished by the integrated isolator devices described herein. As an example, a medical device in a room where a medical procedure is being performed can be electrically isolated from a control system in a control room. For example, a piece of medical imaging equipment and / or a monitor in a room where the procedure is being performed can be isolated from a system that controls the operation of the imaging equipment and / or the monitor. The isolator can be any type of integrated isolator device described herein, and the isolated signal path can be analog or digital.
[0074] As another example, industrial equipment can be isolated from a control system that controls the equipment. For example, a high-power motor can be isolated from a control system that controls its operation by an integrated isolator device of the type described herein. The control system can operate at a lower power than the high-power motor used by the industrial equipment. The isolator can be arranged on a circuit board that includes various circuit components connected to the motor and / or the control equipment.
[0075] Other uses of the integrated isolator devices described herein are possible as well, as those examples described are non-limiting.
[0076] As described, some aspects may be embodied as one or more methods. The actions performed as part of the method may be ordered in any suitable manner. Thus, embodiments may be constructed in which the actions are performed in a sequence different from the sequence shown, and even if shown as sequential actions in an illustrative embodiment, the actions may include performing some actions simultaneously.
[0077] In some embodiments, the terms "about" and "approximately" may be used to indicate within ±20% of a target value, in some embodiments within ±10% of a target value, in some embodiments within ±5% of a target value, and in some embodiments within ±2% of a target value. The terms "about" and "approximately" may include a target value.
Claims
1. A micro isolator with enhanced isolation breakdown voltage, comprising: a first isolator element; a second isolator element; a first dielectric material disposed between the first isolator element and the second isolator element; and A second dielectric material includes separate portions disposed at and covering each exterior corner of the second isolator element, the second dielectric material having a wider band gap than the first dielectric material.
2. The micro-isolator of claim 1, wherein the thickness of the second dielectric material is between 0.1 and 5 microns.
3. The micro-isolator of claim 1, wherein the first isolator element and the second isolator element are at least one of coils or capacitive plates.
4. The micro-isolator of claim 1 further comprising an adhesive layer between the second isolator element and the second dielectric material.
5. The micro-isolator of claim 1, wherein the second isolator element is disposed within the first dielectric material.
6. A micro-isolator with enhanced isolation breakdown voltage, comprising: a first isolator element; a second isolator element; a first dielectric material disposed between said first and second isolator elements; and A second dielectric material encapsulating the first isolator element, wherein the second dielectric material does not extend laterally beyond a maximum lateral dimension of the first isolator element.
7. The micro-isolator of claim 6, wherein the first isolator element and the second isolator element are at least one of coils or capacitive plates.
8. The micro-isolator of claim 7, wherein the first isolator element comprises a coil including windings, and wherein each winding is separated from another winding by a gap in the second dielectric material.
9. The micro-isolator of claim 6, wherein the first dielectric material comprises a polymer and the second dielectric material comprises a material having a band gap equal to or greater than 5 eV.
10. The micro-isolator of claim 6, wherein the thickness of the second dielectric material is between 0.1 and 5 microns.
11. The micro-isolator of claim 6, wherein the second isolator element is disposed within the first dielectric material.
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