VCSEL chip with lens structure and preparation method thereof

Abstract

The present invention discloses a VCSEL chip with a lens structure and a preparation method thereof, wherein the VCSEL chip comprises a GaAs substrate; an NDBR layer, an MQW layer, an oxide layer, a PDBR layer and a P contact layer sequentially grown on the GaAs substrate; a P electrode arranged on the P contact layer in the light exit hole region; an N electrode arranged on the surface of the GaAs substrate close to the NDBR layer; a SIN passivation layer arranged on at least part of the surface of the VCSEL chip; and a lens arranged on the surface of the SIN passivation layer in the light exit hole region. The present invention can not only effectively reduce the divergence angle of the VCSEL chip, but also effectively protect the light exit cavity surface, thereby ensuring that the VCSEL chip has a good appearance.

Description

Technical Field

[0001] The present invention relates to the fields of optoelectronics, microelectronics and power device technology, and in particular to a VCSEL chip with a lens structure and a method for preparing the same. Background Art

[0002] Vertical Cavity Surface Emitting Laser (VCSEL) is different from other light sources such as LED (Light Emitting Diode) and LD (Laser Diode). It has the advantages of small size, circular output spot, single longitudinal mode output, small threshold current and easy integration of large area arrays. It is widely used in optical communication, optical interconnection and optical storage. With the continuous development of science and technology, various VCSEL chips have been widely used in people's daily life, work and industry, bringing great convenience to people's lives.

[0003] Since the divergence angle of the vertical cavity surface emitting semiconductor laser (VCSEL) is mainly determined by the epitaxial structure and the size of the oxidation aperture, the larger the oxidation aperture, the smaller the divergence angle during the chip manufacturing process. However, a large oxidation aperture will cause the LIV characteristics of the chip to deteriorate. Therefore, there is an urgent need for a technical solution to reduce the divergence angle without changing the oxidation aperture. Summary of the invention

[0004] The present invention aims to solve at least one of the technical problems in the related art to a certain extent. To this end, one object of the present invention is to provide a VCSEL chip with a lens structure and a method for preparing the same. By arranging a lens on the light-exiting cavity surface (i.e., the light-exiting hole area), not only can the divergence angle of the VCSEL chip be effectively reduced, but also the light-exiting cavity surface can be effectively protected because the cured lens has the characteristics of being resistant to water vapor, wear and mechanical impact, thereby ensuring that the VCSEL chip has a good appearance.

[0005] In one aspect of the present invention, the present invention provides a VCSEL chip structure with a lens structure. According to an embodiment of the present invention, the VCSEL chip structure with a lens structure includes:

[0006] GaAs substrate;

[0007] An NDBR layer, an MQW layer, an oxide layer, a PDBR layer and a P contact layer are sequentially grown on the GaAs substrate;

[0008] The oxide layer includes a first oxide layer and a second oxide layer, the first oxide layer corresponds to the light exit hole area, and the second oxide layer is arranged on both sides of the light exit hole area;

[0009] A P electrode, the P electrode is arranged on the P contact layer in the light exit hole area;

[0010] An N electrode, the N electrode is arranged on the surface of the GaAs substrate close to the NDBR layer;

[0011] A SIN passivation layer, wherein the SIN passivation layer is disposed on at least a portion of the surface of the VCSEL chip;

[0012] A lens is disposed on a surface of the SIN passivation layer in the light exit hole area, and the lens completely covers the light exit hole area.

[0013] According to the VCSEL chip structure with a lens structure in the above embodiment of the present invention, by arranging a lens on the light exit cavity surface (i.e., the light exit hole area), not only the divergence angle of the VCSEL chip can be effectively reduced, but also the light exit cavity surface can be effectively protected because the cured lens has the characteristics of being resistant to water vapor, wear and mechanical impact, thereby ensuring that the VCSEL chip has a good appearance.

[0014] In addition, the VCSEL chip structure with a lens structure according to the above embodiment of the present invention may also have the following additional technical features:

[0015] In some embodiments of the present invention, the lens material is photosensitive polyimide glue. Therefore, the photosensitive polyimide has good fluidity at high temperature and can form a uniform film on the light-emitting cavity surface of the chip through coating technology. At the same time, the photoresist has good permeability, water vapor resistance, wear resistance and mechanical impact resistance after curing.

[0016] In some embodiments of the present invention, the diameter of the circle where the lens is located is 13-17 μm.

[0017] In some embodiments of the present invention, the height between the top of the lens and the P contact layer is 6.0-6.5 μm.

[0018] In some embodiments of the present invention, the diameter of the light exit hole is 7-10 μm.

[0019] In some embodiments of the present invention, the thickness of the NDBR layer is 3.5-4.0 μm.

[0020] In some embodiments of the present invention, the thickness of the MQW layer is 180 nm-220 nm.

[0021] In some embodiments of the present invention, the thickness of the oxide layer is 80-120 nm.

[0022] In some embodiments of the present invention, the thickness of the PDBR layer is 3.5-4.0 μm.

[0023] In some embodiments of the present invention, the thickness of the P-contact layer is 30-40 nm.

[0024] In some embodiments of the present invention, the thickness of the SIN passivation layer is 200-400 nm.

[0025] In some embodiments of the present invention, the method for preparing the lens is as follows:

[0026] Applying a photosensitive polyimide photoresist on the surface of the SIN passivation layer in the light exit hole region by step exposure and development to form a circular step-shaped polyimide glue;

[0027] The circular stepped polyimide adhesive is oven cured to form a circular lens.

[0028] In some embodiments of the present invention, photosensitive polyimide photoresist is coated on the surface of the SIN passivation layer in the light exit hole area by 4-8 steps of exposure and development to form a circular stepped polyimide glue.

[0029] In another aspect of the present invention, the present invention provides a method for preparing the above-mentioned VCSEL chip with a lens structure, comprising:

[0030] (1) Growing an NDBR layer, an MQW layer, an oxide layer, a PDBR layer and a P contact layer in sequence on a GaAs substrate in a layered structure;

[0031] (2) preparing a P electrode on the P contact layer in the light output hole area by using a photoresist stripping method;

[0032] (3) using an ICP etching method to etch the epitaxial layer to the bottom of the oxide layer, so as to obtain a first oxide layer corresponding to the light output hole area and a second oxide layer on both sides of the light output hole area;

[0033] (4) etching the epitaxial layer to the surface of the GaAs substrate close to the NDBR layer by an ICP etching method, and then preparing an N electrode on the surface of the GaAs substrate close to the NDBR layer by a photoresist stripping method;

[0034] (5) preparing a SIN passivation layer on at least a portion of the surface of the VCSEL chip using a PECVD method;

[0035] (6) A lens is prepared on the surface of the SIN passivation layer in the light exit hole area, and the lens completely covers the light exit hole area.

[0036] The method for preparing the above-mentioned VCSEL chip with a lens structure described in an embodiment of the present invention can not only effectively reduce the divergence angle of the VCSEL chip by arranging a lens on the light exit cavity surface (i.e., the light exit hole area), but also effectively protect the light exit cavity surface because the cured lens has the characteristics of being resistant to water vapor, wear and mechanical impact, thereby ensuring that the VCSEL chip has a good appearance.

[0037] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0039] Figure 1 Schematic diagram of the VCSEL chip structure of an embodiment of the present invention.

[0040] Figure 2 Schematic diagram of the structure of the VCSEL chip epitaxial structure of an embodiment of the present invention. DETAILED DESCRIPTION

[0041] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.

[0042] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside" and "outside" etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0043] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, four, five, six, etc., unless otherwise clearly and specifically defined.

[0044] In the present invention, unless otherwise clearly specified and limited, the terms such as "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0045] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0046] In one aspect of the present invention, the present invention provides a VCSEL chip structure with a lens structure. Figure 1 and 2 According to an embodiment of the present invention, the VCSEL chip with a lens structure includes a GaAs substrate 1, an NDBR layer 2, an MQW layer 3, an oxide layer 4, a PDBR layer 5, a P contact layer 6, a P electrode 7, an N electrode 8, a SIN passivation layer 9 and a lens 10.

[0047] According to an embodiment of the present invention, referring to Figure 1 and 2 , NDBR layer 2, MQW layer 3, oxide layer 4, PDBR layer 5 and P contact layer 6 are grown in sequence on GaAs substrate 1 according to a layered structure. The function of the NDBR layer 2 is to form a reflector, and its thickness is 3.5-4.0μm. The function of the MQW layer 3 is to serve as a light-emitting area, and its thickness is 180nm-220nm. The function of the oxide layer 4 is to limit current and light, and its thickness is 80-120nm. The function of the PDBR layer 5 is to form a reflector, and its thickness is 3.5-4.0μm. The function of the P contact layer 6 is to form a P-type ohmic contact, and its thickness is 30-40nm. GaAs substrate is a conductive substrate.

[0048] According to an embodiment of the present invention, referring to Figure 1, an oxide layer 4, wherein the oxide layer 4 includes a first oxide layer 41 and a second oxide layer 42, wherein the first oxide layer 41 corresponds to the light exit hole region A, and the second oxide layer 42 is arranged on both sides of the light exit hole region. In an embodiment of the present invention, the epitaxial layer is etched to the bottom of the oxide layer (through the oxide layer) using ICP etching technology, and two grooves are formed on both sides of the light exit hole region A, and then an oxidation furnace is used to wet-oxidize the oxide layer near the groove, while other areas are not oxidized.

[0049] According to an embodiment of the present invention, referring to Figure 1 , a P electrode 7, wherein the P electrode 7 is disposed on the P contact layer 6 in the light exit hole region A. The P electrode 7 is a ring structure, and the function of the P electrode is to form a current injection channel.

[0050] According to an embodiment of the present invention, referring to Figure 1 , N electrode 8, the N electrode 8 is arranged on the surface of the GaAs substrate 1 close to the NDBR layer 2. The function of the N electrode 8 is to form a current output channel. In an embodiment of the present invention, the epitaxial layer is etched to the GaAs substrate using ICP etching technology (that is, the NDBR layer 2, MQW layer 3, oxide layer 4, PDBR layer 5 and P contact layer 6 on the GaAs substrate are all etched away), and then the N electrode 8 is prepared on the exposed GaAs substrate using photoresist stripping technology.

[0051] According to an embodiment of the present invention, referring to Figure 1 , SIN passivation layer 9, the SIN passivation layer is arranged on at least part of the surface of the VCSEL chip. The function of the SIN passivation layer 9 is to passivate the surface, and its thickness is 200-400nm. The SIN passivation layer on the P electrode and the N electrode is then removed by ICP etching technology to leak out the P electrode and the N electrode.

[0052] According to an embodiment of the present invention, referring to Figure 1 , lens 10, the lens 10 is arranged on the surface of the SIN passivation layer 9 in the light exit hole area A, and the lens completely covers the light exit hole area, then the lens 10 must also completely cover the annular P electrode 7. By arranging a lens on the light exit cavity surface (i.e., the light exit hole area), not only can the divergence angle of the VCSEL chip be effectively reduced, but also because the cured lens has the characteristics of waterproof, wear-resistant and mechanical impact-resistant, it can also effectively protect the light exit cavity surface, thereby ensuring that the VCSEL chip has a good appearance.

[0053] According to a specific embodiment of the present invention, the material of the lens is photosensitive polyimide glue. The photosensitive polyimide has good fluidity at high temperature and can form a uniform film on the light output cavity surface of the chip through coating technology. At the same time, the photoresist has good transmittance, water vapor resistance, wear resistance and mechanical impact resistance after curing.

[0054] According to another specific embodiment of the present invention, the diameter of the circle where the lens is located is 13-17 μm. Therefore, the lens in this diameter range can better reduce the divergence angle of the VCSEL chip and protect the light-emitting cavity surface. The inventors found that if the diameter is lower than 13 μm, the cavity surface cannot be well protected; if it is higher than 17 μm, the edge of the lens is too close to the table and the morphology is difficult to control.

[0055] According to another specific embodiment of the present invention, the height of the top of the lens from the P contact layer is 6.0-6.5 μm. Therefore, the lens in this height range can better reduce the divergence angle of the VCSEL chip and protect the light-emitting cavity surface. The inventors found that if it is lower than 6 μm, the ability to resist mechanical impact will be reduced; if it is higher than 6.5 μm, the stress will increase and affect the light extraction efficiency.

[0056] According to another specific embodiment of the present invention, the method for preparing the lens is as follows:

[0057] First, photosensitive polyimide photoresist is coated on the surface of the SIN passivation layer in the light exit hole area by step exposure and development, so as to form a circular step-shaped polyimide glue.

[0058] Then, the circular stepped polyimide adhesive is cured in an oven to form a circular lens.

[0059] According to another specific embodiment of the present invention, 4-8 step exposures are performed, thereby accurately controlling the morphology after development, and developing and coating the photosensitive polyimide photoresist on the surface of the SIN passivation layer in the light output hole area to form a circular stepped polyimide glue.

[0060] According to the VCSEL chip structure with a lens structure in the above embodiment of the present invention, by arranging a lens on the light exit cavity surface (i.e., the light exit hole area), not only the divergence angle of the VCSEL chip can be effectively reduced, but also the light exit cavity surface can be effectively protected because the cured lens has the characteristics of being resistant to water vapor, wear and mechanical impact, thereby ensuring that the VCSEL chip has a good appearance.

[0061] In another aspect of the present invention, the present invention provides a method for preparing the above-mentioned VCSEL chip with a lens structure, comprising:

[0062] S1: On the GaAs substrate, NDBR layer, MQW layer, oxide layer, PDBR layer and P contact layer are grown in sequence according to the layered structure, as shown in the attached figure. Figure 2 Generally, the above-mentioned layers are grown by MOCVD epitaxial growth method.

[0063] S2: Prepare a P electrode on the P contact layer in the light output hole area by using a photoresist stripping method.

[0064] S3: Use ICP etching method to etch the epitaxial layer to the bottom of the oxide layer, so as to obtain a first oxide layer corresponding to the light output hole area and a second oxide layer on both sides of the light output hole area. In an embodiment of the present invention, the epitaxial layer is etched to the bottom of the oxide layer (etching through the oxide layer) using ICP etching technology, forming two grooves on both sides of the light output hole area A, and then using an oxidation furnace to wet-oxidize the oxide layer near both sides of the groove; other areas are not oxidized. The oxidized oxide layer is insulated and not light-transmitting, while the unoxidized oxide layer is light-transmitting. It should be noted that in the light output hole area A, only the part close to the groove is oxidized, and most of the other areas are not oxidized and are light-transmitting.

[0065] S4: Use ICP etching method to etch the epitaxial layer to the surface of the GaAs substrate close to the NDBR layer, and then use photoresist stripping method to prepare N electrode on the surface of the GaAs substrate close to the NDBR layer. In the embodiment of the present invention, the epitaxial layer is etched to the GaAs substrate by ICP etching technology (that is, the NDBR layer 2, MQW layer 3, oxide layer 4, PDBR layer 5 and P contact layer 6 on the GaAs substrate are all etched away), and then the photoresist stripping technology is used to prepare N electrode 8 on the exposed GaAs substrate.

[0066] S5: Prepare a SIN passivation layer on at least a portion of the surface of the VCSEL chip by using a PECVD method, and then etch away the SIN on the P electrode and the N electrode respectively by using an ICP etching technique to expose the P electrode and the N electrode.

[0067] S6: Prepare a lens on the surface of the SIN passivation layer in the light-emitting hole area, and make the lens completely cover the light-emitting hole area. In an embodiment of the present invention, a photosensitive polyimide photoresist is coated on the surface, and multiple photolithography techniques are used to remove excess photosensitive polyimide photoresist on the surface, leaving only the photosensitive polyimide glue on the light-emitting cavity surface, and forming multiple steps on the photosensitive polyimide glue retained on the cavity surface. Then, an oxygen-free oven is used for curing, and the fluidity of the photosensitive polyimide in the step-by-step heating process is used to cure the photosensitive polyimide on the cavity surface into a lens. The total thickness of the photosensitive polyimide photoresist (i.e., the height from the top of the photosensitive polyimide photoresist to the P contact layer) is 9.0-9.5μm. After curing, some solvents in the photoresist evaporate to form a lens with a thickness of 6.0-6.5μm (i.e., the height from the top of the lens to the P contact layer).

[0068] The method for preparing the above-mentioned VCSEL chip with a lens structure described in an embodiment of the present invention can not only effectively reduce the divergence angle of the VCSEL chip by arranging a lens on the light exit cavity surface (i.e., the light exit hole area), but also effectively protect the light exit cavity surface because the cured lens has the characteristics of being resistant to water vapor, wear and mechanical impact, thereby ensuring that the VCSEL chip has a good appearance.

[0069] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0070] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A VCSEL chip with a lens structure, characterized in that: include: GaAs substrate; An NDBR layer, an MQW layer, an oxide layer, a PDBR layer and a P contact layer are sequentially grown on the GaAs substrate; The oxide layer includes a first oxide layer and a second oxide layer, the first oxide layer corresponds to the light exit hole area, and the second oxide layer is arranged on both sides of the light exit hole area; A P electrode, the P electrode is arranged on the P contact layer in the light exit hole area; An N electrode, the N electrode is arranged on the surface of the GaAs substrate close to the NDBR layer; A SIN passivation layer, wherein the SIN passivation layer is disposed on at least a portion of the surface of the VCSEL chip; A lens, wherein the lens is disposed on a surface of the SIN passivation layer in the light exit hole area, and the lens completely covers the light exit hole area; The material of the lens is photosensitive polyimide glue; The diameter of the circle where the lens is located is 13-17 μm; The height between the top of the lens and the P contact layer is 6.0-6.5 μm.

2. The VCSEL chip with a lens structure according to claim 1, characterized in that: The diameter of the light exit hole is 7-10 μm.

3. The VCSEL chip with a lens structure according to claim 1, characterized in that: The thickness of the NDBR layer is 3.5-4.0 μm.

4. The VCSEL chip with a lens structure according to claim 1, characterized in that: The thickness of the MQW layer is 180nm-220nm.

5. The VCSEL chip with a lens structure according to claim 1, characterized in that: The thickness of the oxide layer is 80-120 nm.

6. The VCSEL chip with a lens structure according to claim 1, characterized in that: The thickness of the PDBR layer is 3.5-4.0 μm.

7. The VCSEL chip with a lens structure according to claim 1, characterized in that: The thickness of the P contact layer is 30-40nm; The thickness of the SIN passivation layer is 200-400 nm.

8. The VCSEL chip with a lens structure according to claim 1, characterized in that: The preparation method of the lens is as follows: Applying a photosensitive polyimide photoresist on the surface of the SIN passivation layer in the light exit hole region by step exposure and development to form a circular step-shaped polyimide glue; The circular stepped polyimide adhesive is oven cured to form a circular lens.

9. The VCSEL chip with a lens structure according to claim 8, characterized in that: The photosensitive polyimide photoresist is coated on the surface of the SIN passivation layer in the light exit hole area by 4-8 steps of exposure and development, so as to form a circular stepped polyimide glue.

10. A method for preparing a VCSEL chip having a lens structure according to any one of claims 1 to 9, characterized in that: include: (1) Growing an NDBR layer, an MQW layer, an oxide layer, a PDBR layer and a P contact layer in sequence on a GaAs substrate in a layered structure; (2) preparing a P electrode on the P contact layer in the light output hole area by using a photoresist stripping method; (3) using an ICP etching method to etch the epitaxial layer to the bottom of the oxide layer, so as to obtain a first oxide layer corresponding to the light output hole area and a second oxide layer on both sides of the light output hole area; (4) etching the epitaxial layer to the surface of the GaAs substrate close to the NDBR layer by an ICP etching method, and then preparing an N electrode on the surface of the GaAs substrate close to the NDBR layer by a photoresist stripping method; (5) preparing a SIN passivation layer on at least a portion of the surface of the VCSEL chip using a PECVD method; (6) A lens is prepared on the surface of the SIN passivation layer in the light exit hole area, and the lens completely covers the light exit hole area.

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