A purified silicon substrate for semiconductor quantum computing and a method for forming the same

Abstract

The present invention discloses a purified silicon substrate for semiconductor quantum computing and a method for forming the same, which belongs to the field of semiconductor technology and is used to solve the problem in the prior art that epitaxial purified silicon is greatly affected by the natural silicon isotope composition of the substrate. The purified silicon substrate of the present invention comprises a natural silicon substrate, an insulating layer and a purified silicon layer stacked in sequence. The formation method of the present invention comprises providing a base substrate, epitaxially forming a purified silicon layer on the base substrate to obtain a donor substrate; providing a natural silicon substrate; forming at least one insulating layer on the donor substrate and / or the natural silicon substrate; bonding the donor substrate to the natural silicon substrate, with the base substrate and the natural silicon substrate both located on the surface, removing the base substrate or removing the base substrate and part of the purified silicon layer to obtain a purified silicon substrate. The purified silicon substrate of the present invention and the method for forming the same can be used for semiconductor quantum computing.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, and in particular relates to a purified silicon substrate for semiconductor quantum computing and a method for forming the same. Background Art

[0002] Integrated circuits have continued to advance in line with Moore's Law, with feature sizes currently reaching 5nm and below. At small sizes, the "heat dissipation effect" of circuit heat dissipation pushes classical computing to its upper limit. Furthermore, the "size effect" of small sizes renders the laws of classical physics inapplicable. Quantum computing leverages the superposition property of quantum mechanics to achieve a superposition of computational states. This superposition not only encompasses the 0 and 1 modes of classical computing, but also their superposition states. This property enables strong parallelism, allowing for single-click processing of multiple inputs, resulting in exponential speedups compared to traditional programs. Quantum computing has become a key research direction in the pursuit of replacing classical computing.

[0003] Quantum computing relies on quantum computing chips. Semiconductor quantum computing chip manufacturing is compatible with existing semiconductor processes, enabling the fabrication of microstructures. This offers significant advantages in high density, large size, and large-scale production, making it a promising area for research and application in quantum computing chips. Providing high-quality substrate materials for quantum computing chip fabrication is fundamental to the realization of quantum computing chips and a key research area in their implementation.

[0004] In the prior art, epitaxial growth is usually used to grow purified silicon on natural silicon. The epitaxial purified silicon is greatly affected by the isotopic composition of the natural silicon of the substrate. Summary of the Invention

[0005] In view of the above analysis, the present invention aims to provide a purified silicon substrate for semiconductor quantum computing and a method for forming the same, so as to solve the problem in the prior art that epitaxial purified silicon is greatly affected by the natural silicon isotope composition of the substrate.

[0006] The purpose of the present invention is mainly achieved through the following technical solutions:

[0007] The present invention provides a purified silicon substrate for semiconductor quantum computing, comprising a natural silicon substrate, an insulating layer and a purified silicon layer stacked in sequence.

[0008] Furthermore, the purified silicon ( 28 The purity of the purified silicon in the Si) layer is ≥99.9%, and the purified silicon layer is epitaxially formed by a SiH4 reduced pressure chemical vapor deposition method.

[0009] Furthermore, the purified silicon in the purified silicon layer ( 28 Si) has a purity of ≥99.999%.

[0010] Furthermore, the insulating layer is made of a high-k dielectric material having a dielectric constant greater than or equal to that of natural silicon oxide.

[0011] Furthermore, the insulating layer is made of natural silicon nitride, purified silicon nitride, natural silicon oxide (SiO2), purified silicon oxide ( 28 SiO2) and one or more of aluminum oxide.

[0012] Furthermore, the insulating layer is a single-layer structure, and the insulating layer is a natural silicon nitride layer, a purified silicon nitride layer, a natural silicon oxide layer, a purified silicon oxide layer or an aluminum oxide layer; or, the insulating layer is a composite structure, and the insulating layer includes a natural silicon oxide layer and a purified silicon oxide layer stacked in sequence.

[0013] Furthermore, the above-mentioned insulating layer has a double-layer structure, including a natural silicon oxide layer and a purified silicon oxide layer stacked in sequence on a natural silicon substrate, the natural silicon oxide layer is close to the natural silicon substrate, and the purified silicon oxide layer is close to the purified silicon layer; or, including a natural silicon nitride layer and a purified silicon nitride layer stacked in sequence on a natural silicon substrate, the natural silicon nitride layer is close to the natural silicon substrate, and the purified silicon nitride layer is close to the purified silicon layer.

[0014] The present invention also provides a method for forming a purified silicon substrate for semiconductor quantum computing, comprising the following steps:

[0015] Providing a base substrate, and epitaxially forming a purified silicon layer on the base substrate to obtain a donor substrate;

[0016] Providing a natural silicon substrate;

[0017] forming at least one insulating layer on a donor substrate and / or a natural silicon substrate;

[0018] Bonding a donor substrate to a natural silicon substrate (bonding a donor substrate formed with an insulating layer to a natural silicon substrate, or bonding a donor substrate to a natural silicon substrate formed with an insulating layer, or bonding a donor substrate formed with an insulating layer to a natural silicon substrate formed with an insulating layer), with the side where the insulating layer is located being the bonding side, and both the base substrate and the natural silicon substrate being located on the surface, removing the base substrate or removing the base substrate and part of the purified silicon layer to obtain the above-mentioned purified silicon substrate.

[0019] Furthermore, the base substrate is a conventional natural silicon substrate, or the base substrate includes a natural silicon base substrate, a dielectric layer and a natural silicon layer stacked in sequence.

[0020] Furthermore, the dielectric layer is a SiO2 layer or a SiN layer; when the dielectric layer is SiO2, the base substrate is an SOI substrate.

[0021] Furthermore, the dielectric layer is a single-layer structure, and the dielectric layer is a SiO2 layer or a SiN layer; or, the dielectric layer is a composite structure, and the dielectric layer includes a SiO2 layer and a SiN layer stacked in sequence.

[0022] Furthermore, forming at least one insulating layer on the donor substrate and / or natural silicon substrate means that the insulating layer can be grown entirely on the donor substrate or natural silicon substrate, or can be grown partially on the donor substrate and the other partially on the natural silicon substrate.

[0023] Furthermore, the bonding is pressure bonding, diffusion bonding, electrostatic bonding, room temperature pre-bonding and high temperature bonding (bonding temperature is higher than room temperature), low temperature bonding (bonding temperature is lower than room temperature) or any other bonding method.

[0024] Furthermore, the thickness of the natural silicon layer in the base substrate is less than 20 nm.

[0025] Furthermore, before epitaxially forming the purified silicon layer on the base substrate, the following steps are also included:

[0026] The natural silicon layer is thinned so that the thickness of the thinned natural silicon layer is less than 20 nm.

[0027] Furthermore, the base substrate includes a natural silicon base substrate, a dielectric layer, and a natural silicon layer stacked in sequence. The base substrate is removed by thinning, and the thinning includes the following steps:

[0028] The natural silicon base substrate, the dielectric layer and the natural silicon layer are removed in sequence from the bonded donor substrate and the natural silicon substrate.

[0029] Furthermore, the natural silicon base substrate is removed by using any combination of one or more of grinding and polishing, dry etching, chemical mechanical polishing and wet etching.

[0030] Furthermore, the dielectric layer is removed by wet etching (for example, the wet etching solution is HF solution or BOE solution).

[0031] Furthermore, the natural silicon layer is removed by using one of three methods: dry etching and wet etching, wet etching, oxidation and wet etching.

[0032] Furthermore, the base substrate includes a natural silicon base substrate, a dielectric layer, and a natural silicon layer stacked in sequence. The base substrate is removed by an intelligent peeling method. Before bonding the donor substrate to the natural silicon substrate, the following steps are also included:

[0033] Ion implantation (for example, hydrogen ion implantation) is performed on the donor substrate, and the peeling depth formed by the ion implantation is within the purified silicon layer, the interface between the natural silicon layer and the purified silicon layer, or within the natural silicon layer.

[0034] Furthermore, the intelligent stripping process further includes the following steps:

[0035] The smoothing is performed by one of four methods: chemical mechanical polishing, dry etching and wet etching, wet etching, oxidation and wet etching.

[0036] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0037] a) Since the natural silicon in the natural silicon substrate is still a semiconductor, more parasitic effects will inevitably exist when preparing devices. The purified silicon substrate for semiconductor quantum computing provided by the present invention has an insulating layer between the natural silicon substrate and the purified silicon layer. The provision of the insulating layer has better isolation capabilities against parasitic effects, etc., and can electrically isolate the natural silicon substrate and the purified silicon layer, reducing the impact of the natural silicon substrate on the purified silicon layer, thereby effectively improving the decoherence time of the semiconductor quantum computing chip and improving the quality of the semiconductor quantum computing chip.

[0038] b) Quantum computing leverages the superposition property of quantum mechanics to achieve a superposition of computational states. This not only encompasses the 0 and 1 modes of classical computing, but also their superposition states. This property enables strong parallelism, processing multiple inputs in a single click, resulting in exponential acceleration compared to traditional programs. High-quality semiconductor quantum computing chips are based on high-quality purified silicon substrates. The purified silicon substrates for semiconductor quantum computing provided by this invention provide a foundation for experiments with high-quality semiconductor quantum computing chips, helping to advance the development of quantum chips and quantum computing, and possessing significant research significance and economic benefits.

[0039] c) The purified silicon substrate for semiconductor quantum computing provided by the present invention adopts high-purity 28 SiH4 forms a purified silicon layer, which can further improve the purity of the purified silicon layer, thereby further improving the decoherence time of the semiconductor quantum computing chip to manipulate bits.

[0040] d) The purified silicon substrate for semiconductor quantum computing provided by the present invention adopts a double-layer insulating layer. Compared with the multi-layer structure, the structure and formation process of the insulating layer are relatively simple, and the cost of natural silicon oxide and natural silicon nitride is lower than that of purified silicon nitride and purified silicon nitride. At the same time, a purified silicon oxide layer or a purified silicon nitride layer is arranged near the purified silicon layer, which can further isolate the influence of the natural silicon oxide layer or the natural silicon nitride layer on the purified silicon layer, thereby effectively reducing the production cost of the insulating layer while ensuring the isolation effect, thereby reducing the overall production cost of the above-mentioned purified silicon substrate for semiconductor quantum computing.

[0041] Other features and advantages of the present invention will be described in the following description, and part of them will become obvious from the description, or will be understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the written description and the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The accompanying drawings are only for the purpose of illustrating particular embodiments and are not to be considered limiting of the present invention. Like reference symbols denote like parts throughout the drawings.

[0043] Figure 1 A process diagram of a method for forming a purified silicon substrate for semiconductor quantum computing provided in Example 1 of the present invention;

[0044] Figure 2 A process diagram of a method for forming a purified silicon substrate for semiconductor quantum computing provided in the second embodiment of the present invention;

[0045] Figure 3 A process diagram of a method for forming a purified silicon substrate for semiconductor quantum computing provided in Example 3 of the present invention;

[0046] Figure 4 A process diagram of a method for forming a purified silicon substrate for semiconductor quantum computing provided in a fourth embodiment of the present invention;

[0047] Figure 5 A process diagram of a method for forming a purified silicon substrate for semiconductor quantum computing provided in Example 5 of the present invention;

[0048] Figure 6 A process diagram of a method for forming a purified silicon substrate for semiconductor quantum computing provided in Example 6 of the present invention;

[0049] Figure 7 This is a process diagram of a method for forming a purified silicon substrate for semiconductor quantum computing provided in Example 7 of the present invention. DETAILED DESCRIPTION

[0050] The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings, wherein the accompanying drawings constitute a part of the present invention and are used to explain the principles of the present invention together with the embodiments of the present invention.

[0051] The present invention provides a purified silicon substrate for semiconductor quantum computing, comprising a natural silicon substrate, an insulating layer and a purified silicon layer stacked in sequence.

[0052] In addition, it should be noted that purified silicon ( 28 Si): refers to the Si material for isotope purification, using 28SiH4 (purity ≥ 99.999%) is epitaxially grown in a low-temperature reduced pressure chemical vapor deposition (RPCVD) device.

[0053] Compared with the existing technology, since the natural silicon in the natural silicon substrate is still a semiconductor, more parasitic effects will inevitably exist when preparing devices. The purified silicon substrate for semiconductor quantum computing provided by the present invention has an insulating layer between the natural silicon substrate and the purified silicon layer. The setting of the insulating layer has better isolation capability against parasitic effects, etc., and can electrically isolate the natural silicon substrate and the purified silicon layer, reducing the influence of the natural silicon substrate on the purified silicon layer, thereby effectively improving the decoherence time of the semiconductor quantum computing chip and improving the quality of the semiconductor quantum computing chip.

[0054] Furthermore, because quantum computing can achieve a superposition of computational states through the superposition property of quantum mechanics, it possesses not only the 0 and 1 modes of classical computing but also their superposition states. This property enables strong parallelism, processing multiple inputs in a single click, resulting in exponential acceleration compared to traditional programs. High-quality semiconductor quantum computing chips are based on high-quality purified silicon substrates. The purified silicon substrates for semiconductor quantum computing provided by this invention provide a foundation for experiments with high-quality semiconductor quantum computing chips, helping to advance the development of quantum chips and quantum computing, and possessing significant research significance and economic benefits.

[0055] In order to further improve the decoherence time of semiconductor quantum computing chips, the above-mentioned purified silicon ( 28 The Si) layer has a purity of ≥99.9% (for example, the purity of purified silicon is ≥99.999%) 28 SiH4 is epitaxially formed by reduced pressure chemical vapor deposition (RPCVD). 28 SiH4 forms a purified silicon layer, which can further improve the purity of the purified silicon layer, thereby further improving the decoherence time of the semiconductor quantum computing chip to manipulate bits.

[0056] As for the material of the insulating layer, specifically, it can adopt a high-k dielectric material with a dielectric constant greater than or equal to that of natural silicon oxide, for example, natural silicon nitride, purified silicon nitride, natural silicon oxide (SiO2), purified silicon oxide ( 28 In other words, the insulating layer may be a single-layer structure, for example, a natural silicon silicon nitride layer, a purified silicon silicon nitride layer, a natural silicon silicon oxide layer, a purified silicon silicon oxide layer, or an aluminum oxide layer; or the insulating layer may be a composite structure, for example, the insulating layer includes a natural silicon silicon oxide layer and a purified silicon silicon oxide layer stacked in sequence. It should be noted that there may be multiple combinations of composite insulating layers, which are not listed here one by one.

[0057] From the perspective of isolation effect and production cost, the above-mentioned insulating layer is a double-layer structure, including a natural silicon oxide layer and a purified silicon oxide layer stacked on a natural silicon substrate in sequence, the natural silicon oxide layer is close to the natural silicon substrate, and the purified silicon oxide layer is close to the purified silicon layer, or including a natural silicon nitride layer and a purified silicon nitride layer stacked on a natural silicon substrate in sequence, the natural silicon nitride layer is close to the natural silicon substrate, and the purified silicon nitride layer is close to the purified silicon layer. This is because the structure and formation process of the insulating layer are simpler when the double-layer structure is adopted than the multi-layer structure, and the cost of natural silicon oxide and natural silicon nitride is lower than that of purified silicon nitride and purified silicon nitride; at the same time, arranging a purified silicon oxide layer or a purified silicon nitride layer close to the purified silicon layer can further isolate the influence of the natural silicon oxide layer or the natural silicon nitride layer on the purified silicon layer, thereby effectively reducing the production cost of the insulating layer on the basis of ensuring the isolation effect, thereby reducing the overall production cost of the above-mentioned purified silicon substrate for semiconductor quantum computing.

[0058] The present invention provides a method for forming a purified silicon substrate for semiconductor quantum computing, comprising the following steps:

[0059] Providing a base substrate, and epitaxially forming a purified silicon layer on the base substrate to obtain a donor substrate;

[0060] Providing a natural silicon substrate;

[0061] forming at least one insulating layer on a donor substrate and / or a natural silicon substrate;

[0062] Bonding the donor substrate formed with the insulating layer to the natural silicon substrate (for example, pressure bonding, diffusion bonding, or other bonding methods), or bonding the donor substrate to the natural silicon substrate formed with the insulating layer, for example, pressure bonding, diffusion bonding, electrostatic bonding, room temperature pre-bonding and high temperature bonding (bonding temperature higher than room temperature), low temperature bonding (bonding temperature lower than room temperature), or any other bonding methods, or bonding the donor substrate formed with the insulating layer to the natural silicon substrate formed with the insulating layer;

[0063] The side where the insulating layer is located is the bonding side, and the base substrate and the natural silicon substrate are both located on the surface;

[0064] The base substrate or the base substrate and a portion of the purified silicon layer are removed to obtain the purified silicon substrate.

[0065] It should be noted that forming at least one insulating layer on the donor substrate and / or natural silicon substrate means that the insulating layer can be grown entirely on the donor substrate or natural silicon substrate, or part of the insulating layer can be grown on the donor substrate and the other part can be grown on the natural silicon substrate.

[0066] Compared with the prior art, the beneficial effects of the method for forming a purified silicon substrate for semiconductor quantum computing provided by the present invention are basically the same as the beneficial effects of the above-mentioned purified silicon substrate for semiconductor quantum computing, and will not be described in detail here.

[0067] For the base substrate, specifically, the base substrate can be a conventional natural silicon substrate, or the base substrate includes a natural silicon base substrate, a dielectric layer (for example, a SiO2 layer or a SiN layer) and a natural silicon layer stacked in sequence. When the dielectric layer is SiO2, the base substrate is an SOI substrate. It should be noted that the natural silicon layer is a conventional silicon layer, and its composition includes Si isotopes. 28 4. 29 Si and 30 Si.

[0068] The dielectric layer can be a single-layer structure or a composite structure. Specifically, a single-layer dielectric layer can be a SiO2 layer or a SiN layer; a composite dielectric layer can include a stack of SiO2 and SiN layers. It should be noted that including a SiN layer in the dielectric layer can further introduce stress.

[0069] Considering that the base substrate will need to be removed later, and its thickness will affect the efficiency and effectiveness of the subsequent removal, the thickness of the natural silicon layer in the base substrate can be controlled to be less than 20nm. This is because the natural silicon layer serves as the seed layer for the growth of the purified silicon layer, and using a thin natural silicon layer facilitates the subsequent removal of the base substrate.

[0070] Alternatively, considering that the base substrate needs to be removed later, the thickness of the natural silicon substrate can also be controlled by the following method, which includes the following steps before epitaxially forming the purified silicon layer on the base substrate:

[0071] The natural silicon layer in the base substrate is thinned so that the thickness of the thinned natural silicon layer is less than 20 nm.

[0072] Controlling the thickness of the natural silicon layer by thinning is also beneficial for the subsequent removal of the base substrate.

[0073] Specifically, the base substrate includes a natural silicon base substrate, a dielectric layer, and a natural silicon layer stacked in sequence. The base substrate is removed by thinning, and the thinning includes the following steps:

[0074] The natural silicon base substrate, the dielectric layer and the natural silicon layer are removed in sequence from the bonded donor substrate and the natural silicon substrate.

[0075] Exemplarily, the natural silicon base substrate is removed by any combination of one or more of grinding and polishing, dry etching, chemical mechanical polishing, and wet etching. This is because the natural silicon base substrate is relatively thick, and the use of multiple removal methods (grinding and polishing, dry etching, chemical mechanical polishing, and wet etching) can effectively thin the natural silicon base substrate, and after removing the natural silicon base substrate, a good quality structure can be obtained.

[0076] The dielectric layer is removed by wet etching (for example, the wet etching solution is an HF solution or a BOE solution).

[0077] To remove the natural silicon layer, one of three methods is used: dry etching and wet etching, wet etching, oxidation, and wet etching. Specifically, the first method uses dry etching to remove the natural silicon layer (over-etching is possible), and then wet etching is used to smooth the surface after dry etching; the second method uses silicon etching solution to remove the natural silicon layer; the third method uses oxidation to remove the natural silicon layer and then etches away the silicon oxide obtained after oxidation.

[0078] Similarly, the base substrate includes a natural silicon base substrate, a dielectric layer, and a natural silicon layer stacked in sequence. The base substrate is removed by a smart cut method. Before bonding the donor substrate to the natural silicon substrate, the following steps are also included:

[0079] Ion implantation (for example, hydrogen ion implantation) is performed on the donor substrate, and the peeling depth formed by the ion implantation is within the purified silicon layer, the interface between the natural silicon layer and the purified silicon layer, or within the natural silicon layer.

[0080] It is worth noting that the surface of the structure after smart peeling may not be smooth or may contain some natural silicon layer. Therefore, the following steps are also required after smart peeling:

[0081] The smoothing is performed by one of four methods: chemical mechanical polishing, dry etching and wet etching, wet etching, oxidation and wet etching.

[0082] Example 1

[0083] The purified silicon substrate of this embodiment includes a natural silicon substrate, a natural silicon oxide layer and a purified silicon layer stacked in sequence, see Figure 1 , the specific forming method includes the following steps:

[0084] Step 1a: providing a base substrate, thinning the natural silicon layer in the base substrate to a thickness of less than 20 nm, and epitaxially forming a purified silicon layer on the thinned natural silicon layer to obtain a donor substrate;

[0085] Providing a natural silicon substrate, and forming a natural silicon oxide layer on the natural silicon substrate;

[0086] Step 1b: pressure bonding the donor substrate to the natural silicon substrate, with both the base substrate and the natural silicon substrate located on the surface;

[0087] Step 1c: removing the natural silicon base substrate by polishing and dry etching;

[0088] Step 1d: removing the dielectric layer by wet etching;

[0089] Step 1e: dry etching is used to remove the natural silicon layer, and then wet etching is used to smooth the surface after dry etching to obtain the above-mentioned purified silicon substrate.

[0090] Example 2

[0091] The purified silicon substrate of this embodiment includes a natural silicon substrate, a purified silicon oxide layer and a purified silicon layer stacked in sequence, see Figure 2 , the specific forming method includes the following steps:

[0092] Step 2a: providing a base substrate, thinning the native silicon layer in the base substrate to a thickness of less than 20 nm, and epitaxially forming a purified silicon layer on the thinned native silicon layer to obtain a donor substrate;

[0093] Providing a natural silicon substrate, and forming a pure silicon oxide layer on the natural silicon substrate;

[0094] Step 2b: Pressure bonding the donor substrate to the natural silicon substrate, with both the base substrate and the natural silicon substrate located on the surface;

[0095] Step 2c: removing the native silicon base substrate by dry etching, chemical mechanical polishing, and wet etching;

[0096] Step 2d: removing the dielectric layer by wet etching;

[0097] Step 2e: remove the natural silicon layer by dry etching, and then smooth the surface after dry etching by wet etching to obtain the purified silicon substrate.

[0098] Example 3

[0099] The structure of the purified silicon substrate of this embodiment is the same as that of the purified silicon substrate provided in Example 1, including a natural silicon substrate, a natural silicon oxide layer and a purified silicon layer stacked in sequence, see Figure 3 , the specific forming method includes the following steps:

[0100] Step 3a: providing a base substrate, thinning the native silicon layer in the base substrate to a thickness of less than 20 nm, epitaxially forming a purified silicon layer on the native silicon layer, and forming a native silicon oxide layer on the purified silicon layer to obtain a donor substrate;

[0101] Providing a natural silicon substrate;

[0102] Step 3b: Diffusion bonding the donor substrate to the natural silicon substrate, with both the base substrate and the natural silicon substrate located on the surface;

[0103] Step 3c: removing the natural silicon base substrate by polishing and wet etching;

[0104] Step 3d: removing the dielectric layer by wet etching;

[0105] Step 3e: using a silicon etching solution to remove the natural silicon layer, and then using wet etching to smooth the surface after dry etching to obtain the above-mentioned purified silicon substrate.

[0106] Example 4

[0107] The structure of the purified silicon substrate of this embodiment is the same as that of the purified silicon substrate provided in Example 2, including a natural silicon substrate, a purified silicon oxide layer and a purified silicon layer stacked in sequence, see Figure 4 , the specific forming method includes the following steps:

[0108] Step 4a: providing a base substrate, thinning the native silicon layer in the base substrate to a thickness of less than 20 nm, epitaxially forming a purified silicon layer on the native silicon layer, and forming a purified silicon oxide layer on the purified silicon layer to obtain a donor substrate;

[0109] Providing a natural silicon substrate;

[0110] Step 4b: Diffusion bonding the donor substrate to the natural silicon substrate, with both the base substrate and the natural silicon substrate located on the surface;

[0111] Step 4c: removing the native silicon base substrate by chemical mechanical polishing and wet etching;

[0112] Step 4d: removing the dielectric layer by wet etching;

[0113] Step 4e: using a silicon etching solution to remove the natural silicon layer, and then using wet etching to smooth the surface after dry etching to obtain the above-mentioned purified silicon substrate.

[0114] Example 5

[0115] The structure of the purified silicon substrate of this embodiment is the same as that of the purified silicon substrate provided in Example 1, including a natural silicon substrate, a natural silicon oxide layer and a purified silicon layer stacked in sequence, see Figure 5 , the specific forming method includes the following steps:

[0116] Step 5a: providing a base substrate, thinning the native silicon layer in the base substrate to a thickness of less than 20 nm, epitaxially forming a purified silicon layer on the native silicon layer, and forming a native silicon oxide layer on the purified silicon layer to obtain a donor substrate;

[0117] Providing a natural silicon substrate, and forming a natural silicon oxide layer on the natural silicon substrate;

[0118] Step 5b: hydrogen ion implantation is performed on the donor substrate, and the peeling depth formed by the hydrogen ion implantation is within the purified silicon layer;

[0119] Step 5c: Pressure bonding the donor substrate to the natural silicon substrate, with both the base substrate and the natural silicon substrate located on the surface;

[0120] Step 5d: Remove the natural silicon base substrate, dielectric layer and natural silicon layer by using smart stripping, and perform smoothing by using dry etching and wet etching to obtain the above-mentioned purified silicon substrate.

[0121] Example 6

[0122] The structure of the purified silicon substrate of this embodiment is the same as that of the purified silicon substrate provided in Example 2, including a natural silicon substrate, a purified silicon oxide layer and a purified silicon layer stacked in sequence, see Figure 6 , the specific forming method includes the following steps:

[0123] Step 6a: providing a base substrate, thinning the native silicon layer in the base substrate to a thickness of less than 20 nm, epitaxially forming a purified silicon layer on the native silicon layer, and forming a purified silicon oxide layer on the purified silicon layer to obtain a donor substrate;

[0124] Providing a natural silicon substrate, and forming a purified silicon oxide layer on the natural silicon substrate;

[0125] Step 6b: hydrogen ion implantation is performed on the donor substrate, and the peeling depth formed by the hydrogen ion implantation is within the purified silicon layer;

[0126] Step 6c: Pressure bonding the donor substrate to the natural silicon substrate, with both the base substrate and the natural silicon substrate located on the surface;

[0127] Step 6d: Remove the natural silicon base substrate, dielectric layer and natural silicon layer by using smart stripping, and perform smoothing by wet etching to obtain the above-mentioned purified silicon substrate.

[0128] Example 7

[0129] The purified silicon substrate of this embodiment includes a natural silicon substrate, a natural silicon oxide layer, a purified silicon oxide layer and a purified silicon layer stacked in sequence, see Figure 7 , the specific forming method includes the following steps:

[0130] Step 7a: providing a base substrate, thinning the native silicon layer in the base substrate to a thickness of less than 20 nm, epitaxially forming a purified silicon layer on the native silicon layer, and forming a purified silicon oxide layer on the purified silicon layer to obtain a donor substrate;

[0131] Providing a natural silicon substrate, and forming a natural silicon oxide layer on the natural silicon substrate;

[0132] Step 7b: hydrogen ion implantation is performed on the donor substrate, wherein the peeling depth formed by the hydrogen ion implantation is at the interface between the natural silicon layer and the purified silicon layer;

[0133] Step 7c: Pressure bonding the donor substrate to the natural silicon substrate, with both the base substrate and the natural silicon substrate located on the surface;

[0134] Step 7d: Remove the natural silicon base substrate, dielectric layer and natural silicon layer by using smart stripping, and smoothen them by using oxidation and wet etching to obtain the purified silicon substrate.

[0135] The above description is only a preferred specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by any technician familiar with this technical field within the technical scope disclosed by the present invention should be covered by the scope of protection of the present invention.

Claims

1. A method for forming a purified silicon substrate for semiconductor quantum computing, characterized in that: The steps include: A base substrate is provided, comprising a natural silicon base substrate, a dielectric layer, and a natural silicon layer stacked in sequence, wherein the natural silicon layer in the base substrate is thinned to a thickness of less than 20 nm, and the dielectric layer is a composite structure comprising a SiO2 layer and a SiN layer stacked in sequence, and stress is introduced; Epitaxially forming a purified silicon layer on a base substrate to obtain a donor substrate, wherein the purified silicon layer is epitaxially formed by a SiH4 reduced pressure chemical vapor deposition method; Providing a natural silicon substrate; forming at least one insulating layer on the donor substrate and the natural silicon substrate; Bonding a donor substrate formed with an insulating layer to a natural silicon substrate formed with an insulating layer, wherein the side where the insulating layer is located is the bonding side, and the base substrate and the natural silicon substrate are both located on the surface, and the bonding includes pressure bonding, diffusion bonding, electrostatic bonding, room temperature pre-bonding, and high temperature bonding with a bonding temperature higher than room temperature; The purified silicon substrate comprises a natural silicon substrate, an insulating layer and a purified silicon layer stacked in sequence; The insulating layer is a double-layer structure, comprising a natural silicon oxide layer and a purified silicon oxide layer sequentially stacked on a natural silicon substrate, wherein the natural silicon oxide layer is close to the natural silicon substrate, and the purified silicon oxide layer is close to the purified silicon layer; or, the insulating layer is a double-layer structure, comprising a natural silicon nitride layer and a purified silicon nitride layer sequentially stacked on a natural silicon substrate, wherein the natural silicon nitride layer is close to the natural silicon substrate, and the purified silicon nitride layer is close to the purified silicon layer; The insulating layer has the ability to isolate parasitic effects and is used to increase the decoherence time of the semiconductor quantum computing chip; The purity of the purified silicon in the purified silicon layer is ≥99.9%; The base substrate is removed by thinning, which includes the following steps: Sequentially removing the natural silicon base substrate, the dielectric layer and the natural silicon layer from the bonded donor substrate and the natural silicon substrate; Removing the natural silicon base substrate by any combination of one or more methods selected from the group consisting of grinding and polishing, dry etching, chemical mechanical polishing, and wet etching; removing the dielectric layer by wet etching; removing the native silicon layer by one of dry etching and wet etching, wet etching, oxidation and wet etching; The removal of the base substrate adopts an intelligent peeling method, and before bonding the donor substrate to the natural silicon substrate, the following steps are also included: Ion implantation is performed on the donor substrate, wherein the peeling depth formed by the ion implantation is within the purified silicon layer, the interface between the natural silicon layer and the purified silicon layer, or within the natural silicon layer; The smoothing is performed by using one of chemical mechanical polishing, dry etching and wet etching, wet etching, oxidation and wet etching.

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