Systems and methods for intraluminal ultrasound imaging

Abstract

Ultrasound imaging devices, systems and methods are provided. An intraluminal ultrasound imaging system includes a patient interface module (PIM) that communicates with an intraluminal imaging device, the intraluminal imaging device including an ultrasound imaging component, the PIM including a first reconfigurable logic block, a configuration memory and a processing component, the first reconfigurable logic block including a first plurality of logic elements interconnected by a first reconfigurable interconnect element, the configuration memory being coupled to the first reconfigurable logic block, the processing component being coupled to the configuration memory, the processing component being configured to: detect device properties of the intraluminal imaging device communicating with the PIM; and load at least one of a first configuration or a second configuration into the configuration memory based on the detected device properties to configure one or more first reconfigurable interconnect elements in the first reconfigurable interconnect element so that the first plurality of logic elements are interconnected to communicate with the ultrasound imaging component.

Description

Technical Field

[0001] The present disclosure relates generally to intraluminal imaging devices, and more particularly to providing reconfigurable hardware resources for a patient interface module (PIM). For example, a PIM can include a field programmable gate array (FPGA) that can interface with and control various intraluminal imaging devices. The FPGA can include a reconfigurable logic block that can be dynamically reconfigured to communicate with the intraluminal imaging device based on detection of device properties of the intraluminal device. Background Art

[0002] Intravascular ultrasound (IVUS) imaging is widely used as a diagnostic tool in interventional cardiology to evaluate diseased blood vessels (e.g., arteries) in the human body to determine the need for treatment, guide intervention and / or evaluate its effectiveness. An IVUS device including one or more ultrasound transducers is introduced into the blood vessel and guided to the area to be imaged. The transducer emits ultrasound energy to create an image of the blood vessel of interest. The ultrasound waves are partially reflected by discontinuities caused by tissue structures (e.g., the various layers of the blood vessel wall), red blood cells, and other features of interest. The echo of the reflected wave is received by the transducer and transmitted to the IVUS imaging system. The imaging system processes the received ultrasound echoes to produce a cross-sectional image of the blood vessel in which the device is placed. IVUS imaging can provide detailed and accurate measurements of cavity and vessel size, plaque area and volume, and the location of key anatomical landmarks. IVUS imaging allows doctors to evaluate the size of the lesion, select a treatment device (e.g., a stent) based on the size of the evaluated lesion, and subsequently evaluate the success of the treatment.

[0003] There are two types of IVUS catheters in common use today: rotary IVUS catheters and solid-state IVUS catheters. For a typical rotary IVUS catheter, a single ultrasonic transducer element is positioned at the tip of a flexible drive shaft that rotates inside a plastic sheath inserted into the vessel of interest. The transducer element is oriented so that the ultrasound beam propagates substantially perpendicular to the axis of the device. The fluid-filled sheath protects the vascular tissue from the rotating transducer and drive shaft while allowing the ultrasonic signal to propagate from the transducer into the tissue and from the tissue back to the transducer. As the drive shaft rotates, the transducer is periodically excited by high-voltage pulses to emit short ultrasonic pulses. The same transducer then listens for echoes reflected from various tissue structures. The IVUS imaging system integrates a two-dimensional display of a cross-section of the vessel based on the sequence of pulses / acquisition cycles generated during one rotation of the transducer.

[0004] The solid-state IVUS catheter carries an ultrasound imaging assembly that includes an array of ultrasonic transducers distributed around its periphery and one or more integrated circuit controller chips mounted adjacent to the transducer array. The solid-state IVUS catheter is also referred to as a phased array IVUS transducer or phased array IVUS device. The controller selects individual transducer elements (or groups of elements) to transmit ultrasonic pulses and receive ultrasonic echo signals. By stepping through a sequence of transmit-receive pairs, the solid-state IVUS system is able to synthesize the effects of a mechanically scanned ultrasound transducer, but without moving parts (hence the name solid-state). Since there are no rotating mechanical elements, the transducer array can be placed in direct contact with blood and vascular tissue, thereby minimizing the risk of vascular damage.

[0005] Different clinical applications may require different types of IVUS catheters or different imaging modes. In other instances, different types of IVUS catheters or different imaging modes may be required during clinical procedures. Different types of IVUS catheters may use different communication protocols to transmit commands, status, and data. Different communication protocols may use different numbers of communication signal lines (e.g., wires). Different types of IVUS catheters may transmit analog signals at different voltage levels. Different imaging modes (e.g., including imaging resolution, B-mode imaging, pulsed Doppler, continuous Doppler) may require different trigger signals for ultrasound emission and ultrasound echo reception.

[0006] In an IVUS imaging system, a PIM is typically used to interface a host system with an IVUS catheter. For example, the PIM can coordinate with the host system to control the operation of the IVUS catheter for imaging, and the PIM can forward image signals captured by the IVUS catheter to the host system for processing and / or display. Different PIMs may be required to communicate with different types of IVUS catheters (e.g., due to different communication protocols) and / or to perform different imaging procedures (e.g., due to different trigger sequences). One way to avoid using different PIMs for different types of IVUS catheters may be to include multiple different hardware modules in the PIM to serve different IVUS catheter types and / or different imaging modes. However, this approach may increase the amount of logic and / or memory resources in the PIM, and therefore may result in higher costs and may increase the size of the PIM. Summary of the invention

[0007] Although existing IVUS imaging systems have proven useful, there is still a need for improved systems and techniques for real-time system reconfiguration. An embodiment of the present disclosure provides a PIM that includes a field programmable gate array (FPGA) included at a resource that can be dynamically reconfigured at runtime based on the device properties of an IVUS catheter attached to the PIM. For example, the resources in the FPGA can be divided into a static configuration portion and a dynamically reconfigurable portion. The static configuration portion can implement functions or operations that are common between multiple different types of intraluminal imaging devices. The dynamically reconfigurable portion can implement functions or operations specific to a specific intraluminal imaging device. For example, in the reconfigurable portion, logic units, logic blocks, and / or logic elements can be dynamically allocated, and connection pins can be dynamically allocated to connect to different IVUS catheter interfaces and / or provide different sorting algorithms.

[0008] In one embodiment, an intraluminal ultrasound imaging system is provided. The system includes a patient interface module (PIM) that communicates with an intraluminal imaging device, the intraluminal imaging device includes an ultrasound imaging component, the PIM includes a first reconfigurable logic block, a configuration memory, and a processing component, the first reconfigurable logic block includes a first plurality of logic elements interconnected by a first reconfigurable interconnect element, the configuration memory is coupled to the first reconfigurable logic block, the processing component is coupled to the configuration memory, and the processing component is configured to: detect a device attribute of the intraluminal imaging device communicating with the PIM; and load at least one of a first configuration or a second configuration into the configuration memory based on the detected device attribute to configure one or more first reconfigurable interconnect elements in the first reconfigurable interconnect element so that the first plurality of logic elements are interconnected to communicate with the ultrasound imaging component.

[0009] In some embodiments, the processing component is further configured to: load the first configuration when the detected device attribute indicates that the intraluminal imaging device includes a first device attribute; and load the second configuration when the detected device attribute indicates that the intraluminal imaging device includes a second device attribute, and wherein the first device attribute and the second device attribute are different. In some embodiments, the processing component is further configured to: load the first configuration into the configuration memory based on detecting that the detected device attribute is identified as the first device attribute. In some embodiments, the first configuration configures the first reconfigurable logic block to: establish a digital communication link with the intraluminal imaging device based on a communication protocol associated with the detected device attribute; and send commands via the digital communication link to configure the intraluminal imaging device. In some embodiments, the first configuration configures the first reconfigurable logic block to: establish a digital communication link with the intraluminal imaging device based on a communication protocol associated with the detected device attribute; and receive a status of the intraluminal imaging device via the digital communication link. In some embodiments, the first configuration configures the first reconfigurable logic block to receive an analog signal associated with an ultrasound echo signal received by the ultrasound imaging component based on the detected device attribute, the ultrasound echo signal representing the body of the object. In some embodiments, the first configuration configures the first reconfigurable logic block to apply a filter to the received analog signal based on the detected device attribute. In some embodiments, the first configuration configures the first reconfigurable logic block to convert the received analog signal into a digital signal based on the detected device attribute. In some embodiments, the PIM further comprises a host interface configured to send an image signal associated with the ultrasound echo signal to a host. In some embodiments, the ultrasound imaging component comprises an array of ultrasound transducers. In some embodiments, the system further comprises: a second reconfigurable logic block comprising a second plurality of logic elements interconnected by a second reconfigurable interconnect element, wherein the processing component is further configured to load a third configuration or a fourth configuration into the configuration memory based on a target imaging mode of an ultrasound imaging procedure to configure the second reconfigurable interconnect element so that the second plurality of logic elements are interconnected to apply a sequence of trigger signals to the array of ultrasound transducers for ultrasound wave transmission and ultrasound echo reception. In some embodiments, the PIM further comprises a non-volatile storage memory configured to store the first configuration and the second configuration, and wherein the processing component is further configured to: load the at least one of the first configuration or the second configuration from the non-volatile storage memory to the configuration memory.In some embodiments, the system further comprises: a field programmable gate array (FPGA), the FPGA comprising: the first reconfigurable logic block; the configuration memory; and the processing component.

[0010] In one embodiment, a method for intraluminal ultrasound imaging is provided. The method includes: detecting, by a patient interface module (PIM), a device attribute of an intraluminal imaging device that communicates with the PIM, the intraluminal imaging device including an ultrasound imaging component; and loading, by a processing component of the PIM, at least one of a first configuration or a second configuration into a configuration memory of the PIM based on the detected device attribute to configure a first reconfigurable logic block of the PIM, wherein the first reconfigurable logic block includes a first plurality of logic elements interconnected by a first reconfigurable interconnect element, and wherein the first configuration or the second configuration configures one or more of the first reconfigurable interconnect elements so that the first plurality of logic elements are interconnected to communicate with the ultrasound imaging component.

[0011] In some embodiments, the first configuration is associated with a first device attribute, wherein the second configuration is associated with a second device attribute different from the first device attribute, and wherein the loading comprises loading the first configuration into the configuration memory based on detecting that the detected device attributes include the first device attribute. In some embodiments, the method further comprises: establishing a digital communication link with the intraluminal imaging device based on a communication protocol associated with the detected device attribute via the first reconfigurable logic block based on the first configuration; and sending a command via the digital communication link to configure the intraluminal imaging device. In some embodiments, the first configuration configures the first reconfigurable logic block to: receive an analog signal associated with an ultrasound echo signal received by the ultrasound imaging component via the first reconfigurable logic block based on the first configuration, the ultrasound echo signal representing a body of a subject. In some embodiments, the method further comprises: sending an image signal associated with the ultrasound echo signal to a host. In some embodiments, the method further comprises: loading, by the processing component, a third configuration or a fourth configuration into the configuration memory based on a target imaging mode of the ultrasound imaging procedure to configure a second reconfigurable logic block of the PIM; wherein the second reconfigurable logic block comprises a second plurality of logic elements interconnected by a second reconfigurable interconnect element, wherein the third configuration or the fourth configuration configures the second reconfigurable interconnect element so that the second plurality of logic elements are interconnected to apply a sequence of trigger signals to an array of ultrasound transducers of the ultrasound imaging component for ultrasound transmission and ultrasound echo reception. In some embodiments, the loading comprises: loading the at least one of the first configuration or the second configuration from the non-volatile storage memory of the PIM into the configuration memory.

[0012] Other aspects, features, and advantages of the present disclosure will become apparent from the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Illustrative embodiments of the present disclosure will be described with reference to the accompanying drawings, in which:

[0014] Figure 1 is a schematic diagram of an intraluminal ultrasound imaging system according to aspects of the present disclosure.

[0015] Figure 2 is a schematic diagram illustrating a system configuration for an intraluminal ultrasound imaging system according to aspects of the present disclosure.

[0016] Figure 3 is a schematic diagram illustrating a dynamic resource reconfiguration scheme for a patient interface module (PIM) according to aspects of the present disclosure.

[0017] Figure 4 is a schematic diagram illustrating a device interface configuration for a PIM according to aspects of the present disclosure.

[0018] Figure 5 is a schematic diagram illustrating an ultrasound imaging configuration according to aspects of the present disclosure.

[0019] Figure 6 is a schematic diagram illustrating a system configuration of an intraluminal ultrasound imaging system according to aspects of the present disclosure.

[0020] Figure 7 is a flow chart of a method of ultrasound imaging according to aspects of the present disclosure. DETAILED DESCRIPTION

[0021] In order to promote the understanding of the principles of the present disclosure, reference will now be made to the embodiments illustrated in the accompanying drawings, and specific language will be used to describe these embodiments. Nevertheless, it should be understood that it is not intended to limit the scope of the present disclosure. As those skilled in the art involved in the present disclosure would normally expect, any changes and further modifications to the described equipment, systems and methods and any further application of the principles of the present disclosure are fully anticipated and included in the present disclosure. In particular, it is fully anticipated that the features, components and / or steps described about an embodiment can be combined with the features, components and / or steps described about other embodiments of the present disclosure. However, for the sake of brevity, the numerous iterative schemes of these combinations will not be described separately.

[0022] Figure 1 1 is a schematic diagram of an intraluminal ultrasound imaging system 100 according to aspects of the present disclosure. System 100 may include an intraluminal imaging device 102, a patient interface module (PIM) 104, a host system 106, and a display 108. The intraluminal imaging device 102 may be a catheter, a guidewire, or a guide catheter. The intraluminal imaging device 102 may be referred to as an interventional device and / or a diagnostic device used, for example, in a medical setting. In some instances, the intraluminal imaging device 102 may be a therapeutic device. The host system 106 may be a console, a computer, a laptop computer, a tablet computer, or a mobile device. The display 108 may be a monitor. In some embodiments, the display 108 may be an integrated component of the host system 106.

[0023] The intraluminal imaging device 102 may include a flexible, elongated member that is sized and shaped to be inserted into the vascular system of a patient. The flexible, elongated member may include a distal portion 131 and a proximal portion 132. The intraluminal imaging device 102 may include an imaging component 110 that is mounted at the distal portion 131, near a distal end 133 of the intraluminal imaging device 102. The intraluminal imaging device 102 may be inserted into a body lumen or blood vessel 120 of a patient. For example, the intraluminal imaging device 102 can be inserted into a patient's blood vessel 120 to capture images of the structure of the blood vessel 120, measure the diameter and / or length of the blood vessel 120 to guide stent selection, and / or measure blood flow in the blood vessel 120. The blood vessel 120 may be any artery or vein within the patient's vascular system. In some embodiments, the blood vessel 120 may be a venous vessel, a pulmonary vessel, a coronary vessel, or a peripheral vessel.

[0024] In one embodiment, the imaging component 110 may include an ultrasonic transducer configured to transmit ultrasonic energy toward the vessel 120. The emission of ultrasonic energy may be in the form of pulses. The ultrasonic energy is reflected by the tissue structure and / or blood flow in the blood vessel 120 around the imaging component 110. The reflected ultrasonic echo signal is received by the ultrasonic transducer in the imaging component 110. In some instances, the imaging component 110 may be configured for brightness mode (B mode) imaging to capture images of vascular structures or measure vessel diameter and length for stent selection. In some other instances, the imaging component 110 may be configured for Doppler color flow imaging to provide blood flow measurement results. In yet other instances, the imaging component 110 may be configured to provide B mode imaging data and Doppler blood flow measurement results in dual mode operation.

[0025] In some embodiments, the ultrasound transducer in the imaging component is a phased array transducer that can be configured to transmit ultrasound energy at a frequency of about 10 megahertz (MHz), 20 MHz, 40 MHz, 45 MHz, and / or other larger and smaller suitable values. In some other embodiments, the imaging component 110 can alternatively be configured to include a rotating transducer to provide similar functionality. The PIM 104 transmits the received echo signals to the host system 106, where the ultrasound image is reconstructed and displayed on the display 108. For example, the intensity or amplitude of the echo response can be converted to a brightness or intensity level for a grayscale image display.

[0026] The host system 106 can include a processor and memory. The host system 106 can be operable to facilitate the features of the system 100 described herein. For example, the processor can execute computer readable instructions stored on a non-transitory tangible computer readable medium.

[0027] The PIM 104 facilitates signal communication between the host system 106 and the intraluminal imaging device 102. This can include forwarding commands received from the host system 106 to the intraluminal imaging device 102 to control the operation of the imaging component 110 and forwarding status reports received from the intraluminal imaging device 102 to the host system 106. In addition, the PIM 104 can generate control signals to configure the imaging component 110, trigger the transmitter circuit to cause the imaging component 110 to transmit ultrasound, and transmit the echo signal captured by the imaging component 110 to the host system 106. With respect to the echo signal, the PIM 104 forwards the received signal and, in some embodiments, performs preliminary signal processing before sending the signal to the host 106. In an example of such an embodiment, the PIM 104 performs amplification, filtering, and / or aggregation of the data. In one embodiment, the PIM 104 also supplies high-voltage and low-voltage direct current (DC) power to support the operation of the circuits within the imaging component 110. The mechanism of triggering the transmitter circuit is described in more detail herein.

[0028] In one embodiment, the host system 106 receives echo data from the imaging component 110 through the PIM 104 and / or sends control to the imaging component 110. The host system 106 processes the echo data to reconstruct an image of tissue structures in the blood vessel 120 around the imaging component 110. The host system 106 outputs image data so that an image of the blood vessel 120 (e.g., a cross-sectional image of the blood vessel 120) is displayed on the display 108.

[0029] In some embodiments, the intraluminal imaging device 102 includes features similar to those of a conventional solid-state IVUS catheter, such as the Eagle IVUS catheter available from Volcano Corporation. Platinum catheter, Eagle Platinum ST catheter, Eagle Gold catheter and PV catheters and those disclosed in U.S. Pat. No. 7,846,101, which is incorporated herein by reference in its entirety. For example, the intraluminal imaging device 102 also includes a cable 112 extending along the longitudinal body of the intraluminal imaging device 102. The cable 112 is a transmission line bundle including a plurality of conductors, the plurality of conductors including one, two, three, four, five, six, seven or more conductors. It will be appreciated that any suitable gauge wire can be used for the conductors. In one embodiment, the cable 112 can include a four-conductor transmission line arrangement having, for example, 41 American Wire Gauge (AWG) wires. In one embodiment, the cable 112 can include a seven-conductor transmission line arrangement utilizing, for example, 44AWG wires. In some embodiments, 43AWG wires can be used. In some other embodiments, the intraluminal imaging device 102 includes some features similar to conventional rotary IVUS catheters, such as those available from Volcano Corporation. catheters and those disclosed in US Pat. Nos. 5,601,082 and 6,381,350, each of which is incorporated herein by reference in its entirety. In some embodiments, the intraluminal imaging device 102 includes the same as in U.S. Pat. Nos. 4,917,097, 5,368,037, 5,453,575, 5,603,327, 5,779,644, 5,857,974, 5,876,344, 5,921,931, 5,938,615, 6,049,958, 6,0854,109, 6,123,673, 6,165,128, 6,283,920, 6,309,339, 6,033,357, 6,457,365, 6,712,767, 6,725,081, 6,767,327, 6,776,763, 6,779,257, 6,785,4157, 6899682, US 6962567, US 6976965, US 7097620, US 7226417, US 76414854, US 7676910, US 7711413 and US 7736317, each of which is incorporated herein by reference in its entirety.

[0030] The cable 112 terminates at a PIM connector 114 at a proximal end of the intraluminal imaging device 102. The PIM connector 114 electrically couples the cable 112 to the PIM 104 and physically couples the intraluminal imaging device 102 to the PIM 104. In one embodiment, the intraluminal imaging device 102 also includes a guidewire exit port 116 disposed near a node 130 where the distal portion 131 is coupled to the proximal portion 132. Thus, in some instances, the intraluminal imaging device 102 is a rapid exchange catheter. The guidewire exit port 116 allows a guidewire 118 to be inserted toward the distal end 133 in order to guide the intraluminal imaging device 102 through the blood vessel 120.

[0031] Different clinical or imaging applications may require the use of different types of intraluminal imaging devices 102, and different types of intraluminal imaging devices 102 may have different sizes and / or different imaging capabilities. For example, imaging of peripheral vessels, imaging of coronary vessels, measurement of blood flow, and evaluation of vascular morphology in a vessel may all require a specific type of intraluminal imaging device 102. Different types of intraluminal imaging devices 102 (e.g., Eagle available from Volcano Corporation) may be used to perform imaging of peripheral vessels, coronary vessels, blood flow, and vascular morphology in a vessel. Platinum catheter, Eagle Platinum ST catheter, Eagle Gold catheter, PV catheter and / or Catheters) may use different numbers of physical signal lines to transmit information (e.g., commands and status), such as carrying data, control, address, and / or clock signals. In addition, the encoding of the data may vary depending on the communication protocol. For example, some intraluminal imaging devices 102 may use a serial communication interface, while other intraluminal imaging devices 102 may use an inter-integrated circuit (I2C) interface. In addition, different types of intraluminal imaging devices 102 may require different trigger signals to control ultrasonic emission and / or ultrasonic echo signal reception at the imaging component 110. For example, the trigger signal for the phased array imaging component 110 may be different from the trigger signal for the rotation-based imaging component 110.

[0032] Different clinical or imaging applications can use different imaging modes to collect different types of diagnostic information (e.g., B-mode data and color Doppler blood flow data). Different ultrasound center frequencies can be used to compromise between signal penetration depth and image resolution. For example, the imaging component 110 can be configured to transmit ultrasound at a higher center frequency to provide higher imaging resolution at the expense of loss of penetration depth. Conversely, the imaging component 110 can be configured to transmit ultrasound at a lower center frequency to provide deeper penetration at the expense of loss of imaging resolution. Therefore, different trigger signals may be required to trigger ultrasound emission pulses of different center frequencies.

[0033] Different ultrasound pulse durations can be used to obtain different imaging views. For example, the imaging component 110 can be configured to transmit ultrasound pulses with shorter durations but at higher signal energy levels. For example, higher energy ultrasound waves can be used during color flow imaging to provide a better view of blood vessel boundaries. Alternatively, higher energy ultrasound waves can be used during peripheral imaging to provide a larger field of view because the peripheral blood vessels are larger, such as when capturing images of the aorta during abdominal imaging or images of the iliac arteries during limb imaging. Therefore, different trigger signals may be required to trigger ultrasound transmit pulses of different durations and / or different energy levels.

[0034] As can be seen, different intraluminal imaging devices 102 may require different numbers of physical signal lines and communication protocols for data and / or signal transmission. In addition, different imaging components 110 and / or different target imaging modes may require trigger signals with different waveform characteristics (e.g., voltage level, frequency and / or duty cycle) and different trigger sequences. In one embodiment, the PIM 104 may include reconfigurable hardware resources that can be dynamically reconfigured at runtime based on the attached intraluminal imaging device 102. For example, the PIM 104 can detect device properties (e.g., device type and / or ultrasound properties) of the attached intraluminal imaging device 102 and configure the reconfigurable hardware resources accordingly. Mechanisms for dynamic hardware resource reconfiguration in the PIM 104 are described in more detail herein.

[0035] Figure 2 is a schematic diagram illustrating a system configuration 200 for an intraluminal ultrasound imaging system 100 according to aspects of the present disclosure. Figure 2 A more detailed view of the internal components of the PIM 104 and the interaction between the PIM 104, a host 106 in communication with the PIM 104, and the intraluminal imaging device 102 is provided. Figure 3is a schematic diagram illustrating a dynamic resource reconfiguration scheme 300 for PIM 104 according to aspects of the present disclosure. Figure 2 As shown, the PIM 104 includes a device connector 204 coupled to an FPGA 220. At a high level, when the intraluminal imaging device 102 is attached to the device connector 204, the PIM 104 is capable of detecting and identifying device properties of the attached intraluminal imaging device 102. The PIM 104 is capable of loading a configuration bitstream onto the FPGA 220 at runtime to configure the FPGA 220 to communicate with the attached intraluminal imaging device 102.

[0036] The device connector 204 can be a common intraluminal imaging device connector suitable for coupling with a variety of different intraluminal imaging devices 102. The device connector 204 can include digital signal connections and analog signal connections that are coupled to the attached intraluminal imaging device 102 via the link 202. The intraluminal imaging devices are shown as 102A, 102B, and 102C. As an example, the intraluminal imaging device 102A can be a rotary IVUS catheter that includes an imaging component 110A having a single ultrasonic transducer element. The intraluminal imaging device 102B can be a solid-state IVUS catheter that is suitable for coronary artery imaging, for example. The intraluminal imaging device 102C can include an imaging component 110C having a phased array ultrasonic transducer. The intraluminal imaging device 102C can be another solid-state IVUS catheter that is suitable for peripheral imaging, for example. The intraluminal imaging device 102C can include an imaging component 110C having a phased array ultrasonic transducer.

[0037] Different intraluminal imaging devices 102A, 102B, and 102C may have different sizes and / or different numbers of physical signal lines for communication. For example, the intraluminal imaging device 102A may communicate with the PIM 104 via four physical signal lines, while the intraluminal imaging devices 102B and 102C may communicate with the PIM 104 via six physical signal lines. In some other examples, the different intraluminal imaging devices 102A, 102B, and 102C may have the same number of physical signal lines, but may have different pin assignments for connection with the device connector 204.

[0038] Different intraluminal imaging devices 102A, 102B, and 102C may use different communication protocols for digital communication and / or different voltage levels for transmitting analog signals and / or digital signals. For example, intraluminal imaging device 102A may use an I2C communication protocol, while intraluminal imaging device 102B may use a high-speed I2C communication protocol. In some instances, the digital signal for intraluminal imaging device 102A may carry a 7-bit address field, an 8-bit data field, and 3 groups of 4-bit controls, while the digital signal for intraluminal imaging devices 102B and 102C may carry a 3-bit address field, an 8-bit data field, and a 3-bit control field. In some instances, intraluminal imaging device 102A may communicate using differential signals, while intraluminal imaging device 102B may communicate using common-mode signals.

[0039] Different intraluminal imaging devices 102A, 102B, and 102C may have different imaging capabilities, such as different ultrasound center frequencies and / or different imaging cores (e.g., phased array or rotating imaging cores). Imaging components 110A, 110B, and 110C may require different trigger signals for ultrasound emission and / or ultrasound echo reception. For example, imaging components 110A, 110B, and 110C may be designed to emit ultrasound waves with different center frequencies. In some embodiments, each intraluminal imaging device 102 may include a non-volatile memory configured to store device information, such as a serial number, a device identification number, a catheter type, and other device attributes (e.g., ultrasound attributes and / or physiological sensing modalities) related to the corresponding ultrasound imaging component 110.

[0040] FPGA 220 includes configurable logic cells or logic elements (e.g., Figure 3 Logic element 330 shown) and configurable switches or interconnect elements (e.g., Figure 3 The configurable logic element and the configurable interconnect element can be divided into two parts: a dynamically reconfigurable part 222 and a statically configured part 224.

[0041] The static configuration portion 224 may implement modules or logic blocks that are common between the intraluminal imaging devices 102. As shown, the static configuration portion 224 includes a flash interface 230, a register array 232, a processing component 234, a configuration memory 236, and a host interface 238. The dynamically reconfigurable portion 222 may implement modules or logic blocks that are specific to the intraluminal imaging device 102 (e.g., the intraluminal imaging device 102C) attached to the PIM 104. As shown, the dynamically reconfigurable portion 222 includes a plurality of reconfigurable logic blocks 226. As described in more detail herein, the reconfigurable logic blocks 226A and 226B are capable of being reconfigured at run time to communicate with the attached intraluminal imaging device 102.

[0042] Flash memory interface 230 is configured to communicate with an external flash memory. For example, PIM 104 can also include flash memory 210. Flash memory 210 is a non-volatile memory, such as a flash memory card. Flash memory 210 is configured to store configuration data, which can be referred to as an FPGA configuration bitstream. Flash memory 210 can store a portion of a configuration bitstream. Figure 3 As shown, flash memory 210 stores a plurality of configuration data 310 and configuration data 320. Configuration data 320 defines the location and switching of interconnection elements in static configuration portion 224. For example, configuration data 320 configures static configuration portion 224 to implement register array 232, processing element 234, configuration memory 236, and host interface 238.

[0043] The configuration data 310 define the location and switching of interconnected elements in the dynamically reconfigurable portion 222. Each configuration data 310 is associated with a specific attribute of the intraluminal imaging device 102. As an example, the configuration data 310A defines the location and switching of interconnected elements in the reconfigurable logic blocks 226A and 226B to implement a communication interface and sequencer specific to the intraluminal imaging device 102A (e.g., for generating a transmit / receive trigger signal). The configuration data 310B defines the location and switching of interconnected elements in the reconfigurable logic blocks 226A and 226B to implement a communication interface and sequencer specific to the intraluminal imaging device 102B. The configuration data 310C defines the location and switching of interconnected elements in the reconfigurable logic blocks 226A and 226B to implement a communication interface and sequencer specific to the intraluminal imaging device 102C, which is described in more detail herein.

[0044] The processing component 234 is coupled to the flash memory interface 230 and the register array 232. The processing component 234 can be any type of central processing unit (CPU). In some instances, the processing component 234 can be a microcontroller, a general purpose processor (GPU), or a digital signal processor (DSP). The processing component 234 is configured to detect device properties of the intraluminal imaging device 102 attached to the PIM 104. The device properties can include a communication protocol (e.g., I2C, high-speed I2C, or a serial communication link) used by the attached intraluminal imaging device 102 for communication. The device properties can include ultrasound properties of the imaging component 110 of the intraluminal imaging device 102. The ultrasound properties can include an operating center frequency of the imaging component 110 (e.g., approximately 10 MHz, 20 MHz, 40 MHz, 45 MHz, and / or other larger and smaller suitable values. In addition, the ultrasound properties can indicate the imaging core type of the imaging component 110, for example, whether the imaging component 110 is a phased array ultrasound imaging component or a rotary ultrasound imaging component.

[0045] The processing component 234 can select a configuration from the plurality of configuration data 310 based on the detected device attributes. The processing component 234 can configure the dynamically reconfigurable portion 222 of the FPGA 220 based on the detected device attributes. Figure 3 As shown, the processing component 234 can load the selected configuration data 302 into the configuration memory 236 via the flash interface 230 and the register array 232. The configuration memory 236 and the register array 232 can be any random access memory (RAM). For example, as shown by arrow 304, the selected configuration data 302 is received at the register array 232. As shown by arrow 306, the configuration data 302 is transferred from the register array 232 to the configuration memory 236. The configuration data 302 stored in the configuration memory 236 is used to configure the interconnection element 332 to interconnect the logic element 330 in the reconfigurable logic block 226, for example, to implement a communication interface or sequencer for the attached intraluminal imaging device 102. The configuration data 310 is referred to as a partial FPGA bitstream. In some embodiments, processing component 234 is capable of forming a complete FPGA bitstream (including configuration data 320 (e.g., static or common between intraluminal imaging devices 102) and selected configuration data 302 (e.g., configuration data 310C)) and loading the complete FPGA bitstream into configuration memory 236. Although for simplicity of discussion, Figure 3 Four logic elements 330 are illustrated, but the reconfigurable logic block 226 can be scaled to include any suitable number of logic elements 330 .

[0046] In some embodiments, FPGA 220 can also include a device detection logic block that can detect the attachment of the intraluminal imaging device 102 to the PIM 104 and notify the processing component 234 of the detection.

[0047] The host interface 238 may include hardware components and / or software components configured to communicate with the host 106 via the link 208. In some instances, the communication link 208 may be a wired connection such as an Ethernet link, a universal serial bus (USB) link, or any suitable wired communication link. In other instances, the link 208 may be a wireless link, such as an Institute of Electrical and Electronics Engineers (IEEE) 802.11 (WiFi) link, a Bluetooth link, a Zigbee link, or an ultra-wideband (UWB) link. The host interface 238 can be coupled to the reconfigurable logic block 226. For example, the host 106 can send commands to the attached intraluminal imaging device 102 and receive echo signals or image signals via the host interface 238 and the reconfigurable logic block 226.

[0048] As an example, when the intraluminal imaging device 102A is connected to the PIM 104, the processing component 234 can automatically identify the device attributes of the intraluminal imaging device 102A. The processing component 234 can load the configuration data 310A into the configuration memory 236 to dynamically reconfigure the reconfigurable logic block 226 at runtime to implement at least a communication interface for communicating with the intraluminal imaging device 102A and a sequencer for controlling the imaging component 110A. After the reconfigurable logic block 226 is configured, the reconfigurable logic block 226A serves as an analog interface and / or a digital interface for communicating with the intraluminal imaging device 102A. For example, the PIM 104 can send a command 240 (e.g., reset, restart, and / or stop) to the imaging component 110A, and can receive a status 242 (e.g., out of range high voltage (HV) and / or sensor element failure) from the imaging component 110A via the reconfigurable logic block 226. The reconfigurable logic block 226A is also capable of receiving ultrasound echo signals 244 captured by the imaging component 110A. The reconfigurable logic block 226B acts as a sequencer to generate a sequence of trigger signals 246 to control ultrasound transmission and ultrasound echo reception at the imaging component 110A. The trigger signals 246 may include one or more trigger signals for activating ultrasound transmission and / or one or more trigger signals for activating ultrasound echo reception.

[0049] Alternatively, the processing component 234 can automatically identify the device attributes of the intraluminal imaging device 102B when the intraluminal imaging device 102B is connected to the PIM 104. The processing component 234 can load the configuration data 310B into the configuration memory 236 to dynamically reconfigure the reconfigurable logic block 226 at runtime to implement at least a communication interface for communicating with the intraluminal imaging device 102B and a sequencer for controlling the imaging component 110B. After the reconfigurable logic block 226 is configured, the reconfigurable blocks 226A and 226B can provide similar functionality as described above, but the functionality is specific to the intraluminal imaging device 102B.

[0050] Although Figure 2 and Figure 3 A single configuration data 310 for reconfiguring the dynamically reconfigurable portion 222 of the FPGA 220 is illustrated, but in some embodiments, configuration data for the interface and configuration data for the sequencer can be stored as separate configuration data 310 .

[0051] Figure 4 is a schematic diagram illustrating a device interface configuration 400 for a PIM 104 according to aspects of the present disclosure. Configuration 400 provides a more detailed view of an example of a reconfigurable logic block 226A that is configured to function as a communication interface for communicating with an intraluminal imaging device 102. To simplify the discussion, Figure 4 The interface portion of PIM 104 is shown, but may include the interface portions described above with respect to Figure 2 and Figure 3 As shown, the interface includes a digital path 402 and an analog path 404. The digital path 402 is coupled to a digital interface block 410. The analog path 404 is coupled to an analog filter 420, an analog-to-digital converter (ADC) 430, and a signal processing module 440. The digital interface module 410, the ADC 430, and the signal processing module 440 can be implemented by the reconfigurable logic module 226A. Although Figure 4 One analog filter 420 and one ADC 430 are illustrated, but the PIM 104 may include any suitable number of analog filters 420 and ADCS 430 .

[0052] As described above, the PIM 104 can exchange commands 240 and status 242 with the attached intraluminal imaging device 102. The commands 240 and status 242 can be communicated via a digital path 402. The digital interface block 410 can be configured to implement a communication protocol (e.g., I2C, high-speed I2C, or any serial communication scheme) of the attached intraluminal imaging device 102C. The communication protocol can include specific voltage levels, signal types, and / or data encoding schemes.

[0053] The PIM 104 can also receive an ultrasound echo signal 244 captured by the imaging component 110 of the attached intraluminal imaging device 102. The echo signal 244 can be transmitted on the analog path 404. The echo signal 244 is an analog radio frequency (RF) signal. The analog filter 420 can condition the received echo signal 244. The ADC 430 can convert the analog signal into a digital signal for subsequent digital signal processing. In some examples, the analog filter 420 can be an anti-aliasing filter for the ADC 430. The analog filter 420 can be a bandpass filter, wherein the filter characteristics (e.g., 3 decibel (dB) roll-off and bandwidth) can depend on the bandwidth of the ultrasound echo signal 244, the center frequency of the ultrasound emission causing the echo signal 244, and / or the sampling rate of the ADC 430. The signal processing block 440 can perform pre-processing to condition the echo signal 244 for further image processing. In some embodiments, the signal processing block 440 can include a digital filter (e.g., a notch filter) specific to the imaging component 110 of the attached intraluminal imaging device 102. In some embodiments, the signal processing block 440 can implement an envelope detection algorithm and / or a logarithmic compression algorithm for B-mode processing. In some embodiments, the signal processing block 440 can implement an image analysis algorithm (e.g., boundary detection and / or blood flow estimation). In some embodiments, the analog path 404 can also include an analog amplifier and / or other mixer circuits before the ADC 430, the analog amplifier being used to amplify the received echo signal 244, the other mixer circuit being used to convert the RF echo signal 244 into a baseband signal. In some embodiments, the ADC 430 can be an ADC external to the FPGA 220.

[0054] Figure 5 5 is a schematic diagram illustrating an ultrasound imaging configuration 500 according to aspects of the present disclosure. Configuration 500 provides a more detailed view of an example of a reconfigurable logic block 226B that is configured to function as a sequencer for controlling ultrasound transmission and ultrasound echo reception at an imaging component 110 of an attached intraluminal imaging device 102. For example, the reconfigurable logic block 226B is capable of controlling transmission and / or reception triggers to provide synthetic aperture ultrasound imaging. Configuration 500 includes a multiplexer 520 coupled to the imaging component 110, a sequencer block 530, and a trigger signal generation block 540. The imaging component 110 may correspond to a device attached to the imaging component 110. Figure 2 The imaging component 110C of the intraluminal imaging device 102C of the PIM 104 is shown. The imaging component 110 may include an array of ultrasound transducers 510. The sequencer block 530 and the trigger signal generation block 540 can be implemented by the reconfigurable logic block 226B.

[0055] The multiplexer 520 may include a plurality of transmit switching circuits 522. Each transmit switching circuit 522 may be coupled to one of the transducers 510. Each transmit switching circuit 522 may include a driver that can activate ultrasonic transmission at the transducer 510 and a switch that can gate or allow an electrical signal (e.g., the trigger signal 246) to pass through to the corresponding transducer 510.

[0056] The sequencer block 530 controls the timing and sequence of activation at the transducers 510 (e.g., for transmitting ultrasound waves), and the trigger signal generation block 540 generates a trigger signal to activate the transducers 510 based on the detected device properties or ultrasound properties of the imaging component 110. The transmit switching circuit 522 in the multiplexer 520 can receive the trigger signal 246 from the trigger signal generation block 540 and send the trigger signal 228 to the transducers 510 according to the timing and sequence provided by the sequencer block 530. For example, the sequencer block 530 can provide a timing sequence 532 that indicates a sequence (e.g., including order and timing) for firing a group of transducers 510.

[0057] In some embodiments, the transducers 510 may be grouped into apertures 504 including apertures 504a and 504b. In some embodiments, each transducer 510 may be part of one or more apertures 504. Each aperture 504 may include any suitable number of transducers 510. The sequencer block 530 may activate one or more transducers 510 in the aperture 504 to transmit ultrasound waves 502 (e.g., ultrasound transmit pulses). The ultrasound waves 502 may be transmitted toward a target anatomical structure 505 (e.g., a blood vessel). Although in Figure 5 500 may also include receive switching circuitry coupled to the transducers so that the sequencer block 530 may also activate one or more transducers 510 in the aperture 504 to receive echo signals 503 reflected from the structure 505. The received echo signals 503 may create A lines in the image representing the structure 505.

[0058] Although the multiplexer 520 is shown with a separate transmit switching circuit 522 for each transducer 510, the transmit switching circuit 522 can be configured in any suitable configuration, for example, some transducers 510 can be coupled to the same transmit switching circuit 522. Additionally, in some embodiments, the sequencer block 530 can be coupled to the trigger signal generation block 540, and the trigger signal generation block 540 can apply the encoded trigger signal to the imaging component 110. The encoded trigger signal can also include information indicating the transducer 510 selected by the sequencer block 530.

[0059] Figure 6 6 is a schematic diagram illustrating a system configuration 600 for an intraluminal ultrasound imaging system 100 according to aspects of the present disclosure. The system configuration 600 may be substantially similar to the system configuration 200. For example, the PIM 104 may detect the attachment of the intraluminal imaging device 102C, identify the device properties of the attached intraluminal imaging device 102, and dynamically configure the dynamically reconfigurable portion 222 of the FPGA 220. However, in the system configuration 600, the PIM 104 may include an additional memory 620 external to the FPGA 220, and the static configuration portion 224 may include an additional external memory interface 610. The memory 620 may be any RAM and may include a large storage capacity size (e.g., several megabytes to several gigabytes). The external memory interface 610 may be coupled to an internal block of the FPGA 220 and may provide an interface for the FPGA 220 to read data from the memory 620 or write data to the memory 620. For example, the signal processing block 440 can implement more complex signal processing and / or image processing algorithms, such as beamforming algorithms or focusing algorithms. Complex algorithms may require additional memory to store working data. The working data can be transferred to the memory 620 via the external memory interface 610.

[0060] Figure 7 1 is a flow chart of a method 700 of ultrasound imaging according to aspects of the present disclosure. The steps of the method 700 can be executed by the system 100. The method 700 can be implemented in accordance with the embodiments of the present disclosure. Figure 2 , Figure 4 , Figure 5 , Figure 6 and Figure 3 The described system configurations 200, 400, 500 and 600 and the similar mechanisms in the scheme 300. As shown, the method 700 includes a plurality of listed steps, but embodiments of the method 700 may include additional steps before, after, and between the listed steps. In some embodiments, one or more of the listed steps may be omitted or performed in a different order.

[0061] At step 710, the method includes detecting, by a PIM (e.g., PIM 104), device properties of an intraluminal imaging device (e.g., intraluminal imaging device 102) in communication with the PIM, the intraluminal imaging device including an ultrasound imaging component (e.g., imaging component 110). The device properties can include information associated with a communication protocol, a signal type (e.g., differential or common mode), and / or a voltage level used by the intraluminal imaging device for communication and / or ultrasound properties of the imaging component (e.g., center frequency, imaging core (e.g., phased array or spinning core)).

[0062] At step 720, the method 700 includes loading, by a processing component of the PIM (e.g., processing component 234), at least one of a first configuration (e.g., configuration data 310A) or a second configuration (e.g., configuration data 310B) into a configuration memory (e.g., configuration memory 236) of the PIM based on the detected device attribute to configure a first reconfigurable logic block (e.g., reconfigurable logic block 226A) of the PIM. The first reconfigurable logic block includes a first plurality of logic elements (e.g., logic element 330) interconnected by a first reconfigurable interconnect element (e.g., interconnect element 332). The first configuration or the second configuration configures one or more of the first reconfigurable interconnect elements so that the first plurality of logic elements are interconnected to communicate with the ultrasound imaging component.

[0063] In some embodiments, the first configuration is associated with a first device attribute and the second configuration is associated with a second device attribute different from the first device attribute. Loading includes loading the first configuration into a configuration memory based on detecting that the device attributes include the first device attribute. In some examples, the first configuration is loaded from a non-volatile storage memory of the PIM (e.g., flash memory 210).

[0064] In some embodiments, method 700 can include establishing, via a first reconfigurable logic block based on a first configuration, a digital communication link (e.g., digital path 402) with the intraluminal imaging device based on a communication protocol associated with the detected device attribute. The PIM can send a command (e.g., command 240) via the digital communication link to configure the intraluminal imaging device.

[0065] In some embodiments, the first configuration can configure the first reconfigurable logic block to receive an analog signal associated with an ultrasound echo signal (e.g., echo signal 244) received by the ultrasound imaging component via the first reconfigurable logic block based on the first configuration. The ultrasound echo signal represents a body of the object (e.g., blood vessel 120 or structure 305). The method 700 can also include sending an image signal associated with the ultrasound echo signal to a host (e.g., host 106).

[0066] In some embodiments, the method 700 can include loading, by the processing component, a third configuration or a fourth configuration into a configuration memory to configure a second reconfigurable logic block (e.g., reconfigurable logic block 226B) of the PIM based on a target imaging mode (e.g., B-mode or color Doppler mode) of the ultrasound imaging procedure. The second reconfigurable logic block includes a second plurality of logic elements interconnected by a second reconfigurable interconnect element. The third configuration or the fourth configuration can configure the second reconfigurable interconnect element so that the second plurality of logic elements are interconnected to apply a sequence of trigger signals to an array of ultrasound transducers (e.g., transducers 510) of the ultrasound imaging component for ultrasound waves (e.g., ultrasound waves 502) transmission and ultrasound echo (e.g., ultrasound echo signals 503) reception.

[0067] Various aspects of the present disclosure can provide several benefits. For example, automatically detecting the device properties of the intraluminal ultrasound imaging device 102 when attached to the PIM 104 can allow the PIM 104 to reconfigure the resources used to communicate and / or control the attached intraluminal ultrasound imaging device 102 at runtime. Therefore, the PIM 104 does not need to include resources for multiple different combinations of implementations to support different types of intraluminal imaging devices. As such, the dynamic reconfiguration of resources enables the PIM 104 to have a smaller footprint and lower cost. Dynamic resource configuration also enables complex algorithms to be implemented based on the intraluminal imaging device in use, rather than unnecessarily occupying resources when using another intraluminal imaging device. For example, a reconfigurable logic block can be configured to implement different sorting algorithms based on the intraluminal imaging device in use and the desired diagnostic information.

[0068] Those skilled in the art will recognize that the above-mentioned apparatus, system and method can be modified in various ways. Therefore, it will be recognized by those of ordinary skill in the art that the embodiments included in the present disclosure are not limited to the above-mentioned specific exemplary embodiments. In this regard, although exemplary embodiments have been shown and described, various modifications, changes and substitutions are envisioned in the foregoing disclosure. It should be understood that such changes can be made to the foregoing without departing from the scope of the present disclosure. Therefore, it is appropriate to interpret the claims broadly in a manner consistent with the present disclosure.

Claims

1. An intraluminal ultrasound imaging system (100), comprising: A patient interface module (PIM) (104) configured to communicate with an intraluminal imaging device (102) including an ultrasound imaging component (110), the PIM comprising a field programmable gate array (FPGA), wherein the FPGA comprises a statically configurable portion (224) and a dynamically reconfigurable portion (222); wherein the dynamically reconfigurable portion includes a plurality of reconfigurable logic blocks (226A, 226B), the plurality of reconfigurable logic blocks including a plurality of logic elements (330) interconnected by a reconfigurable interconnect element (332); wherein the PIM comprises a non-volatile memory (210), the non-volatile memory being configured to: store first configuration data (310) comprising a plurality of configurations (310A, 310B, 310C) for the dynamically reconfigurable portion, and store second configuration data (320) for the statically configurable portion; The FPGA includes a configuration memory coupled to a processing element (234), the processing element being configured to: detecting device properties of the intraluminal imaging device in communication with the PIM; and At least one of a first configuration (310A) or a second configuration (310B) of the first configuration data is loaded from the non-volatile memory to the configuration memory based on the detected device properties to configure one or more dynamically reconfigurable blocks in the dynamically reconfigurable blocks so that the multiple logic elements of the corresponding dynamically reconfigurable blocks are interconnected to communicate with the ultrasound imaging component.

2. The system according to claim 1, wherein: The processing unit is further configured to: When the detected device attributes indicate that the intraluminal imaging device includes a first device attribute, loading the first configuration; and When the detected device attributes indicate that the intraluminal imaging device includes a second device attribute, loading the second configuration, and The first device attribute and the second device attribute are different.

3. The system according to claim 2, wherein: The first configuration configures the first reconfigurable logic block as: establishing a digital communication link with the intraluminal imaging device based on a communication protocol associated with the detected device attributes; and Commands are sent via the digital communication link to configure the intraluminal imaging device.

4. The system according to claim 2, wherein: The first configuration configures the first reconfigurable logic block as: establishing a digital communication link with the intraluminal imaging device based on a communication protocol associated with the detected device attributes; and A status of the intraluminal imaging device is received via the digital communication link.

5. The system according to claim 2, wherein: The first configuration configures the first reconfigurable logic block as: An analog signal associated with an ultrasound echo signal received by the ultrasound imaging component is received from the ultrasound imaging component based on the detected device property, the ultrasound echo signal representing a body of a subject.

6. The system according to claim 5, wherein: The first configuration configures the first reconfigurable logic block as: A filter is applied to the received analog signal based on detected device properties.

7. The system according to claim 5, wherein: The first configuration configures the first reconfigurable logic block as: Converts the received analog signal to a digital signal based on detected device properties.

8. The system according to claim 5, wherein: The PIM also includes a host interface configured to transmit an image signal associated with the ultrasound echo signal to a host.

9. The system according to claim 1, wherein: The ultrasound imaging component includes an array of ultrasound transducers.

10. The system according to claim 9, further comprising: a second reconfigurable logic block comprising a second plurality of logic elements interconnected by a second reconfigurable interconnect element, Wherein, the processing component is further configured as: The third configuration or the fourth configuration is loaded into the configuration memory based on the target imaging mode of the ultrasound imaging procedure to configure the second reconfigurable interconnect element so that the second plurality of logic elements are interconnected to apply a sequence of trigger signals to the array of the ultrasound transducer for ultrasound wave emission and ultrasound echo reception.

11. A method for intraluminal ultrasound imaging, comprising: The patient interface module PIM detects device properties of an intraluminal imaging device in communication with the PIM, wherein the intraluminal imaging device includes an ultrasound imaging component; and Loading, by a processing component of a field programmable gate array FPGA included in the PIM, at least one of a first configuration (310A) or a second configuration (310B) from a non-volatile memory included in the PIM to a configuration memory of the FPGA based on the detected device attribute, to configure one or more dynamically reconfigurable logic blocks among a plurality of dynamically reconfigurable logic blocks included in a dynamically reconfigurable portion of the FPGA, so that a plurality of logic elements of the corresponding dynamically reconfigurable blocks are interconnected to communicate with the ultrasound imaging component; wherein the FPGA includes a statically configurable portion (224), and wherein the non-volatile memory stores first configuration data (310) including a plurality of configurations (310A, 310B, 310C) including the first configuration and the second configuration for the dynamically reconfigurable portion, and stores second configuration data (320) for the statically configurable portion.

12. The method according to claim 11, wherein: The first configuration is associated with a first device property, wherein the second configuration is associated with a second device property different from the first device property, and wherein the loading comprises loading the first configuration into the configuration memory based on detecting identifying that the detected device properties include the first device property.

13. The method according to claim 12, further comprising: establishing, via a first reconfigurable logic block based on the first configuration, a digital communication link with the intraluminal imaging device based on a communication protocol associated with the detected device attribute; and Commands are sent via the digital communication link to configure the intraluminal imaging device.

14. The method according to claim 12, wherein: The first configuration configures the first reconfigurable logic block as: An analog signal associated with an ultrasound echo signal received by the ultrasound imaging component is received via the first reconfigurable logic block based on the first configuration, the ultrasound echo signal representing a body of a subject.

15. The method according to claim 11, further comprising: The processing component loads the third configuration or the fourth configuration into the configuration memory based on the target imaging mode of the ultrasound imaging procedure to configure the second reconfigurable logic block of the FPGA; wherein the second reconfigurable logic block comprises a second plurality of logic elements interconnected by a second reconfigurable interconnect element, Wherein, the third configuration or the fourth configuration configures the second reconfigurable interconnect element so that the second plurality of logic elements are interconnected to apply a sequence of trigger signals to the array of ultrasonic transducers of the ultrasonic imaging component for ultrasonic wave transmission and ultrasonic echo reception.

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