Switch control circuit and power supply circuit

Abstract

The present invention provides a switching control circuit capable of operating a switching power supply circuit in an appropriate operating mode. The switching control circuit comprises: a transformer including a primary coil, a secondary coil, and an auxiliary coil; and a transistor that controls the current in the primary coil. The circuit operates in accordance with a power supply voltage corresponding to the voltage of the auxiliary coil from the power supply circuit, thereby controlling the switching of the transistor. The switching control circuit comprises: a drive signal output circuit that outputs a drive signal corresponding to the operating mode of the power supply circuit; a drive circuit that switches the transistor based on the output of the drive signal output circuit; and a control circuit having a first transition condition including a time condition and a second transition condition not including a time condition. If either the first transition condition or the second transition condition is satisfied, the control circuit causes the drive signal output circuit to output the drive signal that operates the power supply circuit in a first burst mode.

Description

Technical Field

[0001] This invention relates to switch control circuits and power supply circuits. Background Technology

[0002] Switching power supply circuits include circuits that operate in burst modes that intermittently stop the switching action in order to improve efficiency under light loads (e.g., Patent Document 1).

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2017-147854 Summary of the Invention

[0006] The technical problem that the invention aims to solve

[0007] However, when the power supply voltage for the control circuit of the switching power supply circuit is generated based on the switching action, if the operating mode of the switching power supply circuit does not switch from the normal mode to the burst mode at the appropriate time, it may sometimes lead to a drop in the power supply voltage and the control circuit failing to operate normally.

[0008] Additionally, for example, if the switching power supply circuit continues to operate in burst mode during a transient load change, it may sometimes cause the output voltage to deviate significantly from the target level.

[0009] The present invention was made to solve the above-mentioned problems, and its purpose is to provide a switch control circuit that enables the switching power supply circuit to operate in an appropriate operating mode.

[0010] Technical solutions used to solve technical problems

[0011] In a first aspect of the present invention that addresses the aforementioned problems, a switch control circuit comprises: a transformer including a primary coil disposed on a primary side, a secondary coil disposed on a secondary side, and an auxiliary coil electromagnetically coupled to the primary coil or the secondary coil; and a transistor for controlling the current of the primary coil. The switch control circuit operates based on a power supply voltage corresponding to the voltage of the auxiliary coil from a power supply circuit that generates a target level output voltage on the secondary side, and controls the switching of the transistor. The switch control circuit further comprises: a drive signal output circuit that outputs a drive signal corresponding to an operating mode of the power supply circuit; a drive circuit that switches the transistor based on the output of the drive signal output circuit; and a control circuit having a first transition condition including time and a second transition condition not including time, wherein if the first transition condition or the second transition condition is satisfied, the drive signal output circuit outputs the drive signal that operates the power supply circuit in a first burst mode.

[0012] In a second aspect of the invention, a switch control circuit includes: a transformer comprising a primary coil disposed on the primary side, a secondary coil disposed on the secondary side, and an auxiliary coil electromagnetically coupled to the primary coil or the secondary coil; and a transistor for controlling the current of the primary coil. The switch control circuit operates based on a power supply voltage corresponding to the voltage of the auxiliary coil from a power supply circuit that generates a target level output voltage on the secondary side, and controls the switching of the transistor. The switch control circuit includes: a drive signal output circuit that outputs a drive signal corresponding to the operating mode of the power supply circuit; and a drive circuit... The driving circuit switches the transistor based on the output of the driving signal output circuit; and the control circuit, if the power consumption of the load decreases when the power supply circuit operates in normal mode, causes the driving signal output circuit to output the driving signal that operates the power supply circuit in an operating mode corresponding to the power consumption of the load among a plurality of burst modes; if the power consumption of the load increases when the power supply circuit operates in an operating mode corresponding to the load with the lowest power consumption among the plurality of burst modes, the control circuit causes the driving signal output circuit to output the driving signal that operates the power supply circuit in the normal mode.

[0013] In a third aspect of the invention, a power supply circuit includes: a transformer comprising a primary coil disposed on a primary side, a secondary coil disposed on a secondary side, and an auxiliary coil electromagnetically coupled to the primary coil or the secondary coil; a transistor for controlling the current of the primary coil; and a switch control circuit that operates based on a power supply voltage corresponding to a voltage from the auxiliary coil and controls the switching of the transistor, the power supply circuit generating a target level output voltage on the secondary side, the switch control circuit comprising: a drive signal output circuit that outputs a drive signal corresponding to an operating mode of the power supply circuit; a drive circuit that switches the transistor based on the output of the drive signal output circuit; and a control circuit having a first transition condition including time and a second transition condition not including time, wherein if the first transition condition or the second transition condition is satisfied, the drive signal output circuit outputs the drive signal that operates the power supply circuit in a first burst mode.

[0014] In a fourth aspect of the invention, a power supply circuit includes: a transformer comprising a primary coil disposed on a primary side, a secondary coil disposed on a secondary side, and an auxiliary coil electromagnetically coupled to the primary coil or the secondary coil; a transistor for controlling the current of the primary coil; and a switch control circuit that operates based on a power supply voltage corresponding to a voltage from the auxiliary coil and controls the switching of the transistor, the power supply circuit generating a target level output voltage on the secondary side, the switch control circuit including: a drive signal output circuit that outputs a drive signal corresponding to an operating mode of the power supply circuit; and a drive circuit that... The driving circuit switches the transistor based on the output of the driving signal output circuit; and the control circuit, if the power consumption of the load decreases when the power supply circuit operates in normal mode, causes the driving signal output circuit to output the driving signal that operates the power supply circuit in an operating mode corresponding to the power consumption of the load among a plurality of burst modes; if the power consumption of the load increases when the power supply circuit operates in an operating mode corresponding to the load with the lowest power consumption among the plurality of burst modes, the control circuit causes the driving signal output circuit to output the driving signal that operates the power supply circuit in the normal mode.

[0015] Effects of the Invention

[0016] According to the present invention, a switching control circuit is provided that can operate a switching power supply circuit in an appropriate operating mode. Attached Figure Description

[0017] Figure 1 This is a diagram showing an example of a switching power supply circuit 10.

[0018] Figure 2 This is a diagram showing an example of the control IC40.

[0019] Figure 3 This is a diagram showing an example of the drive signal output circuit 75.

[0020] Figure 4 This is a diagram used to illustrate signals Va1 and Va2.

[0021] Figure 5 This is a graph used to illustrate the relationship between gain and switching frequency.

[0022] Figure 6 This is a diagram used to illustrate the timing of the generation of signals Vb1 and Vb2.

[0023] Figure 7 This is a diagram used to illustrate pulse signals Vp1 and Vp2.

[0024] Figure 8 This is a diagram used to illustrate the efficiency of the switching power supply circuit 10.

[0025] Figure 9 This is a diagram used to illustrate the transition conditions of action patterns.

[0026] Figure 10 It is a state transition diagram of the action pattern.

[0027] Figure 11 It is the state transition table for the action mode.

[0028] Figure 12 This is a diagram used to illustrate the operation of the switching power supply circuit 10. Detailed Implementation

[0029] Based on the description and drawings in this application, at least the following are clear.

[0030] ======This implementation method======

[0031] <<<Overview of Switching Power Supply Circuit 10>>>

[0032] Figure 1 This is a diagram illustrating the structure of a switching power supply circuit 10 according to one embodiment of the present invention. The switching power supply circuit 10 is an LLC current resonant converter that generates a target level output voltage Vout for the load 11 based on a predetermined input voltage Vin.

[0033] The switching power supply circuit 10 is configured to include capacitors 20, 21, and 32, NMOS transistors 22 and 23, transformer 24, control module 25, diodes 30 and 31, constant voltage circuit 33, and light-emitting diode 34.

[0034] Capacitor 20 stabilizes the voltage between the power supply line with applied input voltage Vin and the ground line on the ground side, and removes noise, etc. Furthermore, the input voltage Vin is a DC voltage of a specified level. Capacitor 21 is a so-called resonant capacitor, forming a resonant circuit with the leakage inductance located between the primary coil L1 and the secondary coils L2 and L3.

[0035] NMOS transistor 22 is a high-side power transistor, and NMOS transistor 23 is a low-side power transistor. Alternatively, in this embodiment, NMOS transistors 22 and 23 are used as switching elements, but they could also be, for example, PMOS transistors or bipolar transistors.

[0036] Transformer 24 has a primary coil L1, secondary coils L2 and L3, and an auxiliary coil L4, which are insulated from each other. In transformer 24, a voltage is generated in the secondary coils L2 and L3 on the secondary side according to the voltage change across the primary coil L1 on the primary side. Similarly, a voltage is generated in the auxiliary coil L4 on the primary side according to the voltage change across the primary coil L1 on the primary side and the voltage change of the secondary coils L2 and L3.

[0037] In addition, one end of the primary coil L1 is connected to the source of NMOS transistor 22 and the drain of NMOS transistor 23, and the other end of the primary coil L1 is connected to the source of NMOS transistor 23 via capacitor 21.

[0038] Therefore, when NMOS transistors 22 and 23 start switching, the voltages of the secondary coils L2 and L3 and the auxiliary coil L4 change. In addition, the primary coil L1, the secondary coils L2 and L3 are electromagnetically coupled with the same polarity, and the secondary coils L2 and L3 and the auxiliary coil L4 are also electromagnetically coupled with the same polarity.

[0039] The control module 25 is a circuit module used to control the switching of NMOS transistors 22 and 23, which will be described in detail later.

[0040] Diodes 30 and 31 rectify the voltages of the secondary coils L2 and L3, and capacitor 32 filters the rectified voltages. As a result, capacitor 32 generates the filtered output voltage Vout. Furthermore, the output voltage Vout becomes the target DC voltage level.

[0041] The constant voltage circuit 33 is a circuit that generates a constant DC voltage, for example, by using a shunt regulator.

[0042] The light-emitting diode 34 is a device that emits light of an intensity corresponding to the difference between the output voltage Vout and the output of the constant voltage circuit 33, and together with the phototransistor 59 described later, forms an optocoupler. In this embodiment, if the level of the output voltage Vout increases, the intensity of the light from the light-emitting diode 34 increases.

[0043] <<Control Module 25>>

[0044] The control module 25 includes a control IC 40, capacitors 50-54, resistors 55-57, diodes 58, and phototransistors 59.

[0045] Control IC40 is an integrated circuit that controls the switching of NMOS transistors 22 and 23, and has terminals VCC, GND, FB, IS, CA, GO, and LO. In addition, control IC40 is equivalent to a "switch control circuit".

[0046] Terminal VCC is the terminal to which the power supply voltage Vcc is applied to activate control IC4. Terminal VCC is connected to a capacitor 52 with one end grounded and the cathode of diode 58. Therefore, capacitor 52 is charged by the current from diode 58, and the charging voltage of capacitor 52 becomes the power supply voltage Vcc that activates control IC40. Additionally, control IC40 is activated by applying a voltage divider of the rectified AC input voltage Vin to a terminal (not shown). Once activated, control IC40 operates based on the power supply voltage Vcc.

[0047] The GND terminal is a terminal to which a ground voltage is applied, and is connected to, for example, the housing of a device equipped with a switching power supply circuit 10.

[0048] Terminal FB is the terminal that generates a feedback voltage Vfb corresponding to the output voltage Vout, and is connected to capacitor 53 and phototransistor 59. Capacitor 53 is used to remove noise between terminal FB and ground, and phototransistor 59 causes a bias current I1, corresponding to the intensity of light from LED 34, to flow from terminal FB to ground. Therefore, phototransistor 59 operates as a transistor that generates sink current.

[0049] Terminal IS is used to detect the resonant current value of the primary coil L1. Here, a voltage corresponding to the resonant current value of the primary coil L1 is generated at the node connecting capacitor 50 and resistor 55. Furthermore, resistor 56 and capacitor 51 constitute a low-pass filter. Therefore, a voltage with noise components removed is applied to terminal IS according to the resonant current value of the primary coil L1.

[0050] Terminal CA is a terminal to which a voltage Vca, generated based on the resonant current of the primary coil L1 and corresponding to the input power of the switching power supply circuit 10, is applied. Although details are described later, terminal CA is connected to a capacitor 54 and a resistor 57.

[0051] Terminal HO is the terminal for outputting the signal Vo1 that drives NMOS transistor 22, and is connected to the gate of NMOS transistor 22.

[0052] Terminal LO is the terminal for outputting the signal Vo2 that drives NMOS transistor 23, and is connected to the gate of NMOS transistor 23.

[0053] <<<Details of Control IC40>>>

[0054] Figure 2 This diagram illustrates the structure of control IC 40. Control IC 40 includes resistor 70, AD converters 71 and 73, load detection circuit 72, comparator 74, drive signal output circuit 75, control circuit 76, and drive circuit 77. Terminals VCC, GND, and IS are omitted here. Although details are described later, drive signal output circuit 75 and control circuit 76 are digital control circuits 78.

[0055] Resistor 70 generates a feedback voltage Vfb based on the bias current I1 from phototransistor 59. Additionally, a predetermined voltage Vdd is applied to one end of resistor 70, and the other end is connected to terminal FB. Therefore, if the resistance value of resistor 70 is set to "R", the feedback voltage Vfb generated by terminal FB is expressed by equation (1).

[0056] Vfb=Vdd-R×I1…(1)

[0057] As described above, in this embodiment, the bias current I1 increases in response to the rise in output voltage Vout. Therefore, if output voltage Vout increases, feedback voltage Vfb decreases.

[0058] The AD converter 71 converts the feedback voltage Vfb at terminal FB into a digital value and outputs it. The load detection circuit 72 uses capacitor 54 and resistor 57 connected to terminal CA to filter the voltage corresponding to the resonant current of the primary coil L1 detected by terminal IS, and outputs it as voltage Vca.

[0059] Here, the resonant current of the primary coil L1 increases according to the input power of the switching power supply circuit 10, which in turn increases according to the power consumed by the load 11. Therefore, the voltage Vca applied to terminal CA becomes a value that increases as the power consumption of the load 11 increases.

[0060] The AD converter 73 converts the voltage Vca output from the load detection circuit 72 into a digital value and outputs it. The comparator 74 detects a decrease in the power supply voltage Vcc.

[0061] The comparator 74 is a hysteresis comparator that compares the higher threshold voltage, i.e., the voltage V1, with the power supply voltage Vcc, and compares the lower threshold voltage, i.e., the voltage V2 (<V1), with the power supply voltage Vcc.

[0062] If the power supply voltage Vcc decreases and becomes lower than the "voltage V2", the comparator 74 changes the voltage Vc indicating the comparison result to a low level (hereinafter set as the "L level"). Additionally, if the power supply voltage Vcc rises and becomes higher than the "voltage V1", the comparator 74 changes the voltage Vc to a high level (hereinafter set as the "H level").

[0063] The digital control circuit 78 is a circuit that outputs the drive voltages Vdr1 and Vdr2 based on the feedback voltage Vfb, the voltage Vca, and the voltage Vc, and is configured to include a drive signal output circuit 75 and a control circuit 76.

[0064] The drive signal output circuit 75 is a circuit that outputs the drive signals Vdr1 and Vdr2 corresponding to the operation mode of the switching power supply circuit 10 based on the control signal CONT from the control circuit 76.

[0065] Although details will be described later, the "operation mode" of the switching power supply circuit 10 in this embodiment includes three modes: "normal mode", "high-frequency burst mode", and "low-frequency burst mode".

[0066] The "normal mode" refers to a mode in which, for example, the switching operation is continuously performed without intermittently stopping the switching operation, and the "burst mode" refers to a mode in which, for example, the switching operation is intermittently stopped.

[0067] In addition, in the "burst mode", the "high-frequency burst mode" has a shorter period of intermittently stopping the switching operation compared to the "low-frequency burst mode". Therefore, when comparing the "high-frequency burst mode" and the "low-frequency burst mode", the "low-frequency burst mode" is preferably the operation mode when the load 11 is a light load.

[0068] The control circuit 76 controls various operations of the drive signal output circuit 75 based on the control signal CONT. For example, the control circuit 76 causes the drive signal output circuit 75 to output the drive signals Vdr1 and Vdr2 corresponding to any of the three "operation modes" based on the feedback voltage Vfb that varies according to the power consumption of the load 11, the voltage Vca, and the power supply voltage Vcc. Additionally, details of the control circuit 76 will be described later.

[0069] The driving circuit 77 is a buffer that switches NMOS transistors 22 and 23 based on the input driving signals Vdr1 and Vdr2. Specifically, the driving circuit 77 drives NMOS transistor 22 with a signal Vo1 of the same logic level as the driving signal Vdr1, and drives NMOS transistor 23 with a signal Vo2 of the same logic level as the driving signal Vdr2.

[0070] <<Details of the drive signal output circuit 75>>

[0071] Figure 3 This diagram illustrates an example of the structure of the drive signal output circuit 75. The drive signal output circuit 75 is configured to include an oscillation circuit 90, a buffer 91, an inverter 92, a low-frequency burst control circuit 93, a timer 94, a pulse circuit 95, and a selector 96. The diagram is omitted here for clarity, but the control signal CONT is input to all circuits of the drive signal output circuit 75 except for the buffer 91 and the inverter 92.

[0072] ==Signals Va1 and Va2 in "Normal Mode"==

[0073] The oscillation circuit 90, buffer 91, and inverter 92 are modules that output signals Va1 and Va2 to enable the switching power supply circuit 10 to operate in "normal mode" when the control signal CONT representing "normal mode" is input.

[0074] The oscillation circuit 90 is a voltage-controlled oscillation circuit that outputs an oscillation signal Vosc with a duty cycle of, for example, "H" level, based on the input feedback voltage Vfb. If the level of the feedback voltage Vfb decreases, the oscillation circuit 90 outputs an oscillation signal Vosc with a higher frequency. Furthermore, if a control signal CONT indicating "action" is input, the oscillation circuit 90 outputs an oscillation signal Vosc corresponding to the feedback voltage Vfb; if a control signal CONT indicating "stop" is input, the oscillation circuit 90 stops outputting the oscillation signal Vosc.

[0075] Buffer 91 outputs a signal with the same logic level as the oscillation signal Vosc, and inverter 92 inverts the logic level of the oscillation signal Vosc and outputs it. As a result, the signals Va1 and Va2 used to operate the switching element circuit 10 in "normal mode" are, for example, as shown below. Figure 4 As shown, they become signals that are opposite to each other.

[0076] Furthermore, when the control signal CONT, indicating "normal mode," is input, selector 96 selects the output signals Va1 and Va2 of buffer 91 and inverter 92, and outputs them as drive signals Vdr1 and Vdr2. As a result, NMOS transistors 22 and 23 are driven based on the "normal mode" signals Va1 and Va2.

[0077] In addition, when the switching power supply circuit 10 operates in "normal mode", if the output voltage Vout rises above the target level, the feedback voltage Vfb decreases, and therefore the frequency of the oscillation signal Vosc increases.

[0078] Here, the gain (=Vout / Vin) of the LLC current resonant converter, i.e., the switching power supply circuit 10, is related to the switching frequency, for example... Figure 5 The relationship shown holds true. Furthermore, in this embodiment, the frequency of the oscillation signal Vosc is designed to be higher than the resonant frequency of the switching power supply circuit 10. As a result, if the feedback voltage Vfb decreases, the frequency of the oscillation signal Vosc increases, and the output voltage Vout decreases.

[0079] On the other hand, if the output voltage Vout drops below the target level, the feedback voltage Vfb rises, and therefore the frequency of the oscillation signal Vosc decreases. As a result, the output voltage Vout of the switching power supply circuit 10 rises. Therefore, when the switching power supply circuit 10 operates in "normal mode," it is able to generate an output voltage Vout at the target level.

[0080] == Signals Vb1 and Vb2 of "Low-Frequency Burst Mode" ==

[0081] The oscillation circuit 90, buffer 91, inverter 92, and low-frequency burst control circuit 93 are modules that output signals Vb1 and Vb2 to cause the switching power supply circuit 10 to operate in "low-frequency burst mode" when the control signal CONT representing "low-frequency burst mode" is input.

[0082] The low-frequency burst control circuit 93 controls the operation of the oscillation circuit 90 to intermittently stop the switching cycle. If the feedback voltage Vfb rises and is higher than "voltage V3", the low-frequency burst control circuit 93 causes the oscillation circuit 90 to operate and generates an oscillation signal Vosc corresponding to the feedback voltage Vfb.

[0083] On the other hand, if the feedback voltage Vfb decreases and falls below "voltage V4", the low-frequency burst control circuit 93 stops the operation of the oscillation circuit 90.

[0084] Figure 6 This is a diagram used to illustrate the timing of signals Vb1 and Vb2 that generate the "low-frequency burst mode".

[0085] For example, at time t10, if the feedback voltage Vfb rises and becomes "voltage V3", an oscillation signal Vosc is generated. Then, buffer 91 outputs a signal Vb1 with the same logic level as the oscillation signal Vosc, and inverter 92 outputs a signal Vb2 that inverts the logic level of the oscillation signal Vosc. As a result, the signals Vb1 and Vb2 in the "low-frequency burst mode" become... Figure 4 The signals Va1 and Va2 shown have the same waveform.

[0086] Furthermore, when the control signal CONT, representing "low-frequency burst mode," is input, selector 96 selects the output signals Vb1 and Vb2 of buffer 91 and inverter 92, and outputs them as drive signals Vdr1 and Vdr2. As a result, NMOS transistors 22 and 23 are driven based on the "low-frequency burst mode" signals Vb1 and Vb2.

[0087] If NMOS transistors 22 and 23 are driven at time t10, the output voltage Vout rises. Therefore, the feedback voltage Vfb decreases slightly after time t10. For example, if the feedback voltage Vfb decreases at time t11 and becomes "voltage V4", the generation of the oscillation signal Vosc stops.

[0088] As a result, the output voltage Vout decreases because the switching of NMOS transistors 22 and 23 also stops. Slightly after time t11, the feedback voltage Vfb rises; for example, if at time t12 the feedback voltage Vfb becomes "voltage V3", an oscillation signal Vosc is generated. Consequently, NMOS transistors 22 and 23 are driven based on signals Vb1 and Vb2. Furthermore, after time t12, the operation from time t10 to time t12 is repeated.

[0089] As described above, the low-frequency burst control circuit 93 controls the oscillation circuit 90 based on the control signal CONT, which represents the "low-frequency burst mode", thereby enabling the switching power supply circuit 10 to operate in the "low-frequency burst mode".

[0090] in addition, Figure 6 The period from t10 to t12 is defined as Ta, representing one cycle of the "low-frequency burst mode". In this embodiment, voltages V3 and V4 are set, as well as the resistance value R of resistor 70 that generates the feedback voltage Vfb (refer to...). Figure 2 ), so that during the period Ta, the "stop period" of the switch is long enough compared to the "switch period".

[0091] ==Pulse signals Vp1 and Vp2 in "High-Frequency Burst Mode"==

[0092] The timer 94 and pulse circuit 95 are modules that output signals Vp1 and Vp2 to enable the switching power supply circuit 10 to operate in "high frequency burst mode" when the control signal CONT representing "high frequency burst mode" is input.

[0093] Timer 94 repeatedly measures one cycle of the "high-frequency burst mode" for a period Tb, and pulse circuit 95 outputs a total of three pulse signals Vp1 and Vp2 within the specified timing period Tb based on the measurement time of timer 94.

[0094] Figure 7 This is a diagram used to illustrate the timing of the pulse signals Vp1 and Vp2 that generate the "high-frequency burst mode".

[0095] For example, at time t20, if timer 94 starts measuring time, then pulse circuit 95 outputs a pulse signal Vp2 at level "H" until the timing reaches time t21.

[0096] Here, when the control signal CONT, indicating "high-frequency burst mode," is input, selector 96 selects pulse signals Vp1 and Vp2 and outputs them as drive signals Vdr1 and Vdr2. Therefore, if a "H" level pulse signal Vp2 is output at time t20 to t21, the drive signal Vdr2 becomes "H" level, and NMOS transistor 23 is turned on.

[0097] Furthermore, if time t21 is reached, the pulse circuit 95 outputs a "H" level pulse signal Vp1 based on the output of the timer 94 until the timing reaches time t22. As a result, during the period from time t21 to t22, the drive signal Vdr1 becomes "H" level, and the NMOS transistor 22 is turned on.

[0098] Furthermore, if time t22 is reached, the pulse circuit 95 outputs a "H" level pulse signal Vp2 based on the output of the timer 94 until the timing reaches time t23. As a result, during the period from time t21 to t22, the drive signal Vdr2 becomes "H" level, and the NMOS transistor 23 is turned on.

[0099] Then, based on the measurement time of timer 94, pulse circuit 95 stops generating pulse signals Vp1 and Vp2 during the period from t23 to t24. Furthermore, if it becomes t24 after a period Tb has elapsed from t20, the measurement time of timer 94 is reset, and thus the operation from t20 to t24 is repeated.

[0100] As described above, the timer 94 and the pulse circuit 95 generate pulse signals Vp1 and Vp2 based on the control signal CONT, which represents a "high-level burst mode", thereby enabling the switching power supply circuit 10 to operate in a "high-frequency burst mode".

[0101] In addition, in this embodiment, the "switching period" per unit time of the "high-frequency burst mode" is designed to be long enough compared to the "switching period" per unit time of the "low-frequency burst mode".

[0102] Therefore, in this embodiment, in the three operating modes described above, the switching period per unit time is shortened whenever the system switches from "normal mode" to "high-frequency burst mode" and from "high-frequency burst mode" to "low-frequency burst mode". If the switching period is shortened, the power consumption in, for example, the NMOS transistors 22 and 23 with large gate capacitances or the drive circuit 77 is reduced.

[0103] The result is, for example, such as Figure 8 As shown, as the power consumption of load 11 decreases, the efficiency of the switching power supply circuit 10 can be improved over a wider range by shifting the "operating mode" of the switching power supply circuit 10 from "normal mode" to "high frequency burst mode" and then to "low frequency burst mode".

[0104] <<About Control Circuits 76>>

[0105] Figure 2 The control circuit 76 is a state machine that controls various actions of the drive signal output circuit 75 based on feedback voltages Vfb, Vca, and Vc. For example, the control circuit 76 generates a control signal CONT for switching the "operation mode" of the switching power supply circuit 10 based on the power consumption of the load 11. Furthermore, the "state machine" is, for example, a logic circuit synthesized from logic, that causes the output state to change according to input conditions.

[0106] Figure 9 This is a graph showing the relationship between the feedback voltage Vfb and voltage Vca, which vary according to the power consumption of load 11, and the transition conditions of the "operating mode". Here, if the power consumption of load 11 decreases, the output voltage Vout increases, and therefore the feedback voltage Vfb decreases. Conversely, if the power consumption of load 11 decreases, the voltage Vca decreases. Furthermore, in... Figure 9 The text only explains the relationship between the levels of feedback voltage Vfb and voltage Vca and the transfer conditions. Therefore, the "transfer time" when the "operation mode" is transferred will be explained later.

[0107] In this embodiment, for example, if the power consumption of the load 11 is large, the feedback voltage Vfb is higher than the voltage V5 or the voltage Vca is higher than the voltage V7, the "operation mode" is set to the "normal mode". Additionally, hereinafter, the case where the feedback voltage Vfb is higher than the voltage V5 or the voltage Vca is higher than the voltage V7 is set as "Condition 1".

[0108] Further, if the power consumption of the load 11 becomes small, the feedback voltage Vfb becomes lower than the voltage V6 (<V5), and the voltage Vca becomes lower than the voltage V8 (<V7), the "operation mode" is set to the "high-frequency burst mode". Additionally, hereinafter, the case where the feedback voltage Vfb is lower than the voltage V6 and the voltage Vca is lower than the voltage V8 is set as "Condition 2".

[0109] Moreover, if the power consumption of the load 11 becomes very small, the feedback voltage Vfb becomes lower than the voltage V6, and the voltage Vca becomes lower than the voltage V10 (<V8), the "operation mode" is set to the "low-frequency burst mode". Additionally, hereinafter, the case where the feedback voltage Vfb is lower than the voltage V6 and the voltage Vca is lower than the voltage V10 is set as "Condition 3".

[0110] Furthermore, when the "operation mode" is the "low-frequency burst mode", if the power consumption of the load 11 increases, the feedback voltage Vfb becomes higher than the voltage V5 (>V6), or the voltage Vca becomes higher than the voltage V9 (V8<V9<V10), the "operation mode" is set to the "normal mode". Additionally, hereinafter, the case where the feedback voltage Vfb is higher than the voltage V5 or the voltage Vca is higher than the voltage V8 is set as "Condition 4".

[0111] <<Regarding State Transition>>

[0112] Figure 10 is a state transition diagram for explaining the relationship between the input conditions for the control circuit 76 and the control signal CONT, Figure 11 is a state transition table.

[0113] <<Transition within the "Normal Mode">>

[0114] Here, when the input conditions for the control circuit 76 satisfy "Condition 1 (Vfb>V5, or Vca>V7)", it is set that the "operation mode" is the "normal mode".

[0115] However, as described above, since the voltage Vca input to the control circuit 76 is generated by filtering the voltage corresponding to the resonance current of the primary coil L1 using the capacitor 54 and the resistor 57, even if the state of the load 11 changes, the voltage Vca input to the control circuit 76 does not change immediately.

[0116] On the other hand, since the feedback voltage Vfb is a voltage generated by using the current I1 from the phototransistor 59 and the resistor 70, if the state of the load 11 changes, the feedback voltage Vfb changes in a shorter time compared to the voltage Vca. Thus, in the present embodiment, in the "normal mode", for example, if the load 11 becomes a light load and only the feedback voltage Vfb becomes lower and is lower than the voltage V20 of a specified level, the process of stopping the switch operation is temporarily executed. In addition, the "specified level" for stopping the switch operation corresponds to the "second level".

[0117] Specifically, in the "normal mode", if the feedback voltage Vfb is lower than the voltage V20 of the specified level, the control circuit 76 outputs a control signal CONT indicating "stop" (process S10). As a result, since Figure 3 the operation of the oscillating circuit 90 stops, the switch operation stops, and the overshoot of the output voltage Vout is suppressed.

[0118] In addition, in the "normal mode", if the feedback voltage Vfb rises to a voltage V21 (> voltage V20) greater than the specified level, the control circuit 76 outputs a control signal CONT indicating "operation" (process S11). As a result, since the oscillating circuit 90 generates an oscillating signal Vosc, the switch operation is executed, and an output voltage Vout of a target level is generated. In addition, in the present embodiment, the voltage V21 is a voltage lower than the voltage V6, and among the voltages V5, V6, V20, and V21, the relationship V5 > V6 > V21 > V20 holds.

[0119] <<Transfer from "normal mode" to "high-frequency burst mode">>

[0120] However, for example, when the load 11 changes transiently, if the "operation mode" of the switching power supply circuit 10 is immediately transferred to another mode, the output voltage Vout may deviate greatly from the target level.

[0121] Thus, in the present embodiment, the control circuit 76 determines whether the time when the load 11 becomes a light load is the "specified time Tx".

[0122] Therefore, if the load 11 becomes a light load and the period during which the input condition for the control circuit 76 satisfies "condition 2 (Vfb < V6 and Vca < V8)" lasts for the "specified time Tx", the control circuit 76 outputs a control signal CONT indicating "high-frequency burst mode" (process S20).

[0123] As a result, the "operation mode" of the switching power supply circuit 10 is transferred to the "high-frequency burst mode".

[0124] <<Transfer from "normal mode" to "low-frequency burst mode">>

[0125] For example, if load 11 becomes a lighter load (or no load), the input condition for control circuit 76 satisfies "Condition 3 (Vfb < V6 and Vca < V10)" and the period during which "Condition 3" is satisfied lasts for "prescribed time Tx", then control circuit 76 outputs a control signal CONT indicating "low-frequency burst mode" (processing S21).

[0126] As a result, the "operation mode" of switching power supply circuit 10 transfers to "low-frequency burst mode".

[0127] However, sometimes the feedback voltage Vfb is lower than the prescribed level voltage V20, and process S10 is executed to stop the switch. When "Condition 3 (Vfb < V6 and Vca < V10)" is satisfied, in process S21, if the "prescribed time Tx" has not elapsed, the operation of "low-frequency burst mode" does not start, so the power supply voltage Vcc may decrease excessively, which may cause control IC40 to not operate properly.

[0128] Therefore, in the present embodiment, even when the input condition for control circuit 76 does not satisfy "Condition 3 (Vfb < V6 and Vca < V10)", if the feedback voltage Vfb is lower than the prescribed level voltage V20 and process S10 is executed, and if voltage Vc becomes the "L" level, that is, the power supply voltage Vcc becomes lower than "voltage V2", then control circuit 76 outputs a control signal CONT indicating "low-frequency burst mode" (processing S22). Additionally, the condition for executing process S22 (hereinafter referred to as "Condition 5") is that the feedback voltage Vfb < V20 and the power supply voltage Vcc < V2.

[0129] As a result, before "Condition 3" is satisfied and the "prescribed time Tx" has elapsed, switching power supply circuit 10 operates in "low-frequency burst mode", so it is possible to prevent the excessive decrease of the power supply voltage Vcc.

[0130] In addition, in the present embodiment, for example, the state of satisfying "Condition 3 (Vfb < V6 and Vca < V10)" corresponds to a "light load state". Furthermore, process S21 corresponds to a "first transition condition" that includes time in the condition, and process S22 corresponds to a "second transition condition" that does not include time in the condition. In addition, voltage V2 corresponds to a "first level", and "low-frequency burst mode" corresponds to a "first burst mode".

[0131] <<<Transfer from "high-frequency burst mode">>>

[0132] When the switching power supply circuit 10 operates in the "high-frequency burst mode", if the input conditions for the control circuit 76 satisfy "Condition 3 (Vfb < V6 and Vca < V10)" and the period during which "Condition 3" is satisfied lasts for "prescribed time Tx", the control circuit 76 outputs a control signal CONT indicating the "low-frequency burst mode" (process S30). As a result, the "operation mode" of the switching power supply circuit 10 transfers to the "low-frequency burst mode".

[0133] In addition, when the switching power supply circuit 10 operates in the "high-frequency burst" mode, similar to when it operates in the "low-frequency burst" mode, if the "Condition 5 (Vfb < V20 and Vcc < V2)" that does not include time is satisfied, the control circuit 76 outputs a control signal CONT indicating the "low-frequency burst mode" (process S31).

[0134] On the other hand, if the input conditions for the control circuit 76 satisfy "Condition 1 (Vfb > V5 or Vca > V7)", the control circuit 76 outputs a control signal CONT indicating the "normal mode" (process S32). As a result, the "operation mode" of the switching power supply circuit 10 transfers to the "normal mode".

[0135] <<<Transfer from the "low-frequency burst mode">>>

[0136] When the switching power supply circuit 10 operates in the "low-frequency burst" mode, if the input conditions for the control circuit 76 satisfy "Condition 4 (Vfb > V5 or Vca > V9)", the control circuit 76 outputs a control signal CONT indicating the "normal mode" (process S40). As a result, the "operation mode" of the switching power supply circuit 10 transfers to the "normal mode".

[0137] Although details will be described later, in the present embodiment, when the switching power supply circuit 10 operates in the "low-frequency burst mode", if the power consumption of the load 11 increases, the "operation mode" transfers to the "normal mode" rather than the "high-frequency burst mode". When the switching power supply circuit 10 operates in the "normal mode", the output voltage Vout can be stabilized in a short time. Therefore, in the present embodiment, if the power consumption of the load 11 increases, it is transferred from the "low-frequency burst mode" to the "normal mode" rather than the "high-frequency burst mode".

[0138] <<Standby time after the "operation mode" transfer>>

[0139] As described above, if the input to the control circuit 76 satisfies a specified condition, although the "operation mode" changes, the standby time after the change can be set. Specifically, after the control circuit 76 changes the "operation mode", reception of an input, that is, change of the operation mode, is prohibited until a specified "standby time T1 (first period)" elapses. As a result, the control signal CONT indicating the "operation mode" is continuously output for at least the "standby time T1 (first period)". Thereby, it is possible to prevent excessive switching of the "operation mode" and to prevent the operation of the switching power supply circuit 10 from becoming unstable.

[0140] In the present embodiment, when changing from the "normal mode", which is the operation mode corresponding to the load with the lowest power consumption, to the "low-frequency burst mode" or the "high-frequency burst mode", this "standby time T1" is set. Further, the "standby time T1" can be set only in either one of the cases of changing from the "normal mode" to the "low-frequency burst mode" and changing from the "normal mode" to the "high-frequency burst mode".

[0141] === Operation of Switching Power Supply Circuit 10 ===

[0142] Figure 12 This is a diagram for explaining the operation of the switching power supply circuit 10 when the state of the load 11 becomes a light load. Here, it is assumed that the switching power supply circuit 10 operates in the "normal mode" before time t30.

[0143] First, at time t30, if the state of the load 11 becomes a light load, the output voltage Vout increases, so the feedback voltage Vfb decreases and the voltage Vca decreases.

[0144] Then, at time t31, if the feedback voltage Vfb decreases to the "voltage V20", the control circuit 76 outputs a control signal CONT indicating "stop" ( Figure 10 processing S10). As a result, the switching operation stops and the increase of the output voltage Vout stops.

[0145] In addition, at time t32, if the "condition 3 (Vfb < V6 and Vca < V10)" is satisfied, measurement of a "specified time Tx" is started in order to change the control circuit 76 to the "low-frequency burst mode".

[0146] At this time, since the switching operation stops at time t31, the power supply voltage Vcc decreases significantly. In addition, this timing is the timing before the "specified time Tx" elapses for changing to the "low-frequency burst mode", so the switching power supply circuit 10 does not operate.

[0147] If the time becomes t33, the power supply voltage Vcc decreases; if the time becomes V2, the control circuit 76 outputs a control signal CONT indicating "low-frequency burst mode". Figure 10 Processing S22). That is, if condition 3 is met, processing S22 is executed before the specified time Tx has elapsed. As a result, the "operating mode" of the switching power supply circuit 10 is switched to "low-frequency burst mode".

[0148] If the feedback voltage Vfb rises as the output voltage Vout decreases and becomes voltage V3 at time t34, a switching action is performed. As a result, because the power supply voltage Vcc rises, it is possible to prevent the power supply voltage Vcc of control IC40 from dropping excessively.

[0149] Furthermore, if a switching action is performed at time t34, the output voltage Vout rises, thus the feedback voltage Vfb decreases. Additionally, the power dissipation on load 11 increases with the rise in output voltage Vout, therefore voltage Vca rises.

[0150] If the feedback voltage Vfb decreases at time t35 and becomes voltage V4, the switching operation stops. As described above, when the load 11 is under light load, the switching power supply circuit 10 operates in "low-frequency burst mode" due to the intermittent stopping of the switch, thereby improving efficiency and generating the target level output voltage Vout.

[0151] in addition, Figure 12 Not illustrated, but for example, if the power consumption of load 11 increases after a standby time T1 followed by time t36 from time t33, the output voltage Vout decreases and the feedback voltage Vfb increases. If condition 4 (Vfb>V5 or Vca>V9) is met, the control circuit 76 outputs a control signal CONT indicating "normal mode". Figure 10 (Process S40). As a result, the switching power supply circuit 10 operates in "normal mode".

[0152] Furthermore, after t36, when Vca is high (Vca>V9), the control circuit 76 outputs a control signal CONT indicating "normal mode". Figure 10 (Process S40). As a result, the switching power supply circuit 10 operates in "normal mode".

[0153] Compared to operating in "high-frequency burst mode", the switching period is longer when the switching power supply circuit 10 operates in "normal mode". Therefore, by changing the "operating mode" of the switching power supply circuit 10 from "low-frequency burst mode" to "normal mode", the decrease in output voltage Vout can be suppressed even when the power consumption of load 11 increases significantly.

[0154] ===Others===

[0155] For example, when the switching power supply circuit 10 operates in the "normal mode", if the switching frequency becomes very high, the power consumption of the NMOS transistors 22, 23, etc. increases, and thus the power supply voltage Vcc may decrease significantly. Therefore, for example, it can be set that if the power supply voltage Vcc becomes lower than the "voltage V2", the control circuit 76 outputs a control signal CONT indicating the "low-frequency burst mode".

[0156] That is, it is set that in Figure 10 processing S22, if the "condition 5 (Vfb < V20 and Vcc < V2)" is satisfied, then it transfers to the "low-frequency burst mode". However, it can be transferred to the "low-frequency burst mode" only when the power supply voltage Vcc is lower than the voltage V2. By setting the structure as above, it is possible to prevent the situation where the power supply voltage Vcc of the control IC40 is excessively reduced.

[0157] In addition, although the control IC40 of the present embodiment is applicable to the LLC current resonant type converter, that is, the switching power supply circuit 10, it is not limited thereto. For example, it can also be applicable to a flyback type switching power supply circuit. In the switching power supply circuit 10, the NMOS transistors 22, 23 that control the current of the primary coil L1 correspond to the first and second transistors.

[0158] In addition, although it is set that the control circuit 76 is a logic circuit that changes the control signal CONT according to the input conditions, it is not limited thereto. For example, it can also be a microcomputer (control unit) that executes a program stored in a memory (not shown). In addition, for the drive signal output circuit 75, it can be implemented by using a function module (for example, a drive signal output unit) of the microcomputer. In the case of using such a microcomputer, the same functions as those of the present embodiment can also be achieved.

[0159] In addition, in the present embodiment, the AD converters 71, 73 convert the feedback voltage Vfb and the voltage Vca as digital values, and the digital control circuit 78 outputs the drive signals Vdr1, Vdr2, but it is not limited thereto. For example, the control IC40 can include various analog circuits and digital circuits so that the drive signals Vdr1, Vdr2 similar to those of the present embodiment are output based on the analog values of the feedback voltage Vfb and the voltage Vca. In such a case, the same effects as those of the present embodiment can also be obtained.

[0160] ===Summary===

[0161] As described above, the switching power supply circuit 10 of the present embodiment has been described. When the switching power supply circuit 10 operates in the "normal mode", if the "first transition condition" in which condition 3 persists for the "prescribed time Tx" is satisfied, or the condition 5 (Vfb < V20 and Vcc < V2) without time corresponding to the "second transition condition" is satisfied, the switching power supply circuit 10 operates in the "low-frequency burst mode". Thereby, it is possible to suppress the decrease in the power supply voltage Vcc and improve the efficiency of the switching power supply circuit 10. Therefore, the switching power supply circuit 10 can operate in an appropriate "operation mode".

[0162] In addition, if the state where the load 11 is a light load persists, as a result, for example, condition 3 persists for the "prescribed time Tx" and the "first transition condition" is satisfied. Therefore, if the state where the load 11 is a light load persists, the switching power supply circuit 10 can reliably transition to the "low-frequency burst mode".

[0163] In addition, for example, when the switching power supply circuit 10 operates in the "normal mode", if the switching frequency becomes very high, the power supply voltage Vcc may sometimes decrease significantly. For example, if the power supply voltage Vcc becomes lower than the "voltage V2 (first level)", by transitioning to the "low-frequency burst mode", it is possible to prevent the power supply voltage Vcc of the control IC 40 from decreasing excessively. Thus, by adopting the above structure, the switching power supply circuit 10 can operate in an appropriate "operation mode".

[0164] In addition, for example, when the load 11 is in a light load state and the power supply voltage Vcc is lower than the "voltage V2", the control circuit 76 causes the "operation mode" to transition to the "low-frequency burst mode". Therefore, the efficiency of the switching power supply circuit 10 can be improved.

[0165] In addition, in the present embodiment, for example, it is determined whether the load 11 is a light load based on whether the "condition 3 (Vfb < V6 and Vca < V10)" is satisfied, but it is not limited thereto. For example, the control circuit 76 can determine whether the load 11 is a light load based on either the state where the feedback voltage Vfb is lower than the voltage V6 or the state where the voltage Vca is lower than the voltage V10. In such a case, it is also possible to accurately determine whether the load 11 is a light load.

[0166] In addition, when the output voltage Vout rises when the load 11 becomes a light load and the feedback voltage Vfb becomes the voltage V20 of a prescribed level, the control circuit 76 stops the switching operation (for example, Figure 10(Processing S10). This suppresses overshoot of the output voltage Vout. Furthermore, if processing S10 is performed, the power supply voltage Vcc drops significantly. In this embodiment, if the power supply voltage Vcc becomes "voltage V2" before the light load condition lasts for a "predetermined time Tx", it immediately switches to "low-frequency burst mode". Therefore, it prevents a significant drop in the power supply voltage Vcc.

[0167] Furthermore, when the switching power supply circuit 10 operates in "normal mode," the control circuit 76 changes the "operating mode" to "high-frequency burst mode" or "low-frequency burst mode" based on the power consumption of the load 11. On the other hand, when the switching power supply circuit 10 operates in "low-frequency burst mode," if the power consumption of the load 11 increases, the control circuit 76 will definitely change the "operating mode" back to "normal mode." As a result, the output voltage Vout can be more stable even when the power consumption of the load 11 increases and it becomes a heavy load.

[0168] Furthermore, when switching from "normal mode" to "high-frequency burst mode" or "low-frequency burst mode", the control circuit 76 does not change the "operating mode" until at least the predetermined "standby time T1" has elapsed. Therefore, excessive switching of the operating mode of the switching power supply circuit 10 can be prevented, and the operation of the switching power supply circuit 10 can be prevented from becoming unstable.

[0169] As described above, in this embodiment, the "operating mode" of the switching power supply circuit 10 is directly changed from the "low-frequency burst mode" (where the power consumption of the load 11 is the lowest among multiple "burst modes") to the "normal mode". Therefore, especially when the load 11 becomes a heavy load, it is not necessary to use all the "burst modes" sequentially in order to stabilize the output voltage Vout.

[0170] In addition, in this embodiment, the "burst mode" is set to two: "low-frequency burst mode" and "high-frequency burst mode," but for example, there could be three or more "burst modes." In this case, by directly switching from the "burst mode" with the lowest power consumption of load 11 to the "normal mode" without going through other "burst modes," the same effect as in this embodiment can be obtained.

[0171] Furthermore, although the signals generated when "low-frequency burst mode" and "high-frequency burst mode" are selected, for example... Figure 4 , Figure 5 , Figure 7 The diagram is shown, but it is not limited to this. For example, any signal can be used as long as it can intermittently stop the switching action.

[0172] The above embodiments are provided for ease of understanding of the present invention and are not intended to limit the scope of the invention. Furthermore, the present invention can be modified or improved without departing from its spirit, and its equivalents are naturally included.

[0173] Label Explanation

[0174] 10. Switching power supply circuit.

[0175] 11 Load,

[0176] 20, 21, 32, 50-54 capacitors

[0177] 22, 23 NMOS transistors,

[0178] 24. Transformer

[0179] 25. Control module

[0180] 30, 31, 58 diodes

[0181] 33. Constant voltage circuit.

[0182] 34 LEDs, 40 control ICs

[0183] 55-57, 70 resistors

[0184] 59. Phototransistor

[0185] 71, 73 AD converters,

[0186] 72 Load detection circuit,

[0187] 74 comparators

[0188] 75 Drive signal output circuit,

[0189] 76. Control circuit.

[0190] 77. Drive circuit

[0191] 78. Digital control circuits.

[0192] 90 oscillation circuit,

[0193] 91 Buffer,

[0194] 92 Inverter

[0195] 93. Low-frequency burst control circuit.

[0196] 94 Timer

[0197] 95 pulse circuit,

[0198] 96 Selector.

Claims

1. A switch control circuit, The transformer comprises: a primary coil disposed on the primary side, a secondary coil disposed on the secondary side, and an auxiliary coil electromagnetically coupled to the primary coil or the secondary coil; and a transistor for controlling the current of the primary coil. The switching control circuit operates based on a power supply voltage corresponding to the voltage of the auxiliary coil from a power supply circuit that generates a target level output voltage on the secondary side, and controls the switching of the transistor. The switching control circuit is characterized by comprising: A drive signal output circuit outputs a drive signal corresponding to the operating modes of the power supply circuit, including normal mode and burst mode. A driving circuit that switches the transistor based on the output of the driving signal output circuit; as well as The control circuit receives the power supply voltage, a feedback voltage corresponding to the output voltage, and a voltage corresponding to the input power on the primary side as inputs. Based on the feedback voltage and / or the voltage corresponding to the input power on the primary side, it is determined whether the load is in a light load state. If the first transition condition, which includes time, is met, then the drive signal output circuit outputs the drive signal that causes the power supply circuit to operate in burst mode. If the second transition condition, which does not include time, is met, then the drive signal output circuit outputs the drive signal that causes the power supply circuit to operate in normal mode. If the first transition condition, including the condition that the light load state lasts for a specified time, is met, then the drive signal output circuit outputs the drive signal that causes the power supply circuit to operate in burst mode. When the power supply circuit operates in burst mode, if the second transition condition is met, including the case where the feedback voltage is higher than a threshold level or the voltage corresponding to the input power on the primary side is higher than other threshold levels, then the drive signal output circuit outputs the drive signal that causes the power supply circuit to operate in normal mode.

2. The switch control circuit as described in claim 1, characterized in that, If the output voltage rises above the target level, and the feedback voltage corresponding to the output voltage becomes a threshold level, then the control circuit causes the drive circuit to stop driving the transistor.

3. The switch control circuit as described in claim 1, characterized in that, When the power supply circuit operates in normal mode, if the power consumption of the load decreases, the control circuit causes the drive signal output circuit to output the drive signal. The drive signal causes the power supply circuit to operate in an operating mode corresponding to the power consumption of the load, which is one of multiple burst modes, including the burst mode. When the power supply circuit operates in the operating mode corresponding to the load with the lowest power consumption among the plurality of burst modes, if the power consumption of the load increases, the control circuit causes the drive signal output circuit to output the drive signal that causes the power supply circuit to operate in the normal mode.

4. The switch control circuit as described in claim 3, characterized in that, When transitioning from the operating mode corresponding to the load with the lowest power consumption to the normal mode, the control circuit causes the drive signal output circuit to output the drive signal that causes the power supply circuit to operate in the normal mode for at least a first period.

5. A switch control circuit, characterized in that, The circuit comprises: a transformer including a primary coil disposed on the primary side, a secondary coil disposed on the secondary side, and an auxiliary coil electromagnetically coupled to the primary coil or the secondary coil; a capacitor connected to the primary coil; and a first transistor and a second transistor for controlling the resonant current of the primary coil and the capacitor. The switching control circuit operates based on a power supply voltage corresponding to the voltage of the auxiliary coil from a power supply circuit that generates a target level output voltage on the secondary side, and controls the switching of the transistors. The switching control circuit is characterized by including: A drive signal output circuit outputs a drive signal corresponding to the operating modes of the power supply circuit, including a normal mode, a first burst mode, and a second burst mode. A driving circuit that switches the first transistor and the second transistor based on the output of the driving signal output circuit; and A control circuit sends a control signal to the drive signal output circuit, which causes the drive signal output circuit to output a drive signal for activating the power supply circuit. In the normal mode, the driving circuit performs a first switching action, in which the first transistor and the second transistor alternately turn on and off repeatedly. In the first burst mode, the driving circuit performs a second switching operation that alternates between a first operation in which the first transistor and the second transistor are alternately turned on and off, and a second operation in which both the first transistor and the second transistor are turned off. In the second burst mode, the driving circuit performs a third switching operation that alternates between a third operation in which the first transistor and the second transistor are alternately turned on and off, and a fourth operation in which both the first transistor and the second transistor are turned off. The first ratio of the first action period to the second action period is greater than the second ratio of the third action period to the fourth action period. If the power consumption of the load decreases when the power supply circuit operates in normal mode, then the control signal corresponds to the power consumption of the load in either the first burst mode or the second burst mode. If the power consumption of the load increases when the power supply circuit operates in the first burst mode or the second burst mode, then the control signal corresponds to the power consumption of the load in the normal mode.

6. The switch control circuit as described in claim 5, characterized in that, When transitioning from the first burst mode and the second burst mode to the normal mode, the control circuit causes the drive signal output circuit to output the drive signal that causes the power supply circuit to operate in the normal mode for at least a first period.

7. A power supply circuit, comprising: A transformer, comprising a primary coil disposed on the primary side, a secondary coil disposed on the secondary side, and an auxiliary coil electromagnetically coupled to the primary coil or the secondary coil; A transistor that controls the current in the primary coil; as well as A switching control circuit operates based on a power supply voltage corresponding to the voltage from the auxiliary coil, controlling the switching of the transistor. The power supply circuit generates a target level output voltage on the secondary side, characterized in that... The switch control circuit includes: A drive signal output circuit outputs a drive signal corresponding to the operating modes of the power supply circuit, including normal mode and burst mode. A driving circuit that switches the transistor based on the output of the driving signal output circuit; and The control circuit receives the power supply voltage, a feedback voltage corresponding to the output voltage, and a voltage corresponding to the input power on the primary side as inputs. Based on the feedback voltage and / or the voltage corresponding to the input power on the primary side, it is determined whether the load is in a light load state. If the first transition condition, which includes time, is met, then the drive signal output circuit outputs the drive signal that causes the power supply circuit to operate in burst mode. If the second transition condition, which does not include time, is met, then the drive signal output circuit outputs the drive signal that causes the power supply circuit to operate in normal mode. If the first transition condition, including the condition that the light load state lasts for a specified time, is met, then the drive signal output circuit outputs the drive signal that causes the power supply circuit to operate in burst mode. When the power supply circuit operates in burst mode, if the second transition condition is met, including the case where the feedback voltage is higher than a threshold level or the voltage corresponding to the input power on the primary side is higher than other threshold levels, then the drive signal output circuit outputs the drive signal that causes the power supply circuit to operate in normal mode.

8. A power supply circuit, comprising: A transformer, comprising a primary coil disposed on the primary side, a secondary coil disposed on the secondary side, and an auxiliary coil electromagnetically coupled to the primary coil or the secondary coil; A capacitor connected to the primary coil; A first transistor and a second transistor control the resonant current of the primary coil and the capacitor; as well as A switching control circuit operates based on a power supply voltage corresponding to the voltage from the auxiliary coil, controlling the switching of the transistor. The power supply circuit generates a target level output voltage on the secondary side, characterized in that... The switch control circuit includes: A drive signal output circuit outputs a drive signal corresponding to the operating modes of the power supply circuit, including a normal mode, a first burst mode, and a second burst mode. A driving circuit that switches the first transistor and the second transistor based on the output of the driving signal output circuit; and A control circuit sends a control signal to the drive signal output circuit, which causes the drive signal output circuit to output a drive signal for activating the power supply circuit. In the normal mode, the driving circuit performs a first switching action, in which the first transistor and the second transistor alternately turn on and off repeatedly. In the first burst mode, the driving circuit performs a second switching operation that alternates between a first operation in which the first transistor and the second transistor are alternately turned on and off, and a second operation in which both the first transistor and the second transistor are turned off. In the second burst mode, the driving circuit performs a third switching operation that alternates between a third operation in which the first transistor and the second transistor are alternately turned on and off, and a fourth operation in which both the first transistor and the second transistor are turned off. The first ratio of the first action period to the second action period is greater than the second ratio of the third action period to the fourth action period. If the power consumption of the load decreases when the power supply circuit operates in normal mode, then the control signal corresponds to the power consumption of the load in either the first burst mode or the second burst mode. If the power consumption of the load increases when the power supply circuit operates in the first burst mode or the second burst mode, then the control signal corresponds to the power consumption of the load in the normal mode.

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