MOSFET gate crosstalk clamp circuit, control method and controller
By designing a MOSFET gate crosstalk clamp circuit including a MOSFET driving unit, an anti-interference unit and a driving chip, the problem of SiC MOSFET being affected by crosstalk voltage during the switching process is solved, and effective suppression of positive and negative crosstalk voltages is achieved, and the stability and life of the equipment are improved.
Patent Information
- Application Number
- CN202110072434.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-01-19
- Publication Date
- 2025-04-18
- Estimated Expiration
- 2041-01-19
AI Technical Summary
SiC MOSFETs are susceptible to crosstalk voltage during switching, resulting in mis-opening, overheating and even damage. The existing PNP transistor clamping schemes are risky and cannot effectively suppress both positive and negative crosstalk voltages.
A MOSFET gate crosstalk clamping circuit is designed, including a MOSFET driving unit, an anti-interference unit and a driving chip. The crosstalk voltage is received and leaked through the anti-interference unit. The driving chip controls the leakage unit and the clamping unit to reduce the crosstalk voltage.
It effectively isolates the gate of the MOSFET drive unit, reduces the crosstalk voltage, suppresses the forward crosstalk voltage caused by Miller capacitors and stray inductors, and also suppresses the negative crosstalk voltage, improving the switching stability and life of the SiC MOSFET.
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Figure CN112688289B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of electric control technology, and in particular to a MOSFET gate crosstalk clamping circuit, a control method and a controller. Background Art
[0002] Taking a half-bridge circuit as an example, during the turn-on process of the upper bridge IGBT (Insulated Gate Bipolar Transistor) / MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), excessively high dv / dt (voltage change rate) will generate a displacement current on the Miller capacitance of the lower bridge IGBT / MOSFET. The displacement current flows to the ground through the drive resistor, causing the gate voltage to rise. If the raised voltage is greater than the turn-on threshold of the IGBT / MOSFET, the lower bridge IGBT / MOSFET will be turned on for tens or hundreds of nanoseconds, causing additional switching losses, which may cause the IGBT / MOSFET to overheat or even be damaged.
[0003] In addition, due to problems with the IGBT / MOSFET packaging process, there is stray inductance between the emitter of the actual chip and the emitter of the external terminal of the IGBT / MOSFET module and single-tube IGBT / MOSFET device. During the IGBT / MOSFET switching process, once the current on the stray inductance changes, an induced voltage will be generated. This voltage may be superimposed on the driving voltage of the IGBT / MOSFET, causing the IGBT / MOSFET to be mistakenly turned on.
[0004] In order to reduce the magnitude of the crosstalk voltage caused by the above two risk factors, a common solution is to add a low-impedance discharge path to the gate loop. PNP transistors are usually used for clamping control. It is found from actual measurements that when PNP transistors are used for clamping, reverse voltage will be formed between transistors BE at both the turn-on and turn-off moments. The reverse voltage peak is large and may exceed the maximum value given in the specification of the selected transistor. Therefore, the PNP transistor clamping solution is risky. In the diode reverse recovery phase of the turn-on process, for IGBT / MOSFET with large source stray inductance, the conduction of the PNP transistor may cause the forward crosstalk voltage generated by the stray inductance to be larger. On the other hand, due to the existence of emitter stray inductance, the measured voltage between gate G and source E (emitter E) is not the gate and emitter voltage of the real IGBT chip, so the method of controlling the PNP turn-on by the voltage drop on the gate resistor may cause the PNP transistor to fail to turn on when the real gate crosstalk is large. For SiC MOSFET, its switching speed is faster and the crosstalk voltage is worse. In addition, due to the process problems of SiC MOSFET, its negative voltage tolerance is weak. Therefore, to suppress the SiC crosstalk voltage, not only the positive crosstalk voltage but also the negative crosstalk voltage should be considered. Summary of the invention
[0005] The main purpose of the present invention is to provide a MOSFET gate crosstalk clamp circuit, a control method and a controller, aiming to solve the technical problem of suppressing SiC MOSFET crosstalk voltage.
[0006] To achieve the above object, the present invention provides a MOSFET gate crosstalk clamping circuit, the MOSFET gate crosstalk clamping circuit comprising: a MOSFET driving unit, an anti-interference unit and a driving chip; wherein,
[0007] The gate of the MOSFET driving unit is connected to the first driving end of the driving chip, the first end of the anti-interference unit is connected to the gate of the MOSFET driving unit, and the second end of the anti-interference unit is connected to the negative voltage end or the ground end of the driving chip;
[0008] The anti-interference unit is used to receive the crosstalk voltage caused during the switching process of the MOSFET;
[0009] The driving chip is used to control the anti-interference unit to reduce the crosstalk voltage.
[0010] Preferably, the anti-interference unit includes a leakage unit and a clamping unit connected in parallel between the gate and the negative voltage end of the driving chip, the driving chip controls the on and off of the leakage unit, and the clamping unit receives and suppresses the inductive crosstalk voltage and capacitive crosstalk voltage of the MOSFET driving unit.
[0011] Preferably, the leakage unit includes a first diode and a MOS tube, the anode of the first diode is connected to the gate of the MOSFET driving unit, the cathode of the first diode is connected to the drain of the MOS tube, the source of the MOS tube is connected to the negative voltage end of the driving chip, and the gate of the MOS tube is connected to the second driving end of the driving chip.
[0012] Preferably, the clamping unit includes a first resistor and a second diode, one end of the first resistor is connected to the gate of the MOSFET driving unit, the other end of the first resistor is connected to the cathode of the second diode, and the anode of the second diode is connected to the negative voltage end of the driving chip.
[0013] Preferably, the anti-interference unit includes a leakage unit and a clamping unit connected in parallel between the gate and the ground terminal of the driving chip, the driving chip controls the on and off of the leakage unit, and the clamping unit receives and suppresses the inductive crosstalk voltage and capacitive crosstalk voltage of the MOSFET driving unit.
[0014] Preferably, the leakage unit includes a first diode and a MOS tube, the anode of the first diode is connected to the gate of the MOSFET driving unit, the cathode of the first diode is connected to the drain of the MOS tube, the source of the MOS tube is connected to the ground terminal of the driving chip, and the gate of the MOS tube is connected to the second driving terminal of the driving chip.
[0015] Preferably, the clamping unit includes a first resistor and a second diode, one end of the first resistor is connected to the gate of the MOSFET driving unit, the other end of the first resistor is connected to the cathode of the second diode, and the anode of the second diode is connected to the ground terminal of the driving chip.
[0016] In addition, to achieve the above object, the present invention further proposes a MOSFET gate crosstalk clamp circuit control method, the MOSFET gate crosstalk clamp circuit control method is based on the MOSFET gate crosstalk clamp circuit as described above, the method comprising:
[0017] The leakage unit receives the inductive crosstalk voltage and the capacitive crosstalk voltage transmitted by the gate of the MOSFET driving unit;
[0018] The driving chip controls the leakage unit to reduce the capacitive crosstalk voltage.
[0019] Preferably, the method further comprises: the clamping unit receiving and suppressing the inductive crosstalk voltage and the capacitive crosstalk voltage of the MOSFET driving unit;
[0020] The driving chip controls the clamping unit to suppress the inductive crosstalk voltage and the capacitive crosstalk voltage.
[0021] In addition, to achieve the above objective, the present invention further provides a controller, wherein the controller includes the MOSFET gate crosstalk clamping circuit as described above.
[0022] The present invention proposes a MOSFET gate crosstalk clamp circuit, the circuit includes: a MOSFET driving unit, an anti-interference unit and a driving chip; wherein the gate of the MOSFET driving unit is connected to the first driving end of the driving chip, the first end of the anti-interference unit is connected to the gate of the MOSFET driving unit, and the second end of the anti-interference unit is connected to the negative voltage end or the ground end of the driving chip; the anti-interference unit is used to receive the crosstalk voltage caused during the MOSFET switching process; the driving chip is used to control the anti-interference unit to reduce the crosstalk voltage. The MOSFET gate crosstalk clamp circuit isolates the gate of the MOSFET driving unit through damping and discharges the crosstalk voltage. It can suppress the magnitude of the forward crosstalk voltage caused by the Miller capacitance and the magnitude of the forward crosstalk voltage caused by the emitter stray inductance. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the structures shown in these drawings without paying creative work.
[0024] Figure 1 It is a structural schematic diagram of an embodiment of a MOSFET gate crosstalk clamping circuit of the present invention;
[0025] Figure 2 This is the first voltage change diagram during the MOSFET turn-on process;
[0026] Figure 3 A circuit diagram of an embodiment of a MOSFET gate crosstalk clamp circuit of the present invention;
[0027] Figure 4 Another circuit diagram of an embodiment of a MOSFET gate crosstalk clamping circuit of the present invention;
[0028] Figure 5 This is the second voltage change diagram during the MOSFET turn-on process;
[0029] Figure 6It is a flow chart of the first embodiment of the MOSFET gate crosstalk clamping circuit control method of the present invention.
[0030] Description of Figure Numbers:
[0031] Label name Label name 100 MOSFET driver unit R The first gate resistor 200 Anti-interference unit Rint Second gate resistor 201 Clamping unit R1 First resistor 202 Drainage unit D1~D2 First to second diode U1 Driver chip Q1 MOS tube V Power output C1~C2 First to second capacitor Clamp Clamp voltage terminal L Source inductance Vee Negative pressure end Q2 triode Gnd Grounding 101 MOSFET subunit
[0032] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION
[0033] It should be understood that the specific embodiments described herein are only used to explain the present invention, and are not used to limit the present invention.
[0034] The embodiment of the present invention provides a MOSFET gate crosstalk clamp circuit, referring to Figure 1 , Figure 1 The figure is a schematic structural diagram of an embodiment of a MOSFET gate crosstalk clamping circuit of the present invention.
[0035] It should be noted that the MOSFET gate crosstalk clamp circuit of the present invention is applicable to an upper bridge MOSFET or a lower bridge MOSFET. In this embodiment, the MOSFET gate crosstalk clamp circuit is set in the lower bridge as an example for description. In specific implementation, the MOSFET gate crosstalk clamp circuit is not limited to be used in the upper bridge or the lower bridge.
[0036] In one embodiment of the MOSFET gate crosstalk clamping circuit of the present invention, the MOSFET gate crosstalk clamping circuit includes: a MOSFET driving unit 100, an anti-interference unit 200 and a driving chip U1.
[0037] The gate of the MOSFET driving unit 100 is connected to the first driving end of the driving chip U1, the first end of the anti-interference unit 200 is connected to the gate of the MOSFET driving unit 100, the second end of the anti-interference unit 200 is connected to the negative voltage terminal Vee or the ground terminal Gnd of the driving chip U1, and the drain of the MOSFET driving unit 100 is connected to the source of the upper bridge MOSFET (the upper bridge MOSFET is not shown in the figure, but it does not affect the explanation of this embodiment). The MOSFET driving unit 100 in the embodiment of the present invention is a lower bridge MOSFET relative to the upper bridge MOSFET.
[0038] It is easy to understand that the factors affecting the crosstalk voltage mainly include the gate resistance, parasitic capacitance, and stray inductance, but the gate internal resistance, parasitic capacitance, and source stray inductance are all unchangeable. Therefore, an anti-interference unit 200 is provided in the embodiment of the present invention.
[0039] refer to Figure 2 , Figure 2 is the first voltage change diagram during the MOSFET turn-on process, and is the current change diagram during the turn-on process of the upper bridge MOSFET in the prior art. DS1 refers to the upper bridge voltage, I D1 refers to the upper bridge current; V DS2 refers to the lower bridge voltage, I F2 refers to the lower bridge current, V GS (t) refers to the voltage change value, V GS (miller) refers to the voltage value of the upper bridge Miller capacitor; V GS (th) refers to the voltage at which the upper bridge gate is turned on or off.
[0040] Phase t1: When the bridge V GS Reach the upper bridge gate turn-on threshold voltage V GSth After that, the upper bridge drain current starts to rise, and the lower bridge freewheeling diode current I F2 The voltage starts to drop, and a positive voltage is generated at the source of the lower bridge, which causes the potential of the lower bridge source to increase. Therefore, the lower bridge MOSFET is turned off more reliably. In addition, since the diode is turned on, the lower bridge V DS2 It is clamped at around -0.7V (negative voltage), and there is no risk of false turn-on at this stage.
[0041] Phase t2: The upper bridge MOSFET current reaches the maximum load current, and the lower bridge freewheeling diode current I D2 Decreases to zero and enters the reverse recovery phase. The voltage V DS1 Start descending, under the bridge V DS2 The voltage starts to rise, and the rising V DS2 The Miller capacitor is charged, causing the gate voltage of the lower bridge MOSFET to rise. Since the rate of change of the inductor current is still positive, diL / dt>0. In this stage, dvds / dt increases from zero, and diL / dt gradually decreases to zero, so the lower bridge V GS If dvds / dt is large, a higher charging voltage is generated on the Miller capacitor, and the lower bridge V GS It may increase to a larger value if the voltage exceeds the gate turn-on voltage V GSth , it will cause the lower bridge MOSFET to be turned on by mistake, so there is a risk of wrong turn-on at this stage.
[0042] The anti-interference unit 200 is used to receive the crosstalk voltage caused during the switching process of the MOSFET; the driving chip U1 is used to control the anti-interference unit 200 to reduce the crosstalk voltage.
[0043] Further, refer to Figure 3 , Figure 3This is a circuit diagram of an embodiment of a MOSFET gate crosstalk clamping circuit of the present invention. The anti-interference unit 200 includes a leakage unit 202 and a clamping unit 201 connected in parallel between the gate and the negative voltage terminal Vee of the driver chip U1. The driver chip U1 controls the on and off of the leakage unit 202. The clamping unit 201 receives and suppresses the inductive crosstalk voltage and the capacitive crosstalk voltage of the MOSFET driver unit 100.
[0044] It is easy to understand that during the turn-on process of the upper bridge MOSFET, the inductive crosstalk voltage of the upper positive and lower negative is mainly caused by the source stray inductance in the t1-2 stage, the leakage unit 202 is turned on, the gate equivalent resistance of the MOSFET driving unit is reduced, the RC time constant is reduced, and the inductive crosstalk voltage quickly reaches the minimum negative value. The reduced crosstalk voltage is less than the gate turn-on threshold of the MOSFET driving unit.
[0045] The source stray inductance causes an inductive crosstalk voltage with positive top and negative bottom. At this time, the leakage unit 202 is turned on to receive the driving voltage input from the negative voltage terminal Vee by the driving chip U1.
[0046] In this embodiment, one end of the leakage unit 202 is connected to the clamping voltage terminal Clamp, and the clamping voltage terminal Clamp can receive an external clamp signal. When the MOS is in the off state, the clamp signal will trigger the clamping MOS to turn on. Specifically: taking the turning on of the upper bridge MOSFET as an example, at this time the lower bridge MOSFET is in the off state, and the clamp signal will control the clamping MOS to turn on, so in the t1 stage, the clamping MOS is turned on, which will make the gate voltage increase negatively, which is helpful to suppress the positive crosstalk. If a PNP transistor clamp is used, it cannot be turned on in the t1 stage, and can only suppress the capacitive crosstalk.
[0047] It should be noted that in the t3 stage, the source induced voltage is reversed, the discharge unit 202 is turned off, and the clamping unit 201 is turned on. The clamping unit 201 includes a resistor. Through the damping effect of the resistor, the RC time constant of the reverse charging loop increases, the charging speed slows down, and the inductive crosstalk voltage is still negative and small, so the total crosstalk voltage is reduced.
[0048] It is easy to understand that during the t2 stage of the upper bridge MOSFET turn-on process, the capacitive crosstalk voltage caused by the Miller current increases in the positive direction, and the leakage unit 202 provides a low-impedance leakage path, through which the capacitive crosstalk voltage is discharged. During the turn-on process, when the source induced voltage is reversed, the leakage unit 202 is turned off and stops the leakage.
[0049] The present invention uses the above circuit, and the MOSFET gate crosstalk clamp circuit isolates the gate of the MOSFET driving unit through a damping effect, and discharges the crosstalk voltage at the same time, which can suppress the magnitude of the forward crosstalk voltage caused by the Miller capacitance, and can also suppress the magnitude of the forward crosstalk voltage caused by the source stray inductance.
[0050] Based on the first embodiment of the MOSFET gate crosstalk clamping circuit of the present invention, a second embodiment of the MOSFET gate crosstalk clamping circuit of the present invention is proposed, referring to Figure 3 , Figure 4 , Figure 3 FIG. 1 is a circuit diagram of an embodiment of a MOSFET gate crosstalk clamp circuit according to the present invention. Figure 4 FIG. 4 is another circuit diagram of an embodiment of a MOSFET gate crosstalk clamping circuit of the present invention.
[0051] It should be noted that the driver chip U1 includes a power output terminal Vo, a clamping voltage terminal Clamp, a negative voltage terminal Vee, and a ground Gnd. In this embodiment, there is no restriction on the type of the driver chip U1. The functions that the driver chip U1 can perform include but are not limited to output voltage, output clamping signal, output negative voltage power supply and grounding.
[0052] In a specific implementation, the negative voltage terminal Vee outputting a driving negative voltage is a negative voltage shutdown solution. When a zero volt shutdown solution is adopted, the negative voltage terminal Vee and the ground Gnd can be connected together.
[0053] The MOSFET driving unit 100 includes a transistor Q2, a first gate resistor Rg and a MOSFET sub-unit 101; wherein the gate of the transistor Q2 is connected to the power supply voltage terminal Vo, and the collector of the transistor Q2 is connected to the negative voltage terminal Vee (reference voltage V) of the driving chip U1. Figure 3 ) or ground terminal Gnd (reference Figure 4 ), the emitter of the transistor Q2 is connected to one end of the first gate resistor Rg, and the other end of the first gate resistor Rg is connected to one end of the leakage unit 202.
[0054] In this embodiment, for the convenience of explanation, based on Figure 3 The driving end of the MOSFET subunit 101 (refer to Figure 3In the embodiment, the first end of the second gate resistor Rint is connected to one end of the clamp unit 201, and one end of the MOSFET subunit 101 is grounded. The MOSFET subunit 101 includes: a second gate resistor Rint, first to second capacitors C1-C2, a source stray inductor L, a diode and a transistor. The first end of the second gate resistor Rint is connected to the second end of the first gate resistor Rg, the second end of the second gate resistor Rint is connected to the gate of the transistor, the first end of the first capacitor C1 is connected to the gate of the transistor, the second end of the first capacitor C1 is connected to the collector of the transistor, the collector of the transistor is also connected to the MOSFET unit of the other half bridge, the first end of the second capacitor C2 is connected to the gate of the transistor, the second end of the second capacitor C2 is connected to the emitter of the transistor, the emitter of the transistor is connected to the first end of the source stray inductance L, the second end of the source stray inductance L is grounded, the anode of the diode is connected to the collector of the transistor, and the cathode of the diode is connected to the collector of the transistor. In the specific implementation, the MOSFET subunit 101 may also be composed of other devices, which is not limited in this embodiment.
[0055] The clamping unit 201 includes a first resistor R1 and a second diode D2. The first end of the first resistor R1 is connected to the first end of the second gate resistor Rint, the second end of the first resistor R1 is connected to the cathode of the second diode D2, and the anode of the second diode D2 is connected to the negative voltage end Vee. The second diode D2 is used to be turned on when the gate of the MOSFET driving unit 100 is turned on, and receive the negative driving voltage input by the driving chip U1. The first resistor R1 is used to damp the negative driving voltage to obtain a damped driving voltage, and output the damped driving voltage to the second gate resistor Rint of the MOSFET driving unit 100.
[0056] It is easy to understand that when turned on, the second diode D2 is turned on, and the first resistor R1 plays a certain damping role, resulting in an increase in the RC time constant of the reverse charging loop, a slower charging speed, and a negative and small inductive crosstalk voltage, so the total crosstalk voltage is reduced.
[0057] The leakage unit 202 includes a first diode D1 and a MOS transistor Q1, wherein an anode of the first diode D1 is connected to a first end of the second gate resistor Rint, an anode of the first diode D1 is connected to a second end of the first gate resistor Rg, a cathode of the first diode D1 is connected to a drain of the MOS transistor Q1, a source of the MOS transistor Q1 is connected to the negative voltage terminal Vee, and a gate of the MOS transistor Q1 is connected to a clamping voltage terminal Clamp.
[0058] The first diode D1 and the MOS transistor Q1 are used to be turned on when the gate of the MOSFET driving unit 100 is turned on, receive the capacitive crosstalk voltage output by the gate of the MOSFET driving unit 100, and discharge the capacitive crosstalk voltage.
[0059] It should be noted that, during the turn-on process, the capacitive crosstalk voltage caused by the Miller current increases in the positive direction, the first diode D1 is forward-conducted, and a low-impedance discharge path is provided through the MOS tube Q1, so the forward capacitive crosstalk voltage decreases.
[0060] It is easy to understand that the clamping voltage terminal Clamp of the driver chip U1 outputs a clamping voltage signal to control the on and off of the MOS transistor Q1. During the on-state of the gate of the MOSFET driver unit 100, the driver chip U1 outputs a clamping voltage signal to control the on-state of the MOS transistor Q1.
[0061] It should be noted that during the turn-on process, when the source induced voltage is reversed, the first diode D1 is turned off and the leakage current stops.
[0062] The present invention uses the above circuit, and the MOSFET gate crosstalk clamp circuit isolates the gate of the MOSFET driving unit through a damping effect, and discharges the crosstalk voltage at the same time, which can suppress the magnitude of the forward crosstalk voltage caused by the Miller capacitance, and can also suppress the magnitude of the forward crosstalk voltage caused by the source stray inductance.
[0063] Based on the second embodiment of the MOSFET gate crosstalk clamping circuit of the present invention, a third embodiment of the MOSFET gate crosstalk clamping circuit of the present invention is proposed, referring to Figure 2 , Figure 2 FIG. 1 is a circuit diagram of an embodiment of a MOSFET gate crosstalk clamp circuit according to the present invention. Figure 4 , Figure 4 It is a second voltage variation diagram during the MOSFET turn-on process, and is a current variation diagram during the turn-on process of the upper bridge MOSFET in the prior art. Based on the first embodiment, the reference numerals are not repeated one by one.
[0064] It should be noted that, in the t7 stage: upper bridge V GS After it drops to a certain value, it is difficult to support the current channel current. The excess current is shunted through the output capacitor, and the voltage V DS Starts to rise, and at the same time the lower bridge MOSFET voltage V DS2 It starts to decrease, dvds / dt<0. Due to the reverse charging of the Miller capacitor, the gate potential decreases and the current remains basically unchanged. Therefore, there is no risk of mis-opening the tube at this stage.
[0065] The clamping unit 201 is also used to be turned off when the upper bridge MOSFET is turned off, and clamp the gate voltage of the MOSFET driving unit 100 at a preset driving negative voltage.
[0066] It should be noted that during the shutdown process, at stage t7, the change in Miller current will cause the gate crosstalk voltage to increase negatively, which may exceed the gate withstand voltage of the lower bridge MOSFET. The gate is directly clamped to the driving negative voltage through the clamping unit 201 to prevent the crosstalk negative voltage from exceeding the negative voltage limit, thereby adjusting the clamping effect of the negative voltage.
[0067] The second diode D2 is also used to be cut off when the upper bridge MOSFET is turned off, and clamp the gate voltage of the MOSFET driving unit 100 at a preset driving negative voltage.
[0068] It should be noted that during the shutdown process, the change in Miller current will cause the gate crosstalk voltage to increase negatively, which may exceed the gate withstand voltage of the MOSFET. The gate voltage is directly clamped to the driving negative voltage through the second diode D2 to prevent the crosstalk negative voltage from exceeding the negative voltage limit, and the second resistor R2 is used to adjust the clamping effect of the negative voltage.
[0069] The embodiment of the present invention can effectively suppress the magnitude of the positive crosstalk voltage during the turn-on period and the magnitude of the negative crosstalk voltage during the turn-off period through the above circuit. The crosstalk voltage during the turn-on period includes the magnitude of the positive crosstalk voltage caused by the Miller capacitance and the magnitude of the positive crosstalk voltage caused by the source stray inductance.
[0070] In addition, to achieve the above-mentioned purpose, the embodiment of the present invention also provides a MOSFET gate crosstalk clamping circuit control method. Figure 5 , Figure 5 FIG. 1 is a flow chart of a first embodiment of a method for controlling a MOSFET gate crosstalk clamp circuit according to the present invention; Figure 1 The MOSFET gate crosstalk clamp circuit control method is based on the MOSFET gate crosstalk clamp circuit as described above, and the method comprises:
[0071] Step S10: the leakage unit receives the inductive crosstalk voltage and the capacitive crosstalk voltage transmitted by the gate of the MOSFET driving unit;
[0072] It is easy to understand that the factors affecting the crosstalk voltage mainly include gate resistance (reference Figure 2 The first gate resistor Rg, the second gate resistor Rint), parasitic capacitance (reference Figure 2 The first to second capacitors C1~C2), stray inductance (reference Figure 2The source inductance L) is the size of the gate, but the gate internal resistance, parasitic capacitance, and emitter stray inductance cannot be changed. Before suppressing gate crosstalk, first determine the state of the gate to determine what method to use to suppress it.
[0073] Step S20: the driving chip controls the leakage unit to reduce the capacitive crosstalk voltage.
[0074] It is easy to understand that when the upper bridge MOSFET is turned on, the source stray inductance L causes an inductive crosstalk voltage of positive at the top and negative at the bottom. At this time, the clamp unit 201 is turned on to receive the driving voltage input from the negative voltage terminal Vee by the driving chip U1.
[0075] It is easy to understand that the drain of the lower bridge MOSFET is connected to the source of the upper bridge MOSFET. When the upper bridge MOSFET is turned on, the voltage of the source changes, and whether the upper bridge MOSFET is turned on can be judged based on the change of the source voltage.
[0076] It is easy to understand that during the turn-on process of the upper bridge MOSFET, in the t1-2 stage, the inductive crosstalk voltage of positive upper and negative lower is mainly caused by the source stray inductance. The leakage unit 202 is turned on, the gate equivalent resistance of the MOSFET driving unit is reduced, the RC time constant is reduced, and the inductive crosstalk voltage quickly reaches the minimum negative value.
[0077] The source stray inductance causes an inductive crosstalk voltage with positive top and negative bottom. At this time, the leakage unit 202 is turned on to receive the driving voltage input from the negative voltage terminal Vee by the driving chip U1.
[0078] Further, step S10 specifically includes: the clamping unit receives and suppresses the inductive crosstalk voltage and the capacitive crosstalk voltage of the MOSFET driving unit.
[0079] The step S20 specifically includes: the driving chip controls the clamping unit to suppress the inductive crosstalk voltage and the capacitive crosstalk voltage.
[0080] In this embodiment, one end of the leakage unit is connected to the clamping voltage terminal Clamp, and the clamping voltage terminal Clamp can receive an external clamp signal. When the MOS is in the off state, the clamp signal will trigger the clamping MOS to turn on. Specifically: taking the turning on of the upper bridge MOSFET as an example, at this time the lower bridge MOSFET is in the off state, and the clamp signal will control the clamping MOS to turn on, so in the t1 stage, the clamping MOS is turned on, which will make the gate voltage increase negatively, which is helpful to suppress the positive crosstalk. If a PNP transistor clamp is used, it cannot be turned on in the t1 stage, and can only suppress capacitive crosstalk.
[0081] The clamping unit 201 includes a first resistor R1 and a second diode D2. The first end of the first resistor R1 is connected to the first end of the second gate resistor Rint, the second end of the first resistor R1 is connected to the cathode of the second diode D2, and the anode of the second diode D2 is connected to the negative voltage end Vee. The second diode D2 is used to be turned on when the gate of the MOSFET driving unit 100 is turned on, and receive the negative driving voltage input by the driving chip U1. The first resistor R1 is used to damp the negative driving voltage to obtain a damped driving voltage, and output the damped driving voltage to the second gate resistor Rint of the MOSFET driving unit 100.
[0082] It is easy to understand that when turned on, the second diode D2 is turned on, and the first resistor R1 plays a certain damping role, resulting in an increase in the RC time constant of the reverse charging loop, a slower charging speed, and a negative and small inductive crosstalk voltage, so the total crosstalk voltage is reduced.
[0083] The leakage unit 202 includes a first diode D1 and a MOS transistor Q1, wherein an anode of the first diode D1 is connected to a first end of the second gate resistor Rint, an anode of the first diode D1 is connected to a second end of the first gate resistor Rg, a cathode of the first diode D1 is connected to a drain of the MOS transistor Q1, a source of the MOS transistor Q1 is connected to the negative voltage terminal Vee, and a gate of the MOS transistor Q1 is connected to a clamping voltage terminal Clamp.
[0084] It should be noted that in the t3 stage, the source induced voltage is reversed, the discharge unit 202 is turned off, and the clamping unit 201 is turned on. The clamping unit 201 includes a resistor. Through the damping effect of the resistor, the RC time constant of the reverse charging loop increases, the charging speed slows down, and the inductive crosstalk voltage is still negative and small, so the total crosstalk voltage is reduced.
[0085] It is easy to understand that during the t2 stage of the upper bridge MOSFET turn-on process, the capacitive crosstalk voltage caused by the Miller current increases in the positive direction, and the leakage unit 202 provides a low-impedance leakage path, through which the capacitive crosstalk voltage is discharged. During the turn-on process, when the source induced voltage is reversed, the leakage unit 202 is turned off and stops the leakage.
[0086] According to the present invention, the MOSFET gate crosstalk clamp circuit isolates the gate of the MOSFET driving unit through the damping effect and discharges the crosstalk voltage, thereby suppressing the magnitude of the forward crosstalk voltage caused by the Miller capacitance and the magnitude of the forward crosstalk voltage caused by the source stray inductance.
[0087] Furthermore, during the shutdown process, at stage t7, the change in Miller current will cause the gate crosstalk voltage to increase negatively, which may exceed the gate withstand voltage of the lower bridge MOSFET. The gate is directly clamped to the driving negative voltage through the clamping unit 201 to prevent the crosstalk negative voltage from exceeding the negative voltage limit, thereby adjusting the clamping effect of the negative voltage.
[0088] The second diode D2 is also used to be cut off when the upper bridge MOSFET is turned off, and clamp the gate voltage of the MOSFET driving unit 100 at a preset driving negative voltage.
[0089] It should be noted that during the shutdown process, the change in Miller current will cause the gate crosstalk voltage to increase negatively, which may exceed the gate withstand voltage of the MOSFET. The gate voltage is directly clamped to the driving negative voltage through the second diode D2 to prevent the crosstalk negative voltage from exceeding the negative voltage limit, and the second resistor R2 is used to adjust the clamping effect of the negative voltage.
[0090] The embodiment of the present invention can effectively suppress the magnitude of the positive crosstalk voltage during the turn-on period and the magnitude of the negative crosstalk voltage during the turn-off period through the above method. The crosstalk voltage during the turn-on period includes the magnitude of the positive crosstalk voltage caused by the Miller capacitance and the magnitude of the positive crosstalk voltage caused by the source stray inductance.
[0091] In addition, an embodiment of the present invention further provides a controller, wherein the controller includes the MOSFET gate crosstalk clamping circuit as described above.
[0092] Since the controller adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought by the technical solutions of the above embodiments, which will not be described one by one here.
[0093] It should be understood that the above is only an example and does not constitute any limitation on the technical solution of the present invention. In specific applications, technicians in this field can make settings as needed, and the present invention does not limit this.
[0094] It should be noted that the workflow described above is merely illustrative and does not limit the scope of protection of the present invention. In practical applications, technicians in this field can select part or all of them according to actual needs to achieve the purpose of the present embodiment, and no limitation is made here.
[0095] In addition, for technical details not fully described in this embodiment, reference may be made to the MOSFET gate crosstalk clamp circuit provided in any embodiment of the present invention, which will not be described in detail here.
[0096] In addition, it should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or system including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or system. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or system including the element.
[0097] The serial numbers of the above embodiments of the present invention are only for description and do not represent the advantages or disadvantages of the embodiments.
[0098] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium (such as a read-only memory (ROM) / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for enabling a terminal 00 device (which can be a mobile phone, a computer, a server, or a network 00 device, etc.) to execute the methods described in each embodiment of the present invention.
[0099] The above are only preferred embodiments of the present invention, and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.
Claims
1. A MOSFET gate crosstalk clamp circuit, characterized in that: The MOSFET gate crosstalk clamp circuit comprises: a MOSFET driving unit, an anti-interference unit and a driving chip; wherein, The gate of the MOSFET driving unit is connected to the first driving end of the driving chip, the first end of the anti-interference unit is connected to the gate of the MOSFET driving unit, and the second end of the anti-interference unit is connected to the negative voltage end or the ground end of the driving chip; The anti-interference unit is used to receive the crosstalk voltage caused during the switching process of the MOSFET; The driving chip is used to control the anti-interference unit to reduce the crosstalk voltage; The anti-interference unit includes a leakage unit and a clamping unit connected in parallel between the gate and the negative voltage end of the driving chip, the driving chip controls the on-off of the leakage unit, and the clamping unit receives and suppresses the inductive crosstalk voltage and the capacitive crosstalk voltage of the MOSFET driving unit; The leakage unit includes a first diode and a MOS tube, wherein the anode of the first diode is connected to the gate of the MOSFET driving unit, the cathode of the first diode is connected to the drain of the MOS tube, the source of the MOS tube is connected to the negative voltage end of the driving chip, and the gate of the MOS tube is connected to the second driving end of the driving chip; The clamping unit includes a first resistor and a second diode, one end of the first resistor is connected to the gate of the MOSFET driving unit, the other end of the first resistor is connected to the cathode of the second diode, and the anode of the second diode is connected to the negative voltage end of the driving chip.
2. The MOSFET gate crosstalk clamp circuit according to claim 1, characterized in that: The anti-interference unit includes a leakage unit and a clamping unit connected in parallel between the gate and the ground terminal of the driving chip, the driving chip controls the on and off of the leakage unit, and the clamping unit receives and suppresses the inductive crosstalk voltage and capacitive crosstalk voltage of the MOSFET driving unit.
3. The MOSFET gate crosstalk clamp circuit according to claim 2, characterized in that: The leakage unit includes a first diode and a MOS tube, the anode of the first diode is connected to the gate of the MOSFET driving unit, the cathode of the first diode is connected to the drain of the MOS tube, the source of the MOS tube is connected to the ground terminal of the driving chip, and the gate of the MOS tube is connected to the second driving terminal of the driving chip.
4. The MOSFET gate crosstalk clamp circuit according to claim 2 or 3, characterized in that: The clamping unit includes a first resistor and a second diode, one end of the first resistor is connected to the gate of the MOSFET driving unit, the other end of the first resistor is connected to the cathode of the second diode, and the anode of the second diode is connected to the ground terminal of the driving chip.
5. A MOSFET gate crosstalk clamping circuit control method, characterized in that: The MOSFET gate crosstalk clamp circuit control method is based on the MOSFET gate crosstalk clamp circuit according to any one of claims 1 to 4, and the method comprises: The leakage unit receives the inductive crosstalk voltage and the capacitive crosstalk voltage transmitted by the gate of the MOSFET driving unit; The driving chip controls the leakage unit to reduce the capacitive crosstalk voltage.
6. A MOSFET gate crosstalk clamp circuit control method, characterized in that: The MOSFET gate crosstalk clamp circuit control method is based on the MOSFET gate crosstalk clamp circuit according to any one of claims 1 to 4, and the method comprises: the clamp unit receives and suppresses the inductive crosstalk voltage and the capacitive crosstalk voltage of the MOSFET driving unit; The driving chip controls the clamping unit to suppress the inductive crosstalk voltage and the capacitive crosstalk voltage.
7. A controller, characterized in that: The controller comprises the MOSFET gate crosstalk clamp circuit according to any one of claims 1 to 4.
Citation Information
Patent Citations
MOSFET gate crosstalk clamping circuit and controller
CN214314562U