Electronic device

Abstract

An electronic device is provided. The electronic device includes a substrate, an active element, a first insulating layer, a detecting element, and a conductive layer. The active element is disposed on the substrate. The first insulating layer is disposed on the active element. The detecting element is disposed on the first insulating layer. The conductive layer is disposed on the first insulating layer. The first insulating layer has a recess, and the recess does not overlap the conductive layer in a normal direction of the substrate.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to an electronic device, and more particularly, to an electronic device having a detection element. BACKGROUND

[0002] With the rapid development of electronic products, some electronic devices can have a detection element to sense. However, during the manufacturing process of the electronic device, it can be affected by some water or gas, thereby changing the performance of the elements in the electronic device, so how to reduce the above problems has become a project to be discussed today. SUMMARY

[0003] According to embodiments of the present disclosure, an electronic device includes a substrate, an active element, a first insulating layer, a detection element, and a conductive layer. The active element is disposed on the substrate. The first insulating layer is disposed on the active element. The detection element is disposed on the first insulating layer. The conductive layer is disposed on the first insulating layer. The first insulating layer has a recess, and the recess does not overlap with the conductive layer in the normal direction of the substrate.

[0004] Based on the above, the insulating layer of the electronic device of the embodiments of the present disclosure is disposed on the active element, which can reduce the impact of liquid, gas (for example, including hydrogen ions, oxygen ions or other ions or elements) in the process on the active element. In addition, by removing the insulating layer adjacent to or corresponding to the upper part of the active element to form a recess, it helps to reduce the opportunity for the above-mentioned gas in the insulating layer to diffuse to the active element and cause the characteristics of the active element to deviate or fail. With this design, the electronic device of the embodiments of the present disclosure can have better reliability. BRIEF DESCRIPTION OF DRAWINGS

[0005] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0006] Figure 1 A top view schematic diagram of an electronic device according to an embodiment of the present disclosure;

[0007] Figure 2 A cross-sectional view of the electronic device of Figure 1 along the cross-sectional line A-A';

[0008] Figure 3 A top view schematic diagram of an electronic device according to another embodiment of the present disclosure;

[0009] Figure 4 A cross-sectional view of the electronic device of Figure 3 along the cross-sectional line B-B';

[0010] Figure 5 A cross-sectional view of an electronic device according to another embodiment of the present disclosure;

[0011] Figure 6 A cross-sectional schematic view of an electronic device according to another embodiment of the present disclosure;

[0012] Figure 7 A flowchart of a method of manufacturing an electronic device according to an embodiment of the present disclosure;

[0013] Figure 8 A flowchart of a method of manufacturing an electronic device according to another embodiment of the present disclosure;

[0014] Figure 9 A flowchart of a method of manufacturing an electronic device according to another embodiment of the present disclosure. DETAILED DESCRIPTION

[0015] In the present disclosure, a structure (or a layer, a component, a substrate) is "on" another structure (or a layer, a component, a substrate) can mean that the two structures are adjacent and directly connected, or can mean that the two structures are adjacent but not directly connected, which means that there is at least one intermediate structure (or an intermediate layer, an intermediate component, an intermediate substrate, an intermediate space) between the two structures, the lower surface of a structure is adjacent to or directly connected to the upper surface of the intermediate structure, and the upper surface of another structure is adjacent to or directly connected to the lower surface of the intermediate structure, and the intermediate structure can be a single-layer or multi-layer solid structure or non-solid structure, without limitation. In the present disclosure, when a structure is "on" another structure, it can mean that the structure is "directly" on the other structure, or it can mean that the structure is "indirectly" on the other structure, i.e. there is at least one structure between the structure and the other structure.

[0016] In the present disclosure, electrical connection or coupling can mean direct connection or indirect connection. In the case of direct connection, the terminals of two circuit elements are directly connected or connected to each other by a conductor segment, and in the case of indirect connection, there is a switch, a diode, a capacitor, an inductor, a resistor, other suitable elements, or a combination of the above elements between the terminals of the two circuit elements, but not limited thereto.

[0017] In the present disclosure, the length and width can be measured by an optical microscope, and the thickness can be measured by a cross-sectional image in an electron microscope, but not limited thereto. In addition, there can be a certain error between any two values or directions used for comparison. If the first value is equal to the second value, it implies that there can be about 10% error between the first value and the second value; if the first direction is perpendicular to the second direction, the angle between the first direction and the second direction can be between 80 degrees and 100 degrees; if the first direction is parallel to the second direction, the angle between the first direction and the second direction can be between 0 degrees and 10 degrees.

[0018] The electronic devices disclosed herein may include, but are not limited to, display devices, antenna devices, sensing devices, light-emitting devices, splicing devices, other suitable devices, or combinations thereof. Sensing devices include, for example, optical sensing devices, touch sensing devices, other suitable sensing devices, or combinations thereof, but are not limited to these. Optical sensing devices include, for example, ultraviolet (X-ray), infrared sensing devices, other suitable light sensing devices, or combinations thereof, but are not limited to these. Antenna devices may be, for example, liquid crystal antennas, but are not limited to these. Electronic devices may include bendable or flexible electronic devices. Electronic devices may include, for example, liquid crystal, light-emitting diodes (OLEDs), fluorescence, phosphorescence, other suitable materials, or combinations thereof, but are not limited to these. Light-emitting diodes may include, for example, organic light-emitting diodes (OLEDs), micro LEDs (including mini LEDs and / or micro LEDs), or quantum dot (QD) LEDs (e.g., QLEDs, QDLEDs), other suitable materials, or combinations thereof, but are not limited to these.

[0019] In this disclosure, the various embodiments described below can be used in combination without departing from the spirit and scope of this disclosure. For example, some features of one embodiment can be combined with some features of another embodiment to form another embodiment. Exemplary embodiments of the invention will now be described in detail with reference to the accompanying drawings. Wherever possible, the same element symbols are used in the drawings and description to denote the same or similar parts.

[0020] Figure 1 This is a top view schematic diagram of an electronic device according to an embodiment of the present disclosure. The drawings are for clarity and ease of explanation. Figure 1 Several components are omitted. Figure 2 for Figure 1 A cross-sectional view of the electronic device along section line A-A'. Please refer to... Figure 1 and Figure 2 The electronic device 10 includes a substrate 110, on which, for example, an active element 120, a first insulating layer 130, and a detection element 140 may be disposed. In some embodiments, such as Figure 1 to Figure 2The first insulating layer 130 is disposed on the active element 120, and the detection element 140 is disposed on the first insulating layer 130. In some embodiments, the substrate 110 can include a transparent substrate or a non-transparent substrate. In some embodiments, the substrate 110 can include a rigid substrate or a flexible substrate. For example, the material of the substrate 110 can include glass, quartz, sapphire, ceramic, polycarbonate (PC), polyimide (PI), polyethylene terephthalate (PET), other suitable substrate materials, or combinations thereof, but is not limited thereto. In some embodiments, scan lines SL, read lines DL, and / or bias signal lines BL can be disposed on the substrate 110, but are not limited thereto.

[0021] Referring to Figure 1 and Figure 2 In some embodiments, the scan lines SL can intersect the read lines DL, for example. In some embodiments, the scan lines SL can intersect the bias signal lines BL, for example, but are not limited thereto. In some embodiments, the active element 120, for example a transistor, is disposed on the substrate 110 and is electrically connected to the scan lines SL and the read lines DL, respectively. In some embodiments, the active element 120 includes an amorphous silicon thin film transistor, a polycrystalline silicon thin film transistor (e.g., low temperature polycrystalline silicon thin film transistor, LTPS), an Indium Gallium Zinc Oxide (IGZO) thin film transistor, other suitable transistors, or combinations thereof, but is not limited thereto.

[0022] Referring to Figure 1 and Figure 2 In some embodiments, a conductive layer 150, for example, can be further disposed on the substrate 110, for example, on the first insulating layer 130. In some embodiments, the first insulating layer 130 is disposed between the conductive layer 150 and the active element 120, for example, and covers the active element 120, for example. In some embodiments, part of the conductive layer 150 can be used as a lower electrode 141 of the detection element 140, for example, but is not limited thereto, and the structure of the detection element 140 will be described in detail later. In some embodiments, the first insulating layer 130 has a recess 131, for example, which does not overlap the conductive layer 150 in the normal direction Y of the substrate, for example. Referring to Figure 1 and Figure 2In some embodiments, the first insulating layer 130 includes, for example, a first portion 132 and a second portion 133. The first portion 132 of the first insulating layer 130 overlaps the conductive layer 150 and has a first thickness T1 in the normal direction Y of the substrate 110. The second portion 133 of the first insulating layer 130 does not overlap the conductive layer 150 and has a second thickness T2 in the normal direction Y of the substrate 110. In some embodiments, the second thickness T2 is less than the first thickness T1. In some embodiments, the first portion 132 is connected to the second portion 133. It is noted that, in a cross-sectional view, the first thickness T1 can be, for example, a maximum thickness of the first portion 132 of the first insulating layer 130 in the normal direction Y of the substrate 110, and the second thickness T2 can be, for example, a minimum thickness of the second portion 133 of the first insulating layer 130 in the normal direction Y of the substrate 110. The first thickness T1 and the second thickness T2 can be obtained, for example, by measuring a SEM image of a local area that shows, for example, an edge of the conductive layer 150, at least part of the first portion 132 of the first insulating layer 130, and at least part of the second portion 133 of the first insulating layer 130, but are not limited thereto.

[0023] Referring to Figure 1 and Figure 2 In some embodiments, the thickness of the first insulating layer 130 can be, for example, between 0.15 micrometers and 0.25 micrometers (0.15 micrometers ≦ thickness ≦ 0.25 micrometers), but is not limited thereto. In some embodiments, the thickness of the first insulating layer 130 can be, for example, between 0.18 micrometers and 0.23 micrometers (0.18 micrometers ≦ thickness ≦ 0.23 micrometers). In some embodiments, the recess 131 of the first insulating layer 130 has a depth D, the first insulating layer has a first thickness T1, and the depth D is between 0.01 micrometers and the first thickness T1 (0.01 micrometers < depth D < first thickness T1), but is not limited thereto. It is noted that the depth D is, for example, a maximum distance between a top surface 132a of the first portion 132 and a top surface 133a of the second portion 133 in the normal direction Y of the substrate. In other words, the depth D is, for example, a maximum depth of the recess 131 of the first insulating layer 130 in the normal direction Y of the substrate. In some embodiments, the recess 131 of the first insulating layer 130 is formed, for example, by an etching process or other processes, but is not limited thereto. In some embodiments, the material of the first insulating layer 130 includes silicon oxide, silicon nitride, silicon oxynitride, or a combination thereof, but is not limited thereto.

[0024] Referring to Figure 1 and Figure 2 In some embodiments, the first insulating layer 130 has a recess 131, and at least part of a first sidewall surface 134 of the recess 131 is flush with at least part of a second sidewall surface 151 of the conductive layer, but is not limited thereto. In detail, as shown in FIG. 1A, the first sidewall surface 134 of the recess 131 of the first insulating layer 130 is flush with the second sidewall surface 151 of the conductive layer 150 in the normal direction Y of the substrate 110. In some embodiments, the first sidewall surface 134 of the recess 131 of the first insulating layer 130 is flush with the second sidewall surface 151 of the conductive layer 150 in the normal direction Y of the substrate 110, but is not limited thereto. In some embodiments, the first sidewall surface 134 of the recess 131 of the first insulating layer 130 is flush with the second sidewall surface 151 of the conductive layer 150 in the normal direction Y of the substrate 110, but is not limited thereto. In some embodiments, the first sidewall surface 134 of the recess 131 of the first insulating layer 130 is flush with the second sidewall surface 151 of the conductive layer 150 in the normal direction Y of the substrate 110, but is not limited thereto. Figure 2For example, the first sidewall surface 134 is connected between the top surface 132a of the first portion 132 of the first insulating layer 130 and the top surface 133a of the second portion 133 of the first insulating layer 130. In some embodiments, the angle θ1 between the first sidewall surface 134 and the top surface 132a of the first portion 132 is greater than 90 degrees, but is not limited thereto. In some embodiments, the connection between the first sidewall surface 134 and the top surface 132a of the first portion 132 can include an arc surface, but is not limited thereto. In some embodiments, the conductive layer 150 has a second sidewall surface 151 connected to the top surface 150a of the conductive layer 150. In some embodiments, the angle between the second sidewall surface 151 and the top surface 150a of the conductive layer 150 is greater than 90 degrees, but is not limited thereto. In some embodiments, the connection between the second sidewall surface 151 and the top surface 150a of the conductive layer 150 can include an arc surface, but is not limited thereto. In some embodiments, the angle θA between the extension of the first sidewall surface 134 and the top surface 110a of the substrate 110 can be substantially equal to the angle θB between the extension of the second sidewall surface 151 and the top surface 110a of the substrate 110, but is not limited thereto. In some embodiments (not shown), the angle θA between the extension of the first sidewall surface 134 and the top surface 110a of the substrate 110 can be different from the angle θB between the extension of the second sidewall surface 151 and the top surface 110a of the substrate 110. In some embodiments, the first sidewall surface 134 of the first insulating layer 130 and / or the second sidewall surface 151 of the conductive layer 150 can include a flat surface, a curved surface, or other irregular surface, but is not limited thereto.

[0025] Please refer to Figure 1 and Figure 2 In some embodiments, the detection element 140 can include a lower electrode 141, an upper electrode 143, and an active layer 142, for example, between the lower electrode 141 and the upper electrode 143. In such embodiments, at least a portion of the conductive layer 150 can function as the lower electrode 141 of the detection element 140. In some embodiments, the material of the conductive layer 150 can include, for example, a transparent conductive material, a non-transparent conductive material (e.g., a metal material), or a combination thereof. The material of the conductive layer 150 can include, for example, indium tin oxide, indium zinc oxide, indium oxide, zinc oxide, tin oxide, an organic conductive material, aluminum, molybdenum, copper, silver, or a combination thereof, but is not limited thereto. In some embodiments, the material of the upper electrode 143 can include, for example, a transparent conductive material, such as indium tin oxide, indium zinc oxide, indium oxide, zinc oxide, tin oxide, or a combination thereof, but is not limited thereto. In some embodiments, the material of the active layer 142 can include a P-type and / or N-type semiconductor material, such as a multi-layer structure with PIN, but is not limited thereto.

[0026] Referring to Figure 1 With Figure 2 In some embodiments, the electronic device 10 further includes an insulating layer 160, a planar layer 161, and / or a protective layer 162. The insulating layer 160 is disposed on the detection element 140, for example, to cover the detection element 140 and / or the active element 120, but is not limited thereto. In some embodiments, the planar layer 161 is disposed on the insulating layer 160, and the material of the planar layer 161 can include, for example, an organic material or other suitable material, but is not limited thereto. In some embodiments, the bias signal line BL is disposed on the planar layer 161, and the bias signal line BL is electrically connected to the upper electrode 143 of the detection element 140, for example, via an opening O. The opening O is an opening formed through the planar layer 161 (and / or the insulating layer 160), for example, but is not limited thereto. In some embodiments, the protective layer 162 is disposed on the bias signal line BL and covers the bias signal line BL and / or the planar layer 161, but is not limited thereto. Figure 1 to Figure 2

[0027] Referring to Figure 1 With Figure 2 In some embodiments, the active element 120 includes a gate electrode GE, a gate insulating layer GI, a semiconductor layer SE, a source electrode SD1, and a drain electrode SD2, but is not limited thereto. In some embodiments, the drain electrode SD2 or one of the drain electrodes SD2 is connected to the lower electrode 141 of the detection element 140, and at least part of the drain electrode SD2 (or the drain electrode SD2) overlaps the semiconductor layer SE in the normal direction Y of the substrate 110. In some embodiments, the material of the source electrode SD1 and / or the drain electrode SD2 can include a transparent conductive material or a non-transparent conductive material, such as indium tin oxide, indium zinc oxide, indium oxide, zinc oxide, tin oxide, a metal material (such as aluminum, molybdenum, copper, silver, etc.), other suitable materials, or a combination thereof, but is not limited thereto. In some embodiments, the material of the semiconductor layer SE can include amorphous silicon, low-temperature polysilicon (LTPS), metal oxide (such as indium gallium zinc oxide IGZO), other suitable materials, or a combination thereof, but is not limited thereto.

[0028] Referring to Figure 1 With Figure 2 In some embodiments, the recess 131 can selectively overlap the active element 120 in the normal direction Y of the substrate 110. For example, the recess 131 of the first insulating layer 130 overlaps the channel region CH of the active element 120 in the normal direction Y of the substrate 110. The recess 131 can substantially correspond to the second portion 133 of the first insulating layer 130. In other words, the second portion 133 of the first insulating layer 130 can overlap the channel region CH, for example, in the normal direction Y of the substrate 110, but is not limited thereto. In some embodiments (which can be referred to later Figure 3 to Figure 4 ​), the conductive layer 150 overlaps (or covers) at least a part of the channel region CH of the active element 120 in the normal direction Y of the substrate 110. The channel region CH is defined as a region of the semiconductor layer SE overlapping the gate electrode GE, for example.

[0029] Please refer to Figure 1 With Figure 2 In some embodiments, the first insulating layer 130 can be used as a protective layer of the semiconductor layer SE to reduce the influence of liquid, gas (e.g. including hydrogen ions, oxygen ions or other ions or elements) on the active element 120 (e.g. the semiconductor layer SE of the active element 120) during the manufacturing process, thereby changing the characteristics of the active element 120, but not limited thereto. In some embodiments, during the manufacturing process of the first insulating layer 130 (or the detection element 140), the liquid, gas (e.g. including hydrogen ions, oxygen ions or other ions or elements) may diffuse in the first insulating layer 130 due to the high-temperature environment, causing the characteristics of the active element 120 to deviate or change, or even lose the switching characteristics. It should be noted that the arrangement of the conductive layer 150 can reduce the diffusion of gas (e.g. including hydrogen ions, oxygen ions or other ions or elements) to the layer below the conductive layer 150 (e.g. the first insulating layer 130). In other words, the content of gas (e.g. including hydrogen ions, oxygen ions or other ions or elements) in the first insulating layer 130 overlapping below the conductive layer 150 is less than the content of gas (e.g. including hydrogen ions, oxygen ions or other ions or elements) in the first insulating layer 130 not overlapping below the conductive layer 150, but not limited thereto. In some embodiments, the etching process can be performed on a part of the first insulating layer 130 to reduce the thickness of the second portion 133 of the first insulating layer 130 not overlapping the conductive layer 150 (i.e. the second portion 133), thereby forming the recess 131 of the first insulating layer 130. Since the first insulating layer 130 can have more gas (e.g. including hydrogen ions, oxygen ions or other ions or elements), reducing the thickness of the second portion 133 of the first insulating layer 130 adjacent to the semiconductor layer SE can help reduce the problem of the characteristics of the active element deviating due to the influence of the above-mentioned gas.

[0030] Figure 3 The top view schematic diagram of an electronic device according to another embodiment of the present disclosure. Figure 4 The cross-sectional view schematic diagram of the electronic device of Figure 3 along the cross-sectional line B-B'. The electronic device 10a of the present embodiment is substantially similar to the electronic device 10 of Figure 1 and Figure 2 The electronic device 10a is different from the electronic device 10 in that the electronic device 10a further includes a planar layer 170, which is disposed between the active element 120 and the first insulating layer 130a, but not limited thereto.

[0031] Please refer to Figure 3 and Figure 4 In some embodiments, before setting the detection element 140a, the planarization layer 170 can be used to flatten the surface of the stack, thereby improving the flexibility of setting the detection element 140a. For example, the lower electrode 141a (e.g., a portion of the conductive layer 152), the active layer 142a, and / or the upper electrode 143a of the detection element 140a can be disposed on the planarization layer 170, and can be selectively overlapped with the active element 120, increasing the detection area of ​​the detection element 140a or improving the detection efficiency, but is not limited thereto. In some embodiments, the material of the planarization layer 170 may include, for example, organic materials, but is not limited thereto. In some embodiments, the planarization layer 170 may include, for example, a single-layer or multi-layer structure.

[0032] Please refer to Figure 3 and Figure 4 In some embodiments, similar to Figure 1 and Figure 2 The first insulating layer 130a may include a first portion 132' and a second portion 133'. In some embodiments, in the normal direction Y of the substrate 110, the first portion 132' overlaps with the conductive layer 152 and has a first thickness T1', while the second portion 133' does not overlap with the conductive layer 152 and has a second thickness T2'. The second thickness T2' is, for example, less than the first thickness T1'. In some embodiments, the first portion 132' is connected to the second portion 133'. It should be noted that, in a cross-section, the first thickness T1' may be, for example, the maximum thickness of the first portion 132' of the first insulating layer 130a in the normal direction Y of the substrate 110, and the second thickness T2' may be, for example, the minimum thickness of the second portion 133' of the first insulating layer 130a in the normal direction Y of the substrate 110. The first thickness T1' and the second thickness T2' can be obtained, for example, by measuring a local SEM image, which shows, for example, the edge of the conductive layer 152, at least a portion of the first insulating layer 130a, a first portion 132', and at least a portion of the second portion 133' of the first insulating layer 130a, but is not limited thereto.

[0033] Please refer to Figure 3 and Figure 4In some embodiments, the first insulating layer 130a has a recess 131a that does not overlap with the conductive layer 152, for example, in the normal direction Y of the substrate 110. In some embodiments, the recess 131a may selectively overlap with or not overlap with the active element 120 (e.g., channel region CH) in the normal direction Y of the substrate 110. In some embodiments, the recess 131a of the first insulating layer 130a has a depth D', which is, for example, the maximum distance between the top surface 132a' of the first portion 132' and the top surface 133a' of the second portion 133' in the normal direction Y of the substrate. In other words, the depth D' is, for example, the maximum depth of the recess 131a of the first insulating layer 130a in the normal direction Y of the substrate. In some embodiments, the depth D' is between 0.01 micrometers and the first thickness T1' (0.01 micrometers < depth D' < first thickness T1'), but is not limited thereto. In some embodiments, the recess 131a of the first insulating layer 130a is formed, for example, by an etching process or other suitable means, but is not limited thereto.

[0034] Please refer to Figure 3 and Figure 4 In some embodiments, at least a portion of the first sidewall surface 134' of the recess 131a is flush with at least a portion of the second sidewall surface 151' of the conductive layer 152, but this is not a limitation. Specifically, as... Figure 4 The first sidewall surface 134' is connected, for example, between the top surface 132a' of the first portion 132' of the first insulating layer 130a and the top surface 133a' of the second portion 133' of the first insulating layer 130a. In some embodiments, the connection between the first sidewall surface 134' and the top surface 132a' of the first portion 132' (or the top surface 133a' of the second portion 133) may include an arcuate surface, but is not limited thereto. In some embodiments, the conductive layer 152 has a second sidewall surface 151', which is connected, for example, to the top surface 150a' of the conductive layer 152. In some embodiments, the angle θA between the extended surface of the first sidewall surface 134' and the top surface 110a of the substrate 110 may be approximately equal to the angle θB between the extended surface of the second sidewall surface 151' and the top surface 110a of the substrate 110, but is not limited thereto. In some embodiments (not shown), the angle θA between the extended surface of the first sidewall surface 134' and the top surface 110a' of the substrate 110 may be different from the angle θB between the extended surface of the second sidewall surface 151' and the top surface 110a' of the substrate 110. In some embodiments, the first sidewall surface 134' of the first insulating layer 130a and / or the second sidewall surface 151' of the conductive layer 152 may include a plane, a curved surface, or other irregular surfaces, but are not limited thereto.

[0035] Figure 5A cross-sectional schematic view of an electronic device according to another embodiment of the present disclosure is shown. The electronic device 10b of the present embodiment is substantially similar to the electronic device 10 of Figure 2 , and thus similar components in both embodiments are not repeated here. The electronic device 10b of the present embodiment differs from the electronic device 10 mainly in that the electronic device 10b of the present embodiment further comprises a second insulating layer 180.

[0036] Referring to Figure 5 , in some embodiments, the second insulating layer 180 is disposed between the active layer 142 and the lower electrode 141 of the detection element 140, wherein the second insulating layer 180 has another recess 181, and in the normal direction Y of the substrate 110, the other recess 181 does not overlap with the active layer 142, but is not limited thereto. In some embodiments, the second insulating layer 180 has, for example, an opening O2, and the active layer 142 is electrically connected to the lower electrode 141 through the opening O2, but is not limited thereto. In some embodiments, the material of the second insulating layer 180 comprises an organic material or an inorganic material. In some embodiments, the material of the second insulating layer 180 comprises silicon oxide, silicon nitride, silicon oxynitride, or a combination thereof, but is not limited thereto. In some embodiments, as shown in Figure 5 , in the normal direction Y of the substrate 110, the recess 181 may, for example, overlap with part of the lower electrode 141. In some embodiments, the recess 181 of the second insulating layer 180 is formed, for example, by an etching process or other suitable process.

[0037] Referring to Figure 5 , in some embodiments, the second insulating layer 180 can comprise a third portion 182 and a fourth portion 183. In the normal direction Y of the substrate 110, the third portion 182 overlaps with the active layer 142 and has a third thickness T3, and the fourth portion 183 does not overlap with the active layer 142 and has a fourth thickness T4. In some embodiments, the fourth thickness T4 may, for example, be smaller than the third thickness T3. It should be noted that, in a cross section, the third thickness T3 may, for example, be the maximum thickness of the third portion 182 of the second insulating layer 180 in the normal direction Y of the substrate 110, and the fourth thickness T4 may, for example, be the minimum thickness of the fourth portion 183 of the second insulating layer 180 in the normal direction Y of the substrate 110. The third thickness T3 and the fourth thickness T4 may, for example, be obtained by measuring SEM images of local regions, which may, for example, show the edge of the active layer 142, the third portion 182 of the second insulating layer 180, and the fourth portion 183 of the second insulating layer 180, but are not limited thereto.

[0038] Referring to Figure 5In some embodiments, the second insulating layer 180, similar to the first insulating layer 130, can serve as a protective layer for the semiconductor layer SE. In some embodiments, the material of the second insulating layer 180 may be different from or the same as that of the first insulating layer 130. In some embodiments, during or after the etching of the active layer 142 of the detection element 140, an etching process may be performed on the second insulating layer 180 to reduce the thickness of a portion of the second insulating layer 180 (e.g., the second insulating layer 180 not covered by the active layer 142 of the detection element 140), thereby forming a recess 181 in the second insulating layer 180. By reducing the thickness of a portion of the second insulating layer 180 as described above, the portion of the second insulating layer 180 that may contain a large amount of gas (e.g., including hydrogen ions, oxygen ions, or other ions or elements) is removed, which helps to reduce the characteristic shift problem of the active element caused by the influence of the aforementioned gas.

[0039] Figure 6 This is a cross-sectional schematic diagram of an electronic device according to yet another embodiment of this disclosure. The electronic device 10c of this embodiment is generally similar to... Figure 2 The electronic device 10, and similar components in both embodiments, will not be repeated here. The electronic device 10c differs from electronic device 10 in that, in electronic device 10c, at least a portion of the first sidewall surface 134a of the first insulating layer 130b is not flush with at least a portion of the second sidewall surface 151 of the conductive layer 150. In other words, in a cross-section, the first insulating layer 130b and the conductive layer 150 form, for example, a stepped structure, but are not limited thereto. In some embodiments, such as... Figure 6 The angle θA between the extended surface of the first sidewall surface 134a and the top surface 110a of the substrate 110 can be approximately equal to the angle θB between the extended surface of the second sidewall surface 151 and the top surface 110a of the substrate 110, but is not limited thereto. In some embodiments (not shown), the angle θA between the extended surface of the first sidewall surface 134a and the top surface 110a of the substrate 110 can be different from the angle θB between the extended surface of the second sidewall surface 151 and the top surface 110a of the substrate 110.

[0040] Figure 7 This is a flowchart illustrating a method for manufacturing an electronic device according to an embodiment of this disclosure. Please also refer to... Figure 2 and Figure 7First, step S210 is performed to dispose the active element 120 on the substrate 110. The active element 120 includes a gate electrode GE, a gate insulating layer GI, a semiconductor layer SE, a source electrode SD1 and a drain electrode SD2. Next, step S220 is performed to dispose the first insulating layer 130 on the active element 120. Next, step S230 is performed to dispose the conductive layer 150 on the first insulating layer 130, and to perform an etching process on the first insulating layer 130 not overlapped with the conductive layer 150 to form the recess 131 of the first insulating layer 130. By forming the recess 131 of the first insulating layer 130, the thickness of the first insulating layer 130 (e.g. the second portion 133) not overlapped with the conductive layer 150 is reduced. Next, step S240 is performed to dispose the active layer 142 of the detection element 140 on the conductive layer 150. Finally, step S250 is performed to complete the electronic device 10 with the detection element 140.

[0041] Further, please refer to Figure 5 and Figure 7 After step S230 is performed, step S260 is optionally performed to dispose the second insulating layer 180 on the conductive layer 150. Next, step S270 is performed to dispose the active layer 142 of the detection element 140 on the second insulating layer 180, and to perform an etching process on the second insulating layer 180 not overlapped with the active layer 142 to form the recess 181 of the second insulating layer 180. Finally, step S280 is performed to complete the electronic device 10b with the detection element 140.

[0042] Figure 8 A flowchart of a method for manufacturing an electronic device according to another embodiment of the present disclosure is shown in FIG. 3B. Please refer to Figure 4 and Figure 7 First, step S310 is performed to dispose the active element 120 on the substrate 110. Next, step S320 is optionally performed to dispose an insulating layer (not shown) on the active element 120. Then, step S330 is performed to dispose the planarization layer 170 on the active element 120. Next, step S340 is performed to dispose the first insulating layer 130a on the active element 120. Next, step S350 is performed to dispose the conductive layer 152 on the first insulating layer 130a, and to perform an etching process on the first insulating layer 130a not overlapped with the conductive layer 152 to form the recess 131a of the first insulating layer 130a. Next, step S360 is performed to dispose the active layer 142a of the detection element 140a on the conductive layer 152. Finally, step S370 is performed to complete the electronic device 10a with the detection element 140a.

[0043] Figure 9 A flowchart of a method for manufacturing an electronic device according to yet another embodiment of the present disclosure is shown in FIG. 4B. The method for manufacturing the electronic device according to the present embodiment is substantially similar to the method for manufacturing the electronic device according to the embodiment shown in FIG. 3B. Figure 8The manufacturing method of the electronic device is similar in both embodiments, so it will not be repeated here. Figure 9 The manufacturing method of electronic devices is different Figure 8 The main difference in the manufacturing method of electronic devices lies in, Figure 9 The method of manufacturing an electronic device includes, for example, etching a first insulating layer that is not superimposed on a conductive layer after setting an active layer for a detection element, but is not limited to this.

[0044] In detail, Figure 9 In the manufacturing method of electronic devices, first according to Figure 8 For example, steps S310 to S340 can be performed, where steps S320 and / or S330 can be deleted as needed. Next, please refer to... Figure 9 Step S410 is performed to deposit a conductive layer on the first insulating layer. Next, step S420 is performed to deposit an active layer for the detection element on the conductive layer. Next, step S430 is performed to etch the first insulating layer that is not overlapped with the conductive layer to form a recess in the first insulating layer. Finally, step S440 is performed to complete the electronic device with the detection element. Furthermore, in some embodiments, steps S420 and S430 can be performed simultaneously; that is, while depositing the active layer for the detection element on the conductive layer, an etching process is simultaneously performed on the first insulating layer that is not overlapped with the conductive layer to form a recess in the first insulating layer.

[0045] In summary, the insulating layer of the electronic device disclosed in this embodiment is disposed on the active element, which can reduce the impact of liquids and gases (such as hydrogen ions, oxygen ions, or other ions or elements) during the manufacturing process on the active element. Furthermore, by removing a portion of the insulating layer adjacent to or corresponding to the active element to form a recess, the chance of the aforementioned gases within the insulating layer diffusing into the active element, causing characteristic shifts or failures in the active element, is reduced. With this design, the electronic device of this embodiment can have better reliability.

[0046] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions disclosed herein, and are not intended to limit them. Although the present disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments disclosed herein.

Claims

1. An electronic device, characterized by comprising: Including: a substrate; an active element disposed on the substrate; a first insulating layer disposed on the active element; a detection element disposed on the first insulating layer; and a conductive layer disposed on the first insulating layer, wherein the first insulating layer has a recess, the recess does not overlap the conductive layer in a normal direction of the substrate, and a channel region of the active element overlaps the recess in the normal direction of the substrate; wherein the recess completely covers the channel region in the normal direction of the substrate in a cross-sectional view; wherein a first sidewall surface of at least part of the recess does not overlap the conductive layer. The first insulating layer has a first thickness, the recess has a depth, and the depth is between 0.01 micrometers and the first thickness. 2.The electronic device of claim 1, wherein, Further including: 3.The electronic device of claim 1, wherein, a planar layer disposed between the active element and the first insulating layer. The first sidewall surface of the at least part of the recess is flush with a second sidewall surface of at least part of the conductive layer. 4.The electronic device of claim 1, wherein, The detection element includes a lower electrode, an upper electrode, and an active layer between the lower electrode and the upper electrode, and the conductive layer is the lower electrode of the detection element. 5.The electronic device of claim 1, wherein, Further including: 6.The electronic device of claim 5, wherein, a second insulating layer disposed between the active layer and the lower electrode, wherein the second insulating layer has another recess, and the other recess does not overlap the active layer in the normal direction of the substrate. In the normal direction of the substrate, a third portion of the second insulating layer overlaps the active layer and has a third thickness T3, a fourth portion of the second insulating layer does not overlap the active layer and has a fourth thickness T4, and the fourth thickness T4 is less than the third thickness T3. 7.The electronic device of claim 6, wherein, ​

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