Constant slew rate signal driving system

Abstract

The present disclosure provides a constant slew rate signal driving system, comprising: a step voltage generating unit, used to provide multiple equal-difference voltage signals; a multiplexer, one input end of which is connected to the step voltage generating unit to receive the multiple equal-difference voltage signals, and the other input end is connected to a control signal generating unit, used to selectively output the multiple equal-difference voltage signals under the control of the control signal sent by the control signal generating unit; a voltage follower unit, connected to the multiplexer, which plays an isolation role and improves the driving capability; an output follower unit, connected to the voltage follower unit, used to drive a subsequent load unit.

Description

Technical Field

[0001] The present disclosure relates to the technical field of circuit design, and in particular to a constant slew rate signal driving system. Background Art

[0002] Low-speed digital interfaces in integrated circuits generally use high and low levels to indicate the logic state of signals, such as TTL (transistor transistor logic) level, CMOS (Complementary Metal Oxide Semiconductor PMOS+NMOS) level, low-voltage TTL level, low-voltage CMOS level, etc. When the signal logic level changes, the rising and falling edges of the signal are very steep, and the output slew rate is extremely small, which will cause the circuit to consume too much power instantaneously, causing power integrity problems. The fluctuation of the output slew rate will also cause impedance discontinuity during signal transmission, generating electromagnetic interference, and ultimately causing circuit function failure or causing the entire system to fail to work properly. This phenomenon is becoming more and more obvious as the process size of integrated circuits decreases.

[0003] Therefore, there is an urgent need for a logic signal driving circuit that can provide a slowly changing and constant output slew rate to solve the above problems. Summary of the invention

[0004] 1. Technical issues to be resolved

[0005] Based on the above problems, the present disclosure provides a constant slew rate signal driving system to alleviate technical problems in the prior art such as the output slew rate being too small resulting in excessive instantaneous power consumption of the circuit or the output slew rate fluctuation causing impedance discontinuity during signal transmission, generating electromagnetic interference, resulting in circuit function failure or causing the entire system to fail to work properly.

[0006] (II) Technical solution

[0007] The present disclosure provides a constant slew rate signal driving system, comprising: a step voltage generating unit, used to provide multiple equal-difference voltage signals; a multiplexer, one input end of which is connected to the step voltage generating unit to receive the multiple equal-difference voltage signals, and the other input end is connected to a control signal generating unit, used to selectively output the multiple equal-difference voltage signals under the control of the control signal sent by the control signal generating unit; a voltage follower unit, connected to the multiplexer, which plays an isolation role and improves the driving capability; an output follower unit, connected to the voltage follower unit, used to drive a subsequent load unit.

[0008] In the embodiment of the present disclosure, the step voltage generating unit includes a current source, a plurality of equal value resistors, and a signal triode module connected in series.

[0009] In the disclosed embodiment, the collector of the signal transistor module is connected to the base, and the emitter is grounded.

[0010] In the embodiment of the present disclosure, the voltage follower unit is an operational amplifier in the form of a voltage follower, and its input voltage is consistent with its output voltage.

[0011] In the embodiment of the present disclosure, the output follower unit is an emitter follower biased by a current source composed of a driving transistor module and a bias current source.

[0012] In the embodiment of the present disclosure, the input end of the output follower unit is connected to the base of the driving transistor module, and the output end is connected to the emitter of the driving transistor module, and has the ability to drive heavy loads.

[0013] In the embodiment of the present disclosure, the ratio of the number of units of the driving transistor module to the number of units of the signal transistor module is M. 1 / M 0 The current value ratio I of the bias current source and the current source 1 / I 0 Equal, that is:

[0014]

[0015] The emitter junction voltage of the signal transistor module is made the same as the emitter junction voltage of the driving transistor module.

[0016] In the embodiment of the present disclosure, the control signal generating unit includes a rising edge detection module, a falling edge detection module and a reversible counter, and generates the control signal required by the multiplexer by detecting the rising edge or the falling edge of the input signal.

[0017] In the embodiment of the present disclosure, the number of equivalent resistors is n-1. When the rising edge of the input signal of the control signal generating unit arrives, the final output voltage signal of the signal driving system starts to increase from 0V, and the increasing step is Δ V, until the final output voltage signal is (n-1) Δ V, the output voltage signal low level is 0V, and the high level is (n-1) Δ V, when n tends to infinity, the slew rate SlewRate of its output voltage signal is:

[0018]

[0019] Where T is the clock cycle. The signal driving system can set the clock cycle, Δ V and n parameters are used to obtain output voltage signals with different slopes and high-level voltages to meet different application requirements.

[0020] (III) Beneficial effects

[0021] It can be seen from the above technical solutions that the constant slew rate signal driving system disclosed in the present invention has at least one or part of the following beneficial effects:

[0022] (1) The control signal generating unit sequentially selects the increasing step voltage output based on the clock cycle, and the output slew rate is constant and controllable and does not change with the load;

[0023] (2) The step voltage generating unit and the output follower unit are cleverly optimized so that the emitter junction voltages with different process and temperature change trends cancel each other out to obtain a consistent output signal, thereby improving the chip production yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present disclosure but do not constitute a limitation of the present disclosure. In the accompanying drawings:

[0025] Figure 1 A schematic diagram of the structure of a signal driving system with a constant slew rate according to an embodiment of the present disclosure is shown;

[0026] Figure 2 A timing waveform diagram of a constant slew rate signal driving system according to an embodiment of the present disclosure is schematically shown;

[0027] Figure 3 A schematic diagram showing the composition structure of a control signal generating unit in a constant slew rate signal driving system according to an embodiment of the present disclosure is shown;

[0028] Reference numerals:

[0029] I 0 -The current value is I 0 Current source; C 0 , C 1 , C 2 ...C n-1 - n voltage output nodes of the step voltage generating unit; A 0 , A 1 、A2...A n-2 , A n-1 -n input terminals of the multiplexer; Q0-signal transistor module; CON-control signal; OUT-output signal port of the multiplexer; V A - Output voltage signal of the multiplexer; V B - Output voltage signal of the voltage follower unit; I 1 -Bias current; Q 1 -Drive transistor module; C L - Load capacitance; R L -Load resistance; VOUT -Final output voltage signal; CLK-clock signal; IN-input logic signal; INC-increment pulse signal; DEC-decrement pulse signal. DETAILED DESCRIPTION

[0030] The present disclosure provides a signal driving system with a constant slew rate, which utilizes a control signal generating unit to sequentially select increasing step voltage outputs based on a clock cycle, and the output slew rate is constant and controllable and does not vary with load.

[0031] In the process of implementing the present disclosure, the inventors found that connecting a resistor in series or a capacitor in parallel at the signal output node can reduce the slew rate of the output signal, obtain a slowly changing rise time or fall time, and improve the power integrity and reduce electromagnetic compatibility. However, this method increases the cost of circuit production and is susceptible to changes in the integrated circuit process, or to changes in temperature and power supply voltage. Therefore, the step voltage generating unit and the output follower unit are cleverly designed so that the emitter junction voltages with different trends in process and temperature change offset each other to obtain a consistent output signal, thereby improving the chip production yield.

[0032] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0033] In an embodiment of the present disclosure, a constant slew rate signal driving system is provided, Figures 1 to 3 As shown, the constant slew rate signal driving system comprises:

[0034] The step voltage generating unit includes a series-connected current source, a plurality of equal-value resistors, and a signal triode module, and is used to provide multiple equal-valued progressive voltage signals;

[0035] A multiplexer, one input end of which is connected to the step voltage generating unit to receive the plurality of equidistantly variable voltage signals, and the other input end of which is connected to a control signal generating unit, and is used to selectively output the plurality of equidistantly variable voltage signals under the control of the control signal sent by the control signal generating unit;

[0036] A voltage follower unit, connected to the multiplexer, plays an isolating role and improves driving capability;

[0037] The output follower unit is connected to the voltage follower unit, and comprises a current source biased emitter follower composed of a driving transistor module and a bias current source, and is used to drive a subsequent load unit.

[0038] In the embodiment of the present disclosure, the step voltage generating unit includes n-1 resistors with a resistance value of R connected in series, the top end of which is connected to a current value of I 0The current source to the power supply terminal, the voltage drop caused by each resistor is Δ V=I 0 *R; the bottom end is connected to the signal transistor module Q 0 to ground, its collector is connected to the base, the emitter is grounded, the signal transistor module Q 0 The unit value (M value) is M 0 , when the current value is I 0 The emitter junction voltage generated by the current source is V BE0 , n-1 resistors form n voltage output nodes, from bottom to top are C 0 , C 1 , C 2 ...C n-1 , the output voltages are V BE0 、V BE0 + Δ V.V BE0 +2 Δ V...V BE0 +(n-1) Δ V. Where (n-1) Δ V is equal to the high level voltage.

[0039] In the embodiment of the present disclosure, the multiplexer has n input terminals, which are A 0 , A 1 , A 2 ...A n-2 , A n-1 , and the step voltage generating unit C 0 , C 1 , C 2 ...C n-1 The output signal port OUT is connected to the input terminal of the voltage follower unit, and the control signal input port is connected to the output terminal of the control signal generating unit. When the input control signal CON=0, the output signal port OUT is connected to A 0 When connected, CON=1, the output signal port OUT is connected to A 1 The connection is similar. When the control signal CON=n-1, the output signal port OUT is connected to the input terminal A. n-1 Therefore, when the control signal CON increases from 0 to n-1, the output voltage signal V A by Δ V is a ladder from V BE0 Increment to V BE0 +(n-1) Δ V, if n is large enough, it can be approximated that V A In a linear fashion from V BE0 Increment to V BE0 +(n-1)Δ V.

[0040] The voltage follower unit is used to isolate the front and rear circuits and provide a larger driving capability to drive the rear circuit, and its input voltage is consistent with the output voltage. It can be composed of an operational amplifier connected in the form of a voltage follower, with the input end connected to the output signal port OUT of the multiplexer, and the output end connected to the input end of the output follower unit connected thereto. Since it has a larger input impedance voltage, the follower circuit will not affect the front multiplexer and the step voltage generating unit, and since it has a smaller output impedance, it can provide a larger driving capability to drive the rear circuit, thereby achieving isolation of the front and rear circuits; the output voltage signal V B With the input voltage signal V A Consistent.

[0041] The output follower unit includes a current source biased emitter follower composed of a driving transistor module and a bias current source. The input end of the output follower unit is the driving transistor module Q 1 The base is connected to the output end of the voltage follower unit, and the output end is the driving transistor module Q 1 The emitter of the driving transistor module Q 1 The unit value is M 1 , when the bias current is I 1 Under the action of the bias current source, the emitter junction voltage drop of the driving transistor module is V BE1 .

[0042] The output follower unit is connected to a subsequent load unit, and the load unit includes a load capacitor C L And the load resistance R L , the final output voltage signal is V OUT , it can be concluded from the characteristics of this circuit:

[0043] V OUT =V B -V BE1 ;

[0044] The output follows the input voltage signal V B They are: V BE0 、V BE0 + Δ V.V BE0 +2 Δ V...V BE0 +(n-1) Δ V, its output voltage signal V OUT They are: V BE0 -V BE1 、V BE0 -V BE1+ Δ V.V BE0 -V BE1 +2 Δ V...V BE0 -V BE1 +(n-1) Δ V.

[0045] Since the emitter junction voltage drop of the transistor module changes with current, temperature, and process deviation, and the change trend of transistors with different parameters is not necessarily the same, for the aforementioned signal transistor module Q 0 And drive transistor module Q 1 , the signal transistor module Q in the step voltage generating unit 0 It is mainly used for signal generation and does not require driving capability. Its size should not be designed too large. 0 The current is as small as possible to avoid power consumption; and the driving transistor module Q in the output follower unit 1 For driving heavy loads, its large size and large bias current are inevitable. Therefore, the two transistors have different sizes and bias currents. By making the driving transistor module Q 1 With the signal transistor module Q 0 The ratio of M 1 / M 0 The current ratio I of the bias current source and the current source 1 / I 0 Equal, that is:

[0046]

[0047] Thus, the signal transistor module Q can be obtained. 0 The emitter junction voltage and the driving transistor module Q 1 The emitter junction voltage has the same effect, that is, V BE0 =V BE1 ; Combined with the above analysis, when the output follows the voltage signal V B They are: V BE0 、V BE0 + Δ V.V BE0 +2 Δ V,...V BE0 +(n-1) Δ V, its output signal V OUT They are: 0, Δ V.2 Δ V, ...(n-1) Δ V.

[0048] The control signal generating unit includes a rising edge detection module, a falling edge detection module and a reversible counter, and its input clock signal (CLK) period is T. The control signal required by the multiplexer is generated by detecting the rising edge or falling edge of the input logic signal (IN). When the system inputs the logic signal IN into the control signal generating unit, the rising edge detection module gives an increasing (INC) pulse signal after detecting the rising edge of the logic signal IN. Under the triggering of this pulse, the reversible counter starts to increase from 0, increases by 1 in each clock cycle until n-1, and then remains unchanged; when the falling edge of IN arrives, the falling edge detection module gives a decreasing (DEC) pulse signal, and at this time the reversible counter starts to decrease from n-1, decreases by 1 in each clock cycle until 0.

[0049] Combined with the above analysis, when the rising edge of the input signal IN arrives, the circuit finally outputs a voltage signal V OUT Starting from 0V, the increment steps are Δ V until (n-1) Δ V. The output signal low level is 0V, and the high level is (n-1) Δ V, when n is large enough, the slew rate SlewRate of the output signal can be approximately considered to be:

[0050]

[0051] Where T is the clock period. The circuit can be set by T, Δ V, n and other parameters to obtain different slopes and high-level voltages to meet different application requirements.

[0052] So far, the embodiments of the present disclosure have been described in detail in conjunction with the accompanying drawings. It should be noted that the implementation methods not shown or described in the drawings or the body of the specification are all forms known to ordinary technicians in the relevant technical field and are not described in detail. In addition, the above definitions of each element and method are not limited to the various specific structures, shapes or methods mentioned in the embodiments, and ordinary technicians in the field can simply change or replace them.

[0053] According to the above description, those skilled in the art should have a clear understanding of the constant slew rate signal driving system disclosed in the present invention.

[0054] In summary, the present disclosure provides a constant slew rate signal driving system, including a step voltage generating unit, a multiplexer, a voltage following unit, an output following unit, and a control signal generating unit; the step voltage generating unit generates multiple step voltages and superimposes the V of a signal triode module. BE0voltage; the multiplexer selects one of the multiple step voltages for output under the control of the control signal, and the voltage follower is used to provide a larger driving capability to drive the subsequent output follower unit. The output follower unit provides a 1:1 voltage driving capability and subtracts a V superimposed on the step voltage generating unit. BE0 The voltage with the same value (V BE1 ) and finally drives the load unit. The present invention can realize the function of the output signal rising or falling with a fixed step size, thereby obtaining a constant output slew rate that does not change with the load, and effectively reducing signal electromagnetic interference.

[0055] It should also be noted that the directional terms mentioned in the embodiments, such as "upper", "lower", "front", "back", "left", "right", etc., are only reference directions of the drawings and are not intended to limit the scope of protection of the present disclosure. Throughout the drawings, the same elements are represented by the same or similar reference numerals. Conventional structures or configurations will be omitted when they may cause confusion in the understanding of the present disclosure.

[0056] Moreover, the shapes and sizes of the components in the figures do not reflect the real size and proportion, but only illustrate the contents of the embodiments of the present disclosure. In addition, in the claims, any reference symbols between brackets shall not be constructed as limiting the claims.

[0057] Furthermore, the word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements.

[0058] The ordinal numbers used in the specification and claims, such as "first", "second", "third", etc., to modify the corresponding elements, do not themselves mean that the elements have any ordinal numbers, nor do they represent the order of one element and another element, or the order in the manufacturing method. The use of these ordinal numbers is only used to clearly distinguish a component with a certain name from another component with the same name.

[0059] In addition, unless the steps are specifically described or must occur in sequence, the order of the above steps is not limited to the above list, and can be changed or rearranged according to the required design. And the above embodiments can be mixed and matched with each other or with other embodiments based on design and reliability considerations, that is, the technical features in different embodiments can be freely combined to form more embodiments.

[0060] Those skilled in the art will appreciate that the modules in the devices in the embodiments may be adaptively changed and set in one or more devices different from the embodiments. The modules or units or components in the embodiments may be combined into one module or unit or component, and in addition they may be divided into multiple submodules or subunits or subcomponents. All features disclosed in this specification (including the accompanying claims, abstracts and drawings) and all processes or units of any method or device disclosed in this manner may be combined in any combination, except that at least some of such features and / or processes or units are mutually exclusive. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstracts and drawings) may be replaced by an alternative feature that provides the same, equivalent or similar purpose. Furthermore, in a unit claim that lists several devices, several of these devices may be embodied by the same hardware item.

[0061] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the present disclosure. It should be understood that the above description is only a specific embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure should be included in the protection scope of the present disclosure.

Claims

1. A constant slew rate signal driving system, wherein an output signal increases or decreases with a fixed step size, thereby obtaining a constant output slew rate that does not change with load, the signal driving system comprising: A step voltage generating unit is used to provide multiple equal-difference voltage signals; A multiplexer, one input end of which is connected to the step voltage generating unit to receive the multiple equal-difference voltage signals, and the other input end of which is connected to a control signal generating unit to selectively output the multiple equal-difference voltage signals under the control of the control signal sent by the control signal generating unit; A voltage follower unit, connected to the multiplexer, plays an isolating role and improves driving capability; An output follower unit, connected to the voltage follower unit, and used to drive a subsequent load unit; The step voltage generating unit includes a current source, a plurality of equal value resistors, and a signal transistor module connected in series; the collector of the signal transistor module is connected to the base, and the emitter is grounded; the output follower unit is an emitter follower biased by a current source composed of a driving transistor module and a bias current source; the input end of the output follower unit is connected to the base of the driving transistor module, and the output end is connected to the emitter of the driving transistor module, and has the ability to drive heavy loads; the ratio of the number of units of the driving transistor module to the signal transistor module is M1 / M0, which is equal to the current value ratio of the bias current source and the current source I1 / I0, that is: ； The emitter junction voltage of the signal transistor module is made the same as the emitter junction voltage of the driving transistor module.

2. According to the constant slew rate signal driving system of claim 1, the voltage follower unit is an operational amplifier in the form of a voltage follower, and its input voltage is consistent with its output voltage.

3. According to the constant slew rate signal driving system of claim 1, the control signal generating unit comprises a rising edge detection module, a falling edge detection module and a reversible counter, and generates the control signal required by the multiplexer by detecting the rising edge or the falling edge of the input signal.

4. The constant slew rate signal driving system according to claim 3, wherein the number of equivalent resistors is n-1, and when the rising edge of the input signal of the control signal generating unit arrives, the final output voltage signal of the signal driving system increases from 0V, and the increasing step is Δ V, until the final output voltage signal is (n-1) Δ V, the output voltage signal low level is 0V, and the high level is (n-1) Δ V, when n tends to infinity, the slew rate SlewRate of its output voltage signal is: ； in, T is the clock cycle. The signal driving system can be set by setting the clock cycle T, Δ V parameter to obtain a constant slew rate output voltage signal.

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