Method for manufacturing epitaxial wafer, silicon-based substrate for epitaxial growth, and epitaxial wafer

Abstract

The present invention provides a method for manufacturing an epitaxial wafer, the method comprising: a step of preparing a silicon substrate having a chamfered portion at the outer periphery; a step of forming an annular groove along the inner periphery of the chamfered portion at the chamfered portion of the silicon substrate; and a step of performing epitaxial growth on the silicon substrate having the groove formed thereon. Thus, a method for manufacturing an epitaxial wafer capable of suppressing cracks generated at the outer periphery chamfered portion from extending toward the center is provided.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing an epitaxial wafer having an epitaxial growth layer on a silicon-based substrate, a silicon-based substrate used in the manufacturing method, and the epitaxial wafer. Background Art

[0002] In order to manufacture a semiconductor epitaxial wafer, epitaxial growth is performed on the surface of a silicon-based substrate (for example, a silicon substrate or a silicon carbide substrate) using a commercially available epitaxial wafer manufacturing apparatus, thereby manufacturing a heterogeneous / homogeneous epitaxial wafer.

[0003] A so-called GaN on Si (gallium nitride on silicon) substrate in which a nitride semiconductor such as gallium nitride (GaN) is grown on a silicon substrate is advantageous for increasing the diameter of the substrate and reducing the cost, and therefore its application in electronic devices and light-emitting diodes is expected.

[0004] In an epitaxial wafer having an epitaxial growth layer composed of a nitride semiconductor disposed on a silicon-based substrate, the film thickness of the epitaxial growth layer increases at the periphery, resulting in a crystal crown (a protrusion higher than the main surface of the growth layer) of the epitaxial growth layer.

[0005] The thickness of each layer of the epitaxial growth layer is selected so that the warpage of the silicon substrate and the stress of the epitaxial growth layer are optimized in the center of the wafer used as a semiconductor device. Therefore, if the above-mentioned crystal crown is generated, the balance between the stress generated in the epitaxial growth layer and the warpage of the substrate will be destroyed, affecting the epitaxial growth layer and generating tortoise shell-like cracks in the epitaxial growth layer near the periphery.

[0006] In order to prevent the generation of such a crystal crown, a method of chamfering the outer periphery of a silicon-based substrate and forming an epitaxial growth layer thereon has been proposed (for example, Patent Document 1).

[0007] Furthermore, since there are large differences in thermal expansion coefficient and lattice constant between the nitride semiconductor and the silicon substrate, stress may be generated between the epitaxial layer and the substrate, causing crack extension.

[0008] As a countermeasure for such cracks, Patent Document 2 proposes performing epitaxial growth in a state where the peripheral portion of a silicon-based substrate is covered with a ring.

[0009] Prior art literature

[0010] Patent Literature

[0011] Patent Document 1: Japanese Patent Application Laid-Open No. 59-227117

[0012] Patent Document 2: Japanese Patent Application Publication No. 2013-171898 Summary of the invention

[0013] Technical Problems to be Solved by the Invention

[0014] Generally, in an epitaxial wafer which is said to be “crack-free”, cracks still exist in a region of about several millimeters from the outer periphery due to the generation of a crystal crown.

[0015] The cracks may extend during the device manufacturing process or cause the epitaxial growth layer to peel off and contaminate the production line. Therefore, a completely crack-free epitaxial substrate is required.

[0016] The inventors of the present application investigated the sources of cracks in the epitaxial layer and found that the cracks were generated from the chamfered portion of the substrate and extended into the wafer surface.

[0017] use Figure 6 Explain this phenomenon. Figure 6 A schematic diagram of a conventional epitaxial wafer is shown. Figure 6 In the drawings, (a) shows a view of the vicinity of the outer periphery of the epitaxial wafer 30 as viewed from above the surface of the wafer, and (b) shows a cross-sectional view taken along line AA of (a).

[0018] The epitaxial wafer 30 has an epitaxial layer 5 formed on the surface of a silicon substrate 1. A chamfered portion 3 is formed on the inner peripheral side of an edge portion 2 of the silicon substrate 1 over the entire periphery of the silicon substrate 1. A crack 6 generated in the outer peripheral portion 7 extends beyond the inner peripheral edge 4 of the chamfered portion 3 toward the inside of the epitaxial wafer 30.

[0019] Usually, a buffer layer is sandwiched between the substrate and the epitaxial layer to relieve the stress in the wafer surface and reduce the warping of the epitaxial wafer. However, as mentioned above, in the GaN-on-Si substrate, cracks will be generated from the periphery due to the stress during growth or cooling. The cracks can be shortened by epitaxial growth techniques such as the structure of the film or growth conditions. However, the inventor believes that since the surface direction of the chamfered part of the outermost periphery of the wafer is different from that of the substrate, the nitride semiconductor will not grow epitaxially, resulting in amorphization, so the stress cannot be relieved, and the stress relief effect generated by the buffer layer becomes smaller.

[0020] In the technique of not performing epitaxial growth or thinning the chamfered portion as shown in Patent Document 2, the chamfered portion must be covered in order to suppress epitaxial growth at the chamfered portion, which makes handling difficult when manufacturing an epitaxial wafer and deteriorates the in-plane film thickness distribution.

[0021] The present invention is made to solve the above-mentioned problems, and its purpose is to provide a method for manufacturing an epitaxial wafer that can suppress cracks generated in the peripheral chamfered portion from extending toward the center portion, a silicon-based substrate for epitaxial growth used in the manufacturing method, and an epitaxial wafer with suppressed cracks.

[0022] Technical means to solve technical problems

[0023] The present invention is carried out to achieve the above-mentioned purpose, and provides a method for manufacturing an epitaxial wafer, which comprises: a process of preparing a silicon substrate having a chamfered portion on the outer periphery; a process of forming an annular groove along the inner periphery of the chamfered portion on the chamfered portion of the silicon substrate; and a process of performing epitaxial growth on the silicon substrate having the groove formed thereon.

[0024] According to this method for manufacturing an epitaxial wafer, the in-plane distribution of the film thickness does not deteriorate, cracks generated in the peripheral chamfered portion are suppressed from extending toward the center, and an epitaxial wafer with fewer cracks entering the wafer surface can be manufactured.

[0025] At this time, in the method for manufacturing an epitaxial wafer, a plurality of the trenches may be formed in a concentric circle shape.

[0026] This can more stably suppress the cracks generated in the outer peripheral chamfered portion from extending toward the center portion.

[0027] At this time, in the method for manufacturing the epitaxial wafer, the groove may be formed by machining, grinding, or dry etching.

[0028] This makes it possible to easily perform groove processing on the chamfered portion, which can suppress the extension of cracks generated in the outer peripheral chamfered portion toward the center portion.

[0029] At this time, in the method for manufacturing an epitaxial wafer, the grooves may be formed so that the number of grooves in the radial direction of the silicon-based substrate is 10 to 100 / mm.

[0030] This makes it possible to more reliably prevent cracks from extending toward the center of the wafer, and to manufacture an epitaxial wafer with fewer cracks that penetrate into the wafer surface.

[0031] At this time, in the method for manufacturing an epitaxial wafer, the groove may be formed so that the width of the groove in the diameter direction of the silicon-based substrate is 4 to 30 μm and the arithmetic mean roughness Ra is 0.1 to 10 μm.

[0032] This makes it possible to more reliably prevent cracks from extending toward the center of the wafer, and to manufacture epitaxial wafers with fewer cracks entering the wafer surface.

[0033] At this time, in the method for manufacturing an epitaxial wafer, at least a gallium nitride (GaN) layer may be grown in the step of performing epitaxial growth.

[0034] In this way, a nitride semiconductor epitaxial wafer with few cracks entering the wafer surface can be manufactured.

[0035] In addition, the present invention provides a silicon substrate for epitaxial growth, which is a silicon substrate for epitaxial growth and has: a chamfered portion formed on the outer periphery of the silicon substrate; and an annular groove formed on the chamfered portion and along the inner periphery of the chamfered portion.

[0036] According to this silicon-based substrate for epitaxial growth, an epitaxial wafer having few cracks entering into the wafer surface during epitaxial growth can be manufactured.

[0037] In this case, the silicon-based substrate for epitaxial growth may be configured such that a plurality of the grooves are formed concentrically.

[0038] This makes it possible to manufacture an epitaxial wafer having fewer cracks that enter the wafer surface during epitaxial growth.

[0039] In this case, the epitaxial wafer may include an epitaxial layer on the silicon-based substrate for epitaxial growth.

[0040] This results in an epitaxial wafer with fewer cracks extending into the wafer surface.

[0041] Effects of the Invention

[0042] As described above, according to the method for manufacturing an epitaxial wafer of the present invention, the in-plane distribution of the film thickness does not deteriorate, the cracks generated in the chamfered portion of the periphery can be suppressed from extending toward the center, and an epitaxial wafer with few cracks entering the wafer surface can be manufactured. In addition, according to the silicon-based substrate for epitaxial growth of the present invention, an epitaxial wafer with few cracks entering the wafer surface during epitaxial growth can be manufactured. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 A schematic diagram showing the outer periphery of the silicon-based substrate of the present invention.

[0044] Figure 2 A schematic diagram showing the periphery of the epitaxial wafer of the present invention.

[0045] Figure 3 The following is a flow chart of manufacturing the epitaxial wafer of the present invention.

[0046] Figure 4 Observation photographs of the outer periphery of the epitaxial wafer of the Example are shown.

[0047] Figure 5 A photograph showing the periphery of an epitaxial wafer of a comparative example is shown.

[0048] Figure 6 A schematic diagram showing the periphery of an epitaxial wafer of a conventional example. DETAILED DESCRIPTION

[0049] Hereinafter, the present invention will be described in detail with reference to the drawings, but the present invention is not limited thereto.

[0050] As described above, there is a need for a method for manufacturing an epitaxial wafer that can suppress cracks generated in the chamfered portion of the outer periphery from extending toward the center portion.

[0051] The inventors of the present application have conducted intensive studies on the above-mentioned technical problems for many times, and as a result, they have found that, through a method for manufacturing an epitaxial wafer having the following steps, the in-plane distribution of the film thickness will not deteriorate, and the cracks generated in the peripheral chamfered portion can be suppressed from extending toward the center portion, thereby manufacturing an epitaxial wafer with fewer cracks entering the wafer surface, thereby completing the present invention. The steps are: a step of preparing a silicon substrate having a chamfered portion at the periphery; a step of forming an annular groove along the inner peripheral edge of the chamfered portion at the chamfered portion of the silicon substrate; and a step of performing epitaxial growth on the silicon substrate having the groove formed thereon.

[0052] In addition, the inventors of the present application have conducted many intensive studies on the above-mentioned technical problems, and as a result, they have found that by using the following silicon-based substrate for epitaxial growth, an epitaxial wafer with fewer cracks entering the wafer surface during epitaxial growth can be manufactured, thereby completing the present invention. The silicon-based substrate for epitaxial growth is a silicon-based substrate for epitaxial growth, which has a chamfered portion formed on the outer peripheral portion of the silicon-based substrate; and an annular groove formed on the chamfered portion and along the inner peripheral edge of the chamfered portion.

[0053] Figure 1 A schematic diagram of the silicon-based substrate of the present invention is shown, and a chamfered portion of the outer periphery of the silicon-based substrate for epitaxial growth of the present invention is magnified. Figure 1 (a) shows a view of the vicinity of the outer peripheral portion 7 of the silicon-based substrate 1 observed from above the substrate surface, and (b) shows a cross-sectional view at AA of (a). Figure 1 As shown, a chamfered portion 3 is formed on the outer peripheral portion 7 of the silicon substrate 1, which is inclined from the edge portion 2 to the surface of the silicon substrate 1. In addition, an annular groove 8 is formed in the chamfered portion 3 (inclined surface) along the inner peripheral edge 4 of the chamfered portion 3.

[0054] In addition, as the silicon-based substrate 1, for example, a silicon (Si) substrate or a silicon carbide (SiC) substrate can be listed. The plane direction (orientation) of the main surface of the substrate and the size of the substrate are not particularly limited. It can be appropriately selected in accordance with the epitaxial growth layer. In the case of epitaxial growth of a nitride semiconductor film such as a GaN-based film, for example, the substrate can be a silicon wafer with a plane direction of <111>.

[0055] Here, the term "annular groove" includes not only a groove that is continuous along the entire inner peripheral edge of the chamfered portion of the substrate, but also a groove that is interrupted in the middle.

[0056] Figure 1An example in which a plurality of grooves are formed is shown, but a single annular groove may also be used. In this case, a single groove appears in the cross section of the chamfered portion. In this case, if the groove is formed in a manner that continuously draws a circle along the entire inner periphery of the chamfered portion of the substrate, the elongation of cracks in the epitaxial layer can be more reliably suppressed during epitaxial growth. Even if the elongation of the cracks is intermittent, the elongation of the cracks can still be suppressed. In this case, since the groove can be easily formed, it is advantageous in terms of operability and cost.

[0057] In addition, if Figure 1 As shown, by forming a plurality of grooves 8 in a concentric shape, the elongation of the crack can also be more reliably suppressed. In this case, the grooves 8 can be formed in a continuous circle, or a plurality of intermittent annular grooves 8 can be formed in a concentric shape, but it is preferably formed on the entire chamfered surface.

[0058] Alternatively, the number of grooves 8 in the chamfered portion 3 may be 10 to 100 / mm in the radial direction. By setting the number of grooves 8 to such a range, the extension of cracks toward the center can be more reliably prevented.

[0059] Furthermore, the width of the groove 8 of the chamfered portion 3 may be 4 to 30 μm, and the arithmetic mean roughness Ra may be 0.1 to 10 μm. By setting the range to this, the extension of the crack toward the center can be more reliably prevented.

[0060] When an epitaxial layer is formed on the silicon-based substrate 1 as described above, an epitaxial wafer is obtained in which cracks are prevented from extending toward the center.

[0061] Figure 2 FIG. 1 shows a schematic diagram of an epitaxial wafer of the present invention, with the chamfered portion 3 of the peripheral portion 7 of the epitaxial wafer magnified. Figure 1 The description of the same parts will be omitted as appropriate.

[0062] Figure 2 (a) is a view showing the periphery of the epitaxial wafer 20 as viewed from above the surface of the wafer, and (b) is a cross-sectional view taken along the line AA of (a). Figure 2 As shown, the crack 6 generated in the chamfered portion 3 when forming the epitaxial layer extends toward the inside of the epitaxial wafer 20, but the extension of the crack 6 can be prevented by the portion of the annular groove 8 provided in the chamfered portion 3 of the silicon-based substrate 1. As a result, the epitaxial wafer 20 is formed with fewer cracks entering the wafer surface.

[0063] Furthermore, after the epitaxial layer 5 is grown, the trench 8 provided in the silicon substrate 1 is covered with the epitaxial layer 5. Figure 2 In (a), the groove 8 is indicated by a dotted line.

[0064] Next, refer to Figures 1 to 3, and the method for manufacturing the epitaxial wafer of the present invention is described. Figure 3 The flow of the method for manufacturing an epitaxial wafer of the present invention is shown.

[0065] First, if Figure 3 As shown in (a) of FIG. 1 , a silicon-based substrate 1 having a chamfered portion 3 on an outer peripheral portion 7 is prepared.

[0066] Then, if Figure 3 As shown in (b), a groove 8 is formed along the inner peripheral edge 4 of the chamfered portion 3 in the chamfered portion 3 of the silicon-based substrate 1. The chamfered portion 3 where the groove 8 is formed is an inclined surface on the side of the surface where epitaxial growth is performed.

[0067] As long as a groove can be formed in the chamfered portion 3, there is no particular limitation on the method for forming the groove 8. The method of forming the groove by machining, grinding with a grinding wheel or the like is inexpensive and therefore preferred. On the other hand, if a chemical method such as dry etching is used, the shape of the groove can be precisely controlled.

[0068] Then, if Figure 3 As shown in (c), epitaxial growth is performed on a silicon substrate 1 having a groove 8 formed in a chamfered portion 3. The method for performing epitaxial growth is not particularly limited. A chemical vapor deposition (CVD) method such as a thermal CVD method, a plasma CVD method, a catalytic CVD method, or a MOVPE (MOCVD) method can be used.

[0069] The composition, thickness, etc. of the epitaxial layer 5 are not particularly limited, and the epitaxial layer 5 may be a nitride semiconductor. The nitride semiconductor may be any one or more of AlN, AlGaN, and GaN.

[0070] The epitaxial layer 5 may be an epitaxial layer composed of a buffer layer and a functional layer formed on the buffer layer, wherein the buffer layer is composed of, for example, a GaN layer, an AlN layer or an AlGaN layer, which relieves stress caused by a difference in thermal expansion coefficient and a difference in lattice constant. For example, after forming the AlN layer, a buffer layer composed of an alternate stack of AlGaN layers and GaN layers may be grown, and a GaN layer may be formed on the surface thereof, and the growth may be performed in such a manner that the overall thickness is about 3 to 10 μm.

[0071] When forming an epitaxial layer of a nitride semiconductor, the MOVPE method can be used. For example, an epitaxial growth layer can be formed on a silicon-based substrate set at a temperature of 900 to 1350°C.

[0072] When the groove 8 is not formed in the chamfered portion 3 as in the conventional art, the crack 6 generated in the chamfered portion 3 directly extends to the epitaxial layer 5 in the wafer surface (refer to Figure 6 ), and in the method for manufacturing the epitaxial wafer of the present invention, as Figure 2As shown, the nitride semiconductor layer is formed after the groove 8 is formed in advance in the chamfered portion 3, so that the crack 6 extending toward the center is blocked by the groove 8, and thus a wafer with fewer cracks entering the surface can be obtained.

[0073] Example

[0074] Hereinafter, the present invention will be described in detail with reference to Examples, but the present invention is not limited thereto.

[0075] (Example)

[0076] A silicon substrate with a diameter of 150 mm, a thickness of 1 mm, and a surface direction of <111> and a chamfered portion formed on the outer periphery of the substrate was prepared. The chamfered portion of the silicon substrate was ground with an 800-grit grinding wheel to form concentric circular grooves with a roughness Ra of 0.350 μm and a groove width of 15 μm.

[0077] Using this silicon substrate, an AlN layer was formed by MOCVD, and then a buffer layer consisting of an alternate stack of AlGaN layers and GaN layers was grown, and a GaN layer was further formed on the top surface thereof. The total thickness of the epitaxial layer was set to 10 μm.

[0078] The outer periphery of the epitaxial wafer was observed under a spotlight. Figure 4 Observation photographs of the periphery of the epitaxial wafer of the embodiment are shown. These observation photographs were taken at three different positions. Figure 4 The position that appears as black and white stripes in the figure corresponds to the position where the groove is formed in the chamfered portion of the substrate. Figure 4 As shown in FIG. 1 , in the observation under the spotlight, no large cracks extending into the wafer surface were observed in the region inside the chamfered portion. It can be seen that the groove formed in the chamfered portion of the silicon substrate suppressed the extension of the cracks into the wafer surface.

[0079] Furthermore, in the epitaxial growth of the present embodiment, since covering of the edge portion as described in Patent Document 2 is not necessary, the in-plane distribution of the film thickness does not deteriorate.

[0080] (Comparative Example)

[0081] Epitaxial growth was performed in the same manner as in the example except that no groove was formed in the chamfered portion of the silicon substrate and the surface was kept mirror-polished (roughness Ra: 0.065 μm).

[0082] Figure 5 Observation photos of the periphery of the epitaxial wafer of the comparative example are shown. Similar to the embodiment, the observation photos are taken at three different positions. Figure 5 As shown, in observation under a spotlight, the chamfered portion had no grooves, cracks were observed almost around the entire circumference of the wafer, and it was confirmed that the cracks generated near the edge portion extended in the wafer surface direction.

[0083] As described above, according to the embodiments of the present invention, it is possible to suppress the extension of cracks generated near the edge portion into the wafer plane without causing deterioration in the in-plane film thickness distribution of the epitaxial layer.

[0084] The present invention is not limited to the above-mentioned embodiments. The above-mentioned embodiments are merely examples, and any technical solution having substantially the same structure as the technical concept described in the claims of the present invention and having the same function and effect is included in the protection scope of the present invention.

Claims

1. A method for manufacturing an epitaxial wafer, characterized in that: It has: A step of preparing a silicon-based substrate having a chamfered portion at an outer periphery; a step of forming an annular groove along the inner peripheral edge of the chamfered portion only in the chamfered portion of the silicon-based substrate; and A step of performing epitaxial growth on the silicon-based substrate having the trench formed therein.

2. The method for manufacturing an epitaxial wafer according to claim 1, characterized in that: A plurality of the grooves are formed in concentric circles.

3. The method for manufacturing an epitaxial wafer according to claim 1, characterized in that: The grooves are formed by machining, grinding or dry etching.

4. The method for manufacturing an epitaxial wafer according to claim 2, characterized in that: The grooves are formed by machining, grinding or dry etching.

5. The method for manufacturing an epitaxial wafer according to claim 1, characterized in that: The grooves are formed so that the number of grooves in the diameter direction of the silicon-based substrate is 10 to 100 / mm.

6. The method for manufacturing an epitaxial wafer according to claim 2, characterized in that: The grooves are formed so that the number of grooves in the diameter direction of the silicon-based substrate is 10 to 100 / mm.

7. The method for manufacturing an epitaxial wafer according to claim 3, characterized in that: The grooves are formed so that the number of grooves in the diameter direction of the silicon-based substrate is 10 to 100 / mm.

8. The method for manufacturing an epitaxial wafer according to claim 4, characterized in that: The grooves are formed so that the number of grooves in the diameter direction of the silicon-based substrate is 10 to 100 / mm.

9. The method for manufacturing an epitaxial wafer according to any one of claims 1 to 8, characterized in that: The groove is formed so that the width of the groove in the diameter direction of the silicon-based substrate is 4 to 30 μm and the arithmetic mean roughness Ra is 0.1 to 10 μm.

10. The method for manufacturing an epitaxial wafer according to any one of claims 1 to 8, characterized in that: In the step of performing epitaxial growth, at least a gallium nitride (GaN) layer is grown.

11. The method for manufacturing an epitaxial wafer according to claim 9, characterized in that: In the step of performing epitaxial growth, at least a gallium nitride (GaN) layer is grown.

12. A silicon-based substrate for epitaxial growth, which is a silicon-based substrate for epitaxial growth, characterized in that: It has: a chamfered portion formed on an outer periphery of the silicon-based substrate; and An annular groove is formed only in the chamfered portion and along the inner peripheral edge of the chamfered portion.

13. The silicon-based substrate for epitaxial growth according to claim 12, characterized in that: A plurality of the grooves are formed in concentric circles.

14. An epitaxial wafer, characterized in that: The silicon-based substrate for epitaxial growth according to claim 12 or 13 has an epitaxial layer thereon.

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