Batch diffusion bonding and electronic devices produced by batch diffusion bonding

Abstract

A method for batch soldering includes: forming a solder joint between a metal region of a first semiconductor die and a metal region of a substrate using a solder preform via a soldering process that does not directly apply pressure to the first semiconductor die, the solder preform having a maximum thickness of 30 μm and a melting point lower than that of the metal regions; setting a soldering temperature of the soldering process such that the solder preform melts and fully reacts with the metal regions of the first semiconductor die and the substrate to form one or more intermetallic phases throughout the solder joint, each intermetallic phase having a melting point higher than the melting point of the solder preform and the soldering temperature; and soldering a second semiconductor die to the same or a different metal region of the substrate without directly applying pressure to the second semiconductor die.

Description

BACKGROUND OF THE INVENTION

[0001] Thermal and electrical properties have played an increasingly important role in the development of semiconductor technology. These factors, in conjunction with miniaturization and improved performance, require high-performance die (chip) attachment processes and materials. Diffusion bonding is one such die attachment process.

[0002] Diffusion bonding involves sputtering a thin layer of solder material onto the backside of a semiconductor wafer. The deposition of the solder material represents a significant portion of the overall wafer cost. Additionally, relatively large forces are used during the die attachment process to achieve a form-fit interconnection because the sputtered solder layer is thin and the lead frame to which the device is attached has a defined curvature.

[0003] The above-described diffusion bonding process also requires specialized equipment, including a bonding force unit for applying relatively large forces to the device to achieve a form-fit interconnection. In addition, mechanical pressure is applied individually to each die and must be maintained until a majority of the solder isothermally solidifies, which limits the throughput of the die attachment process. Further, the bonding temperature must be high to enable complete reaction and isothermal solidification in a short period of time.

[0004] Accordingly, there is a need for an improved batch diffusion bonding process. SUMMARY OF THE INVENTION

[0005] According to an embodiment of a batch bonding method, the method includes: using a first solder preform to form a first weld joint between a metal region of a first semiconductor die and a first metal region of a substrate via a welding process that does not directly apply pressure to the first semiconductor die, the first solder preform having a maximum thickness of 30 μm and a melting point lower than both the metal region of the first semiconductor die and the first metal region of the substrate; setting a welding temperature of the welding process such that the first solder preform melts and fully reacts with the metal region of the first semiconductor die and the first metal region of the substrate to form one or more intermetallic phases throughout the first weld joint, each of the one or more intermetallic phases having a melting point higher than the melting point of the solder preform and the welding temperature; and welding a second semiconductor die to the first metal region or a different metal region of the substrate without directly applying pressure to the second semiconductor die.

[0006] The second semiconductor die can be welded to the substrate via the same or a different welding process used to form the first weld joint.

[0007] Individually or in combination, welding the second semiconductor die to the substrate may include: using a first solder preform or a second solder preform, via the same soldering process used to form the first solder joint and without directly applying pressure to the second semiconductor die, forming a second solder joint between the metal region of the second semiconductor die and the first metal region or a different metal region of the substrate.

[0008] Individually or in combination, the soldering temperature of the soldering process may be set such that the solder preform used to form the second solder joint melts during the soldering process and fully reacts with the metal region of the second semiconductor die and the first metal region or a different metal region of the substrate to form one or more intermetallic phases throughout the second solder joint.

[0009] Individually or in combination, a second solder joint may be formed using a second solder preform, the second solder preform may be thicker than the first solder preform, and the second solder joint may be free of intermetallic phases in the middle portion of the second solder joint.

[0010] Individually or in combination, a second solder joint may be formed using a second solder preform, and the second solder joint may be between the metal region of the second semiconductor die and the first metal region of the substrate.

[0011] Individually or in combination, welding the second semiconductor die to the substrate may include: applying solder paste to the metal region of the second semiconductor die and / or the first metal region or a different metal region of the substrate; and reflowing the solder paste to form a second solder joint between the metal region of the second semiconductor die and the first metal region or a different metal region of the substrate without directly applying pressure to the second semiconductor die.

[0012] Individually or in combination, the solder paste may be reflowed while forming the first solder joint.

[0013] Individually or in combination, the solder paste may be reflowed after forming the first solder joint, and the melting point of the first solder joint may be higher than the reflow temperature of the solder paste such that the first solder joint does not melt during the reflow of the solder paste.

[0014] Individually or in combination, the method may further include welding a connector to the substrate without directly applying pressure to the connector.

[0015] Individually or in combination, welding the connector to the substrate may include using a first solder preform or a second solder preform, via the same soldering process used to form the first solder joint and without directly applying pressure to the connector, forming a solder joint between the connector and the first metal region or a different metal region of the substrate.

[0016] Either alone or in combination, soldering the connector to the substrate may include: applying solder paste to a first metal region or a different metal region of the connector and / or the substrate; and reflowing the solder paste to form a solder joint between the connector and the first metal region or the different metal region of the substrate without applying pressure directly to the connector.

[0017] Alternatively or in combination, the method may further include soldering the third semiconductor die to a side of the first semiconductor die or the second semiconductor die facing away from the substrate without applying pressure directly to the third semiconductor die.

[0018] Either alone or in combination, soldering the third semiconductor die to the side of the first semiconductor die or the second semiconductor die facing away from the substrate may include: using an additional solder preform and forming a solder joint between a metal area of the third semiconductor die facing the substrate and a metal area of the first semiconductor die or the second semiconductor die facing away from the substrate without applying pressure directly to the third semiconductor die.

[0019] Either alone or in combination, soldering the third semiconductor die to the side of the first semiconductor die or the second semiconductor die facing away from the substrate may include: applying solder paste to a metal area of the third semiconductor die facing the substrate and / or a metal area of the first semiconductor die or the second semiconductor die facing away from the substrate; and reflowing the solder paste to form a solder joint between the third semiconductor die and the first semiconductor die or the second semiconductor die without directly applying pressure to the third semiconductor die.

[0020] Alternatively or in combination, the method may further include soldering a metal clamp to a side of the first semiconductor die or the second semiconductor die facing away from the substrate without applying pressure directly to the metal clamp.

[0021] Either alone or in combination, soldering the metal clamp to the side of the first semiconductor die or the second semiconductor die facing away from the substrate may include: using an additional solder preform and forming a solder joint between the metal clamp and the metal area of the first semiconductor die or the second semiconductor die facing away from the substrate without applying pressure directly to the metal clamp.

[0022] Either alone or in combination, soldering the metal clamp to the side of the first semiconductor die or the second semiconductor die facing away from the substrate may include: applying solder paste to the metal clamp and / or the metal area of the first semiconductor die or the second semiconductor die facing away from the substrate; and reflowing the solder paste to form a solder joint between the metal clamp and the first semiconductor die or the second semiconductor die without applying pressure directly to the metal clamp.

[0023] According to an embodiment of an electronic device, the electronic device includes: a first semiconductor die having a metal region; a substrate having a plurality of metal regions; a first solder joint between the metal region of the first semiconductor die and a first metal region of the substrate, the first solder joint having one or more intermetallic phases throughout the first solder joint, each of the one or more intermetallic phases being formed by a solder preform diffused into the metal region of the first semiconductor die and the first metal region of the substrate; and a second semiconductor die soldered to the first metal region or a different metal region of the substrate.

[0024] A second solder joint may be formed between a metal region of the second semiconductor die and the first metal region or a different metal region of the substrate. The second solder joint may have one or more intermetallic phases throughout the second solder joint, or may have no intermetallic phase in an intermediate portion of the second solder joint. A reflowed solder paste may form the second solder joint.

[0025] Individually or in combination, the first semiconductor die may be a power semiconductor die, and the second semiconductor die may be a passive semiconductor die or a logic semiconductor die.

[0026] Individually or in combination, the first semiconductor die may have a different thickness than the second semiconductor die.

[0027] Individually or in combination, the first solder joint may extend laterally beyond one or more sides of the first semiconductor die.

[0028] Individually or in combination, the electronic device may further include a connector attached to the first metal region or a different metal region of the substrate by a solder joint having one or more intermetallic phases or a reflowed solder paste.

[0029] Individually or in combination, the electronic device may further include a third semiconductor die attached to a side of the first semiconductor die or the second semiconductor die facing away from the substrate by a solder joint having one or more intermetallic phases or a reflowed solder paste.

[0030] Individually or in combination, the electronic device may further include a metal clamp attached to a side of the first semiconductor die or the second semiconductor die facing away from the substrate by a solder joint having one or more intermetallic phases or a reflowed solder paste.

[0031] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description and viewing the drawings. Description of the Drawings

[0032] The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals indicate corresponding like parts. Features in the various illustrated embodiments may be combined unless mutually exclusive. The embodiments are illustrated in the drawings and detailed in the following detailed description.

[0033] Figure 1 A block diagram showing a method embodiment of a batch bonding technique for semiconductor dies.

[0034] Figures 2A to 2D Shows Figure 1 Corresponding cross-sectional views of embodiments of blocks 110 to 130 of the method shown in.

[0035] Figures 3 to 5 Shows Figure 1 Corresponding cross-sectional views of additional embodiments of block 130 of the method shown in.

[0036] Figure 6A And Figure 6B Shows Figure 1 Corresponding cross-sectional views of another embodiment of blocks 110 to 130 of the method shown in.

[0037] Figures 7 to 15 Shows Figure 1 Corresponding cross-sectional views of additional embodiments of an electronic device produced according to the method shown in. Detailed Description

[0038] The embodiments described herein provide a batch bonding process for producing electronic devices, whereby one or more semiconductor dies being processed simultaneously are soldered to the same or different substrates using thin solder preforms without directly applying (mechanical) pressure to the semiconductor dies. Each thin solder preform used in the batch bonding process is thin enough (e.g., up to 30 μm thick) such that the soldering temperature of a diffusion soldering process can be set such that each thin solder preform melts and fully reacts with the metal regions of the corresponding semiconductor die and substrate to form one or more intermetallic phases throughout the solder joint. Since no (mechanical) pressure is directly applied to the semiconductor dies during the diffusion soldering process, multiple semiconductor dies can be processed simultaneously via the batch bonding process, and different bonding materials can be used to accommodate different (e.g., passive and / or active) device types.

[0039] Figure 1An embodiment of a batch bonding technique is shown. According to this embodiment, standard front-end (FE) processing (block 100) can be performed, such as etching, grinding, polishing, structuring, and / or metal deposition for source, gate, and drain contacts, and one or more thin solder preforms are cut and placed on the metal areas of one or more semiconductor dies and / or on the metal areas of one or more substrates (block 110). As part of the batch bonding technique, each thin solder preform can be punched or cut from a roll of preform solder material, or each thin solder preform can be a pre-cut preform, a pre-punched preform, etc.

[0040] Each thin solder preform can be applied during die assembly, or each thin solder preform can be pre-applied to a substrate or a semiconductor wafer. In one embodiment, the thin solder preform is applied to the front or back side of a semiconductor wafer including a plurality of semiconductor dies. After applying the thin solder preform to the semiconductor wafer, the semiconductor dies are singulated, for example, by sawing, laser cutting, etching, etc. The thin solder preform can also be applied after the die singulation process. For example, the semiconductor die to be soldered using the thin solder preform can be heated and the thin solder preform can be applied to the front or back side of each heated semiconductor die. The thin solder preform can be punched with the corresponding semiconductor die. In the case where the thin solder preform is pre-applied to the substrate, the thin solder preform can be applied by roll coating, pre-melting, printing, and re-casting, etc. Each thin solder preform used as part of the batch bonding technique can be cut by stamping, laser cutting, etching, etc. Depending on the types of semiconductor dies and substrates to be bonded, the thin solder preforms processed simultaneously can have the same or different thicknesses. More than one thin solder preform can be applied to the same or different substrates as part of the batch bonding technique.

[0041] Generally, the batch bonding technique can be implemented without flux because the die attachment process can be carried out in a vacuum environment under a reducing atmosphere and having formic acid. This is also effective for printed thin solder preforms, where the solder paste can be without flux because the surface can be cleaned with formic acid during the batch bonding technique. In each case, all semiconductor dies to be soldered simultaneously can be bonded to the same substrate, to a single substrate, or to separate substrates in corresponding groups via the batch bonding technique.

[0042] For those semiconductor dies attached to a substrate via diffusion bonding using a thin solder preform, each thin solder preform is formed of a thin and highly uniform solder, e.g., formed of a thin metal film or foil, and each thin solder preform has a maximum thickness of 30 μm (micrometers), e.g., a maximum thickness of 15 μm, e.g., a maximum thickness of 10 μm, or even thinner. Thicker solder preforms with a maximum thickness greater than 30 μm or solder paste can be used to attach some semiconductor dies to the substrate. Thicker solder preforms with a maximum thickness greater than 30 μm or solder paste can also be used to attach connectors such as pins, rivets, metal plates, etc. to the substrate.

[0043] Generally, the term "thin solder preform" as used herein means a solder preform having a maximum thickness of 30 μm and a melting point lower than the metal regions of each semiconductor die and each metal region of the substrate to be joined by the thin solder preform. Such thin solder preforms react completely with the die backside metal and substrate material during the diffusion bonding process, and the resulting solder joints (bond lines) formed between the semiconductor die and the substrate have a high melting point phase throughout the solder joint. The term "high melting point phase" as used herein means an intermetallic phase having a melting point higher than the melting point of the solder preform and higher than the bonding temperature of the diffusion bonding process.

[0044] At thicknesses greater than 30 μm and for soft solder paste, a high melting point phase cannot be produced throughout the solder joint within a reasonable amount of time, and thus the intermediate portion of the resulting solder joint will not be converted to an intermetallic compound but will remain at the original melting temperature. Solder joints without a high melting point phase throughout the solder joint may be suitable for some types of semiconductor dies and connectors, and thus not all dies and devices processed simultaneously as part of a batch bonding technique necessarily use thin solder preforms to attach to the substrate. Thicker solder preforms with a maximum thickness greater than 30 μm or solder paste can be used to attach some semiconductor dies and / or connectors to the substrate. For some applications, thin solder preforms can be used to attach all semiconductor dies processed simultaneously as part of a batch bonding technique to the substrate.

[0045] Figure 1 The batch bonding technique shown also includes picking up and placing each semiconductor die to be processed simultaneously on a corresponding substrate (block 120). As described above, all semiconductor dies to be processed simultaneously via the batch bonding technique can be placed on the same substrate, on a single substrate, or on corresponding sets of separate substrates. Thicker solder preforms with a maximum thickness greater than 30 μm or solder paste can also be used to attach connectors such as pins, rivets, metal plates, etc. to the substrate via the batch bonding technique.

[0046] Figure 1The batch bonding technique shown also includes a batch die bonding process (block 130). The batch die bonding process involves bonding each semiconductor die to the same or different metal areas of the substrate. If the electronic device being produced includes connectors such as pins, rivets, metal plates, etc., then as part of the die bonding process, the connectors can be attached to the substrate. The die bonding process involves bonding the components to the same or different metal areas of the substrate without directly applying (mechanical) pressure to each component (if applicable, the semiconductor die and the connector). In this way, different types of semiconductor dies, die attach materials, and connectors can be processed simultaneously via the batch bonding technique without having to accommodate different height tolerances.

[0047] For each semiconductor die to be bonded to the substrate via a thin solder preform, a corresponding solder joint is formed by diffusion bonding without directly applying (mechanical) pressure to the semiconductor die. By using a thin solder preform up to 30 μm thick, the soldering temperature of the diffusion bonding process can be set such that the solder preform melts and fully reacts with the metal areas of the corresponding semiconductor die and the metal areas of the substrate to form one or more intermetallic phases throughout the solder joint. The melting point of each intermetallic phase is higher than the melting point of the solder preform and the soldering temperature of the die bonding process.

[0048] As part of the bonding process, by not applying direct pressure to the semiconductor die and the connector, multiple dies and connectors can be bonded simultaneously without worrying about the different thicknesses of the die, substrate, connector, and / or die attach material. In this way, some semiconductor dies can be bonded using a thin solder preform, other semiconductor dies can be bonded using a thicker solder preform, and still other semiconductor dies / connectors can be bonded using solder paste. For each semiconductor die bonded using a thin solder preform, if the metal areas of the semiconductor die and the substrate include the same metal or metal alloy, a single intermetallic phase is formed throughout the solder joint by the diffusion bonding process.

[0049] Figure 1 The bonding technique shown can also include a standard front side (FS) contact formation process (block 140) and a standard back end (BE) process (block 150). The standard front side contact formation process can include forming conductive structures for source and gate contacts and solderable front side metallization. The standard back end process can include depositing a metal layer stack for electrically connecting the drain contact. The front side contact formation process and the standard back end process can be performed using the same or different equipment, lines, and / or stations as those represented by blocks 110 to 130 for the batch die bonding process.

[0050] According to Figure 1The batch bonding technique shown in can use a first solder preform to form a first solder joint between the metal region of the first semiconductor die and the first metal region of the substrate via a batch die bonding process (block 130) without directly applying (mechanical) pressure to the first semiconductor die. The maximum thickness of the first solder preform is 30 μm, and the melting point is lower than both the metal region of the first semiconductor die and the first metal region of the substrate. Further according to Figure 1 The batch bonding technique shown in , the bonding temperature of the bonding process can be set such that the first solder preform melts and completely reacts with the metal region of the first semiconductor die and the first metal region of the substrate to form one or more intermetallic phases throughout the first solder joint. The melting point of each intermetallic phase is higher than the melting point of the solder preform and the bonding temperature. Further according to Figure 1 The batch bonding technique shown in , the second semiconductor die can be bonded to the first metal region or a different metal region of the substrate via the batch die bonding process (block 130) for forming the first solder joint without directly applying pressure to the second semiconductor die. Additional semiconductor dies and / or connectors (e.g., pins, rivets, metal plates, etc.) can also be attached to the substrate via the batch die bonding process (block 130) for bonding the first semiconductor die and the second semiconductor die.

[0051] Figures 2A to 2D shows Figure 1 An embodiment of blocks 110 to 130 of the method shown in . Although Figures 2A to 2D shows bonding the first semiconductor die 200 to the first substrate 202 by diffusion bonding using the first thin solder preform 204, as explained earlier in this document, as part of the batch bonding technique, more than one semiconductor die can be simultaneously bonded to the same substrate, bonded to a single substrate, or bonded to separate substrates in corresponding groups. The Figures 2A to 2D diffusion bonding process shown in can be applied to each component welded using a solder preform via the batch bonding technique.

[0052] Figure 2AIllustrated is the application of a first liquid 206 to a first substrate 202. In one embodiment, the first liquid 206 is a volatile non-reactive liquid that holds a first thin solder preform 204 in place on the first substrate 202 by surface tension. Any type of substrate to which semiconductor dies are typically bonded can be used. For example, in one embodiment, the first substrate 202 is a lead frame or a metal fixture having a metal region 208 to which a first semiconductor die 200 is to be bonded. For example, the lead frame or the metal fixture can include Cu, Ni, and / or Ag. In another embodiment, the first substrate 202 includes a ceramic and a metal layer attached to the ceramic, and the first semiconductor die 200 is to be bonded to the metal layer. In one embodiment, the metal layer includes and / or is plated with Cu, Ni, Ag, Au, Pd, Pt, NiV, NiP, NiNiP, NiP / Pd, Ni / Au, NiP / Pd / Au, or NiP / Pd / AuAg. Other types of metals / metal alloys and substrates can also be used.

[0053] Figure 2B Illustrated is the first thin solder preform 204 during placement on the first substrate 202 with the first liquid 206. The first liquid 206 maintains the position of the first thin solder preform 204 relative to the first substrate 202 by surface tension.

[0054] In one embodiment, the first thin solder preform 204 includes Sn, Zn, In, Ga, Bi, Cd, or any alloy thereof. For example, the first thin solder preform 204 can include Sn / Ag / Cu, Sn / Ag, Sn / Ag / Sb, Sn / Sb, Sn / Cu, or Au80 / Sn20. Other types of thin solder preforms can also be used. Alternatively, the first thin solder preform 204 can be applied to the first semiconductor die 200 instead of the first substrate 202. In this case, Figure 2B the first substrate 202 therein is instead the first semiconductor die 200 or the semiconductor wafer used to produce the first semiconductor die 200. For example, the first thin solder preform 204 can be applied to the front or back side of a semiconductor wafer including the first semiconductor die 200 and a plurality of additional semiconductor dies, or the first thin solder preform 204 can be applied to the front or back side of the first semiconductor die 200 after a die singulation process, both as described above.

[0055] Figure 2C Illustrated is the application of a second liquid 210 to the first thin solder preform 204. In one embodiment, the second liquid 210 is a volatile non-reactive liquid that holds the first semiconductor die 200 in place on the first thin solder preform 204 by surface tension. The first liquid 206 and the second liquid 210 can be the same or different types of liquids.

[0056] Figure 2D Shows the first semiconductor die 200 during placement of the second liquid 210 on the first thin solder preform 204. The second liquid 210 maintains the position of the first semiconductor die 200 relative to the first thin solder preform 204 by surface tension. The first thin solder preform 204 can be handled using a clamping mechanism (not shown) to transport the assembly to a diffusion bonding furnace.

[0057] Then, via a diffusion bonding process and without directly applying (mechanical) pressure to the first semiconductor die 200, a solder joint is formed between the metal region 212 of the first semiconductor die 200 facing the first substrate 202 and the metal region 208 of the first substrate 202. The metal region 212 of the first semiconductor die 200 can be a metal layer applied to the back or front side of the first semiconductor die 200. In one embodiment, the metal region 212 of the first semiconductor die 200 comprises and / or is plated with Cu, Ni, Ag, Au, Pd, Pt, NiV, NiP, NiNiP, NiP / Pd, Ni / Au, NiP / Pd / Au, NiP / Pd / AuAg, NiV / Ag, NiV / Au or NiSi / Ag. The metal region 212 can be a terminal of the first semiconductor die 200, e.g., a load or control terminal in the case of a power transistor die (e.g., a power MOSFET (metal oxide semiconductor field effect transistor), IGBT (insulated gate bipolar transistor), HEMT (high electron mobility transistor), etc.), a control or I / O (input / output) terminal in the case of a logic die (e.g., a gate driver, microcontroller, memory, etc.), and the metal region 212 can be a terminal of a passive die (e.g., an inductor or capacitor die, etc.).

[0058] The metal regions 212 of the first semiconductor die 200 and the metal regions 208 of the first substrate 202 to be joined together by a diffusion bonding process and a first thin solder preform 204 may include the same or different metals / metal alloys. If the metal regions 212, 208 joined by the first thin solder preform 204 include the same metal or metal alloy as the first thin solder preform 204, a single intermetallic phase is formed throughout the solder joint formed between the first semiconductor die 200 and the first substrate 202, as explained earlier herein. For example, if the metal region 212 of the first semiconductor die 200 to be joined and the metal region 208 of the first substrate 202 both include Cu or the same Cu-rich alloy, during the diffusion bonding process, Cu will dissolve via the liquefied preform material until a specific concentration is reached, at which point the joint solidifies. The resulting Cu-based intermetallic phase will not remelt at the bonding temperature of the diffusion bonding process. The same applies to other types of common die and substrate metallizations, such as Ni-rich and Ag-rich alloys.

[0059] If the metal regions 212 of the first semiconductor die 200 and the metal regions 208 of the first substrate 202 include different metals or metal alloys, multiple intermetallic phases are formed throughout the solder joint. In either case, the first thin solder preform 204 reacts completely with the metal regions 212 and the metal regions 208 during the diffusion bonding process, such that the solder joint formed between the first semiconductor die 200 and the first substrate 202 has a high melting point phase throughout the solder joint.

[0060] Figure 3 An embodiment of a batch bonding technique represented by Figure 1 boxes 110 to 130 in is shown. Figure 3 An example shows the joining of a first semiconductor die 200' and a second semiconductor die 200" to the metal region 208 of a substrate 202 by the same bonding process. In one embodiment, both the first semiconductor die 200' and the second semiconductor die 200" are power semiconductor dies. In another embodiment, the first semiconductor die 200' is a power semiconductor die, such as a power MOSFET, IGBT, HEMT, etc., and the second semiconductor die 200" is a passive semiconductor die, such as an inductor or capacitor die, etc., or the second semiconductor die 200" is a logic semiconductor die, such as a gate driver, microcontroller, memory, etc.

[0061] In Figure 3In [the above], the second semiconductor die 200" is soldered to the substrate 202 using the same thin solder preform 204 that is used to bond the first semiconductor die 200' to the substrate 202. According to this embodiment, both the first semiconductor die 200' and the second semiconductor die 200" are bonded to the substrate 202 by respective solder joints having one or more intermetallic phases present throughout the solder joints.

[0062] As part of a batch die soldering process (block 130), formic acid 302 can be introduced into the vacuum furnace 300. The formic acid 302 removes oxidation from the substrate 202, each metal region 212', 212", and the thin solder preform 204, thereby improving the wettability of each metal region 212', 212", and the metal region 208 and completely filling the space between the dies 200', 200" and the substrate 202. The temperature of the vacuum furnace 300 is raised to the soldering temperature for a duration under vacuum conditions during which the thin solder preform 204 melts and fully reacts with the corresponding metal regions 212', 212", and the metal region 208 to form one or more intermetallic phases throughout the corresponding solder joints. The batch die soldering process is performed without directly applying (mechanical) pressure to the semiconductor dies 200', 200". In this way, standard diffusion bonding equipment can be used without re-design.

[0063] During the batch die soldering process, solder material is not extruded from beneath the semiconductor dies 200', 200" because (mechanical) pressure is not directly applied to the semiconductor dies 200', 200". If (mechanical) pressure were applied to the semiconductor dies 200', 200" as is typically done during diffusion bonding, air bubbles in the liquid solder material would be extruded from beneath the semiconductor dies 200', 200", creating scalloped structures along the perimeter of each semiconductor die 200', 200". With the batch die soldering process described herein, there may be some capillary effects along the edges of the semiconductor dies 200', 200", but the capillary effects will be uniformly defined and the same around the entire perimeter of the semiconductor dies 200', 200". This means that the solder joints do not exceed the lateral (length and width) dimensions of the semiconductor dies 200', 200" and have the same aspect ratio as the semiconductor dies 200', 200". Moreover, as previously described herein, the corresponding metal regions 212', 212" and the metal region 208 can include the same metal or metal alloy such that a single intermetallic phase is present throughout the corresponding solder joints.

[0064] Figure 4 Another embodiment of the batch bonding technique represented by Figure 1 blocks 110 to 130 in [the above] is shown. Figure 4 The embodiment shown in [the above] is similar to Figure 3The embodiment shown in [reference]. However, the difference lies in that the first semiconductor die 200' and the second semiconductor die 200" are bonded to different metal regions 208', 208" of the substrate 202 through the same soldering process. According to this embodiment, the first semiconductor die 200' and the second semiconductor die 200" can be soldered to different metal regions 208', 208" of the substrate 202 through separate thin solder preforms 204', 204". The soldering temperature of the soldering process can be set such that during the soldering process, the thin solder preform 204" used to form the second solder joint melts and completely reacts with the metal region 212" of the second semiconductor die 200" and the corresponding metal region 208" of the substrate 202 to form one or more intermetallic phases in the entire solder joint between the second semiconductor die 200" and the substrate 202.

[0065] Alternatively, a thicker solder preform with a maximum thickness greater than 30 μm can be used to solder the second semiconductor die 200" to the substrate 202. In this case, high melting point phases will not be generated in the entire solder joint within a reasonable amount of time, and the resulting solder joint between the second semiconductor die 200" and the substrate 202 has no intermetallic phase in the middle part of the solder joint.

[0066] Figure 5 shows another embodiment of the batch bonding technique represented by Figure 1 the blocks 110 to 130 in [reference]. Figure 5 The embodiment shown in [reference] is similar to Figure 4 the embodiment shown in [reference]. However, the difference lies in that solder paste 304 is used instead of a solder preform to solder the second semiconductor die 200" to the substrate 202. The solder paste 304 can be applied to the metal region 212" of the second semiconductor die 200" and / or the corresponding metal region 208" of the substrate 202. Then the solder paste 304 is reflowed to form a second solder joint between the metal region 212" of the second semiconductor die 200" and the corresponding metal region 208" of the substrate 202 without directly applying (mechanical) pressure to the second semiconductor die 200". The solder paste 304 can be reflowed while a solder joint is formed between the first semiconductor die 200' and the substrate 202. If the melting point of the solder joint between the first semiconductor die 200' and the substrate 202 is higher than the reflow temperature of the solder paste 304, instead, the solder paste 304 can be reflowed after the solder joint between the first semiconductor die 200' and the substrate 202 is formed, so that the solder joint between the first semiconductor die 200' and the substrate 202 will not melt during the reflow of the solder paste 304. Figure 5Shows a second semiconductor die 200” with different metal regions 208” soldered to a substrate 202 compared to a first semiconductor die 200’. The second semiconductor die 200” can in turn be soldered to a metal region 208’ of the same substrate 202 as the first semiconductor die 200’.

[0067] In either case, Figure 5 the embodiments shown in, for example, combine diffusion soldering with standard soldering by using a thin solder preform 204’ to achieve a diffusion soldering joint and using solder paste 304 or a thicker solder preform to achieve a standard soldering joint. Such an approach may be beneficial for yield purposes. For example, diffusion soldering joints can be used for devices with high lifetime reliability requirements, and standard soldering joints can be used for devices with lower lifetime reliability requirements. Passive devices and low-power devices can also use standard soldering, and high-power and high-reliability devices can use diffusion soldering.

[0068] In Figures 3 to 5 the first semiconductor die 200’ and the second semiconductor die 200” are batch soldered to the substrate 200 without directly applying (mechanical) pressure to any of the semiconductor dies 200’, 200”. More than two semiconductor dies 200 can be joined to the substrate 202 via a batch bonding technique, and as part of the batch bonding technique, additional components such as connectors like pins, rivets, metal plates, etc. can also be attached to the substrate 202 using a thin solder preform, a thicker solder preform with a maximum thickness greater than 30 μm, or solder paste.

[0069] Figure 6A and Figure 6B shows Figure 1 another embodiment of blocks 110 to 130 of the method shown in. According to this embodiment, prior to the batch soldering process, a thin solder preform 204 for joining a metal region 212 of the semiconductor die 200 to a metal region 208 of the substrate 202 has a smaller width and / or a smaller length (W / L) than the metal region 212 of the semiconductor die 200, as shown in Figure 6A . During the batch soldering process, the thin solder preform 204 melts and spreads over the entire metal region 212 of the semiconductor die 200, such that the resulting solder joint 400 has a thickness (T2) less than the initial maximum thickness (T1) of the thin solder preform 204, as shown in Figure 6B . In this way, a solder joint 400 thinner than the thinnest thin solder preform 204 obtainable can be achieved.

[0070] Providing the thin solder preform 204 as a die attach material independent of the metal region 212 offers several advantages. A thin solder preform 204 can be selected that is smaller than the lateral dimension of the semiconductor die 200 (e.g., as shown in Figure 6A and Figure 6B ) to achieve narrow design rules / low pitch. Additionally, using formic acid 302 as part of a batch soldering process provides excellent wetting of the thin solder preform 204 to the substrate 202, fully filling the space between the semiconductor die 200 and the substrate 202. Also in this way, the type of solder preform / material can be easily changed without modifying the bonding / diffusion soldering process.

[0071] Additional embodiments of electronic devices produced by the batch bonding techniques described herein are next described.

[0072] Figure 7 An embodiment of an electronic device is shown where a first semiconductor die 200' and a second semiconductor die 200'' are soldered to the same substrate 202 using separate solder preforms 204', 204''. According to this embodiment, the semiconductor dies 200', 200'' are bonded to the same metal region 208 of the substrate 202 via respective solder joints formed between metal regions (out of view) of the corresponding semiconductor dies 200', 200'' and the metal region 208 of the substrate 202. At least one of the solder preforms 204', 204'' is a thin solder preform such that the corresponding solder joint has one or more intermetallic phases throughout the solder joint. In one embodiment, the first semiconductor die 200' is a power semiconductor die, such as a power MOSFET, IGBT, HEMT, etc., and the second semiconductor die 200'' is a passive semiconductor die, such as an inductor or capacitor die, etc., or the second semiconductor die 200'' is a logic semiconductor die, such as a gate driver, microcontroller, memory, etc.

[0073] Figure 8 An embodiment of an electronic device is shown where the substrate 202 has a plurality of metal regions 208 that are separated from each other. For example, the substrate 202 can include a ceramic 500 and a metal layer 502 attached to the ceramic 500, and the plurality of separated metal regions 208 are patterned into the metal layer 502. In one embodiment, the metal layer 502 comprises and / or is plated with Cu, Ni, Ag, Au, Pd, Pt, NiV, NiP, NiNiP, NiP / Pd, Ni / Au, NiP / Pd / Au, or NiP / Pd / AuAg. Other types of metals / metal alloys and substrates can also be used.

[0074] A first thin solder preform 204' is applied to a first metal region 208' of a substrate 202. A plurality of first semiconductor dies 200' are soldered to the first metal region 208' of the substrate 202. Via a diffusion soldering process that does not directly apply (mechanical) pressure to the first semiconductor dies 200', solder joints (not in view) are formed between the metal regions (not in view) of each first semiconductor die 200' and the first metal region 208' of the substrate 202 using the first thin solder preform 204'. The maximum thickness of the first thin solder preform 204' is 30 μm, and the melting point is lower than both the metal region of the first semiconductor die 200' and the first metal region 208' of the substrate 202.

[0075] A second thin solder preform 204'' is applied to a second metal region 208'' of the substrate 202. A plurality of second semiconductor dies 200'' are soldered to the second metal region 208'' of the substrate 202. Via the diffusion soldering process used to solder the plurality of first semiconductor dies 200' to the first metal region 208' of the substrate 202, solder joints (not in view) are formed between the metal regions (not in view) of each second semiconductor die 200'' and the second metal region 208'' of the substrate 202 without directly applying (mechanical) pressure to the second semiconductor dies 200''. The maximum thickness of the second thin solder preform 204'' is 30 μm, and the melting point is lower than both the metal region of the second semiconductor die 200'' and the second metal region 208'' of the substrate 202.

[0076] Instead, the first thin solder preform 204' or the second thin solder preform 204'' can be thicker than other solder preforms such that the corresponding solder joints formed by the thicker solder preforms do not have an intermetallic phase in the middle portion of the solder joints. At a thickness above 30 μm, a high melting point phase cannot be generated in the entire solder joint formed by the thicker solder preform within a reasonable amount of time, and thus the middle portion of the resulting solder joint will not be converted into an intermetallic compound but will remain at the original melting temperature.

[0077] Figure 9 Another embodiment of an electronic device is shown, in which the substrate 202 has a plurality of metal regions 208 that are separated from each other. Figure 9 The embodiment shown in Figure 8The embodiments shown in [description]. Additionally, the electronic device further includes one or more connectors 600, such as pins, rivets, metal plates, etc., which are soldered to the substrate 202 without directly applying (mechanical) pressure to the (one or more) connectors 600 via the mass bonding techniques described herein. Each connector 600 can be soldered to the substrate 202 by forming a solder joint (not in view) between the corresponding connector 600 and the same or different metal regions 208 of the substrate 202 to which the semiconductor die 200 is to be soldered.

[0078] In one embodiment, each connector 600 is soldered to the substrate 202 via the same soldering process used to form the solder joint between the semiconductor die 200 and the substrate 202 and without directly applying (mechanical) pressure to the connector 600, using the same solder preform or different solder preforms as one or more of those in the semiconductor die 200. If the maximum thickness of the solder preform is 30 μm, a high-melting-phase is obtained throughout the solder joint formed between the connector 600 and the substrate 202. If the solder preform is thicker than 30 μm, a high-melting-phase is not obtained throughout the solder joint, and the middle portion of the solder joint is not converted into an intermetallic compound but remains at the original melting temperature of the solder preform.

[0079] In another embodiment, each connector 600 is soldered to the substrate 202 by applying solder paste (not shown) to the connector 600 and / or to the metal region 208 of the substrate 202 to which the connector 600 is to be joined. The solder paste is then reflowed to form a solder joint between each connector 600 and the corresponding metal region 208 of the substrate 202 without directly applying (mechanical) pressure to the connector 600.

[0080] Figure 10 Another embodiment of the electronic device is shown, in which a first semiconductor die 200' and a second semiconductor die 200" of the same height (Td1 = Td2) are joined to the substrate 202 via respective solder joints 700, 702. At least one of the solder joints 700, 702 is formed of a thin solder preform and thus has one or more intermetallic phases throughout the solder joint.

[0081] Figure 11 Another embodiment of the electronic device produced according to the mass bonding techniques described herein is shown. Figure 11 The embodiment shown in [description] is similar to Figure 10The embodiment shown in []. However, the difference is that the first semiconductor die 200' and the second semiconductor die 200" have different heights (Td1 < Td2). Since the batch bonding technique described herein does not directly apply (mechanical) pressure to the components being welded, semiconductor dies 200', 200" with different heights Td1, Td2 can be processed simultaneously without additional equipment to accommodate different height tolerances.

[0082] Figure 12 Another embodiment of an electronic device produced according to the batch bonding technique described herein is shown. According to this embodiment, the solder joint 700 between the semiconductor die 200 and the substrate 202 is formed from a thin solder preform and thus has one or more intermetallic phases throughout the solder joint 700. Further according to this embodiment, the solder joint 700 has the same lateral dimensions (length and width) as the semiconductor die 200 bonded to the substrate 202 through the solder joint 700.

[0083] Figure 13 Another embodiment of an electronic device produced according to the batch bonding technique described herein is shown. Figure 13 The embodiment shown in [is similar to] Figure 12 the embodiment shown in []. However, the difference is that the solder joint extends laterally ('ext') beyond one or more sides 800 of the semiconductor die 200. According to this embodiment, the footprint of the semiconductor die 200 is smaller than the solder preform used to form the solder joint between the die 200 and the substrate 202.

[0084] Figure 14 Another embodiment of an electronic device produced according to the batch bonding technique described herein is shown. According to this embodiment, the first semiconductor die 200 is soldered to the substrate 202 via a first solder joint 700, and the first solder joint 700 has one or more intermetallic phases throughout the first solder joint 700, each intermetallic phase being formed by a solder preform diffused into the metal regions of the first semiconductor die 200 and the substrate 202. Further according to this embodiment, without directly applying (mechanical) pressure to the additional semiconductor die 900, the additional semiconductor die 900 is soldered to the side 902 of the first semiconductor die 200 facing away from the substrate 202. The solder joint 904 between the first semiconductor die 200 and the additional semiconductor die 900 can be formed from a solder preform or solder paste.

[0085] In the case of a solder preform, the solder joint 904 between the first semiconductor die 200 and the additional semiconductor die 900 has one or more intermetallic phases. If the maximum thickness of the solder preform is 30 units, the solder joint 904 has one or more intermetallic phases throughout the solder joint 904. Otherwise, the solder joint 904 does not have intermetallic phases in the middle portion of the solder joint 904.

[0086] In the case of solder paste, the solder joint 904 formed between the first semiconductor die 200 and the additional semiconductor die 900 can be formed by applying the solder paste to the metal region at the side 906 of the additional semiconductor die 900 facing the substrate 202 and / or to the metal region at the side 902 of the first semiconductor die 200 facing away from the substrate 202. Then the solder paste is reflowed to form a solder joint between the first semiconductor die 900 and the additional semiconductor die 200 without directly applying (mechanical) pressure to the additional semiconductor die 900.

[0087] Figure 15 Another embodiment of an electronic device produced according to the batch bonding techniques described herein is shown. Figure 15 The embodiment shown in Figure 14 is similar to the embodiment shown in Figure 14 However, the difference is that the additional component soldered to the top side 902 of the first semiconductor die 200 is a metal fixture 1000 instead of the additional semiconductor die 900. The opposite ends of the metal fixture 1000 can be soldered to the same substrate 202 as the first semiconductor die 200, or to a different substrate (not shown) such as a PCB (printed circuit board). As described above for bonding

[0088] In the case of a solder preform, the solder joint 904 between the first semiconductor die 200 and the metal fixture 1000 has one or more intermetallic phases. If the maximum thickness of the solder preform is 30 units, the solder joint 904 has one or more intermetallic phases throughout the solder joint 904. Otherwise, the solder joint 904 does not have intermetallic phases in the middle portion of the solder joint 904.

[0089] In the case of solder paste, a solder joint 904 formed between the first semiconductor die 200 and the metal fixture 1000 can be formed by applying the solder paste to a metal region at a side 1002 of the metal fixture 1000 facing the substrate 202 and / or to a metal region at a side 902 of the first semiconductor die 200 facing away from the substrate 202. The solder paste is then reflowed to form the solder joint 904 between the metal fixture 1000 and the first semiconductor die 200 without directly applying (mechanical) pressure to the metal fixture 1000.

[0090] Terms such as "first", "second", etc. are used to describe various elements, regions, sections, etc. and are not intended to be limiting. Like terms throughout the specification indicate like elements.

[0091] As used herein, the terms "having", "including", "comprising", etc. are open terms indicating the presence of the stated element or feature, but not excluding additional elements or features. The articles "a" and "the" are intended to include the plural and the singular unless the context clearly indicates otherwise.

[0092] It is to be understood that the features of the various embodiments described herein can be combined with each other unless otherwise specifically noted.

[0093] Although specific embodiments have been shown and described herein, those of ordinary skill in the art will recognize that various alternative and / or equivalent implementations may substitute for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any modifications or variations of the specific embodiments described herein. Accordingly, it is intended that the present invention be limited only by the claims and their equivalents.

Claims

1. A method for batch soldering, comprising: Forming a first solder joint between a metal region of the first semiconductor die and a first metal region of a substrate using a first solder preform via a soldering process that does not directly apply pressure to the first semiconductor die, the maximum thickness of the first solder preform being 30 μm, and the melting point of the first solder preform being lower than the melting points of both the metal region of the first semiconductor die and the first metal region of the substrate; Setting a soldering temperature of the soldering process such that the first solder preform melts and fully reacts with the metal region of the first semiconductor die and the first metal region of the substrate to form one or more intermetallic phases throughout the first solder joint, the melting point of each of the one or more intermetallic phases being higher than the melting point of the first solder preform and the soldering temperature; And Welding the second semiconductor die to the first metal region or a different metal region of the substrate without directly applying pressure to the second semiconductor die, wherein Welding the second semiconductor die to the substrate includes: Forming a second solder joint between a metal region of the second semiconductor die and the first metal region or a different metal region of the substrate using a second solder preform or solder paste via the same soldering process used to form the first solder joint and without directly applying pressure to the second semiconductor die, wherein In the case of forming the second solder joint using the second solder preform, the second solder preform is thicker than the first solder preform, and The second solder joint has no intermetallic phase in the middle portion of the second solder joint.

2. The method according to claim 1, wherein Welding the second semiconductor die to the substrate via the same soldering process used to form the first solder joint.

3. The method according to claim 1, wherein, Setting the soldering temperature of the soldering process such that the first solder preform or the second solder preform used to form the second solder joint melts and fully reacts with the metal region of the second semiconductor die and the first metal region or a different metal region of the substrate to form one or more intermetallic phases throughout the second solder joint.

4. The method according to claim 1, wherein, Forming the second solder joint using the second solder preform, and wherein the second solder joint is between the metal region of the second semiconductor die and the first metal region of the substrate.

5. The method according to claim 1, wherein Welding the second semiconductor die to the substrate includes: Applying solder paste to the metal region of the second semiconductor die and / or the first metal region or a different metal region of the substrate; and Reflowing the solder paste to form a second solder joint between the metal region of the second semiconductor die and the first metal region or a different metal region of the substrate without directly applying pressure to the second semiconductor die.

6. The method according to claim 5, wherein Reflowing the solder paste while forming the first solder joint.

7. The method according to claim 5, wherein After forming the first solder joint, the solder paste is reflowed, and wherein the melting point of the first solder joint is higher than the reflow temperature of the solder paste such that the first solder joint does not melt during the reflow of the solder paste.

8. The method according to claim 1, further comprising: Welding the connector to the substrate without directly applying pressure to the connector.

9. The method according to claim 8, wherein, Welding the connector to the substrate includes: Forming a solder joint between the connector and the first metal region or a different metal region of the substrate using the same soldering process used to form the first solder joint and without directly applying pressure to the connector, using the first solder preform or the second solder preform.

10. The method according to claim 8, wherein, Welding the connector to the substrate includes: Applying solder paste to the first metal region or a different metal region of the connector and / or the substrate; and Reflowing the solder paste to form a solder joint between the connector and the first metal region or a different metal region of the substrate without directly applying pressure to the connector.

11. The method according to claim 1, further comprising: Welding the third semiconductor die to a side of the first semiconductor die or the second semiconductor die facing away from the substrate without directly applying pressure to the third semiconductor die.

12. The method according to claim 11, wherein, Welding the third semiconductor die to the side of the first semiconductor die or the second semiconductor die facing away from the substrate includes: Forming a solder joint between a metal region of the third semiconductor die facing the substrate and a metal region of the first semiconductor die or the second semiconductor die facing away from the substrate using an additional solder preform and without directly applying pressure to the third semiconductor die.

13. The method according to claim 11, wherein, Welding the third semiconductor die to the side of the first semiconductor die or the second semiconductor die facing away from the substrate includes: Applying solder paste to a metal region of the third semiconductor die facing the substrate and / or a metal region of the first semiconductor die or the second semiconductor die facing away from the substrate; and Reflowing the solder paste to form a solder joint between the third semiconductor die and the first semiconductor die or the second semiconductor die without directly applying pressure to the third semiconductor die.

14. The method according to claim 1, further comprising: Welding the metal fixture to a side of the first semiconductor die or the second semiconductor die facing away from the substrate without directly applying pressure to the metal fixture.

15. The method according to claim 14, wherein Welding the metal fixture to the side of the first semiconductor die or the second semiconductor die facing away from the substrate includes: Forming a solder joint between the metal fixture and a metal region of the first semiconductor die or the second semiconductor die facing away from the substrate using an additional solder preform and without directly applying pressure to the metal fixture.

16. The method according to claim 14, wherein, Welding the metal fixture to the side of the first semiconductor die or the second semiconductor die facing away from the substrate includes: Applying solder paste to the metal fixture and / or the metal area of the first semiconductor die or the second semiconductor die facing away from the substrate; and Reflowing the solder paste to form a solder joint between the metal fixture and the first semiconductor die or the second semiconductor die without directly applying pressure to the metal fixture.

17. An electronic device, comprising: A first semiconductor die having a metal area; A substrate having a plurality of metal areas; A first solder joint between the metal area of the first semiconductor die and a first metal area of the substrate, the first solder joint having one or more intermetallic phases throughout the first solder joint, each of the one or more intermetallic phases being formed by a solder preform diffused into the metal area of the first semiconductor die and the first metal area of the substrate; And A second semiconductor die welded to the first metal area or a different metal area of the substrate, Wherein a second solder joint is formed between the metal area of the second semiconductor die and the first metal area or a different metal area of the substrate, and wherein the second solder joint does not have an intermetallic phase in the middle portion of the second solder joint.

18. The electronic device according to claim 17, wherein, A second solder joint is formed between the metal area of the second semiconductor die and the first metal area or a different metal area of the substrate, and wherein the second solder joint has one or more intermetallic phases throughout the second solder joint.

19. The electronic device according to claim 17, wherein, The reflowed solder paste forms a second solder joint between the metal area of the second semiconductor die and the first metal area or a different metal area of the substrate.

20. The electronic device according to claim 19, wherein The first semiconductor die is a power semiconductor die, and wherein the second semiconductor die is a passive semiconductor die or a logic semiconductor die.

21. The electronic device according to claim 17, wherein, The first semiconductor die has a different thickness from the second semiconductor die.

22. The electronic device according to claim 17, wherein, The first solder joint extends laterally beyond one or more sides of the first semiconductor die.

23. The electronic device according to claim 17, further comprising a connector attached to the first metal area or a different metal area of the substrate by: A solder joint having one or more intermetallic phases; or Reflowed solder paste.

24. The electronic device according to claim 17, further comprising a third semiconductor die attached to the side of the first semiconductor die or the second semiconductor die facing away from the substrate by: A solder joint having one or more intermetallic phases; or Reflowed solder paste.

25. The electronic device according to claim 17, further comprising a metal fixture attached to the side of the first semiconductor die or the second semiconductor die facing away from the substrate by: A solder joint having one or more intermetallic phases; or Reflowed solder paste.

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