Display device and manufacturing apparatus and method thereof, mask assembly and manufacturing method thereof
By adopting display area design with different resolutions in the display device and utilizing intermediate layers and mask components with different thickness segments, the problems of high manufacturing costs and precise alignment difficulties in the prior art are solved, and high-quality and high-resolution display device manufacturing is achieved.
Patent Information
- Application Number
- CN202011307981.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-08-14
- Filing Date
- 2020-11-20
- Publication Date
- 2025-04-08
- Estimated Expiration
- 2040-11-20
AI Technical Summary
The prior art When manufacturing display devices with different resolutions, it is costly to manufacture mask components individually and difficult to accurately align, making it difficult to manufacture display devices of the required quality.
A display device design is adopted that includes a first and a second display area, wherein each display area has a different resolution and is formed by a mask assembly including an intermediate layer with different thickness segments by depositing material through pattern holes in the mask sheet.
Reduces manufacturing costs, simplifies the manufacturing process of mask assembly, and improves the quality and resolution of display devices.
Smart Images

Figure CN112825326B_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0150484 filed in the Korean Intellectual Property Office on November 21, 2019, Korean Patent Application No. 10-2020-0052893 filed in the Korean Intellectual Property Office on April 29, 2020, and Korean Patent Application No. 10-2020-0102708 filed in the Korean Intellectual Property Office on August 14, 2020, the disclosure of each of which is incorporated herein by reference in its entirety. Technical Field
[0003] Aspects of one or more example embodiments relate to a display device, a mask assembly, a method of manufacturing the mask assembly, an apparatus for manufacturing the display device, and a method of manufacturing the display device. Background Art
[0004] Mobile electronic devices are widely used. In recent years, in addition to small electronic devices such as mobile phones, tablet personal computers (PCs) have been widely used as mobile electronic devices.
[0005] In order to support various functions, such mobile electronic devices generally include a display device for providing visual information such as images or videos to a user. In recent years, as components for driving such display devices have been miniaturized, the area occupied by the display device in the electronic device has gradually increased. Moreover, a structure that can be bent to have a preset angle relative to a plane has been developed.
[0006] Such display devices include pixels, where various portions have different resolutions. The performance of the display device may depend on the type of mask assembly used to deposit organic material on the pixels.
[0007] The above information disclosed in this Background section is only for enhancement of understanding of the background technology and therefore, the information discussed in this Background section does not necessarily constitute prior art. Summary of the invention
[0008] In general, in order to manufacture a display device including display areas with different resolutions, a mask assembly corresponding to each display area may be manufactured and used separately. When the mask assembly is manufactured separately as described above, the manufacturing cost may be relatively higher, and the precise alignment between each mask assembly and the substrate may be difficult, and therefore, it may be difficult to manufacture a display device of the desired quality. Aspects of one or more example embodiments include a display device having a precise pixel pattern, a mask assembly having a precise pattern to manufacture a display device by using one mask assembly, a method of manufacturing the mask assembly, an apparatus for manufacturing the display device, and a method of manufacturing the display device.
[0009] Additional aspects and features will be set forth in part in the description which follows and, in part, will be apparent from the description, or may be learned by practice of the exemplary embodiments presented in the disclosure.
[0010] According to one or more example embodiments, a display device includes: a substrate including a first display area and a second display area, the first display area including a transmissive area, and the second display area is arranged to surround at least a portion of the first display area; a first pixel arranged in the first display area and including a first pixel electrode, a first intermediate layer and a first pair of electrodes; and a second pixel arranged in the second display area and including a second pixel electrode, a second intermediate layer and a second pair of electrodes, wherein each of the first intermediate layer and the second intermediate layer includes a segment at which the thickness is constant and a segment at which the thickness is variable, and a first length of one of the segments at which the thickness of the first intermediate layer is variable and a second length of the other of the segments at which the thickness of the first intermediate layer is variable and a second length of the other of the segments at which the thickness of the second intermediate layer is variable.
[0011] According to some example embodiments, one of the first length and the second length may be smaller than the other of the first length and the second length.
[0012] According to some example embodiments, a resolution of an image provided by the first display area may be different from a resolution of an image provided by the second display area.
[0013] According to some example embodiments, the display device may further include: a member arranged on one surface of the substrate to correspond to the first display area and including an electronic element emitting or receiving light.
[0014] According to some example embodiments, light transmittance of the first display area may be different from light transmittance of the second display area.
[0015] According to some example embodiments, a size of a planar shape of the first intermediate layer may be greater than or equal to a size of a planar shape of the second intermediate layer.
[0016] According to one or more example embodiments, a mask assembly includes a mask sheet, wherein the mask sheet includes: a first area including at least one first pattern hole; a second area including at least one second pattern hole; and a protrusion arranged on an inner surface of the first pattern hole or an inner surface of the second pattern hole, and protruding into one of the first pattern hole and the second pattern hole, wherein the inner surface of the first pattern hole is different from the inner surface of the second pattern hole.
[0017] According to some example embodiments, the protrusion portion may include a first protrusion portion protruding from an inner surface of the first pattern hole into the first pattern hole.
[0018] According to some example embodiments, a thickness of the first region and a thickness of the second region may be equal to or different from each other.
[0019] According to some example embodiments, a planar size of the second pattern holes formed on one surface of the second region may be greater than or equal to a planar size of the first pattern holes formed on one surface of the first region extending from the one surface of the second region.
[0020] According to some example embodiments, a plurality of reference holes are formed in the mask sheet at an edge of the second region.
[0021] According to some example embodiments, the first pattern holes and the second pattern holes may have different shapes from each other on a plane parallel to one surface of the mask sheet.
[0022] According to one or more example embodiments, a method of manufacturing a mask assembly includes: arranging a first photoresist to have a first opening on a first surface of a substrate; arranging a second photoresist to have a second opening and a third opening on a second surface of the substrate; etching a portion of the first surface of the substrate by spraying an etching solution into the first opening; and etching a portion of the second surface of the substrate by spraying an etching solution into the second opening and the third opening to form a first pattern hole and a second pattern hole that penetrate the substrate.
[0023] According to some example embodiments, a width of the second opening may be greater than a width of the first opening.
[0024] According to some example embodiments, a protrusion portion protruding from an inner surface of the second pattern hole inside the second pattern hole may be arranged inside the first pattern hole.
[0025] According to some example embodiments, a distance from the first surface to the protruding portion may be different from a distance from the second surface to the protruding portion.
[0026] According to some example embodiments, the method may further include removing the first photoresist.
[0027] According to some example embodiments, the method may further include removing the second photoresist.
[0028] According to one or more example embodiments, a method for manufacturing a mask assembly includes: arranging a first photoresist on a first surface of a substrate, the first photoresist having a first opening located in a first region of the substrate; arranging a second photoresist on a second surface of the substrate, the second photoresist having a second opening corresponding to the first opening; etching a portion of the first surface of the substrate by spraying an etching solution into the first opening; forming a first pattern hole penetrating the substrate by spraying the etching solution into the second opening; and forming a second pattern hole penetrating the substrate by irradiating a laser beam to a second region adjacent to the first region in the second surface of the substrate.
[0029] According to some example embodiments, shapes of the first pattern holes and the second pattern holes on a plane parallel to the first surface or the second surface may be different from each other.
[0030] According to some example embodiments, on a plane parallel to the first surface or the second surface, an area of the first pattern holes and an area of the second pattern holes may be different from each other.
[0031] According to some example embodiments, the number of first pattern holes and the number of second pattern holes per equal area may be different from each other.
[0032] According to some example embodiments, the method may further include removing the first photoresist.
[0033] According to some example embodiments, the method may further include removing the second photoresist.
[0034] According to some example embodiments, the forming of the second pattern holes may include forming the second pattern holes such that a width of the second pattern holes in a direction perpendicular to a thickness direction of the substrate gradually increases from the first surface to the second surface.
[0035] According to some example embodiments, the second photoresist may further include a third opening formed to correspond to the entire second region, wherein the method further includes etching a portion of the second surface of the substrate by spraying an etching solution into the third opening.
[0036] According to some example embodiments, the method may further include forming second pattern holes penetrating the substrate by irradiating a laser beam onto an etched surface formed to correspond to the third openings on the second surface of the substrate.
[0037] According to some example embodiments, the second photoresist may be located in the second region and may further include at least one fourth opening spaced apart from each other, and the method further includes etching a portion of the second surface of the substrate by spraying an etching solution into the at least one fourth opening.
[0038] According to some example embodiments, the forming of the second pattern holes may include forming the second pattern holes penetrating the substrate by irradiating a laser beam to an etching surface formed to correspond to the at least one fourth opening on the second surface of the substrate.
[0039] According to some example embodiments, the second photoresist may further include a plurality of fifth openings located at edges of the second region, and the method further includes forming at least two reference holes by etching a portion of the second surface of the substrate by spraying an etching solution into the plurality of fifth openings.
[0040] According to some example embodiments, the method may further include: aligning the substrate by using a reference hole before irradiating the laser beam.
[0041] According to one or more example embodiments, an apparatus for manufacturing a display device includes: a chamber; a mask assembly arranged inside the chamber; and a deposition source for supplying a deposition material to a display substrate arranged opposite to the mask assembly, wherein the mask assembly includes a mask sheet, and the deposition material supplied from the deposition source passes through the mask sheet, wherein the mask sheet includes: a first area including at least one first pattern hole; a second area including at least one second pattern hole; and a protruding portion arranged on an inner surface of one of the first pattern hole and the second pattern hole, and protruding into one of the first pattern hole and the second pattern hole, and the inner surface of the first pattern hole and the inner surface of the second pattern hole are different from each other.
[0042] According to some example embodiments, the protrusion portion may include a first protrusion portion protruding from an inner surface of the first pattern hole into the first pattern hole.
[0043] According to some embodiments, the thickness of the first region and the thickness of the second region may be equal to or different from each other.
[0044] According to some example embodiments, a planar size of the second pattern holes formed on one surface of the second region may be greater than or equal to a planar size of the first pattern holes formed on one surface of the first region extending from the one surface of the second region.
[0045] According to some example embodiments, the apparatus may further include: a plurality of reference holes located at an edge of the first region or an edge of the second region.
[0046] According to some example embodiments, the thickness of the mask sheet in the area around the second pattern holes may be less than the thickness of the mask sheet in the first area, and the thickness of the mask sheet in the area between the second pattern holes adjacent to each other may be equal to the thickness of the mask sheet in the first area.
[0047] According to some example embodiments, a width of the second pattern holes in a direction perpendicular to a thickness direction of the mask sheet may be formed to gradually increase from one surface to the other surface of the mask sheet.
[0048] According to some example embodiments, shapes of the first pattern holes and the second pattern holes on a plane parallel to one surface of the mask sheet may be different from each other.
[0049] According to some example embodiments, areas of the first pattern holes and the second pattern holes on a plane parallel to one surface of the mask sheet may be different from each other.
[0050] According to some example embodiments, the number of first pattern holes and the number of second pattern holes per equal area may be different from each other.
[0051] According to some example embodiments, in the mask sheet, a plurality of reference holes are formed at an edge of the second region.
[0052] According to one or more example embodiments, a method for manufacturing a display device includes: arranging and aligning a display substrate and a mask assembly inside a chamber; and supplying a deposition material from a deposition source to the display substrate by passing the deposition material through the mask assembly, wherein the mask assembly includes a mask sheet, and the deposition material supplied from the deposition source passes through the mask sheet, wherein the mask sheet includes: a first area, including at least one first pattern hole; a second area, including at least one second pattern hole; and a protruding portion, arranged on an inner surface of the first pattern hole or an inner surface of the second pattern hole, and protruding into one of the first pattern hole and the second pattern hole, wherein the inner surface of the first pattern hole is different from the inner surface of the second pattern hole.
[0053] According to some example embodiments, the protrusion portion may include a first protrusion portion protruding from an inner surface of the first pattern hole into the first pattern hole.
[0054] According to some example embodiments, a thickness of the first region and a thickness of the second region may be equal to or different from each other.
[0055] According to some example embodiments, a planar size of an entrance portion of the second pattern holes formed on one surface of the second region may be greater than or equal to a planar size of an entrance portion of the first pattern holes formed on one surface of the first region extending from the one surface of the second region.
[0056] According to some example embodiments, in the mask sheet, a plurality of reference holes are formed at an edge of the second region.
[0057] According to one or more example embodiments, a method for manufacturing a display device includes: forming a first intermediate layer on a first display area of a display substrate; and forming a second intermediate layer on a second display area of the display substrate, wherein each of the first intermediate layer and the second intermediate layer includes a segment at which its thickness is constant and a segment at which its thickness is variable, and a first length of one of the segments at which the thickness of the first intermediate layer is variable and the segments at which the thickness of the second intermediate layer is variable is different from a second length of the other of the segments at which the thickness of the first intermediate layer is variable and the segments at which the thickness of the second intermediate layer is variable.
[0058] According to some example embodiments, one of the first length and the second length may be smaller than the other of the first length and the second length.
[0059] According to some example embodiments, a resolution of an image provided by the first display area may be different from a resolution of an image provided by the second display area.
[0060] According to some example embodiments, the method may further include placing a component on one surface of the substrate to correspond to the first display area, and the component includes an electronic element that emits or receives light.
[0061] According to some example embodiments, light transmittance of the first display area may be different from light transmittance of the second display area.
[0062] According to some example embodiments, a size of a planar shape of the first intermediate layer may be greater than or equal to a size of a planar shape of the second intermediate layer.
[0063] According to some example embodiments, a thickness of the section having the constant thickness of the first intermediate layer and a thickness of the section having the constant thickness of the second intermediate layer may be equal to each other.
[0064] Other aspects, features, and characteristics besides those described above will become more apparent from the following drawings, claims and detailed description of the present disclosure.
[0065] The general and specific aspects may be implemented using a system, a method, a computer program, or any combination of the system, method, and computer program. BRIEF DESCRIPTION OF THE DRAWINGS
[0066] The above and other aspects, features and characteristics of certain example embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:
[0067] Figure 1 is a perspective view illustrating a display device according to some example embodiments;
[0068] Figure 2 is a cross-sectional view briefly illustrating a display device according to some example embodiments;
[0069] Figure 3 is a plan view schematically illustrating a display panel according to some example embodiments;
[0070] Figure 4 and Figure 5 is an equivalent circuit diagram of a pixel of a display panel according to some example embodiments;
[0071] Figure 6 is a layout diagram schematically illustrating a pixel circuit of a pixel according to some example embodiments;
[0072] Figure 7 It is along Figure 6 The line I-I' and the line II-II' are intercepted Figure 6 A cross-sectional view of a pixel;
[0073] Figure 8 is a cross-sectional view illustrating an apparatus for manufacturing a display device according to some example embodiments;
[0074] Fig. 9 It is a graphic Figure 8 A perspective view of the mask assembly shown in;
[0075] Fig. 10A and Fig. 10B are plan views schematically illustrating a portion of a mask sheet and a support frame of a mask assembly, respectively, according to some example embodiments;
[0076] Fig.11A is a plan view illustrating a pixel arrangement of a display device according to some example embodiments;
[0077] Fig. 11B The picture is made in Fig.11A A plan view of a portion of a first mask sheet used in a first main pixel and a first auxiliary pixel shown in FIG.
[0078] Fig. 11C The picture is made in Fig.11A A plan view of a portion of a second mask sheet used in a second main pixel and a second auxiliary pixel shown in FIG.
[0079] Fig.11D The picture is made in Fig.11A A plan view of a portion of a third mask sheet used in a third main pixel and a third auxiliary pixel shown in FIG.
[0080] Fig.12 is a plan view illustrating a pixel arrangement of a display device according to some example embodiments;
[0081] Fig.13 is a plan view illustrating a pixel arrangement of a display device according to some example embodiments;
[0082] Fig.14 is a plan view illustrating a pixel arrangement of a display device according to some example embodiments;
[0083] FIG. 15A to FIG. 15F is a cross-sectional view schematically illustrating a process for manufacturing a mask sheet according to some example embodiments;
[0084] FIG. 16A to FIG. 16F is a cross-sectional view schematically illustrating a process for manufacturing a mask sheet according to some example embodiments;
[0085] FIG. 17A to FIG. 17G is a cross-sectional view schematically illustrating a process for manufacturing a mask sheet according to some example embodiments;
[0086] FIG. 18A to FIG. 18F is a cross-sectional view schematically illustrating a process for manufacturing a mask sheet according to some example embodiments;
[0087] Fig.19 is a cross-sectional view schematically illustrating a laser processing apparatus according to some example embodiments;
[0088] FIG. 20A to FIG. 20F is a cross-sectional view schematically illustrating a process for manufacturing a mask sheet according to some example embodiments; and
[0089] Fig.21 is a perspective view of a display device according to some example embodiments. DETAILED DESCRIPTION
[0090] Reference will now be made in more detail to aspects of some example embodiments illustrated in the accompanying drawings, wherein the same reference numerals refer to the same elements throughout. In this regard, the present example embodiments may have different forms and should not be construed as being limited to the description set forth herein. Accordingly, example embodiments are described below only by reference to the accompanying drawings to explain aspects of this specification. As used herein, the term "and / or" includes any and all combinations of one or more related listed items. Throughout this disclosure, the wording "at least one of a, b, and c" indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.
[0091] Since the embodiments allow for various changes and many implementations, the example embodiments will be illustrated in the drawings and described in more detail in the written description. The effects and features of the present disclosure and the methods for achieving these effects and features will be apparent with reference to the embodiments and drawings described in more detail below. However, the present disclosure may be embodied in a variety of different forms and should not be construed as being limited to the example embodiments set forth herein.
[0092] Hereinafter, exemplary embodiments of the present disclosure will be described more fully with reference to the accompanying drawings. The same reference numerals in the drawings refer to the same elements, and thus, description thereof will be omitted.
[0093] It will be understood that although the terms "first", "second", etc. may be used herein to describe various components, these components should not be limited by these terms. These components are only used to distinguish one component from another component.
[0094] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
[0095] It will be further understood that the terms “comprises” and / or “comprising” as used herein specify the presence of stated features or components, but do not preclude the presence or addition of one or more other features or components.
[0096] It will be understood that when a layer, region or component is referred to as being "formed on" another layer, region or component, the layer, region or component may be directly or indirectly formed on the other layer, region or component. That is, for example, intervening layers, regions or components may be present.
[0097] For the convenience of explanation, the sizes of components in the drawings may be exaggerated. In other words, since the sizes and thicknesses of elements in the drawings are arbitrarily illustrated for the convenience of explanation, the following embodiments are not limited thereto.
[0098] In the following examples, the x-axis, y-axis, and z-axis are not limited to the three axes of the rectangular coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other.
[0099] When a certain embodiment can be implemented differently, a specific processing order can be performed differently from the described order. For example, two consecutively described processes can be performed substantially simultaneously or in a reverse order to the described order.
[0100] Figure 1 is a perspective view of a display device DD according to some example embodiments.
[0101] refer to Figure 1 , the display device DD includes a display area DA for realizing an image and a peripheral area PA not for realizing an image. The display area DA may include a first display area DA1 and a second display area DA2, which are arranged adjacent to each other and have different resolutions. For example, the resolution of the first display area DA1 may be lower than the resolution of the second display area DA2. According to some example embodiments, the resolution of the first display area DA1 may be lower than the resolution of the second display area DA2. At this time, the resolution of each display area may be set in each of the display areas, and may be determined by the interval between the centers of adjacent pixels, the pixel size, the total area of pixels per unit area of each display area, and / or the number of pixels per unit area of each display area. That is, the distance between the centers of adjacent pixels of a display area with a lower resolution of the display area may be greater than the distance between the centers of adjacent pixels of a display area with a higher resolution, or the number of pixels arranged per unit area (or equal area) may be less in a display area with a lower resolution than in a display area with a higher resolution. Alternatively, the total area of pixels per unit area (or equal area) of the display area with lower resolution may be smaller than the total area of pixels per unit area (or equal area) of another display area. For ease of explanation, a more detailed description will now be made focusing on the case where the resolution of the first display area DA1 is lower than the resolution of the second display area DA2.
[0102] The transmittance of the first display area DA1 may be different from the transmittance of the second display area DA2. For example, the transmittance of one of the first display area DA1 and the second display area DA2 may be greater than the transmittance of the other of the first display area DA1 and the second display area DA2. For ease of explanation, a more detailed description will now be made focusing on the case where the transmittance of the first display area DA1 is greater than the transmittance of the second display area DA2.
[0103] The first display area DA1 and the second display area DA2 as described above may be arranged in various forms. For example, a portion of the boundary of the first display area DA1 may be arranged inside the second display area DA2, and another portion of the boundary of the first display area DA1 may intersect with the peripheral area PA. According to some example embodiments, the first display area DA1 may be arranged inside the second display area DA2 in such a manner that the boundary of the first display area DA1 is wrapped by the second display area DA2. For ease of explanation, we will now focus on the case where the first display area DA1 is located inside the second display area DA2, and describe this case in more detail.
[0104] For later reference Figure 2 As described, the first display area DA1 and / or the second display area DA2 may be areas where components such as sensors using infrared rays, visible light or sound are arranged thereunder. For ease of explanation, a more detailed description will now be made focusing on the case where components are arranged in the first display area DA1.
[0105] A plurality of main pixels PXm are arranged in the second display area DA2 and may emit light, and a main image may be provided by such light. The first display area DA1 may include a transmission area TA through which light and / or sound output from the component to the outside or light and / or sound traveling from the outside toward the component may pass. According to some example embodiments, when infrared light is transmitted through the first display area DA1, the transmittance may be about 10% or more, for example, about 20% or more, about 25% or more, about 50% or more, about 85% or more, or about 90% or more.
[0106] According to some example embodiments, a plurality of auxiliary pixels PXa may be arranged in the first display area DA1, and a specific image may be provided by using light emitted from the plurality of auxiliary pixels PXa. The image provided by the first display area DA1 is an auxiliary image having a resolution lower than that of the image provided by the second display area DA2. That is, since the first display area DA1 has a transmissive area TA through which light and / or sound can pass, the number of auxiliary pixels PXa that may be arranged per unit area may be smaller than the number of main pixels PXm arranged per unit area in the second display area DA2. According to some example embodiments, the total area of the auxiliary pixels PXa arranged per unit area of the first display area DA1 may be smaller than the total area of the main pixels PXm arranged per unit area of the second display area DA2. According to some example embodiments, the distance between the centers of the auxiliary pixels PXa adjacent to each other in the first display area DA1 may be greater than the distance between the centers of the main pixels PXm adjacent to each other in the second display area DA2. In this case, the auxiliary pixels PXa and the main pixels PXm whose resolutions are compared with each other may emit light of the same color.
[0107] It will now be described that the display device DD according to some example embodiments is an organic light emitting display device, but the display device DD according to an embodiment of the present disclosure is not limited thereto. According to some example embodiments, various types of display devices DD such as an inorganic light emitting display and a quantum dot light emitting display may be used.
[0108] Figure 1The first display area DA1 is shown to be arranged at one side (upper right) of the second display area DA2 which is a rectangle, but the embodiments of the present disclosure are not limited thereto. The second display area DA2 may have a shape such as a circle, an ellipse, or a polygon such as a triangle or a pentagon, and the position of the first display area DA1 and the number of the first display area DA1 may be modified in various ways.
[0109] Figure 2 is a cross-sectional view briefly illustrating a display device DD according to some example embodiments. Figure 2 can correspond to along Figure 1 The line A-A' in Figure 1 sectional view of a display device DD.
[0110] refer to Figure 2 , the display device DD may include a display panel 2 including a display element and a component 3 arranged below the display panel 2 and corresponding to the first display area DA1.
[0111] The display panel 2 may include a substrate 100, a display element layer 200 disposed over the substrate 100, and a thin film encapsulation layer 300 as a sealing member for sealing the display element layer 200. In addition, the display panel 2 may further include a lower protective film 175 under the substrate 100.
[0112] The substrate 100 may include glass or a polymer resin. The polymer resin may include a polymer resin such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate. The substrate 100 including the polymer resin may be flexible, rollable, or bendable. The substrate 100 may have a multilayer structure including a layer including the polymer resin described above and an inorganic layer.
[0113] The display element layer 200 may include a circuit layer including a thin film transistor TFT, an organic light emitting diode OLED as a display element, and an insulating layer IL between the circuit layer and the organic light emitting diode OLED.
[0114] A main pixel PXm including a thin film transistor TFT and an organic light emitting diode OLED connected to the thin film transistor TFT is arranged in the second display area DA2, an auxiliary pixel PXa including a thin film transistor TFT and an organic light emitting diode OLED connected to the thin film transistor TFT is arranged in the first display area DA1, and lines electrically connected to the main pixel PXm and the auxiliary pixel PXa may be arranged.
[0115] In addition, a transmission area TA in which neither thin film transistors TFT nor pixels are arranged may be arranged in the first display area DA1. The transmission area TA may be understood as an area through which light / signals emitted from or incident to the component 3 are transmitted.
[0116] Component 3 may be placed in the first display area DA1. Component 3 may be an electronic component that uses light or sound. For example, component 3 may be a sensor that receives and uses light, such as an infrared sensor, a sensor that recognizes fingerprints or outputs and senses light or sound to measure distance, a small lamp that outputs light, or a speaker that outputs sound. For electronic components that use light, light of various wavelength bands such as visible light, infrared light, and ultraviolet light may be used. The number of components 3 arranged in the first display area DA1 may be multiple. For example, a light emitting device and a light receiving device may be provided together in one first display area DA1 as components 3, respectively. Alternatively, both a light emitting device and a light receiving device may be provided in one component 3.
[0117] The thin film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In this regard, Figure 2 A first inorganic encapsulating layer 310 and a second inorganic encapsulating layer 330 with an organic encapsulating layer 320 therebetween are illustrated.
[0118] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include at least one inorganic insulating material among aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride and silicon oxynitride. The organic encapsulation layer 320 may include a polymer-based material. The polymer-based material may include polyethylene terephthalate, polyethylene naphthoate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyacrylic acid, hexamethyldisiloxane and acrylic resin (e.g., polymethyl methacrylate or polyacrylic acid, etc.), or any combination thereof.
[0119] The lower protective film 175 may be attached under the substrate 100 to support and protect the substrate 100. The lower protective film 175 may have an opening 175OP corresponding to the first display area DA1. By providing the opening 175OP in the lower protective film 175, the light transmittance of the first display area DA1 may be improved. The lower protective film 175 may include polyethylene terephthalate (PET) or polyimide (PI).
[0120] The area of the first display area DA1 may be larger than the area of the region where the component 3 is arranged. Figure 2The area of the first display area DA1 is shown to be equal to the opening 175OP, but the area of the opening 175OP provided in the lower protective film 175 may not correspond to the area of the first display area DA1. For example, the area of the opening 175OP may be smaller than that of the first display area DA1.
[0121] According to some example embodiments, components such as an input sensing member for sensing a touch input, an anti-reflection member including a polarizer and a retarder or a color filter and a black matrix, and a transparent window may be further disposed over the display panel 2 .
[0122] Meanwhile, in the present embodiment, the thin film encapsulation layer 300 is illustrated as being used as an encapsulation member for sealing the display element layer 200, but the embodiments of the present disclosure are not limited thereto. For example, a sealing substrate bonded to the substrate 100 by a sealant or glass frit may be used as a member for sealing the display element layer 200.
[0123] Figure 3 is a plan view schematically illustrating a display panel 2 according to some example embodiments.
[0124] refer to Figure 3 , various components included in the display panel 2 are arranged on a substrate 100. The substrate 100 includes a display area DA and a peripheral area PA surrounding the display area DA. The display area DA includes a second display area DA2 displaying a main image and a first display area DA1 including a transmissive area TA therein and displaying an auxiliary image.
[0125] A plurality of primary pixels PXm are arranged in the second display area DA2. Each of the primary pixels PXm may include a display element such as an organic light emitting device (OLED). Each of the plurality of primary pixels PXm may emit, for example, red light, green light, blue light, or white light through the OLED. As described above, the primary pixel PXm in this specification may be understood as a pixel that emits any one of red light, green light, blue light, and white light. The second display area DA2 may be referred to above. Figure 2 The described sealing member covers and can be protected from moisture or air in the environment, etc.
[0126] The first display area DA1 may be inside the second display area DA2, and a plurality of auxiliary pixels PXa may be in the first display area DA1. Each of the plurality of auxiliary pixels PXa may include a display element such as an OLED. Each of the plurality of auxiliary pixels PXa may emit, for example, red light, green light, blue light, or white light through the OLED. As described above, the auxiliary pixel PXa in this specification may be understood as a pixel that emits any one of red light, green light, blue light, and white light. At the same time, a transmission area TA arranged between the auxiliary pixels PXa may be provided in the first display area DA1.
[0127] Because the first display area DA1 includes the transmissive area TA, the resolution of the first display area DA1 may be lower than that of the second display area DA2. For example, the resolution of the first display area DA1 may be about 1 / 2 of the resolution of the second display area DA2. According to some example embodiments, the resolution of the second display area DA2 may be 400 ppi or more, and the resolution of the first display area DA1 may be about 200 ppi.
[0128] The main pixel PXm and the auxiliary pixel PXa may be electrically connected to an external circuit. The first scan driving circuit 110, the second scan driving circuit 120, the terminal 140, the data driving circuit 150, the first power wiring 160 and the second power wiring 170 may be located or disposed in the peripheral area PA.
[0129] The first scan drive circuit 110 may apply a scan signal to each of the primary pixel PXm and the auxiliary pixel PXa through a scan line SL. The first scan drive circuit 110 may apply an emission control signal to each pixel through an emission control line EL. The second scan drive circuit 120 may be parallel to the first scan drive circuit 110 and have a display area DA therebetween. Some of the primary pixels PXm and the auxiliary pixels PXa located or disposed in the display area DA may be electrically connected to the first scan drive circuit 110, while the other pixels may be connected to the second scan drive circuit 120. In an embodiment, the second scan drive circuit 120 may be omitted.
[0130] The terminal 140 may be located or disposed on one side of the substrate 100. The terminal 140 may be exposed by not being covered by the insulating layer and may be electrically connected to a printed circuit board (PCB). The terminal PCB-P of the PCB may be electrically connected to the terminal 140 of the display panel 10. The PCB transmits a signal or power of a controller (not shown) to the display panel 10. The control signal generated by the controller may be transmitted to the first scan driving circuit 110 and the second scan driving circuit 120 through the PCB. The controller may supply the first power ELVDD and the second power ELVSS to the first power wiring 160 and the second power wiring 170, respectively (see Figure 5 and Figure 6 ). The first power ELVDD may be supplied to each of the main pixel PXm and the auxiliary pixel PXa through the driving voltage line PL connected to the first power wiring 160, and the second power ELVSS may be supplied to the counter electrode of each of the main pixel PXm and the auxiliary pixel PXa connected to the second power wiring 170.
[0131] The data driving circuit 150 is electrically connected to the data line DL. The data signal of the data driving circuit 150 may be applied to each of the main pixel PXm and the auxiliary pixel PXa through the connection wiring 151 connected to the terminal 140 and the data line DL connected to the connection wiring 151. Figure 3 The data driving circuit 150 is located or disposed on the PCB, but in an embodiment, the data driving circuit 150 may be located or disposed on the substrate 100. For example, the data driving circuit 150 may be located or disposed between the terminal 140 and the first power wiring 160.
[0132] The first power wiring 160 may be located or disposed between the second display area DA2 and the terminal 140, and may include first and second sub wirings 162 and 163 extending parallel to each other in the x direction. The second power wiring 170 may partially surround the display area DA in a ring shape having one open side.
[0133] Figure 4 and Figure 5 is an equivalent circuit diagram of a pixel of the display panel 2 according to some example embodiments.
[0134] refer to Figure 4 and Figure 5 , each of the pixels PXm and PXa includes a pixel circuit PC connected to a scan line SL and a data line DL and an organic light emitting device (eg, an organic light emitting diode) OLED connected to the pixel circuit PC.
[0135] The pixel circuit PC includes a driving thin film transistor T1, a switching thin film transistor T2 and a storage capacitor Cst. The switching thin film transistor T2 is connected to the scan line SL and the data line DL and is configured to transmit a data signal Dm input through the data line DL to the driving thin film transistor T1 according to a scan signal Sn input through the scan line SL.
[0136] The storage capacitor Cst is connected to the switching thin film transistor T2 and the driving voltage line PL, and stores a voltage corresponding to a difference between a voltage received from the switching thin film transistor T2 and a driving voltage ELVDD (or power voltage) supplied to the driving voltage line PL.
[0137] The driving thin film transistor T1 is connected to the driving voltage line PL and the storage capacitor Cst, and can control the driving current flowing from the driving voltage line PL to the organic light emitting device OLED to correspond to the voltage value stored in the storage capacitor Cst. The organic light emitting device OLED can emit light with a certain brightness through the driving current.
[0138] Figure 4 The pixel circuit PC is shown to include two thin film transistors and one storage capacitor Cst, but the embodiments of the present disclosure are not limited thereto. Figure 5 As shown in FIG. , the pixel circuit PC may include seven thin film transistors and one storage capacitor Cst. Figure 5 It is shown that the pixel circuit PC includes one storage capacitor Cst, but the pixel circuit PC may include two or more storage capacitors Cst.
[0139] refer to Figure 5 , each of the pixels PXm and PXa includes a pixel circuit PC and an organic light emitting diode OLED connected to the pixel circuit PC. The pixel circuit PC may include a storage capacitor Cst and a plurality of thin film transistors. The thin film transistors and the storage capacitor Cst may be connected to the signal lines SL, SL-1, EL and DL, the initialization voltage line VL and the driving voltage line PL.
[0140] although Figure 5 It is shown that the pixels PXm and PXa are connected to the signal lines SL, SL-1, EL and DL, the initialization voltage line VL and the driving voltage line PL, but the embodiments of the present disclosure are not limited thereto. According to some example embodiments, at least one of the signal lines SL, SL-1, EL and DL, the initialization voltage line VL and the driving voltage line PL, etc. may be shared by adjacent pixels.
[0141] The signal lines include a scan line SL for transmitting a scan signal Sn, a previous scan line SL-1 for transmitting a previous scan signal Sn-1 to the first initialization thin film transistor T4 and the second initialization thin film transistor T7, an emission control line EL for transmitting an emission control signal En to the operation control thin film transistor T5 and the emission control thin film transistor T6, and a data line DL crossing the scan line SL and transmitting a data signal Dm. The driving voltage line PL is configured to transmit a driving voltage ELVDD to the driving thin film transistor T1, and the initialization voltage line VL is configured to transmit an initialization voltage Vint for initializing the driving thin film transistor T1 and the pixel electrode.
[0142] The driving gate electrode G1 of the driving thin film transistor T1 is connected to the bottom electrode CE1 of the storage capacitor Cst, the driving source electrode S1 of the driving thin film transistor T1 is connected to the driving voltage line PL via the operation control thin film transistor T5, and the driving drain electrode D1 of the driving thin film transistor T1 is electrically connected to the pixel electrode of the organic light emitting diode OLED via the emission control thin film transistor T6. The driving thin film transistor T1 receives the data signal Dm according to the switching operation of the switching thin film transistor T2, and converts the driving current I OLED Supplied to the organic light emitting device OLED.
[0143] The switching gate electrode G2 of the switching thin film transistor T2 is connected to the scan line SL, the switching source electrode S2 of the switching thin film transistor T2 is connected to the data line DL, and the switching drain electrode D2 of the switching thin film transistor T2 is connected to the driving source electrode S1 of the driving thin film transistor T1 and is connected to the driving voltage line PL through the operation control thin film transistor T5. The switching thin film transistor T2 is turned on in response to the scan signal Sn received through the scan line SL, and performs a switching operation for transmitting the data signal Dm transmitted to the data line DL to the driving source electrode S1 of the driving thin film transistor T1.
[0144] The compensation gate electrode G3 of the compensation thin film transistor T3 is connected to the scan line SL, the compensation source electrode S3 of the compensation thin film transistor T3 is connected to the driving drain electrode D1 of the driving thin film transistor T1 and is connected to the pixel electrode of the organic light emitting device OLED via the emission control thin film transistor T6, and the compensation drain electrode D3 of the compensation thin film transistor T3 is connected to the bottom electrode CE1 of the storage capacitor Cst, the first initialization drain electrode D4 of the first initialization thin film transistor T4, and the driving gate electrode G1 of the driving thin film transistor T1. The compensation thin film transistor T3 is turned on in response to the scan signal Sn received through the scan line SL, and electrically connects the driving gate electrode G1 to the driving drain electrode D1 of the driving thin film transistor T1, and the driving thin film transistor T1 is diode-connected.
[0145] The first initialization gate electrode G4 of the first initialization thin film transistor T4 is connected to the previous scan line SL-1, the first initialization source electrode S4 of the first initialization thin film transistor T4 is connected to the second initialization drain electrode D7 of the second initialization thin film transistor T7 and the initialization voltage line VL, and the first initialization drain electrode D4 of the first initialization thin film transistor T4 is connected to the bottom electrode CE1 of the storage capacitor Cst, the compensation drain electrode D3 of the compensation thin film transistor T3, and the driving gate electrode G1 of the driving thin film transistor T1. The first initialization thin film transistor T4 is turned on according to the previous scan signal Sn-1 received through the previous scan line SL-1, and transmits the initialization voltage Vint to the driving gate electrode G1 of the driving thin film transistor T1 to initialize the voltage of the driving gate electrode G1 of the driving thin film transistor T1.
[0146] The operation control gate electrode G5 of the operation control thin film transistor T5 is connected to the emission control line EL, the operation control source electrode S5 of the operation control thin film transistor T5 is connected to the driving voltage line PL, and the operation control drain electrode D5 of the operation control thin film transistor T5 is connected to the driving source electrode S1 of the driving thin film transistor T1 and the switching drain electrode D2 of the switching thin film transistor T2.
[0147] The emission control gate electrode G6 of the emission control thin film transistor T6 is connected to the emission control line EL, the emission control source electrode S6 of the emission control thin film transistor T6 is connected to the driving drain electrode D1 of the driving thin film transistor T1 and the compensation source electrode S3 of the compensation thin film transistor T3, and the emission control drain electrode D6 of the emission control thin film transistor T6 is electrically connected to the second initialization source electrode S7 of the second initialization thin film transistor T7 and the pixel electrode of the organic light emitting device OLED.
[0148] The operation control thin film transistor T5 and the emission control thin film transistor T6 are simultaneously turned on according to the emission control signal En received through the emission control line EL, and the driving voltage ELVDD is used to drive the current I OLED The light flows through the main organic light emitting device OLED and is sent to the organic light emitting diode OLED.
[0149] The second initialization gate electrode G7 of the second initialization thin film transistor T7 is connected to the previous scan line SL-1, the second initialization source electrode S7 of the second initialization thin film transistor T7 is connected to the emission control drain electrode D6 of the emission control thin film transistor T6 and the pixel electrode of the organic light emitting device OLED, and the second initialization drain electrode D7 of the second initialization thin film transistor T7 is connected to the first initialization source electrode S4 of the first initialization thin film transistor T4 and the initialization voltage line VL. The second initialization thin film transistor T7 is turned on according to the previous scan signal Sn-1 received through the previous scan line SL-1, and initializes the pixel electrode of the organic light emitting device OLED.
[0150] exist Figure 5 In the embodiment, the first initialization thin film transistor T4 and the second initialization thin film transistor T7 are connected to the previous scan line SL-1, but the embodiments according to the present disclosure are not limited thereto. According to some example embodiments, the first initialization thin film transistor T4 may be connected to the previous scan line SL-1 and may be driven according to the previous scan signal Sn-1, and the second initialization thin film transistor T7 may be connected to a separate signal line (e.g., the next scan line) and may be driven according to a signal sent to the signal line.
[0151] The upper electrode CE2 of the storage capacitor Cst is connected to the driving voltage line PL, and the counter electrode of the organic light emitting device OLED is connected to the common voltage ELVSS. Accordingly, the organic light emitting device OLED can receive the driving current I from the driving thin film transistor T1. OLED , and can emit light to display images.
[0152] Figure 5 It is shown that the compensation thin film transistor T3 and the first initialization thin film transistor T4 have double gate electrodes. However, the compensation thin film transistor T3 and the first initialization thin film transistor T4 may have one gate electrode.
[0153] Figure 6 is a layout diagram schematically illustrating a pixel circuit of a pixel according to some example embodiments. Figure 7 It is along Figure 6 The line I-I' and the line II-II' are intercepted Figure 6 Cross-sectional view of a pixel.
[0154] refer to Figure 6 and Figure 7 , a driving thin film transistor T1 , a switching thin film transistor T2 , a compensation thin film transistor T3 , a first initialization thin film transistor T4 , an operation control thin film transistor T5 , an emission control thin film transistor T6 , and a second initialization thin film transistor T7 are arranged along the semiconductor layer 1130 .
[0155] The semiconductor layer 1130 is disposed on the substrate 100 on which a buffer layer of an inorganic insulating material is formed. According to some example embodiments, the semiconductor layer 1130 may include low temperature polysilicon (LTPS). Since polysilicon material has high electron mobility (greater than 100 cm 2 / Vs), so the semiconductor layer 1130 has low energy consumption and excellent reliability, and thus can be used for a thin film transistor of a display device DD. However, the embodiments according to the present disclosure are not limited thereto. According to some example embodiments, the semiconductor layer 1130 may be formed of amorphous silicon (a-Si) and / or an oxide semiconductor, and some semiconductor layers of the plurality of thin film transistors may be formed of LTPS, and other semiconductor layers may also be formed of amorphous silicon (a-Si) and / or an oxide semiconductor.
[0156] Some areas of the semiconductor layer 1130 correspond to the semiconductor layer of the driving thin film transistor T1, the switching thin film transistor T2, the compensation thin film transistor T3, the first initialization thin film transistor T4, the operation control thin film transistor T5, the emission control thin film transistor T6, and the second initialization thin film transistor T7. In other words, the driving thin film transistor T1, the switching thin film transistor T2, the compensation thin film transistor T3, the first initialization thin film transistor T4, the operation control thin film transistor T5, the emission control thin film transistor T6, and the second initialization thin film transistor T7 can be understood as being connected to each other and bent in various shapes.
[0157] The semiconductor layer 1130 includes a channel region and a source region and a drain region on both sides of the channel region, and the source region and the drain region can be respectively understood as the source electrode and the drain electrode of the corresponding thin film transistor. For convenience, the source region and the drain region will now be referred to as the source electrode and the drain electrode, respectively.
[0158] The driving thin film transistor T1 includes a driving gate electrode G1 overlapping a driving channel region, and includes a driving source electrode S1 and a driving drain electrode D1 on both sides of the driving channel region. The driving channel region overlapping the driving gate electrode G1 has a curved shape such as an Ω shape, and thus a long channel length can be formed in a narrow space. When the driving channel region is long, the driving range of the gate voltage is widened, and therefore, the grayscale of light emitted from the organic light emitting diode OLED can be more accurately controlled. Therefore, the display quality can be improved.
[0159] The switching thin film transistor T2 includes a switching gate electrode G2 overlapping a switching channel region, and includes a switching source electrode S2 and a switching drain electrode D2 on both sides of the switching channel region. The switching drain electrode D2 may be connected to the driving source electrode S1.
[0160] The compensation thin film transistor T3 is a dual thin film transistor, and the compensation thin film transistor T3 may include a compensation gate electrode G3 respectively overlapping two compensation channel regions, and may include a compensation source electrode S3 and a compensation drain electrode D3 arranged on both sides of the compensation source electrode S3. The compensation thin film transistor T3 may be connected to the driving gate electrode G1 of the driving thin film transistor T1 through a node connection line 1174 to be described later below.
[0161] The first initialization thin film transistor T4 is a dual thin film transistor and may include a first initialization gate electrode G4 overlapping two first initialization channel regions and may include a first initialization source electrode S4 and a first initialization drain electrode D4 arranged on both sides of the first initialization gate electrode G4.
[0162] The operation control thin film transistor T5 may include an operation control gate electrode G5 overlapping the operation control channel region, and may include an operation control source electrode S5 and an operation control drain electrode D5 arranged on both sides of the operation control gate electrode G5. The operation control drain electrode D5 may be connected to the driving source electrode S1.
[0163] The emission control thin film transistor T6 may include an emission control gate electrode G6 overlapping the emission control channel region, and may include an emission control source electrode S6 and an emission control drain electrode D6 arranged on both sides of the emission control gate electrode G6. The emission control source electrode S6 may be connected to the driving drain electrode D1.
[0164] The second initialization thin film transistor T7 may include a second initialization gate electrode G7 overlapping the second initialization channel region, and may include a second initialization source electrode S7 and a second initialization drain electrode D7 arranged on both sides of the second initialization gate electrode G7.
[0165] The above-described thin film transistors may be connected to the signal lines SL, SL-1, EL, and DL, the initialization voltage line VL, and the driving voltage line PL.
[0166] The scan line SL, the previous scan line SL-1, the emission control line EL and the driving gate electrode G1 may be arranged on the semiconductor layer 1130 with one or more insulating layers therebetween.
[0167] The scan line SL may extend along the first direction DR1. At least one region of the scan line SL may correspond to the switch gate electrode G2 and the compensation gate electrode G3. For example, regions of the scan line SL that overlap the channel regions of the switch thin film transistor T2 and the compensation thin film transistor T3 may be the switch gate electrode G2 and the compensation gate electrode G3, respectively.
[0168] The previous scan line SL-1 extends along the first direction DR1, but some regions may correspond to the first initialization gate electrode G4 and the second initialization gate electrode G7, respectively. For example, regions of the previous scan line SL-1 that overlap with the channel regions of the first initialization drive thin film transistor T4 and the second initialization drive thin film transistor T7, respectively, may be the first initialization gate electrode G4 and the second initialization gate electrode G7, respectively.
[0169] The emission control line EL extends along the first direction DR1. One or more regions of the emission control line EL may correspond to the operation control gate electrode G5 and the emission control gate electrode G6, respectively. For example, regions of the emission control line EL that overlap the channel regions of the operation control driving thin film transistor T6 and the emission control driving thin film transistor T7, respectively, may be the operation control gate electrode G5 and the emission control gate electrode G6, respectively.
[0170] The driving gate electrode G1 is a floating electrode, and the driving gate electrode G1 may be connected to the compensation thin film transistor T3 through the node connection line 1174 described above.
[0171] The electrode voltage line HL may be disposed on the scan line SL, the previous scan line SL-1, the emission control line EL and the driving gate electrode G1 with one or more insulating layers therebetween.
[0172] The electrode voltage line HL may extend along the first direction DR1 and cross the data line DL and the driving voltage line PL. A portion of the electrode voltage line HL covers at least a portion of the driving gate electrode G1 and may form a storage capacitor Cst together with the driving gate electrode G1. For example, the driving gate electrode G1 may be a bottom electrode CE1 of the storage capacitor Cst, and a portion of the electrode voltage line HL may be an upper electrode CE2 of the storage capacitor Cst.
[0173] The upper electrode CE2 of the storage capacitor Cst is electrically connected to the driving voltage line PL. In this regard, the electrode voltage line HL can be connected to the driving voltage line PL arranged on the electrode voltage line HL through the contact hole CNT. Therefore, the electrode voltage line HL can have the same voltage level (constant voltage) as the driving voltage line PL. For example, the electrode voltage line HL can have a constant voltage of +5V. The electrode voltage line HL can be understood as a lateral driving voltage line.
[0174] The driving voltage line PL extends along the second direction DR2, and the electrode voltage line HL electrically connected to the driving voltage line PL extends along the first direction DR1 crossing the second direction DR2. Therefore, at least one driving voltage line PL and at least one electrode voltage line HL may form a mesh structure in the display area.
[0175] The data line DL, the driving voltage line PL, the initialization connection line 1173 and the node connection line 1174 may be disposed on the electrode voltage line HL with one or more insulating layers therebetween.
[0176] The data line DL extends in the second direction DR2 and may be connected to the switching source electrode S2 of the switching thin film transistor T2 through the contact hole 1154. A portion of the data line DL may be understood as a switching source electrode.
[0177] The driving voltage line PL extends in the second direction DR2 and is connected to the electrode voltage line HL through the contact hole CNT as described above. In addition, the driving voltage line PL may be connected to the operation control thin film transistor T5 through the contact hole 1155. The driving voltage line PL may be connected to the operation control drain electrode D5 through the contact hole 1155.
[0178] One end of the initialization connection line 1173 may be connected to each of the first and second initialization thin film transistors T4 and T7 through a contact hole 1152 , and the other end may be connected to an initialization voltage line VL to be described later below through a contact hole 1151 .
[0179] One end of the node connection line 1174 may be connected to the compensation drain electrode D3 through the contact hole 1156 , and the other end may be connected to the driving gate electrode G1 through the contact hole 1157 .
[0180] The initialization voltage line VL may be disposed on the data line DL, the driving voltage line PL, the initialization connection line 1173 and the node connection line 1174 with one or more insulating layers therebetween.
[0181] The initialization voltage line VL extends in the first direction DR1. The initialization voltage line VL may be connected to each of the first initialization driving thin film transistor T4 and the second initialization driving thin film transistor T7 through an initialization connection line 1173. The initialization voltage line VL may have a constant voltage (eg, -2V, etc.).
[0182] Initialization voltage line VL (see Figure 6 ) is arranged on the same layer as the pixel electrode 210 of the organic light emitting diode OLED (in Figure 7 ), and may include the same material as the pixel electrode 210. The pixel electrode 210 may be connected to the emission control thin film transistor T6. The pixel electrode 210 may be connected to the connection metal 1175 through the contact hole 1163, and the connection metal 1175 may be connected to the emission control drain electrode D6 through the contact hole 1153 (see Figure 6 ).
[0183] exist Figure 6 In the embodiment, the initialization voltage line VL is disposed on the same layer as the pixel electrode 210 , but according to some example embodiments, the initialization voltage line VL may be disposed on the same layer as the electrode voltage line HL.
[0184] In the following, reference will be made to Figure 7 A stack structure of components included in the display panel 2 according to some example embodiments is described.
[0185] The substrate 100 may include glass or a polymer resin. The polymer resin may include a polymer resin such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate. The substrate 100 including the polymer resin may be flexible, rollable, or bendable. The substrate 100 may have a multilayer structure including a layer including the polymer resin described above and an inorganic layer.
[0186] The buffer layer 111 may be arranged on the substrate 100 to reduce or prevent foreign matter, moisture, or air in the environment from penetrating to the bottom of the substrate 100, and may provide a flat surface on the substrate 100. The buffer layer 111 may include an inorganic material such as an oxide or a nitride, an organic material, or an organic-inorganic composite material, and may have a single-layer structure or a multi-layer structure including an inorganic material or an organic material. A barrier layer for preventing the penetration of air in the environment may be further included between the substrate 100 and the buffer layer 111.
[0187] A plurality of gate electrodes G1 and G6 are arranged on the plurality of semiconductor layers A1 and A6, respectively, with a first gate insulating layer 112 therebetween. The gate electrode G1 may include molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), etc., and may be formed of a single layer or multiple layers. For example, the gate electrodes G1 and G6 may be a single layer of Mo. The scan line SL (see Figure 6), the previous scan line SL-1, and the emission control line EL may be formed on the same layer as the gate electrodes G1 and G6. That is, the gate electrodes G1 and G6, the scan line SL (see Figure 6 ), the previous scan line SL-1 and the emission control line EL may be above the first gate insulating layer 112.
[0188] The first gate insulating layer 112 may include silicon oxide (SiO 2 ), Silicon Nitride (SiN X ), silicon oxynitride (SiON), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), Tantalum Oxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ) or zinc oxide (ZnO 2 ).
[0189] The second gate insulating layer 113 may cover the gate electrodes G1 and G6. The second gate insulating layer 113 may include SiO 2 、SiN X 、SiON、Al 2 O 3 、TiO 2 、 2 O 5 , HfO 2 or ZnO 2 .
[0190] The bottom electrode CE1 of the storage capacitor Cst may be integrally formed with the driving gate electrode G1 of the driving thin film transistor T1. For example, the driving gate electrode G1 of the driving thin film transistor T1 may serve as the bottom electrode CE1 of the storage capacitor Cst.
[0191] The upper electrode CE2 of the storage capacitor Cst may overlap with the bottom electrode CE1, with the second gate insulating layer 113 therebetween. In this case, the second gate insulating layer 113 may be used as a dielectric layer of the storage capacitor Cst. The upper electrode CE2 may include a conductive material including Mo, Al, Cu, or Ti, etc., and may be formed of a multilayer or a single layer including the above materials. For example, the upper electrode CE2 may be a single layer of Mo or a multilayer of Mo / Al / Mo.
[0192] In the drawings, the storage capacitor Cst overlaps the driving thin film transistor T1 , but the embodiments according to the present disclosure are not limited thereto. Various modifications are possible, for example, the storage capacitor Cst may be arranged not to overlap the driving thin film transistor T1 .
[0193] The upper electrode CE2 may serve as the electrode voltage line HL. For example, a portion of the electrode voltage line HL may be the upper electrode CE2 of the storage capacitor Cst.
[0194] An interlayer insulating layer 115 may be provided to cover the upper electrode CE2. The interlayer insulating layer 115 may include SiO 2 、SiN X 、SiON、Al 2 O 3 、TiO 2 、 2 O 5 , HfO 2 or ZnO 2 . Figure 7 The interlayer insulating layer 115 is illustrated as a single layer, but according to some example embodiments, the interlayer insulating layer 115 may be formed in a multi-layer structure.
[0195] The data line DL, the driving voltage line PL, and the connection metal 1175 may be arranged above the interlayer insulating layer 115. The data line DL, the driving voltage line PL, and the connection metal 1175 may include a conductive material including Mo, Al, Cu, or Ti, etc., and may be formed as a single layer or multiple layers including the above-described materials. For example, the data line DL, the driving voltage line PL, and the connection metal 1175 may be formed in a multilayer structure of Ti / Al / Ti.
[0196] The upper electrode CE2 of the storage capacitor Cst may be connected to the driving voltage line PL through the contact hole CNT defined in the interlayer insulating layer 115. This may mean that the electrode voltage line HL is connected to the driving voltage line PL through the contact hole CNT. Therefore, the electrode voltage line HL may have the same voltage level (constant voltage) as the driving voltage line PL.
[0197] The connection metal 1175 is connected to the semiconductor layer A6 of the emission control thin film transistor T6 through the contact hole 1153 that passes through the interlayer insulating layer 115, the second gate insulating layer 113, and the first gate insulating layer 112. The emission control thin film transistor T6 may be electrically connected to the pixel electrode 210 of the organic light emitting diode OLED through the connection metal 1175.
[0198] A planarization layer 117 may be disposed on the data line DL, the driving voltage line PL, and the connection metal 1175 , and an organic light emitting diode OLED may be disposed on the planarization layer 117 .
[0199] The planarization layer 117 may have a flat upper surface so that the pixel electrode 210 may be formed to be flat. The planarization layer 117 may be formed of a single layer or multiple layers of an organic material. The planarization layer 117 may include a common polymer such as benzocyclobutene (BCB), polyimide (PI), hexamethyldisiloxane (HMDSO), poly(methyl methacrylate) (PXMMA) and polystyrene (PS), a polymer derivative including a phenolic group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol polymer or a mixture thereof. The planarization layer 117 may include an inorganic material. The planarization layer 117 may include SiO 2 、SiN X 、SiON、Al 2 O 3 、TiO 2 、 2 O 5 , HfO 2 or ZnO 2 When the planarization layer 117 is made of an inorganic material, in some cases, chemical planarization polishing may be performed. Meanwhile, the planarization layer 117 may include both an organic material and an inorganic material.
[0200] The pixel electrode 210 may be a transparent or semi-transparent electrode or a reflective electrode. In some example embodiments, the pixel electrode 210 may include a reflective film including silver (Ag), magnesium (Mg), aluminum, platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr) or a compound thereof, and a transparent or semi-transparent electrode layer formed on the reflective film. The transparent or semi-transparent electrode layer may include a material selected from indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), at least one selected from the group consisting of indium gallium oxide (IGO) and aluminum zinc oxide (AZO). In some example embodiments, the pixel electrode 210 may be provided in a stack structure of ITO / Ag / ITO.
[0201] The pixel defining layer 119 may be disposed above the planarization layer 117 and may have an opening 119OP exposing a central portion of the pixel electrode 210, thereby defining an emission region of the pixel. In addition, the pixel defining layer 119 may prevent or reduce arcing, etc., at the edge of the pixel electrode 210 by increasing the distance between the edge of the pixel electrode 210 and the counter electrode 230 above the pixel electrode 210. The pixel defining layer 119 may include an organic insulating material such as PI, polyamide, acrylic resin, BCB, HMDSO, and phenolic resin, and may be formed by spin coating, etc.
[0202] The intermediate layer 220 of the organic light emitting diode OLED may include an organic emission layer. The organic emission layer may include an organic material including a fluorescent material or a phosphorescent material that emits red light, green light, blue light, or white light. The organic emission layer may be a low molecular organic material or a high molecular organic material, and functional layers such as a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL), and an electron injection layer (EIL) may be selectively further arranged below and above the organic emission layer. The intermediate layer 220 may be arranged to correspond to each of the at least one pixel electrode 210. However, embodiments according to the present disclosure are not limited thereto. Various modifications are possible, for example, the intermediate layer 220 may include an integral layer above the at least one pixel electrode 210.
[0203] In the first display area DA1 and the second display area DA2, the size of at least one intermediate layer 220 emitting light of the same color may be different from each other. For example, the area on the plane of at least one layer among the at least one intermediate layer 220 of the main pixel PXm may be different from the area on the plane of at least one layer among the at least one intermediate layer 220 of the auxiliary pixel PXa. For example, the area on the plane of at least one layer among the at least one intermediate layer 220 of the main pixel PXm may be smaller than the area on the plane of at least one layer among the at least one intermediate layer 220 of the auxiliary pixel PXa. For example, the area on the plane of the HIL among the at least one intermediate layer 220 of the main pixel PXm may be smaller than the area on the plane of the HIL among the at least one intermediate layer 220 of the auxiliary pixel PXa.
[0204] According to some example embodiments, the area on the plane of the organic emission layer in at least one intermediate layer 220 of the main pixel PXm may be smaller than the area on the plane of the organic emission layer in at least one intermediate layer 220 of the auxiliary pixel PXa. According to some example embodiments, the area on the plane of the HIL and the organic emission layer in at least one intermediate layer 220 of the main pixel PXm may be smaller than the area on the plane of the HIL and the organic emission layer in at least one intermediate layer 220 of the auxiliary pixel PXa. In this case, the above relationship is not limited thereto and may be applied to the pixel electrode 210, HTL, ETL, EIL, and the like.
[0205] In addition, the thickness of the intermediate layer 220 of the main pixel PXm and the thickness of the intermediate layer 220 of the auxiliary pixel PXa may be uniform in some sections and variable in other sections. For example, the intermediate layer 220 arranged above the pixel electrode 210 of each pixel may have a constant thickness, while the intermediate layer 220 arranged on the inner surface of the opening 119OP of the pixel defining layer 119 may not have a constant thickness. In this case, as the distance from the pixel electrode 210 increases, the thickness of the intermediate layer 220 arranged on the inner surface of the opening 119OP of the pixel defining layer 119 may decrease.
[0206] According to some example embodiments, the thickness of the intermediate layer 220 disposed in a portion of the pixel electrode 210 of each pixel may be constant, and the thickness of the intermediate layer 220 may decrease from the end of the portion where the thickness of the intermediate layer 220 is constant toward the end of the intermediate layer 220. In this case, the thickness of the intermediate layer 220 may be measured in a vertical direction from the surface of the pixel electrode 210 or the surface of the pixel defining layer 119 that is in direct contact with the intermediate layer 220 to the surface of the intermediate layer 220 that is in contact with the counter electrode 230. For ease of explanation, the case where the segment in which the thickness of the intermediate layer 220 is variable is disposed only on the inner surface of the opening 119OP of the pixel defining layer 119 will now be focused on and described in more detail.
[0207] In the above case, the thickness of the intermediate layer 220 in the constant thickness portion of the intermediate layer 220 of the main pixel PXm may be the same as the thickness of the intermediate layer 220 in the constant thickness portion of the intermediate layer 220 of the auxiliary pixel PXa. In addition, the first length LXm of the segment in which the thickness of the intermediate layer 220 of the main pixel PXm is variable may be different from the second length LXa of the segment in which the thickness of the intermediate layer 220 of the auxiliary pixel PXa is variable. For example, one of the first length LXm and the second length LXa may be greater than the other of the first length LXm and the second length LXa. For example, the first length LXm may be greater than the second length LXa, or the second length LXa may be greater than the first length LXm. At this time, when the resolution of the second display area DA2 is higher than the resolution of the first display area DA1, the first length LXm may be greater than the second length LXa. According to some example embodiments, when the resolution of the second display area DA2 is lower than the resolution of the first display area DA1, the first length LXm may be less than the second length LXa.
[0208] In this case, the segment in which the thickness of the intermediate layer 220 of each pixel is variable is shortened, and thus a clear image can be achieved in at least one of the first display area DA1 and the second display area DA2. For example, when the second length LXa is less than the first length LXm, the transmission area TA can be ensured as much as possible, and therefore, when operating the components arranged in the first display area DA1, malfunction or degradation of operating performance can be prevented or reduced. For ease of explanation, the focus will now be on the case in which the second length LXa is less than the first length LXm, and a more detailed description will be given.
[0209] The counter electrode 230 may be a transparent electrode or a reflective electrode. In some example embodiments, the counter electrode 230 may be a transparent or semi-transparent electrode and may include a metal film having a small work function, the metal film including lithium (Li), calcium (Ca), lithium fluoride (LiF) / Ca, LiF / Al, Ag, Mg, and compounds thereof. In addition, a material such as ITO, IZO, ZnO, or In 2 O 3 A transparent conductive oxide (TCO) film of the like may be further disposed on the metal film.
[0210] When the pixel electrode 210 is provided as a reflective electrode and the counter electrode 230 is provided as a light-transmitting electrode, the light emitted from the intermediate layer 220 is emitted to the counter electrode 230 side, and the display device DD may be a front emission type. When the pixel electrode 210 is configured as a transparent or semi-transparent electrode and the counter electrode 230 is configured as a reflective electrode, the light emitted from the intermediate layer 220 is emitted to the substrate 100 side, and thus the display device DD may be a rear emission type. However, the embodiments according to the present disclosure are not limited thereto. The display device DD of the embodiments of the present disclosure may be a double-sided emission type that emits light in both the front and rear directions.
[0211] According to some example embodiments, the counter electrode 230 is disposed over the entire front surface of the second display area DA2, and a portion of the edge may be disposed in the peripheral area PA. The counter electrode 230 may be integrally formed with the main pixels PXm (that is, a plurality of organic light emitting diodes OLED) disposed on the second display area DA2, and may correspond to the plurality of pixel electrodes 210, respectively.
[0212] At the same time, the counter electrode 230 is also provided in the auxiliary pixel PXa arranged above the first display area DA1. However, since the first display area DA1 includes the transmissive area TA arranged between the auxiliary pixels PXa, a portion of the counter electrode 230 may not be provided in some areas corresponding to the transmissive area TA. In the display device DD of the front emission type, light may be emitted to the counter electrode 230 side, but the transmittance may be partially reduced by the counter electrode 230. Therefore, by not having the counter electrode 230 in the area corresponding to the transmissive area TA, the transmittance of the transmissive area TA may be improved. At this time, at least one counter electrode 230 spaced apart from each other in the first display area DA1 may at least partially overlap with the counter electrode 230 connected by a separate bridge or the counter electrode 230 adjacent to the counter electrode 230. Each of the main pixel PXm and the auxiliary pixel PXa as described above may include the pixel electrode 210, the intermediate layer 220 and the counter electrode 230 described above. According to some example embodiments, the auxiliary pixel PXa may include a first pixel electrode, a first intermediate layer, and a first counter electrode, and the main pixel PXm may include a second pixel electrode, a second intermediate layer, and a second counter electrode.
[0213] Figure 8 is a cross-sectional view of an apparatus for manufacturing a display device DD according to some example embodiments. Fig. 9 It is a graphic Figure 8 A perspective view of the mask assembly shown in FIG.
[0214] refer to Figure 8 and Fig. 9 , the display device DD can be manufactured by the apparatus for manufacturing the display device 1.
[0215] The apparatus for manufacturing the display device 1 may include a chamber 10 , a mask assembly 20 , a first supporting part 30 , a second supporting part 40 , a deposition source 50 , a magnetic force generating part 60 , a visual part 70 , and a pressure controlling part 80 .
[0216] The chamber 10 may have a space therein and may be partially opened. At this time, the gate valve 11 may be arranged so that the opening portion may be opened and closed.
[0217] The mask assembly 20 may be selectively placed inside the chamber 10. The mask assembly 20 may include a mask frame 21 and a mask sheet 22. The mask sheet 22 may be fixed to the mask frame 21 in a tensioned state. The mask sheet 22 may include at least one first pattern hole PH1 and at least one second pattern hole PH2. The first pattern hole PH1 and the second pattern hole PH2 may be through holes that allow the deposition material to pass through the mask sheet 22.
[0218] The mask assembly 20 may include a mask frame 21 and a mask sheet 22. The mask frame 21 is formed by connecting a plurality of frames to each other and may include an opening therein. The mask frame 21 may include one opening or a plurality of openings separated from each other. In this case, the mask frame 21 may be formed in a grid shape such as a window frame.
[0219] The mask sheet 22 may be fixed to the mask frame 21 in a tensioned state. The mask sheet 22 may be provided in a single or multiple form. When one mask sheet 22 is provided, the mask sheet 22 is arranged on the mask frame 21 and may shield the opening of the mask frame 21. According to some example embodiments, when the mask sheet 22 is provided in multiple form, the at least one mask sheet 22 may also be arranged adjacent to each other along one side (e.g., X direction or Y direction) of the mask frame 21 to shield the opening of the mask frame 21. For ease of explanation, the focus will now be on the case where the mask sheet 22 is provided in multiple form and described in more detail.
[0220] The mask assembly 20 may further include a support frame 23 for supporting the mask sheet 22. The mask sheet 22 may be disposed above the support frame 23. The support frame 23 may be arranged in the opening of the mask frame 21, and may be provided in plurality. The support frames 23 may be arranged to be spaced apart from each other in a direction parallel to or perpendicular to the length direction (e.g., Y direction) of the mask sheet 22.
[0221] The substrate 100 may be installed above the first supporting part 30. The first supporting part 30 may adjust the position of the substrate 100. For example, the first supporting part 30 may include a UVW stage.
[0222] The mask assembly 20 may be mounted on the second supporting portion 40. Similar to the first supporting portion 30, the second supporting portion 40 is capable of adjusting the position of the mask assembly 20.
[0223] At least one of the first supporting portion 30 and the second supporting portion 40 may be raised and / or lowered inside the chamber 10. In this case, at least one of the first supporting portion 30 and the second supporting portion 40 may adjust a width between the substrate 100 and the mask frame 21.
[0224] The deposition material inside the deposition source 50 may be supplied to the chamber 10 by storing the deposition material and then gasifying and sublimating the deposition material. The deposition source 50 may include a heater that may melt or sublime the deposition material inside the deposition source 50 by heating the deposition material. In this case, the deposition source 50 may be arranged at the center or side of the chamber 10.
[0225] The magnetic force generating part 60 is disposed in the chamber 10 in such a manner that the substrate 100 is in close contact with the mask assembly 20. At this time, the magnetic force generating part 60 may include an electromagnet or a permanent magnet, etc., for generating a magnetic force.
[0226] The vision part 70 may be disposed in the chamber 10 and capture an image of the positions of the mask assembly 20 and the substrate 100. At this time, the vision part 70 may capture an image of an alignment mark or the like of at least one of the mask assembly 20 and the substrate 100.
[0227] The pressure control part 80 may be connected to the chamber 10 and control the pressure inside the chamber 10. At this time, the pressure control part 80 may include a connection pipe 81 connected to the chamber 10 and a pump 82 disposed in the connection pipe 81.
[0228] Referring to the operation of the apparatus for manufacturing the display device 1 as described above, the substrate 100 and the mask assembly 20 may be inserted into the chamber 10 by opening the gate valve 11 while the pressure control part 80 maintains the pressure inside the chamber 10 at a pressure equal to or similar to the atmospheric pressure. At this time, at least one of the substrate 100 and the mask assembly 20 may be moved by a separate robot arm outside the chamber 10 or a shuttle inserted into or withdrawn from the chamber 10. In this case, the substrate 100 may have, for example, Figure 7 Each of the layers arranged below the pixel defining layer 119, the pixel defining layer 119, and the pixel electrode 210 formed therein are shown in FIG.
[0229] After the mask frame 21 and the substrate 100 are disposed on the second supporting part 40 and the first supporting part 30, respectively, the positions of the mask frame 21 and the substrate 100 may be detected and aligned using the vision part 70. Thereafter, the substrate 100 and the mask frame 21 are brought close to each other, and then the mask frame 21 and the substrate 100 may be brought into close contact with each other by using the magnetic force generating part 60.
[0230] When the deposition material is released from the deposition source 50, the deposition material may be deposited on the substrate 100 through the first pattern hole PH1 and the second pattern hole PH2 of the mask sheet 22, and thereby a pattern is formed. At this time, the deposition material may be deposited on the substrate 100, and may form, for example, the intermediate layer 220 (see Figure 7 ) or the intermediate layer 220 (see Figure 7 ) (for example, at least one of the organic emission layer and the functional layer).
[0231] When the above process is completed, the substrate 100 may be brought outside the chamber 10 or moved to another location in the chamber 10 , and thereby another layer may be formed over the substrate 100 .
[0232] The above operations can be performed separately in each layer. For example, by forming the pixel electrode 210 through the mask assembly 20, and transferring the substrate 100 to another display device manufacturing device, at least one of the HTL and HIL among the functional layers can be formed above the pixel electrode 210. The organic emission layer can be formed above the functional layer by transferring the substrate 100 to another display device manufacturing device, and the substrate 100 can be transferred to another display device manufacturing device. Therefore, the ETL and EIL among the functional layers can be formed above the organic emission layer. In this case, for each organic emission layer for realizing different colors, the organic emission layer can be formed on the substrate 100 by using different mask assemblies 20 in separate display device manufacturing devices.
[0233] When the above process is completed, the counter electrode 230 and the thin film encapsulation layer 300 may be sequentially formed over the functional layer in another display device manufacturing apparatus.
[0234] In this case, at least one of the pixel electrode 210, the functional layer, and the organic emission layer may be formed on the same Fig. 9 On the substrate 100 in a display device manufacturing apparatus that is the same as or similar to the apparatus for manufacturing the display device 1 shown in FIG.
[0235] Fig. 10A and Fig. 10B 2 are plan views schematically illustrating a portion of a mask sheet 22 and a support frame 23 of a mask assembly 20 , respectively, according to some example embodiments.
[0236] First reference Fig. 10A , a portion of the mask sheet 22 may overlap with the support frame 23. The pattern holes of the mask sheet 22 that are located in the region overlapping with the support frame 23 may be shielded by the support frame 23. That is, the deposition material cannot pass through the pattern holes arranged in the region where the support frame 23 overlaps with the mask sheet 22. Therefore, the region between at least one support frame 23 spaced apart from each other may be defined as a deposition region A. The deposition region A may have a shape such as a polygon (such as a rectangle, a square, or a triangle, etc.), an ellipse, or a circle according to the shape and arrangement of the support frame 23. The deposition region A may include a first region A1 and a second region A2, at least one side of the second region A2 being surrounded by the first region A1 on a plane. Fig. 10A It is illustrated that the second area A2 is provided as a single one. However, the embodiment according to the present disclosure is not limited thereto, and may include at least two second areas A2.
[0237] The mask sheet 22 may include first and second pattern holes PH1 and PH2 in a manner that a deposition material passes therethrough. The first and second pattern holes PH1 and PH2 may be holes penetrating in a thickness direction of the mask sheet 22. The first pattern holes PH1 may be arranged in a first area A1 of the deposition area A, and the second pattern holes PH2 may be arranged in a second area A2 of the deposition area A.
[0238] The shape of each of the first pattern hole PH1 and the second pattern hole PH2 may be a rectangle or a square, or may be various shapes, for example, a polygon such as a triangle, a circle, or an ellipse, etc. Here, the shape of each of the first pattern hole PH1 and the second pattern hole PH2 may be, for example, a shape on a plane parallel to one surface of the mask sheet 22 facing the deposition source 50. Fig. 10A In the embodiment, both the first pattern hole PH1 and the second pattern hole PH2 have a rectangular shape, but are not limited thereto. The shapes of the first pattern hole PH1 and the second pattern hole PH2 may be different from each other.
[0239] In addition, the areas of the first pattern hole PH1 and the second pattern hole PH2 may be different from each other. Here, the areas of the first pattern hole PH1 and the second pattern hole PH2 may be the sizes of the shapes of the first pattern hole PH1 and the second pattern hole PH2 on a plane. For example, the size of the shape of the first pattern hole PH1 on a plane (e.g., the plane size of the entrance portion of the first pattern hole PH1) may be smaller than the size of the shape of the second pattern hole PH2 on a plane (e.g., the plane size of the entrance portion of the second pattern hole PH2). Fig. 10A In the embodiment, the first pattern holes PH1 and the second pattern holes PH2 have the same shape and size, but are not limited thereto.
[0240] The number (i.e., density) of at least one first pattern hole PH1 and at least one second pattern hole PH2 per equal area may be different from each other. According to some example embodiments, the number of at least one first pattern hole PH1 per equal area may be greater than the number of at least one second pattern hole PH2. Thus, the display device DD may be manufactured in such a manner that the first display area DA1 and the second display area DA2 of the display device DD, which respectively correspond to the first area A1 and the second area A2 of the mask sheet 22, have different resolutions from each other. Fig. 10A It is shown that four second pattern holes PH2 are arranged in the second area A2, but this is an example and the embodiment is not limited thereto.
[0241] Meanwhile, the thickness of the mask sheet 22 in the first area A1 may be different from the thickness of the mask sheet 22 in the second area A2. For example, the thickness of the mask sheet 22 in the second area A2 may be less than the thickness of the mask sheet 22 in the first area A1, and the thickness of the mask sheet 22 in the second area A2 may be 50%, 40%, 30%, 20% or less of the thickness of the mask sheet 22 in the first area A1. Fig.16F Let's describe this in more detail.
[0242] refer to Fig. 10B , the reference holes RH may be additionally arranged in the second area A2 of the mask sheet 22. The reference holes RH may be through holes. At least two reference holes RH may be arranged at the corners of the second area A2. For example, when the second area A2 has a rectangular shape, two reference holes RH may be arranged adjacent to two corners of the second area A2 that are arranged diagonally to each other. Alternatively, as Fig. 10B As shown in , four reference holes RH respectively adjacent to four corners of the second area A2 may be arranged. In addition, when the second area A2 has a circular shape, at least two reference holes RH may be arranged along the circumference of the second area A2 at the edge of the circumference.
[0243] As reference Fig.19 Described in more detail, during the process using the laser beam, the reference hole RH can be used to align the material (substrate) of the mask sheet 22. Thus, a fine pattern hole can be formed by irradiating the laser beam to a precise position on the material of the mask sheet 22.
[0244] Fig.11A is a plan view illustrating pixel arrangement of a display device DD according to some example embodiments.
[0245] refer to Fig.11A , the auxiliary pixels PXa arranged in the first display area DA1 may include a first auxiliary pixel PXa1, a second auxiliary pixel PXa2, and a third auxiliary pixel PXa3. At this time, the first auxiliary pixel PXa1, the second auxiliary pixel PXa2, and the third auxiliary pixel PXa3 may emit light of different colors. Moreover, the shapes of the first auxiliary pixel PXa1, the second auxiliary pixel PXa2, and the third auxiliary pixel PXa3 and the areas on the plane may be formed identically or differently from each other.
[0246] The main pixels PXm arranged in the second display area DA2 may include a first main pixel PXm1, a second main pixel PXm2, and a third main pixel PXm3. At this time, the first main pixel PXm1, the second main pixel PXm2, and the third main pixel PXm3 may emit light of different colors, and the shapes of the first main pixel PXm1, the second main pixel PXm2, and the third main pixel PXm3 and the areas on the plane may be formed the same as or different from each other.
[0247] The first, second, and third main pixels PXm1, PXm2, and PXm3 may emit light of the same color as the first, second, and third auxiliary pixels PXa1, PXa2, and PXa3, respectively.
[0248] The auxiliary pixel PXa and the main pixel PXm as described above may have various forms. For example, the main pixel PXm may be arranged in an S-stripe type. At this time, regarding the S-stripe type, one of the first main pixel PXm1, the second main pixel PXm2, and the third main pixel PXm3 may be in a rectangular form, and the other two of the first main pixel PXm1, the second main pixel PXm2, and the third main pixel PXm3 may be in a square form. In this case, the auxiliary pixel PXa and the main pixel PXm3 may be arranged corresponding to one of the first main pixel PXm1, the second main pixel PXm2, and the third main pixel PXm3. Fig.11A The remaining two of the first main pixel PXm1, the second main pixel PXm2 and the third main pixel PXm3 shown in FIG.
[0249] The auxiliary pixels PXa may be arranged in a honeycomb (PenTile) type having a diamond structure. In this case, regarding the first auxiliary pixel PXa1, the second auxiliary pixel PXa2, and the third auxiliary pixel PXa3, the other two of the first auxiliary pixel PXa1, the second auxiliary pixel PXa2, and the third auxiliary pixel PXa3 may be radially arranged based on one of the first auxiliary pixel PXa1, the second auxiliary pixel PXa2, and the third auxiliary pixel PXa3.
[0250] In this case, the resolution of the first display area DA1 may be lower than that of the second display area DA2.
[0251] For example, according to some example embodiments, the area on the plane of the auxiliary pixel PXa and the area on the plane of the main pixel PXm, wherein the auxiliary pixel PXa and the main pixel PXm emit light of the same color, may be different from each other. For example, the area on the plane of the auxiliary pixel PXa may be smaller than the area on the plane of the main pixel PXm, wherein the auxiliary pixel PXa and the main pixel PXm emit light of the same color.
[0252] According to some example embodiments, a distance between centers of main pixels PXm that are adjacent to each other and emit light of the same color may be smaller than a distance between centers of auxiliary pixels PXa that are adjacent to each other and emit light of the same color.
[0253] According to some example embodiments, a unit area (eg, 1 cm2 of the first display area DA1) of the first display area DA1 is arranged. 2 ) may be arranged in a unit area of the second display area DA2 (eg, 1 cm of the second display area DA2). 2 ). Alternatively, in each equal area, the number of auxiliary pixels PXa may be less than the number of primary pixels PXm, wherein the auxiliary pixels PXa and the primary pixels PXm are arranged in the first display area DA1 and the second display area DA2, respectively. In this case, the number of corresponding pixels may be the number of pixels emitting light of the same color.
[0254] Fig. 11B The picture is made in Fig.11A 2 is a plan view of a portion of a first mask sheet 22 - 1 used in the first main pixel PXm1 and the first auxiliary pixel PXa1 shown in FIG.
[0255] refer to Fig.11A and Fig. 11B , pixels of the display device DD manufactured by using the first pattern holes PH1 of the mask sheet 22 may be arranged in an S-strip shape, and pixels of the display device DD manufactured by using the second pattern holes PH2 may be arranged in a diamond type PenTile structure.
[0256] One pattern hole may correspond to one pixel of the display device DD. For example, the deposition material deposited on the substrate 100 through one pattern hole may form the intermediate layer 220 of one pixel of the display device DD (see Figure 7 ). The corresponding pixel means an emission area that emits light of a different color, and may be, for example, one of a red (R) pixel, a green (G) pixel, and a blue (B) pixel.
[0257] In passing Fig. 9When forming the first auxiliary pixel PXa1 and the first main pixel PXm1 by using the apparatus for manufacturing the display device 1 shown in , the first mask sheet 22-1 may be used. At this time, the first mask sheet 22-1 may have a first-first pattern hole PH1-1 and a second-first pattern hole PH2-1 formed therein. The deposition material having passed through the first-first pattern hole PH1-1 and the second-first pattern hole PH2-1 may be deposited on the substrate 100, and a layer having a constant pattern such as a source electrode, an organic emission layer, and a portion of a functional layer may be formed on each of the first auxiliary pixel PXa1 and the first main pixel PXm1.
[0258] The first-first pattern hole PH1-1 and the second-first pattern hole PH2-1 as described above may be formed to correspond to the size and shape of the first auxiliary pixel PXa1 and the first main pixel PXm1, respectively. In this case, the first-first pattern hole PH1-1 and the second-first pattern hole PH2-1 may be arranged on the first mask sheet 22-1 to correspond to the positions of the first auxiliary pixel PXa1 and the first main pixel PXm1, respectively.
[0259] In this case, the relationship between the first-first pattern holes PH1-1 and the second-first pattern holes PH2-1 may be the same as or similar to the relationship between the first auxiliary pixel PXa1 and the first main pixel PXm1. For example, the number of the first-first pattern holes PH1-1 per unit area in the first area A1 of the first mask sheet 22-1 may be greater than the number of the second-first pattern holes PH2-1 per unit area in the second area A2 of the first mask sheet 22-1. For example, Fig. 11B The areas of the first area A1 and the second area A2 shown in the figure are the same, and for equal areas, 24 first-first pattern holes PH1-1 can be arranged in the first area A1, and 4 second-first pattern holes PH2-1 can be arranged in the second area A2. Thus, a display device DD having display areas with different resolutions can be manufactured. The number of first-first pattern holes PH1-1 and second-first pattern holes PH2-1 per equal area can be changed according to the designed resolution. At the same time, the area in which the second-first pattern holes PH2-1 are not arranged in the second area A2 can correspond to the transmission area TA of the display device DD.
[0260] In this case, the first width W1 between the first-first pattern holes PH1-1 adjacent to each other may be different from the second width W2 between the second-first pattern holes PH2-1 adjacent to each other. In this case, the width between the pattern holes may be defined as the distance between the centers of the pattern holes adjacent to each other and the distance between the edges arranged at the same position among the edges arranged adjacent to each other, etc. However, a more detailed description will now be made assuming that the distance between the pattern holes means the distance between the centers of the pattern holes adjacent to each other.
[0261] In this case, the first width W1 may be smaller than the second width W2. Thus, a width between first main pixels PXm1 adjacent to each other formed on the display device DD may be smaller than a width between first auxiliary pixels PXa1 adjacent to each other.
[0262] In this case, the first auxiliary pixel PXa1 and the first main pixel PXm1 may emit one of red, green and blue light. Hereinafter, for convenience of explanation, the case where the first auxiliary pixel PXa1 and the first main pixel PXm1 emit red light will be focused on and described in more detail.
[0263] Fig. 11C The picture is made in Fig.11A 2 is a plan view of a portion of a second mask sheet 22 - 2 used in the second main pixel PXm2 and the second auxiliary pixel PXa2 shown in FIG.
[0264] refer to Fig.11A and Fig. 11C , through Fig. 9 When forming the second auxiliary pixel PXa2 and the second main pixel PXm2 by the apparatus for manufacturing the display device 1 shown in , the second mask sheet 22-2 may be used. At this time, the first-second pattern hole PH1-2 and the second-second pattern hole PH2-2 may be formed in the second mask sheet 22-2. The deposition material that has passed through the first-second pattern hole PH1-2 and the second-second pattern hole PH2-2 is deposited on the substrate 100, and a layer having a constant pattern such as a source electrode, an organic emission layer, or a portion of a functional layer may be formed on each of the second auxiliary pixel PXa2 and the second main pixel PXm2.
[0265] The first-second pattern hole PH1-2 and the second-second pattern hole PH2-2 as described above may be formed to correspond to the size and shape of the second auxiliary pixel PXa2 and the second main pixel PXm2, respectively. In this case, the first-second pattern hole PH1-2 and the second-second pattern hole PH2-2 may be arranged on the second mask sheet 22-2 to correspond to the positions of the second auxiliary pixel PXa2 and the second main pixel PXm2, respectively. In this case, the relationship between the first-second pattern hole PH1-2 and the second-second pattern hole PH2-2 may be the same as Fig. 11B In addition, the relationship between the second auxiliary pixel PXa2 and the second main pixel PXm2 may be the same or similar to the relationship between the first auxiliary pixel PXa1 and the first main pixel PXm1 described above.
[0266] In this case, the second auxiliary pixel PXa2 and the second main pixel PXm2 may emit one of red light, green light and blue light. Hereinafter, for convenience of explanation, the case where the second auxiliary pixel PXa2 and the second main pixel PXm2 emit green light will be focused on and described in more detail.
[0267] Fig.11D The picture is made in Fig.11A 2 is a plan view of a portion of a third mask sheet 22 - 3 used in the third main pixel PXm3 and the third auxiliary pixel PXa3 shown in FIG.
[0268] refer to Fig.11A and Fig.11D , through Fig. 9 When forming the third auxiliary pixel PXa3 and the third main pixel PXm3 by using the apparatus for manufacturing the display device 1 shown in , the third mask sheet 22-3 may be used. At this time, the third mask sheet 22-3 may have the first-third pattern holes PH1-3 and the second-third pattern holes PH2-3 formed therein. The deposition material having passed through the first-third pattern holes PH1-3 and the second-third pattern holes PH2-3 is deposited on the substrate 100, and a layer having a constant pattern such as a portion of a source electrode, an organic emission layer, or a functional layer may be formed at a position corresponding to the third auxiliary pixel PXa3 and the third main pixel PXm3.
[0269] The first-third pattern holes PH1-3 and the second-third pattern holes PH2-3 as described above may be formed to correspond to the size and shape of the third auxiliary pixel PXa3 and the third main pixel PXm3, respectively. In this case, the first-third pattern holes PH1-3 and the second-third pattern holes PH2-3 may be arranged on the third mask sheet 22-3 to correspond to the positions of the third auxiliary pixel PXa3 and the third main pixel PXm3, respectively. In this case, the first-third pattern holes PH1-3 and the second-third pattern holes PH2-3 may have different shapes. In this case, the size of the second-third pattern holes PH2-3 may be smaller than the size of the first-third pattern holes PH1-3. The number of the first-third pattern holes PH1-3 per unit area may be greater than the number of the second-third pattern holes PH2-3 per unit area, and the distance between the second-third pattern holes PH2-3 adjacent to each other may be greater than the distance between the first-third pattern holes PH1-3 adjacent to each other. At this time, the relationship between the third auxiliary pixel PXa3 and the third main pixel PXm3 may be the same as or similar to the relationship between the first-third pattern holes PH1 - 3 and the second-third pattern holes PH2 - 3 described above.
[0270] In this case, the third auxiliary pixel PXa3 and the third main pixel PXm3 may emit one of red light, green light and blue light. Hereinafter, for convenience of explanation, the case where the third auxiliary pixel PXa3 and the third main pixel PXm3 emit blue light will be focused on and described in more detail.
[0271] On the other hand, when forming a pixel electrode or a layer common to all pixels of a functional layer in a patterned form, it is possible to use FIG. 11B to FIG. 11D In the case of forming a layer common to all pixels by using one mask sheet, a mask sheet 22 in which first pattern holes PH1 and second pattern holes PH2 are formed may be used to correspond to the above-mentioned mask sheet. Fig.11A In this case, FIG. 11B to FIG. 11D The pattern holes may be arranged on one mask sheet in such a manner that the pattern holes do not overlap with each other.
[0272] Fig.12 is a plan view illustrating pixel arrangement of a display device DD according to some example embodiments.
[0273] refer to Fig.12, the main pixel PXm may be a hexagonal structure, and the auxiliary pixel PXa may be an S-stripe structure. At this time, in the hexagonal structure, the first main pixel PXm1, the second main pixel PXm2, and the third main pixel PXm3 may have a hexagonal shape on a plane and may be arranged at regular intervals. In addition, the first auxiliary pixel PXa1, the second auxiliary pixel PXa2, and the third auxiliary pixel PXa3 may be arranged at the same Fig.11A , the first main pixel PXm1, the second main pixel PXm2, and the third main pixel PXm3 are arranged in the same form as shown in . However, in this case, the distance between the first auxiliary pixels PXa1 adjacent to each other, the distance between the second auxiliary pixels PXa2 adjacent to each other, and the distance between the third auxiliary pixels PXa3 adjacent to each other may be different from the distance between the first main pixels PXm1 adjacent to each other, the distance between the second main pixels PXm2 adjacent to each other, and the distance between the third main pixels PXm3 adjacent to each other, respectively.
[0274] As described above, each of the auxiliary pixel PXa and the main pixel PXm may be formed by having FIG. 11B to FIG. 11D The shape of the mask sheet is similar to the shape shown in FIG. That is, FIG. 11B to FIG. 11D Each of the pattern holes shown in FIG. 1 may be formed with Fig.12 The auxiliary pixel PXa shown in FIG. 1 corresponds to the main pixel PXm. In this case, the first auxiliary pixel PXa1 and the first main pixel PXm1 may be formed on the substrate at the same time, and the second auxiliary pixel PXa2 and the second main pixel PXm2 may be formed on the substrate at the same time. In addition, the third auxiliary pixel PXa3 and the third main pixel PXm3 may be formed on the substrate at the same time.
[0275] Fig.13 is a plan view illustrating pixel arrangement of a display device DD according to some example embodiments.
[0276] refer to Fig.13 , the auxiliary pixel PXa may be arranged in a stripe shape, and the main pixel PXm may have a circular shape on a plane and be arranged in a PenTile structure. At this time, the plane shapes of the first auxiliary pixel PXa1, the second auxiliary pixel PXa2, and the third auxiliary pixel PXa3 may be linear. In addition, the plane shapes of the first main pixel PXm1, the second main pixel PXm2, and the third main pixel PXm3 may be circular.
[0277] In this case, in the same area or per unit area, the area of the first auxiliary pixel PXal arranged in the first display area DA1 may be smaller than the area of the first main pixel PXm1 arranged in the second display area DA2. In the same area or per unit area, the area of the second auxiliary pixel PXa2 arranged in the first display area DA1 may be smaller than the area of the second main pixel PXm2 arranged in the second display area DA2. In the same area or per unit area, the area of the third auxiliary pixel PXa3 arranged in the first display area DA1 may be smaller than the area of the third main pixel PXm3 arranged in the second display area DA2.
[0278] As described above, the auxiliary pixel PXa and the main pixel PXm can be FIG. 11B to FIG. 11D Each of the shapes shown in the figure is manufactured using a mask sheet of a similar shape. That is, FIG. 11B to FIG. 11D Each of the pattern holes shown in FIG. 1 may be formed with Fig.12 The auxiliary pixel PXa shown in FIG. 1 corresponds to the main pixel PXm. In this case, the first auxiliary pixel PXa1 and the first main pixel PXm1 may be formed on the substrate at the same time, and the second auxiliary pixel PXa2 and the second main pixel PXm2 may be formed on the substrate at the same time. In addition, the third auxiliary pixel PXa3 and the third main pixel PXm3 may be formed on the substrate at the same time.
[0279] Fig.14 is a plan view illustrating pixel arrangement of a display device DD according to some example embodiments.
[0280] refer to Fig.14, each of the auxiliary pixel PXa and the main pixel PXm may be formed into a rhombus shape and arranged in a PenTile structure. In this case, the area on the plane of the auxiliary pixel PXa and the area on the plane of the main pixel PXm may be different from each other, wherein the auxiliary pixel PXa and the main pixel Pxm emit light of the same color. For example, the area on the plane of the main pixel PXm may be smaller than the area on the plane of the auxiliary pixel PXa, wherein the auxiliary pixel PXa and the main pixel Pxm emit light of the same color. For example, the area on the plane of the first main pixel PXm1 may be smaller than the area on the plane of the first auxiliary pixel PXa1, the area on the plane of the second main pixel PXm2 may be smaller than the area on the plane of the second auxiliary pixel PXa2, and the area on the plane of the third main pixel PXm3 may be smaller than the area on the plane of the third auxiliary pixel PXa3. In the above case, light of the same color is emitted, and per unit area, the number of main pixels PXm may be greater than the number of auxiliary pixels PXa. According to some example embodiments, the total area of the main pixels PXm included in the unit area may be greater than the total area of the auxiliary pixels PXa included in the unit area, wherein the main pixels PXm and the auxiliary pixels PXa emit light of the same color. Alternatively, the distance between the auxiliary pixels PXa that are adjacent to each other and emit light of the same color may be greater than the distance between the main pixels PXm that are adjacent to each other and emit light of the same color. In this case, the resolution of the first display area DA1 may be lower than the resolution of the second display area DA2. When the resolution of the first display area DA1 is greater than the resolution of the second display area DA2, the relationship between the main pixels PXm and the auxiliary pixels PXa described above may be reversed.
[0281] As described above, each of the auxiliary pixel PXa and the main pixel PXm may be formed by having FIG. 11B to FIG. 11D The shape of the mask sheet is similar to the shape shown in FIG. That is, FIG. 11B to FIG. 11D The pattern holes shown in FIG. 1 can be formed with Fig.12 In this case, the first auxiliary pixel PXa1 and the first main pixel PXm1 may be formed on the substrate at the same time, and the second auxiliary pixel PXa2 and the second main pixel PXm2 may be formed on the substrate at the same time. In addition, the third auxiliary pixel PXa3 and the third main pixel PXm3 may be formed on the substrate at the same time.
[0282] The shape and pixel arrangement of the main pixel PXm and the shape and pixel arrangement of the auxiliary pixel PXa are not limited to the above. For example, each pixel may have an S-striped shape, and pixels having a rectangular shape may be arranged in the X direction. According to some example embodiments, it is also possible that all of the corresponding pixels may have a striped form.
[0283] In the above case, the shapes and pixel arrangements of the main pixels PXm and the auxiliary pixels PXa are not limited to the above, and may include any shapes and pixel arrangements that allow the first display area DA1 to have a resolution different from that of the second display area DA2.
[0284] FIG. 15A to FIG. 15F is a cross-sectional view schematically illustrating a manufacturing process of the mask sheet 22 according to some example embodiments.
[0285] refer to Fig.15A , a substrate M may be prepared to manufacture the mask sheet 22. The substrate M may be in a state where foreign matter adsorbed on each surface is removed by a polishing process or a washing process, etc. The substrate M may be a thin plate, and may include stainless steel, invar, nickel (Ni), cobalt (Co), a nickel alloy, a nickel-cobalt alloy, etc.
[0286] After preparing the substrate M, the first photoresist PR1 and the second photoresist PR2 may be respectively disposed on the first surface M1 and the second surface M2 of the substrate M. At this time, the first photoresist PR1 and the second photoresist PR2 may be placed on the substrate M sequentially or simultaneously.
[0287] Thereafter, a first opening OP1 may be formed by exposing the first photoresist PR1 of the first area A1 and performing a development process, and a second opening OP2 may be formed by exposing and developing the second photoresist PR2 of the first area A1. The position of the second opening OP2 may correspond to the position of the first opening OP1. At this time, the method of forming the photoresist opening by exposing the photoresist may be changed depending on whether the property of the photoresist is a negative method or a positive method. That is, after the photoresist is exposed and then treated with a developer, when the photoresist is a negative method, the unexposed photoresist portion may be removed, but when the photoresist is a positive method, the exposed photoresist portion may be removed.
[0288] Through the above process, a first photoresist PR1 having a first opening OP1 located in the first area A1 of the substrate M can be formed on the first surface M1 of the substrate M, and a second photoresist PR2 having a second opening OP2 corresponding to the first opening OP1 can be formed on the second surface M2 of the substrate M.
[0289] At the same time, if Fig. 9As illustrated in , when the mask assembly 20 including the mask sheet 22 is arranged in the chamber 10 , the first surface M1 may correspond to one surface of the mask sheet 22 facing the substrate 100 , and the second surface may correspond to the other side of the mask sheet 22 facing the deposition source 50 .
[0290] refer to Fig. 15B , after the above process is completed, the etching solution may be sprayed on the first opening OP1. At this time, the first surface M1 of the substrate M on which the first photoresist PR1 is arranged may be arranged downward, and the etching solution may be sprayed from the bottom of the first photoresist PR1 toward the first surface M1. When the etching solution is sprayed on the first opening OP1, the first surface M1 of the substrate M may be partially etched at a position corresponding to the first opening OP1. Thus, a groove corresponding to the first opening OP1 may be generated in the first surface M1. Since the first opening OP1 is located only in the first area A1, a groove may not be formed in the second area A2 by the etching solution.
[0291] refer to Fig. 15C , the first photoresist PR1 may be removed from the first surface M1 of the substrate M. In another example, as described later below, the first photoresist PR1 may be removed together when the second photoresist PR2 is removed.
[0292] refer to Fig.15D , the etching solution may be sprayed on the second opening OP2. At this time, the etching solution may be sprayed from the top of the second photoresist PR2 toward the second surface M2 of the substrate M. When the etching solution is sprayed on the second opening OP2, the second surface M2 of the substrate M may be etched at a position corresponding to the second opening OP2, and thus, a first pattern hole PH1 passing through the substrate M may be formed in the substrate M. Since the second opening OP2 is located only in the first area A1, a hole may not be formed in the second area A2.
[0293] refer to Fig.15E , the second photoresist PR2 can be removed from the second surface M2 of the substrate M.
[0294] refer to Fig.15F, after the above process is completed, the second pattern hole PH2 may be formed by irradiating a laser beam from a preset position in the second area A2 of the substrate M to the second surface M2 of the substrate M using a laser processing device. At this time, the second pattern hole PH2 may be formed so that the width of the inner surface of the second pattern hole PH2 gradually increases from the first surface M1 to the second surface M2. At this time, the width may be the distance between the inner surfaces of the second pattern hole PH2 along a direction perpendicular to the thickness direction of the substrate M. As another example, after the second pattern hole PH2 is formed by irradiating a laser beam to the substrate M, the second photoresist PR2 may be removed.
[0295] According to some example embodiments, the process of forming the second pattern holes PH2 by the laser beam may be performed by repeating a plurality of processes by changing laser processing conditions such as the focusing depth of the laser beam and the processing area. By irradiating the laser beam onto the second surface M2 of the substrate M, the substrate M may be removed from the second surface M2 along the thickness direction of the substrate M. At this time, the profile of the inner surface of the second pattern hole PH2 may be formed while changing the focusing depth of the laser beam in the thickness direction of the substrate M.
[0296] In order to improve the accuracy of processing using laser beams, the focus depth, incident angle, shape, position, number of laser beams, etc. can be controlled by using a scanner or an acousto-optic deflector (AOD). Fig.19 The laser processing apparatus will be described in more detail.
[0297] The display device DD has a plurality of display areas, and differences in characteristics such as the shape, pixel arrangement, size, and resolution of pixels arranged in the display areas may be required between the display areas. In order to manufacture such a display device DD, the mask sheet 22 may also require differences in characteristics such as the shape, arrangement, size, and density of pattern holes between areas corresponding to the plurality of display areas. According to some example embodiments of the present disclosure, when two or more pattern holes having different characteristics are formed on one mask sheet 22 as described above, a mask sheet 22 having improved quality can be manufactured.
[0298] As a comparative example, in the case where the first pattern holes PH1 of the first area A1 and the second pattern holes PH2 of the second area A2 of the mask sheet 22 have different characteristics, when etching is performed by applying one processing condition, the processing difference between the pattern holes may increase, and the processing quality of the mask sheet 22 may deteriorate. For example, the thickness of the substrate M that can be used generally differs depending on the size (area) of the pattern holes to be formed. However, this is not taken into account in the comparative example, and therefore, the processing quality of the pattern holes may deteriorate.
[0299] However, according to some example embodiments of the present disclosure, in the case where the first pattern holes PH1 are arranged in the first area A1 of the mask sheet 22, etching is performed under processing conditions determined by considering features such as the shape, pixel arrangement, size, and density of the first pattern holes PH1, and thus, consistent quality can be obtained. In addition, the second pattern holes PH2 of the second area A2 can be formed separately by a laser beam, and thus the processing accuracy can be improved. Thus, a mask sheet 22 with improved overall quality can be obtained.
[0300] In addition, the second pattern hole PH2 may be formed in such a manner that the width of the inner surface of the second pattern hole PH2 gradually increases from the first surface M1 to the second surface M2 by using a laser beam. In this way, a protruding portion may not be formed in the middle of the inner surface of the second pattern hole PH2. When deposition is performed by using the second pattern hole PH2, a shadow phenomenon may be reduced, and the manufacturing quality of the display device DD may be improved.
[0301] In addition, since the second pattern holes PH2 are processed by using a laser beam, precise processing may be performed without limiting various shapes of the second pattern holes PH2.
[0302] FIG. 16A to FIG. 16F 2 is a cross-sectional view schematically illustrating a manufacturing process of the mask sheet 22 according to some example embodiments. FIG. 15A to FIG. 15F The manufacturing processes described are identical, and the differences will be mainly described below.
[0303] refer to Fig.16A , a first photoresist PR1 and a second photoresist PR2 may be disposed on the first surface M1 and the second surface M2 of the substrate M, respectively. Thereafter, the first photoresist PR1 may be exposed and treated with a developer, and a first opening OP1 disposed in the first area A1 may be formed. A second opening OP2 disposed in the first area A1 and a third opening OP3 disposed in the second area A2 may be formed by exposing and developing the second photoresist PR2. The second opening OP2 may be formed to correspond to the first opening OP1, and the third opening OP3 may be formed to correspond to the entire second area A2.
[0304] Through the above process, a first photoresist PR1 having a first opening OP1 located in the first area A1 of the substrate M can be formed on the first surface M1 of the substrate M, and a second photoresist PR2 having a second opening OP2 corresponding to the first opening OP1 and a third opening OP3 formed to correspond to the entire second area A2 of the substrate M can be formed on the second surface M2 of the substrate M.
[0305] refer to Fig. 16B After the above process is completed, the first surface M1 of the substrate M may be partially etched at a position corresponding to the first opening OP1 by spraying an etching solution on the first opening OP1. Thus, a groove corresponding to the first opening OP1 may be generated in the first surface M1.
[0306] refer to Fig. 16C , the first photoresist PR1 can be removed from the first surface M1 of the substrate M.
[0307] refer to Fig.16D , the etching solution may be sprayed on the second opening OP2 and the third opening OP3. When the etching solution is sprayed on the second opening OP2, the second surface M2 of the substrate M may be etched at a position corresponding to the second opening OP2, and thus, a first pattern hole PH1 penetrating the substrate M may be formed in the substrate M. When the etching solution is sprayed on the third opening OP3, the second surface M2 of the substrate M may be partially etched at a position corresponding to the third opening OP3, and thus, a wide etching surface may be formed in the second area A2 of the substrate M. At this time, the etching depth may be 50% or more, 60% or more, 70% or more, or 80% or more of the original thickness of the substrate M.
[0308] refer to Fig.16E , the second photoresist PR2 can be removed from the second surface M2 of the substrate M.
[0309] refer to Fig.16F After the above process is completed, the second pattern holes PH2 can be formed by irradiating a laser beam from a preset position in the second area A2 of the substrate M to an etching surface formed to correspond to the third opening OP3 in the second area A2 of the substrate M using a laser processing device. Thus, the mask sheet 22 can be manufactured.
[0310] Here, the thickness of the mask sheet 22 in the first area A1 may be different from the thickness of the mask sheet 22 in the second area A2. For example, among the thicknesses of the mask sheet 22, the thickness t1 in the first area A1 may be smaller than the thickness t2 in the second area A2. The thickness t2 in the second area A2 may be 50%, 40%, 30%, 20% or less of the thickness t1 in the first area A1.
[0311] According to some example embodiments of the present disclosure described above, since the second surface M2 of the second area A2 is partially etched before forming the second pattern hole PH2, the processing amount of the laser beam can be reduced. Thus, the processing performance of the laser beam can be improved and the amount of dust generated during laser processing can be significantly reduced.
[0312] FIG. 17A to FIG. 17G 2 is a cross-sectional view schematically illustrating a manufacturing process of the mask sheet 22 according to some example embodiments. FIG. 15A to FIG. 15F The manufacturing processes described are identical, and the differences will be mainly described below.
[0313] refer to Fig.17A , the first photoresist PR1 and the second photoresist PR2 may be arranged on the first surface M1 and the second surface M2 of the substrate M, respectively. Thereafter, the first photoresist PR1 may be exposed and treated with a developer, and a first opening OP1 arranged in the first area A1 may be formed. The second photoresist PR2 may be exposed and developed, and a second opening OP2 arranged in the first area A1 and a plurality of fourth openings OP4 spaced apart from each other arranged in the second area A2 may be formed. The second opening OP2 may correspond to the first opening OP1, and at least one fourth opening OP4 may correspond to a preset position at which the second pattern hole PH2 is to be formed. Therefore, the number of at least one fourth opening OP4 may be the same as the number of the second pattern holes PH2 to be formed.
[0314] Through the above process, a first photoresist PR1 having a first opening OP1 located in the first area A1 of the substrate M can be formed on the first surface M1 of the substrate M, and a second photoresist PR2 having a second opening OP2 corresponding to the first opening OP1 and a plurality of fourth openings OP4 arranged in the second area A2 of the substrate M can be formed on the second surface M2, wherein the plurality of fourth openings OP4 are spaced apart from each other.
[0315] refer to Fig. 17B After the above process is completed, a portion of the first surface M1 of the substrate M may be etched at a position corresponding to the first opening OP1 by spraying an etching solution on the first opening OP1. Thus, a groove corresponding to the first opening OP1 may be generated in the first surface M1.
[0316] refer to Fig. 17C , the first photoresist PR1 can be removed from the first surface M1 of the substrate M.
[0317] refer to Fig.17D, the etching solution can be sprayed on the second opening OP2 and the fourth opening OP4. When the etching solution is sprayed on the second opening OP2, the second surface M2 of the substrate M can be etched at a position corresponding to the second opening OP2, and therefore, a first pattern hole PH1 penetrating the substrate M can be formed in the substrate M. When the etching solution is sprayed on the fourth opening OP4, the second surface M2 of the substrate M can be partially etched at a position corresponding to the fourth opening OP4. At this time, the etching depth can be 50% or more, 60% or more, 70% or more, or 80% or more of the original thickness of the substrate M. The size (area) of the hole formed at the position corresponding to the fourth opening OP4 can be smaller than the size of the second pattern hole PH2.
[0318] refer to Fig.17E , the second photoresist PR2 can be removed from the second surface M2 of the substrate M.
[0319] refer to Fig.17F After the above process is completed, the second pattern holes PH2 can be formed by irradiating a laser beam from a preset position in the second area A2 of the substrate M to an etching surface formed to correspond to the fourth opening OP4 in the second area A2 of the substrate M using a laser processing device. Thus, the mask sheet 22 can be manufactured.
[0320] According to the above-described embodiment of the present disclosure, before forming the second pattern holes PH2, the second surface M2 of the substrate M can be partially pre-etched at the position where the second pattern holes PH2 are to be formed, and thus the amount of laser processing can be reduced, and the position where the second pattern holes PH2 are to be formed can be relatively easily identified. Therefore, if necessary, laser processing can be performed manually.
[0321] refer to Figure 17G According to some example embodiments, some etched portions of the substrate M may be retained around the second pattern hole PH2 by the etching solution. This structure may be formed when the width of the fourth opening OP4 is greater than the width of the second pattern hole PH2. In this case, the thickness t2-1 in the surrounding area adjacent to the second pattern hole PH2 among the thickness t2 of the mask sheet 22 in the second area A2 may be less than the thickness t1 in the first area A1, and the thickness t2-2 in the area between the second pattern holes PH2 adjacent to each other may be substantially the same as the thickness t1 in the first area A1. Before forming the second pattern hole PH2, a portion of the second surface M2 of the substrate M is sufficiently pre-etched at the position where the second pattern hole PH2 is to be formed, and therefore, the amount of laser processing may be reduced, and the position where the second pattern hole PH2 is to be formed may be easily identified.
[0322] 18A to 18F is a cross-sectional view schematically illustrating a manufacturing process of the mask sheet 22 according to some example embodiments.
[0323] refer to Fig.18A , the first photoresist PR1 and the second photoresist PR2 may be arranged on the first surface M1 and the second surface M2 of the substrate M, respectively. Thereafter, the first photoresist PR1 may be exposed and treated with a developer, and a first opening OP1 arranged in the first area A1 may be formed. The second opening OP2 arranged in the first area A1 and a plurality of fifth openings OP5 formed at the edge of the second area A2 may be formed by exposing and developing the second photoresist PR2. The second opening OP2 may correspond to the first opening OP1.
[0324] At least two fifth openings OP5 may be formed at the edge of the second area A2. For example, when the second area A2 has a rectangular shape, the fifth opening OP5 may be arranged adjacent to the corners located diagonally from each other among the four corners. Alternatively, four fifth openings OP5 may be arranged adjacent to the four corners. In addition, when the second area A2 has a circular shape, at least two fifth openings OP5 may be arranged along the edge of the circumference.
[0325] Through the above process, a first photoresist PR1 having a first opening OP1 located in the first area A1 of the substrate M can be formed on the first surface M1 of the substrate M, and a second photoresist PR2 having a second opening OP2 corresponding to the first opening OP1 and a plurality of fifth openings OP5 formed at the edge of the second area A2 of the substrate M can be formed on the second surface M2.
[0326] refer to Fig.18B After the above process is completed, the first surface M1 of the substrate M may be partially etched at a position corresponding to the first opening OP1 by spraying an etching solution on the first opening OP1. Thus, a groove corresponding to the first opening OP1 may be generated in the first surface M1.
[0327] refer to Fig.18C , the first photoresist PR1 can be removed from the first surface M1 of the substrate M.
[0328] refer to Fig.18D, the etching solution can be sprayed on the second opening OP2 and the fifth opening OP5. When the etching solution is sprayed on the second opening OP2, the second surface M2 of the substrate M can be etched at a position corresponding to the second opening OP2, and thus, a first pattern hole PH1 penetrating the substrate M can be formed in the substrate M. When the etching solution is sprayed on the fifth opening OP5, the second surface M2 of the substrate M can be partially etched at a position corresponding to the fifth opening OP5. At this time, the etching depth can be 10% or more, 20% or more, 30% or more, 40% or more, or 50% or more of the original thickness of the substrate M. Thus, at least two reference holes RH can be formed at a position corresponding to the fifth opening OP5. As shown in reference Fig. 9 Described in more detail, the reference hole RH may be used to align the substrate M during a processing step using a laser beam.
[0329] refer to Fig.18E , the second photoresist PR2 can be removed from the second surface M2 of the substrate M.
[0330] refer to Fig.18F After the above process is completed, the second pattern holes PH2 can be formed by irradiating a laser beam from a preset position in the second area A2 of the substrate M to the second surface M2 of the substrate M using a laser processing device. Thus, the mask sheet 22 can be manufactured.
[0331] Fig.19 is a cross-sectional view schematically illustrating a laser processing apparatus 90 according to the embodiment.
[0332] refer to Fig.19 The laser processing device 90 may include a laser oscillator 91 , an optical system 92 , a scanner 93 , a stage 94 , and an inspector 95 .
[0333] The laser oscillator 91 may emit a pulsed laser beam to form pattern holes in the substrate M. The laser oscillator 91 may include an ultraviolet (UV) laser and a carbon dioxide (CO 2 )Laser, etc.
[0334] The optical system 92 can receive the laser beam emitted from the laser oscillator 91 to adjust the conditions to make it most suitable for forming the pattern hole. For example, the laser beam intensity, spot size, radiation angle and radiation quantity can be finely adjusted. For example, the spot size of the laser beam can be 20 μm or less, but the embodiment is not limited thereto, and the spot size of the laser beam can also be changed according to the design change of the mask sheet 22 based on the resolution of the display device DD. In addition, as an example, the generation of burrs on the surface of the mask sheet 22 can be suppressed by using an ultrashort pulse laser between tens of femtoseconds and hundreds of picoseconds.
[0335] The scanner 93 may determine the position of the laser beam emitted from the laser oscillator 91, for example, the position of the laser beam on the second surface M2 of the substrate M to be processed. The scanner 93 may include a scanner that irradiates the laser beam onto the second surface M2 of the substrate M by changing the path of the laser beam.
[0336] The stage 94 can support the substrate M to be processed. The substrate M can be arranged above the stage 94 and can be fixed by an electrostatic chuck, etc. In addition, the stage 94 can be accurately moved on a plane to process the substrate M at a desired position by a driver.
[0337] The inspector 95 may include a three-dimensional (3D) imaging module capable of inspecting the processing area of the substrate M and inspecting whether the processing is performed. In addition, the inspector 95 may include an alignment camera that captures an image of a specific point of the substrate M. After comparing the image data obtained from the alignment camera with the preset data and determining the degree of alignment of the substrate M, the stage 94 may be moved via the driver by reflecting the degree of alignment. Thus, the substrate M may be aligned in such a manner that the processing position of the substrate M to be processed corresponds to the position of the scanner 93 irradiated by the laser beam.
[0338] According to some example embodiments of the present disclosure, the reference hole RH may be used to align the substrate M. The alignment camera may capture an image of the second area A2 of the substrate M, and may obtain position information of the reference hole RH arranged in the second area A2, which is the area to be processed by the laser beam. By reference, the alignment degree of the substrate M may be determined, and the stage 94 may be moved, and the substrate M may be aligned based on the preset position information of the second pattern hole PH2. Thus, the laser beam may be irradiated to the correct position on the second surface M2 of the substrate M, and thereby the second pattern hole PH2 may be formed.
[0339] FIG. 20A to FIG. 20F is a cross-sectional view schematically illustrating a manufacturing process of the mask sheet 22 according to some example embodiments.
[0340] refer to Fig. 20A , a substrate M may be prepared to manufacture the mask sheet 22. The substrate M may be in a state where foreign matters adsorbed on each surface are removed by a polishing process or a cleaning process or the like.
[0341] refer to Fig. 20B, after the substrate M is prepared, the first photoresist PR1 and the second photoresist PR2 may be arranged on the first surface M1 and the second surface M2 of the substrate M, respectively. At this time, the first photoresist PR1 and the second photoresist PR2 may be placed sequentially on the substrate M or simultaneously on the substrate M. Thereafter, the first photoresist PR1 may be exposed and treated with a developer to form a first opening OP1, and the second photoresist PR2 may be exposed and developed to form a second opening OP2 and a third opening OP3. At this time, the method of forming the photoresist opening by exposing the photoresist may be changed depending on whether the nature of the photoresist is a negative method or a positive method. That is, after the photoresist is exposed and then treated with a developer, when the photoresist is a negative method, the unexposed photoresist portion may be removed, but when the photoresist is a positive method, the exposed photoresist portion may be removed.
[0342] refer to Fig. 20C When the first photoresist PR1 and the second photoresist PR2 are arranged on the substrate M as described above, the sizes of the second opening OP2 and the third opening OP3 on the plane may be different from each other. For example, when the shape of the second opening OP2 and the shape of the third opening OP3 are the same, the area of the second opening OP2 on the plane may be smaller than the area of the third opening OP3. At this time, the number of the plurality of second openings OP2 may be greater than the number of the third openings OP3 arranged per unit area or per equal area.
[0343] In this case, the second opening OP2 may correspond to the first pattern hole PH1, and the third opening OP3 may correspond to the second pattern hole PH2. When the first pattern hole PH1 and the second pattern hole PH2 are formed after completing the process to be described later below, the relationship between the first pattern hole PH1 and the second pattern hole PH2 may be similar to the relationship between the second opening OP2 and the third opening OP3. That is, the plane size of the second pattern hole PH2 arranged on one surface of the mask sheet 22 may be greater than or equal to the plane size of the first pattern hole PH1 arranged on one surface of the same mask sheet 22. However, the number of the first pattern holes PH1 may be greater than the number of the second pattern holes PH2 per equal area.
[0344] The above relationship can be applied to all of the embodiments of the present disclosure. In addition, the above relationship can be formed by the first pattern hole PH1 and the second intermediate layer, and can also be applied to the relationship with the first intermediate layer arranged in the second display area DA2, and the first pattern hole PH1 can be formed by the second intermediate layer arranged in the first display area DA1.
[0345] refer to Fig.20D After the above process is completed, the etching solution may be sprayed on the first opening OP1. At this time, the first surface M1 of the substrate M on which the first photoresist PR1 is arranged may be arranged opposite to the lower surface, and the etching solution may be sprayed from the bottom of the first photoresist PR1 toward the upper surface.
[0346] When the etching solution is sprayed on the first opening OP1 as described above, the first groove M1 - 1 may be formed in the substrate M to correspond to the first opening OP1 . Thereafter, the first photoresist PR1 may be removed from the first surface M1 of the substrate M.
[0347] refer to Fig.20E After the above process is completed, the etching solution may be sprayed on the second opening OP2 and the third opening OP3. At this time, the etching solution may be sprayed from above the substrate M in the direction of the second surface M2 of the substrate M.
[0348] After the above process is completed, the etching solution may pass through the second opening OP2 and the third opening OP3, and a portion of the substrate M may be removed. At this time, the etching solution that has passed through the second opening OP2 may be connected to the first groove M1-1 formed corresponding to the first opening OP1 of the first surface M1 by removing the substrate M from the second surface M2 of the substrate M to the first surface M1 of the substrate M in the thickness direction of the substrate M, thereby forming the first pattern hole PH1. In addition, the etching solution that has passed through the third opening OP3 may be removed from the second surface M2 of the substrate M to the first surface M1 to thereby form the second pattern hole PH2.
[0349] In this case, due to the difference between the width (or area on a plane) of the second opening OP2 and the width (or area on a plane) of the first opening OP1, the degree of etching of the substrate M by the etching solution can be adjusted. The width (or area on a plane) of the second opening OP2 is formed to be larger than the width (or area on a plane) of the first opening OP1, and therefore, even when the same etching solution is sprayed at the same time, the distance etched in the thickness direction of the substrate M can be adjusted (see Fig. 20C ). In other words, in this case, the thickness at which the substrate M is etched by the etching solution through the second opening OP2 may be greater than the thickness at which the substrate M is etched by the etching solution through the first opening OP1.
[0350] In the above case, the second protrusion PH2-a is not arranged inside the second pattern hole PH2, and the first protrusion PH1-a may be arranged inside the first pattern hole PH1. That is, the second protrusion PH2-a may be provided at the end of the second pattern hole PH2, and the first protrusion PH1-a may protrude into the first pattern hole PH1.
[0351] In this case, the first distance L1 between the first surface M1 and the first protruding portion PH1-a may be different from the second distance L2 between the second surface M2 and the first protruding portion PH1-a. The first distance L1 between the first surface M1 and the first protruding portion PH1-a may be smaller than the second distance L2 between the second surface M2 and the first protruding portion PH1-a. In this case, when the mask sheet 22 is arranged on the apparatus for manufacturing the display device 1 shown in FIG. 11, the first surface M1 may be a surface facing the substrate 100.
[0352] Therefore, in the method of manufacturing the display device DD, the second protruding portion PH2-a may not be formed in the second pattern hole PH2 portion used when forming the intermediate layer of the first display area DA1. In addition, in the method of manufacturing the display device DD, an intermediate layer having a precise pattern can be formed during the manufacture of the display panel 2, and by forming a segment in which the thickness of the intermediate layer is variable, the intermediate layer can be deposited so that the area of the intermediate layer is almost equal to the designed value.
[0353] Fig.21 is a perspective view illustrating a display device DD according to some example embodiments.
[0354] refer to Fig.21 , the display device DD can be connected with Figure 1 At this time, the display device DD may include a first display area DA1, a second display area DA2, and a peripheral area PA.
[0355] and Figure 1 In another embodiment, the first display area DA1 may be a constant area of the display device DD. At this time, the first display area DA1 may have a shape similar to that of the second display area DA2. For example, the first display area DA1 may be formed to be long in the X-axis direction. The transmittance of the first display area DA1 may be higher than the transmittance of the second display area DA2, and the resolution of the first display area DA1 may be lower than the resolution of the second display area DA2. As described above, the auxiliary pixel PXa may be arranged in the first display area DA1, and the main pixel PXm may be arranged in the second display area DA2. In addition, the first display area DA1 may include a transmission area TA in which the auxiliary pixel PXa is not arranged.
[0356] As described above, components may be arranged in different positions in the first display area DA1. At this time, at least one component may be arranged in the first display area DA1.
[0357] As described above, the auxiliary pixel PXa and the transmission area TA may be arranged in the first display area DA1. At this time, at least one auxiliary pixel PXa may be provided to form one pixel area, and the pixel areas may be arranged to be spaced apart from each other in the first display area DA1. In this case, the transmission area TA may be arranged between the pixel areas spaced apart from each other. For example, the pixel areas may be arranged in a lattice form, and the transmission area TA may be arranged between the pixel areas.
[0358] Unlike the first display area DA1, the second display area DA2 may not have a separate transmission area. In this case, a plurality of primary pixels PXm may be arranged in the second display area DA2.
[0359] In the display device according to the embodiment of the present disclosure, a precise image can be realized.
[0360] In the mask assembly, the apparatus for manufacturing a display device, and the method for manufacturing a display device according to the embodiments of the present disclosure, a deposition material may be deposited on a substrate in a precise pattern.
[0361] In addition, in the mask assembly, the apparatus for manufacturing a display device, and the method for manufacturing a display device according to the embodiments of the present disclosure, a display device including display areas having different resolutions may be manufactured.
[0362] In the method of manufacturing a mask assembly according to an embodiment of the present disclosure, pattern holes having different sizes and shapes may be formed on one mask sheet.
[0363] In the method of manufacturing a mask assembly according to an embodiment of the present disclosure, even when pattern holes having different sizes and shapes are formed on one mask sheet, deformation of the mask sheet can be reduced, and the shape of each pattern hole can be accurately manufactured.
[0364] It should be understood that the embodiments described herein should be considered in a descriptive sense only and not for the purpose of limitation. The description of features or aspects in each embodiment should generally be considered as other similar features or aspects that can be used in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various modifications in form and details may be made therein without departing from the spirit and scope defined by the appended claims and their equivalents.
Claims
1. A display device, include: a substrate including a first display area and a second display area, the first display area including a transmissive area, and the second display area being arranged to surround at least a portion of the first display area; a first pixel in the first display area and comprising a first pixel electrode, a first intermediate layer and a first pair of electrodes; as well as a second pixel in the second display area and comprising a second pixel electrode, a second intermediate layer and a second pair of electrodes, wherein the first intermediate layer comprises a first segment at which its thickness is constant and a second segment at which its thickness is variable, The second intermediate layer comprises a first segment at which its thickness is constant and a second segment at which its thickness is variable, and The first length of one of the second segment of the first intermediate layer at which the thickness of the first intermediate layer is variable and the second segment of the second intermediate layer at which the thickness of the second intermediate layer is variable is different from the second length of the other of the second segment of the first intermediate layer at which the thickness of the first intermediate layer is variable and the second segment of the second intermediate layer at which the thickness of the second intermediate layer is variable.
2. The display device according to claim 1, in, One of the first length and the second length is smaller than the other of the first length and the second length.
3. The display device according to claim 1, in, The resolution of the image provided by the first display area is different from the resolution of the image provided by the second display area.
4. The display device according to claim 1, further comprising: include: A component is provided on one surface of the substrate to correspond to the first display area and includes an electronic element that emits or receives light.
5. The display device according to claim 1, in, The light transmittance of the first display area is different from the light transmittance of the second display area.
6. The display device according to claim 1, in, The size of the planar shape of the first intermediate layer is greater than or equal to the size of the planar shape of the second intermediate layer.
7. A method for manufacturing a display device, the method include: forming a first intermediate layer on a first display region of a display substrate; and forming a second intermediate layer on the second display area of the display substrate, wherein the first intermediate layer comprises a first segment at which its thickness is constant and a second segment at which its thickness is variable, The second intermediate layer comprises a first segment at which its thickness is constant and a second segment at which its thickness is variable, and The first length of one of the second segment of the first intermediate layer at which the thickness of the first intermediate layer is variable and the second segment of the second intermediate layer at which the thickness of the second intermediate layer is variable is different from the second length of the other of the second segment of the first intermediate layer at which the thickness of the first intermediate layer is variable and the second segment of the second intermediate layer at which the thickness of the second intermediate layer is variable.
8. The method according to claim 7, in, One of the first length and the second length is smaller than the other of the first length and the second length.
9. The method according to claim 7, in, The resolution of the image provided by the first display area is different from the resolution of the image provided by the second display area.
10. The method according to claim 7, further comprising: include: A component is placed on one surface of the substrate to correspond to the first display area, and the component includes an electronic element that emits or receives light.
11. The method according to claim 7, in, The light transmittance of the first display area is different from the light transmittance of the second display area.
12. The method according to claim 7, in, The size of the planar shape of the first intermediate layer is greater than or equal to the size of the planar shape of the second intermediate layer.
13. The method according to claim 12, in, The thickness of the section having the constant thickness of the first intermediate layer and the thickness of the section having the constant thickness of the second intermediate layer are equal to each other.
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