Group iii nitride layered substrate and semiconductor light emitting element

Abstract

The present application relates to a group III nitride layered substrate and a semiconductor light emitting element. Provided is a technology capable of improving the quality of a GaN layer formed on a sapphire substrate and used for a semiconductor light emitting element. A group III nitride layered substrate has a sapphire substrate, a first layer formed on the sapphire substrate and composed of aluminum nitride, a second layer which is an n-type layer formed on the first layer and composed of gallium nitride to which an n-type impurity is added, a third layer which is a light emitting layer formed on the second layer and composed of a group III nitride, and a fourth layer which is a p-type layer formed on the third layer and composed of a group III nitride to which a p-type impurity is added, the thickness of the second layer is 7 μm or less, the half-value width of (0002) diffraction determined based on an X-ray rocking curve is 100 seconds or less, and the half-value width of (10-12) diffraction determined based on an X-ray rocking curve is 200 seconds or less.

Description

TECHNICAL FIELD

[0001] The present application relates to a Group III nitride laminated substrate and a semiconductor light emitting element. BACKGROUND

[0002] A Group III nitride laminated substrate (hereinafter also referred to as a wafer) in which a GaN layer is formed on a base substrate belonging to a dissimilar substrate such as a sapphire substrate is used as a material for manufacturing a semiconductor element such as a light emitting diode (LED) (for example, refer to Patent Document 1). With the development of large diameter of the wafer and miniaturization of the semiconductor element, the influence of, for example, reduction in photolithography accuracy caused by warping of the wafer is becoming large.

[0003] As a display that is lower in power consumption and higher in image quality than liquid crystal displays and organic EL displays, a micro LED display is proposed. The size of a conventional semiconductor light emitting element (LED chip) used in applications such as lighting is several 100 μm square to several mm square, and in contrast, a semiconductor light emitting element (LED chip) used in a micro LED display application is required to be a micro size of 100 μm square or less. Hereinafter, the semiconductor light emitting element used in a micro LED display application is also referred to as a micro LED. In the formation of a micro LED, higher photolithography accuracy than that of a conventional LED is required. Therefore, it is desired to suppress reduction in photolithography accuracy caused by warping of the wafer.

[0004] In order to reduce warping of the wafer, it is conceivable to thin the GaN layer formed on the base substrate. However, there is a concern that the quality of the GaN layer such as crystallinity is reduced by thinning the GaN layer. A technology capable of forming a high-quality GaN layer even if the GaN layer is thinned is desired.

[0005] PRIOR ART DOCUMENTS

[0006] PATENT DOCUMENT

[0007] Patent Document 1: Japanese Patent Application Laid-Open No. 2013-225648 SUMMARY

[0008] Problem to be solved by the invention

[0009] An object of the present application is to provide a technology capable of improving the quality of a GaN layer formed on a sapphire substrate and used for a semiconductor light emitting element.

[0010] Solution for solving the problem

[0011] According to one embodiment of the present application, a Group III nitride laminated substrate is provided, which has:

[0012] a sapphire substrate;

[0013] a first layer formed on the aforementioned sapphire substrate and composed of aluminum nitride;

[0014] a second layer, which is an n-type layer formed on the aforementioned first layer and composed of gallium nitride to which an n-type impurity is added;

[0015] a third layer, which is a light emitting layer formed on the aforementioned second layer and composed of a group III nitride; and

[0016] a fourth layer, which is a p-type layer formed on the aforementioned third layer and composed of a group III nitride to which a p-type impurity is added,

[0017] the aforementioned second layer has a thickness of 7 μm or less, a half-value width of (0002) diffraction measured based on an X-ray rocking curve is 100 seconds or less, and a half-value width of (10-12) diffraction measured based on an X-ray rocking curve is 200 seconds or less.

[0018] According to another aspect of the present application, there is provided a semiconductor light emitting element,

[0019] which has the aforementioned second layer of the group III nitride layered substrate of the aforementioned one aspect as an n-type layer.

[0020] Effects of the invention

[0021] A technique capable of improving the quality of a GaN layer formed on a sapphire substrate and used for a semiconductor light emitting element is provided. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 is an exemplary schematic cross-sectional view of a wafer of an embodiment of the present application.

[0023] Figure 2 is a schematic cross-sectional view showing a first example of a semiconductor light emitting element of an embodiment.

[0024] Figure 3 is a schematic cross-sectional view showing a second example of a semiconductor light emitting element of an embodiment.

[0025] Figure 4 is a flowchart showing an example of a manufacturing method of a semiconductor light emitting element of an embodiment.

[0026] Figure 5 is a graph showing the crystallinity of a GaN layer of an example.

[0027] Figure 6 is a graph showing the surface flatness of a GaN layer of an example.

[0028] Figure 7 is a graph showing the in-plane deviation of the thickness of a GaN layer of an example.

[0029] Figure 8 is a graph showing in-plane deviation of impurity concentration (carrier concentration) in the GaN layer of the example.

[0030] Figure 9 is a graph showing warpage of the intermediate wafer of the example.

[0031] Figure 10 is a graph showing in-plane uniformity of light emission power output of the semiconductor light emitting element of the example.

[0032] Figure 11 is a graph showing in-plane uniformity of light emission wavelength of the semiconductor light emitting element of the example.

[0033] Figure 12 is a graph showing in-plane uniformity of driving voltage of the semiconductor light emitting element of the example.

[0034] Figure 13 is a graph showing in-plane uniformity of reverse leakage current suppression effect of the semiconductor light emitting element of the example.

[0035] Figure 14 is a graph showing comprehensive yield of the semiconductor light emitting element of the example.

[0036] Figure 15 is a graph showing crystallinity of the GaN layer of the comparative example.

[0037] Figure 16 is a graph showing surface flatness of the GaN layer of the comparative example.

[0038] Figure 17 is a graph showing in-plane uniformity of light emission power output of the semiconductor light emitting element of the comparative example.

[0039] Figure 18 is a graph showing in-plane uniformity of light emission wavelength of the semiconductor light emitting element of the comparative example.

[0040] Figure 19 is a graph showing in-plane uniformity of driving voltage of the semiconductor light emitting element of the comparative example.

[0041] Figure 20 is a graph showing in-plane uniformity of reverse leakage current suppression effect of the semiconductor light emitting element of the comparative example.

[0042] Figure 21 is a graph showing comprehensive yield of the semiconductor light emitting element of the comparative example.

[0043] Reference Signs List

[0044] 10…base substrate, 11…major surface (of the base substrate), 20…AlN layer, 21…surface (of the AlN layer), 30…GaN layer, 31…surface (of the GaN layer), 40…group III nitride layer, 41…light emitting layer, 42…p-type layer, 50…electrode, 51…n-side electrode, 52…p-side electrode, 60…active layer, 90…group III nitride laminated substrate, 100…group III nitride laminated substrate, 150…group III nitride laminated substrate, 200…semiconductor light emitting element, 210…circuit substrate, 220…bump DETAILED DESCRIPTION

[0045] <One Embodiment>

[0046] A group III nitride laminated substrate 150 (hereinafter also referred to as wafer 150) according to one embodiment of the present application and a semiconductor light emitting element 200 (hereinafter also referred to as light emitting element 200) manufactured using the wafer 150 are described. The wafer 150 is a laminated substrate that constitutes a light emitting diode (LED).

[0047] Figure 1 is an exemplary schematic cross-sectional view of the wafer 150. The wafer 150 has: a sapphire substrate 10; an AlN layer 20 composed of aluminum nitride (AlN); a GaN layer 30 that is an n-type layer composed of gallium nitride (GaN) and added with an n-type impurity; a light emitting layer 41 composed of a group III nitride; and a p-type layer 42 composed of a group III nitride and added with a p-type impurity. The wafer 150 of the present embodiment is characterized in that, even if thin, the GaN layer 30 grown on top of the AlN layer 20 has high quality, as described in detail below.

[0048] As the sapphire substrate 10, a sapphire substrate having a surface, i.e., a major surface 11, tilted in the a-axis or m-axis direction in a range of 0.1° or more and 0.6° or less from the C-plane is preferably used. Note that the sapphire substrate 10 can be a flat substrate whose major surface 11 is flat, which does not belong to a patterned sapphire substrate (PSS).

[0049] In order to improve the productivity when manufacturing the light emitting element 200 using the wafer 150, as the sapphire substrate 10, a large-area sapphire substrate capable of forming a plurality of light emitting elements 200 in-plane is preferably used. The diameter of the sapphire substrate 10 is preferably 2 inches (50.8 mm) or more, more preferably 4 inches (100 mm) or more, and further preferably 6 inches (150 mm) or more. The thickness of the sapphire substrate 10 having a diameter of 2 inches is, for example, 300 μm or more and 500 μm or less (typically, 430 μm), the thickness of the sapphire substrate 10 having a diameter of 4 inches is, for example, 600 μm or more and 1000 μm or less (typically, 900 μm), and the thickness of the sapphire substrate 10 having a diameter of 6 inches is, for example, 1000 μm or more and 1500 μm or less (typically, 1300 μm).

[0050] The AlN layer 20 is formed on the sapphire substrate 10, and more specifically, is formed by hetero-epitaxial growth on the main surface 11 of the sapphire substrate 10 (in contact with the main surface 11 and above the main surface 11). The AlN layer 20 functions as a nucleation layer for growing the GaN layer 30.

[0051] In order to improve the crystallinity of the AlN layer 20, the thickness of the AlN layer 20 is preferably 0.1 μm or more. Further, in order to suppress cracks generated in the AlN layer 20 and reduce warping of the wafer 150, the thickness of the AlN layer 20 is preferably 1 μm or less.

[0052] Specifically, the AlN layer 20 preferably has high crystallinity as follows. The half-value width of the X-ray rocking curve of the (0002) plane of the AlN layer 20 is preferably 100 seconds or less, and the half-value width of the X-ray rocking curve of the (10-12) plane of the AlN layer 20 is preferably 300 seconds or less. The surface 21 of the AlN layer 20 is preferably Al-polar. Note that, in the present specification, the "half-value width" means full width at half maximum (FWHM).

[0053] The GaN layer 30 is formed on the AlN layer 20, and more specifically, is formed by hetero-epitaxial growth on the surface 21 of the AlN layer 20 (in contact with the surface 21 and above the surface 21). In other words, the GaN layer 30 is formed on the sapphire substrate 10 with the AlN layer 20 interposed therebetween. Details of the characteristics of the GaN layer 30 are described later.

[0054] The light emitting layer 41 is formed on the GaN layer 30, more specifically, by hetero-epitaxial growth on the surface 31 of the GaN layer 30 (in contact with the surface 31 and above the surface 31). The light emitting layer 41 is composed of a Group III nitride, and the layer structure, composition, and the like of the light emitting layer 41 can be appropriately selected depending on the wavelength of light that is desired to be emitted by the light emitting element 200. The light emitting layer 41 is composed of, for example, a multiple quantum well structure in which indium gallium nitride (InGaN) well layers and GaN barrier layers are alternately stacked, and specifically, for example, has a structure in which a 2 to 4 nm-thick InGaN well layer and an 8 to 30 nm-thick GaN barrier layer are alternately grown for 5 to 50 periods, in a manner to emit light having a wavelength of 445 nm.

[0055] The p-type layer 42 is formed on the light emitting layer 41. The p-type layer 42 is composed of a Group III nitride, and the layer structure, composition, and the like of the p-type layer 42 can be appropriately selected depending on the composition of the light emitting layer 41 and the like. The p-type layer 42 is composed of, for example, a 10 to 50 nm-thick p-type aluminum gallium nitride (AlGaN) clad layer and a 200 to 500 nm-thick p-type GaN contact layer.

[0056] The layer in which the light emitting layer 41 and the p-type layer 42 are stacked is also referred to as the Group III nitride layer 40. The Group III nitride layer 40 is formed of a Group III nitride that is hetero-epitaxially grown on the surface 31 of the GaN layer 30. In order to reduce warping of the wafer 150, the thickness of the Group III nitride layer 40 is preferably 1 μm or less, and more preferably 500 nm or less.

[0057] The characteristics of the GaN layer 30 are described in detail. The GaN layer 30 of the present embodiment has high quality as described below.

[0058] (Crystallinity of GaN layer)

[0059] The GaN layer 30 has high crystallinity. Specifically, the thickness of the GaN layer 30 is 7 μm or less, the half-value width of the (0002) plane based on X-ray rocking curve measurement is 100 seconds or less, and the half-value width of the (10-12) plane based on X-ray rocking curve measurement is 200 seconds or less. As described in the examples described later, in order to improve the overall yield of the light emitting element 200, it is preferable to make the thickness of the GaN layer 30 7 μm or less.

[0060] In the past, when a GaN layer having improved crystallinity is formed on a sapphire substrate with an AlN layer interposed therebetween, for example, an operation of growing a thick GaN layer of 10 μm or more is performed. This is because the thicker the GaN layer is grown, the more the crystallinity of the GaN layer can be improved. However, when a GaN layer is formed by a general method, even if a thick GaN layer having a thickness of 10 μm is formed, the half-value width of the X-ray rocking curve of the (0002) plane of the GaN layer is only reduced to about 200 seconds, and the half-value width of the X-ray rocking curve of the (10-12) plane of the GaN layer is only reduced to about 300 seconds (see Figure 15 ).

[0061] In contrast to this, the GaN layer 30 of the present embodiment has high crystallinity in which the half-value width of the X-ray rocking curve of the (0002) plane is 100 seconds or less and the half-value width of the X-ray rocking curve of the (10-12) plane is 200 seconds or less, even if the thickness of the GaN layer 30 is 7 μm or less (see Figure 5 ).

[0062] Note that, regarding the crystallinity of the GaN layer 30, there is a tendency that the thinner the GaN layer 30 is, the more the crystallinity is reduced, or in other words, there is a tendency that the thicker the GaN layer 30 is, the more the crystallinity is improved. By making the thickness of the GaN layer 30 0.8 μm or more, it is possible to make the half-value width of the (0002) plane 100 seconds or less and the half-value width of the (10-12) plane 200 seconds or less (see Figure 7 ). Further, by making the thickness of the GaN layer 30 1 μm or more, it is possible to make the half-value width of the (0002) plane 80 seconds or less and the half-value width of the (10-12) plane 180 seconds or less. Further, by making the thickness of the GaN layer 30 1.5 μm or more, it is possible to make the half-value width of the (0002) plane 70 seconds or less and the half-value width of the (10-12) plane 170 seconds or less.

[0063] (Surface planarity of GaN layer)

[0064] The GaN layer 30 has high surface planarity. Specifically, the surface 31 of the GaN layer 30 preferably has a surface roughness of 0.5 nm or less, and more preferably 0.4 nm or less, in terms of the root mean square (rms) value measured by an atomic force microscope (AFM) in a 5 μm square region (see Figure 6 ).

[0065] Note that, regarding the surface planarity of the GaN layer 30, there is a tendency that if the GaN layer 30 is too thin, the surface planarity is drastically deteriorated. By making the thickness of the GaN layer 30 0.8 μm or more, it is possible to obtain the high surface planarity described above (see Figure 6 ).

[0066] (In-plane uniformity of film thickness of GaN layer)

[0067] The GaN layer 30 has high in-plane uniformity of film thickness. Specifically, when the thickness of the GaN layer 30 is 7 μm or less, the in-plane deviation of the thickness of the GaN layer 30 is 3.5% or less (more preferably 3% or less) (see Figure 7 ). The in-plane deviation of the thickness of the GaN layer 30 is defined as follows. A square lattice is set at a certain interval (preferably an interval of 1 mm or more and 2 mm or less) on the surface of a wafer that is the measurement target, and the film thickness of the GaN layer 30 is measured at each lattice point. As the method of measuring the film thickness of the GaN layer 30 at each point, a method based on cross-sectional observation using an electron microscope or the like, ellipsometry, or the like is preferably used. Note that, near the end surface of the wafer, it is often the case that the measurement result cannot be accurately obtained due to the influence of the bevel shape of the wafer end portion, the influence of diffuse reflection of light, or the like. In such a case, it is preferable to remove the measurement data obtained from measurement points arranged within about 1 to 3 mm from the wafer end portion from the calculation below. In this specification, the average value and the standard deviation are calculated from the film thickness measurement data after the lattice point interval is set to 1 mm and the measurement data in a region within 2 mm from the outer periphery of the wafer is removed, and the value (%) obtained by dividing the standard deviation by the average value is taken as the in-plane deviation of the thickness.

[0068] (In-plane uniformity of impurity concentration of GaN layer)

[0069] The GaN layer 30 has high in-plane uniformity of n-type impurity concentration. Specifically, when the thickness of the GaN layer 30 is 7 μm or less, the in-plane deviation of the n-type impurity concentration in the GaN layer 30 is 3.5% or less (more preferably 3% or less) (see Figure 8 ). Correspondingly, the in-plane deviation of the n-type carrier concentration in the GaN layer 30 can be 3.5% or less (more preferably 3% or less) (see Figure 8 ). Hereinafter, the n-type impurity concentration in the GaN layer 30 is also simply referred to as the impurity concentration, and the n-type carrier concentration in the GaN layer 30 is also simply referred to as the carrier concentration.

[0070] The in-plane deviation of the impurity concentration and the in-plane deviation of the carrier concentration in the GaN layer 30 are respectively defined as follows. The measurement of the impurity concentration generally uses secondary ion mass spectrometry (SIMS). Furthermore, the measurement of the carrier concentration generally uses capacitance-voltage measurement (CV measurement), hole measurement, or the like. In the measurement of the impurity concentration and the measurement of the carrier concentration, an orthogonal coordinate passing through the center of the wafer is set on the surface of the wafer that is the measurement target, and measurement is performed on this coordinate axis. One axis of the orthogonal coordinate preferably coincides with the off direction of the wafer. In this specification, for the SIMS measurement data measured at intervals of 1 cm on this orthogonal coordinate axis, the average value and the standard deviation are found, and the value (%) obtained by dividing the standard deviation by the average value is taken as the in-plane deviation of the impurity concentration. Furthermore, for the CV measurement data or the hole measurement data measured at intervals of 1 cm on this orthogonal coordinate axis, the average value and the standard deviation are found, and the value (%) obtained by dividing the standard deviation by the average value is taken as the in-plane deviation of the carrier concentration. In the measurement of the impurity concentration and the measurement of the carrier concentration, as with the measurement of the film thickness, in the case where the measurement points are arranged within 2 mm from the outer periphery of the wafer, the measurement data obtained at the measurement points are removed from the above calculation. Note that, although a method of finding the deviation of the impurity concentration and the deviation of the carrier concentration by directly measuring the impurity concentration and the carrier concentration, respectively, is described, in the case where an impurity (conductive impurity) for controlling the carrier concentration is added, the deviation of the carrier concentration can be estimated from the deviation of the impurity concentration, and conversely, the deviation of the impurity concentration can be estimated from the deviation of the carrier concentration.

[0071] As described above, the GaN layer 30 of the present embodiment has high quality in that it has at least one of high crystallinity, high surface flatness, high in-plane uniformity of film thickness, and high in-plane uniformity of impurity concentration (carrier concentration), preferably two or more of these, more preferably three or more of these, and further preferably all four of these.

[0072] (Warping of the wafer)

[0073] The wafer 150 warps due to the difference in the coefficient of thermal expansion between the sapphire substrate 10 and the GaN layer 30 and the like stacked on the sapphire substrate 10. The thicker the GaN layer 30, the greater the warping of the wafer 150. When a plurality of light emitting elements are manufactured from the wafer 150, in order to suppress a decrease in the photolithography accuracy and the like caused by the warping, it is preferable that the warping not be too large.

[0074] In the wafer 150 of the present embodiment, by making the thickness of the GaN layer 30 7 μm or less (and by not making the AlN layer 20 and the group III nitride layer 40 excessively thick), the warping of the wafer 150 can be made, for example, 110 μm or less (see FIG. 6).Figure 9 It is preferable to appropriately select the diameter and thickness of the sapphire substrate 10 in this way so that warping is suppressed. Examples of the diameter and thickness of the sapphire substrate 10 are as described above.

[0075] The warpage of wafer 150 is defined as follows. The wafer to be measured is placed on a flat plate or stage, and the distance (height) of the wafer surface from the surface of the plate or stage is measured. An orthogonal coordinate system passing through the center of the wafer is set on the surface of the wafer, and measurements are performed on this coordinate axis. Preferably, one axis of the orthogonal coordinate system is aligned with the direction of wafer deviation. In this specification, the height measurements are performed at 1 mm intervals on this orthogonal coordinate axis. Similar to the previous film thickness measurements, when the measurement point is located within 2 mm of the outer perimeter of the wafer, the measurement data obtained at that measurement point is removed from the calculations below. A straight line passing through the two outermost points on each axis is used as a new reference line, and the distance between the measurement point on that axis that is farthest from the reference line and the reference line is defined as the warpage relative to that axis. This measurement is performed on both orthogonal axes separately, and the average of the two warpages is taken as the wafer warpage.

[0076] Figure 2 and Figure 3 These are schematic cross-sectional views representing the first and second examples of light-emitting elements 200, illustrating a single light-emitting element 200 divided among a plurality of light-emitting elements 200 formed on wafer 150.

[0077] The GaN layer 30 (n-type layer), the light-emitting layer 41, and the p-type layer 42 constitute the operating layer 60 for the LED to carry the operating current. The light-emitting element 200 has at least the operating layer 60 and electrodes 50. The electrodes 50 have: an n-side electrode 51 electrically connected to the GaN layer 30 (n-type layer); and a p-side electrode 52 electrically connected to the p-type layer 42. In this example, the n-side electrode 51 is formed on the surface of the GaN layer 30 exposed at the bottom end of a recess formed by removing a portion of the thickness of the p-type layer 42 and the light-emitting layer 41. Furthermore, the p-side electrode 52 is formed on the surface of the p-type layer 42. The materials, configuration, and structure of the n-side electrode 51 and the p-side electrode 52 can be appropriately selected as needed.

[0078] Figure 2 In the first example of the light-emitting element 200 shown, a sapphire substrate 10 is provided as a support substrate, and an AlN layer 20 is provided between the sapphire substrate 10 and the GaN layer 30. Figure 3In the light emitting element 200 of the second example shown, the n-side electrode 51 and the p-side electrode 52 are connected to the circuit substrate 210 by way of the bumps 220, and the circuit substrate 210 functions as a support substrate. In the light emitting element 200 of the second example, the sapphire substrate 10 is removed. Note that the AlN layer 20 can be removed along with the sapphire substrate 10.

[0079] The size of one light emitting element 200 in plan view is, for example, 10 μm or more and 3000 μm (3 mm) or less, and, if considered as an area, is, for example, 100 μm 2 or more and 9000000 μm 2 (9 mm 2 ) or less. In the case where miniaturization is desired for micro-LED applications and the like, the size of one light emitting element 200 in plan view is preferably, for example, 100 μm or less, and, if considered as an area, is, for example, 10000 μm 2 or less. Note that the planar shape of the light emitting element 200 is not limited to a square shape, and can be appropriately selected as needed.

[0080] The GaN layer 30 of the light emitting element 200 of the present embodiment has high quality despite being thin (even if thicker, 7 μm or less). Thus, effects such as the following can be obtained.

[0081] The GaN layer 30 has high crystallinity and high surface flatness despite being thin. Thus, the crystallinity of the Group III nitride layer 40 grown on the GaN layer 30 can be improved despite the GaN layer 30 being thin, and thus the performance of the light emitting element 200 can be improved.

[0082] The GaN layer 30 has high in-plane uniformity of film thickness. Thus, performance variation between the plurality of light emitting elements 200 formed on the wafer 150 can be suppressed.

[0083] The GaN layer 30 has high in-plane uniformity of impurity concentration (carrier concentration). Thus, performance variation between the plurality of light emitting elements 200 formed on the wafer 150 can be suppressed.

[0084] The GaN layer 30 has high quality even if n-type impurities are added (through the thickness), and thus can be used as at least a part of the operation layer 60 of the light emitting element 200. Note that, as in the second example, even in the manner in which the sapphire substrate 10 (and the AlN layer 20) has been removed, the light emitting element 200 is provided with the GaN layer 30 as at least a part of the operation layer 60. Note that, as needed, a stacked structure in which a lower layer side (sapphire substrate side) portion among the GaN layer 30 is undoped and an upper layer side (light emitting layer side) portion among the GaN layer 30 is added with n-type impurities can be adopted.

[0085] When the plurality of light emitting elements 200 are formed on the wafer 150, in order to suppress a decrease in lithography precision and the like caused by warping of the wafer 150, the warping is preferably not too large. The GaN layer 30 of the light emitting element 200 of the present embodiment has high crystallinity even if it is thin. Thus, by thinning the GaN layer 30, it is possible to suppress warping of the wafer 150, and thus it is possible to suppress a decrease in lithography precision and the like caused by the warping. In other words, it is possible to suppress a performance deviation among the plurality of light emitting elements 200 formed on the wafer 150.

[0086] Specifically, by making the thickness of the GaN layer 30 7 μm or less, it is possible to make the warping of the wafer 150 110 μm or less. Further, as will be described in detail in the examples described later, by making the thickness of the GaN layer 30 5 μm or less, it is possible to make the warping of the wafer 150 80 μm or less, and by making the thickness of the GaN layer 30 3 μm or less, it is possible to make the warping of the wafer 150 50 μm or less.

[0087] In the case of manufacturing micro-LEDs, it is more important to suppress a decrease in lithography precision caused by the warping described above, and it is preferable to make the warping of the wafer 150 100 μm or less (as the thickness of the GaN layer 30, 5 μm or less), and more preferable to make the warping of the wafer 150 50 μm or less (as the thickness of the GaN layer 30, 3 μm or less).

[0088] According to the present embodiment, more specifically, it is possible to suppress a deviation in the light emitting power output and the like of the light emitting element 200, which will be evaluated in the examples described later, among the plurality of light emitting elements 200 formed on the wafer 150. The evaluation of these characteristics will be described in detail in the examples described later.

[0089] Next, a manufacturing method of the light emitting element 200 will be described. Figure 4 is a flowchart showing an example of a manufacturing method of the light emitting element 200 according to the present embodiment. The manufacturing method of this example has a substrate preparation step S10, an AlN layer formation step S20, a heat treatment step S30, a GaN layer formation step S40, a Group III nitride layer formation step S50, and an electrode formation step S60.

[0090] In this example, an AlN template, i.e., a Group III nitride layer-stacked substrate 90 (hereinafter also referred to as wafer 90) in which the outermost surface is an AlN layer 20 is manufactured by performing the substrate preparation step S10, the AlN layer formation step S20, and the heat treatment step S30. Also, after the wafer (AlN template) 90 is manufactured, formation of the GaN layer 30 in the GaN layer formation step S40 and formation of the Group III nitride layer 40 in the Group III nitride layer formation step S50 are performed in the form of a series of crystal growth (for example, crystal growth based on a metal-organic vapor phase epitaxy (MOVPE) method), thereby manufacturing a wafer 150.

[0091] First, in the substrate preparation step S10, a sapphire substrate 10 is prepared. Next, in the AlN layer formation step S20, an AlN layer 20 is formed by growing AlN on the main surface 11 of the sapphire substrate 10. As a growth method of the AlN layer 20, for example, hydride vapor phase epitaxy (HVPE) can be used. As an aluminum (Al) source gas, for example, aluminum monochloride (AlCl) gas can be used, and in addition, for example, aluminum trichloride (AlCl3) gas can be used. As a nitrogen (N) source gas, for example, ammonia (NH3) gas can be used. These source gases can be mixed and supplied with a carrier gas using hydrogen (H2 gas), nitrogen (N2 gas), or a mixed gas thereof.

[0092] As the growth conditions of the AlN layer 20, the following conditions can be exemplified. Note that the V / III ratio refers to the ratio of the supply amount of the Group V (N) source gas to the supply amount of the Group III (Al) source gas.

[0093] Growth temperature: 900 to 1300°C

[0094] V / III ratio: 0.2 to 200

[0095] Growth rate: 0.5 to 3000 nm / minute

[0096] In order to prevent AlN from adhering to the nozzle of the gas supply pipe that introduces various gases into the growth chamber of the HVPE device, hydrogen chloride (HCl) gas can be circulated. As the supply amount of the HCl gas, an amount such as a ratio of 0.1 to 100 with respect to the AlCl gas or the AlCl3 gas can be exemplified.

[0097] In the AlN layer forming step S20, the AlN layer 20 having high crystallinity as described above can be obtained by control of the crystal growth conditions, annealing treatment, or the like. Specifically, by appropriately adjusting the growth conditions (temperature, growth rate, raw material supply amount, or the like) at the time of growth of the AlN layer 20, for example, the crystallinity of the AlN layer 20 can be improved. Further, for example, after the AlN layer 20 is grown, annealing treatment is performed at a temperature of 1400°C or higher and 1700°C or lower in an atmosphere containing N2 gas, whereby the crystallinity of the AlN layer 20 can be improved.

[0098] Note that, by so operating, the crystallinity of the AlN layer 20 can be improved, but there is a tendency that, in the formed AlN layer 20, a compressive strain caused by a difference in lattice constant and a difference in thermal expansion coefficient between the sapphire substrate 10 is introduced in a direction (for example, a-axis direction) parallel to the surface 21.

[0099] Next, in the heat treatment step S30, the AlN layer 20 is subjected to heat treatment. The heat treatment step S30 is performed in an atmosphere containing H2 gas (hereinafter referred to as a hydrogen-containing atmosphere). The H2 gas can be supplied mixed with a non-active gas such as N2 gas, argon (Ar gas), or the like. The heat treatment can be performed in a growth chamber of an HVPE device, or can be performed in another heat treatment device.

[0100] By performing the heat treatment in the hydrogen-containing atmosphere, the surface 21 can be modified so that the compressive strain introduced to the surface 21 of the AlN layer 20 is moderated. The mechanism of the moderation of the compressive strain is not yet clear, but it is considered that the mechanism is that, in the heat treatment step S30, hydrogen is present in the atmosphere, and thus the occurrence of point defects in the AlN crystal is promoted. It is considered that the nitrogen atoms in the AlN are bonded to hydrogen at the surface, form ammonia, and are detached, and thus a large number of nitrogen vacancies are formed in the AlN, which function as voids of atomic sites, and thus the strain of the GaN layer 30 grown on the AlN layer 20 can be moderated.

[0101] Further, the heat treatment step S30 is started in an atmosphere substantially free of ammonia. Specifically, for example, it is performed without supplying NH3gas. When the heat treatment is performed in an atmosphere containing ammonia, formation of the above-mentioned point defects (nitrogen vacancies) is suppressed, and thus it is difficult to relax the strain of the GaN layer 30. Further, when the heat treatment is performed in the growth chamber of the HVPE apparatus, the NH3gas introduced in the AlN layer formation step S20 can remain in the growth chamber, and thus it is preferable to exhaust (or replace) the gas in the growth chamber before performing the heat treatment. Note that, in the present specification, substantially free of ammonia means, for example, that the partial pressure of NH3gas in the growth chamber is less than 1% relative to the total pressure. Note that, as described above, it is considered that, in the heat treatment step S30, the nitrogen atoms in the AlN are bonded to hydrogen on the surface and are released as ammonia, but the ammonia generated by the release is extremely small. Thus, the partial pressure of NH3gas in the growth chamber can be 1% or more of the total pressure due to this ammonia. In this way, the heat treatment step S30 is performed in an atmosphere substantially free of ammonia.

[0102] The heat treatment step S30 is preferably performed at a temperature (hereinafter also referred to as heat treatment temperature) of, for example, 900°C or higher and 1300°C or lower. When the heat treatment temperature is less than 900°C, the surface 21 is difficult to modify. In contrast, by making the heat treatment temperature 900°C or higher, the surface 21 can be easily modified. On the other hand, when the heat treatment temperature exceeds 1300°C, there is a possibility that the surface 21 is decomposed. In contrast, by making the heat treatment temperature 1300°C or lower, decomposition of the surface 21 can be suppressed.

[0103] The heat treatment step S30 is preferably performed for a time (hereinafter also referred to as heat treatment time) of, for example, 10 minutes or longer and 120 minutes or shorter. When the heat treatment time is less than 10 minutes, the surface 21 is difficult to modify. In contrast, by making the heat treatment time 10 minutes or longer, the surface 21 can be easily modified. On the other hand, when the heat treatment time exceeds 120 minutes, there is a possibility that the flatness of the surface 21 is reduced. In contrast, by making the heat treatment time 120 minutes or shorter, reduction in the flatness of the surface 21 can be suppressed. More preferably, the heat treatment time is, for example, 30 minutes or longer and 90 minutes or shorter.

[0104] By implementing the substrate preparation step S10, the AlN layer formation step S20, and the heat treatment step S30, a wafer (AlN template) 90 is manufactured.

[0105] Next, in the GaN layer forming step S40, the GaN layer 30 is formed by growing GaN on the AlN layer 20 of the wafer 90. As a growth method of the GaN layer 30, for example, the MOVPE method can be used. As a gallium (Ga) source gas, for example, trimethyl gallium (Ga(CH3)3, TMG) gas can be used. As a nitrogen (N) source gas, for example, NH3gas can be used. As an n-type impurity, for example, silicon (Si) can be used, and as a Si source gas, for example, silane (SiH4) gas can be used. These source gases can be mixed with a carrier gas using H2gas, N2gas, or a mixed gas thereof and supplied.

[0106] As the growth conditions of the GaN layer 30, the following conditions can be exemplified.

[0107] Growth temperature: 900 to 1000°C

[0108] V / III ratio: 500 to 8000

[0109] Growth rate: 10 to 100 nm / min

[0110] The wafer 90 is a laminated substrate in which the AlN layer 20 has the above-described high crystallinity and the surface 21 of the AlN layer 20 is modified by performing the above-described heat treatment. Thus, the wafer 90 is configured as an AlN template capable of forming a high-quality GaN layer 30 as described above on the AlN layer 20. In the GaN layer forming step S40, by forming the GaN layer 30 on the AlN layer 20 possessed by the wafer 90, a GaN layer 30 having the above-described high quality can be obtained.

[0111] In the GaN layer forming step S40, the GaN layer 30 is formed at a low temperature of 1000°C or lower (preferably 950°C or lower). Thus, compared to a case where the GaN layer 30 is formed at a high temperature exceeding 1000°C, the temperature deviation in the in-plane direction of the GaN layer 30 at the time of growth is easily suppressed, and thus the in-plane uniformity of the film thickness of the GaN layer 30 can be improved. Note that in the present embodiment, the crystallinity of the AlN layer 20 that becomes the growth substrate of the GaN layer 30 is high, and thus even if the GaN layer 30 is grown at a low temperature of 1000°C or lower, a GaN layer 30 having the above-described high crystallinity can be obtained.

[0112] Further, by suppressing the temperature deviation in the in-plane direction of the GaN layer 30 at the time of growth, the in-plane uniformity of the impurity concentration in the GaN layer 30 can be improved. Thus, the in-plane uniformity of the carrier concentration in the GaN layer 30 can be improved.

[0113] In order to improve the crystallinity of the GaN layer 30 while improving the surface flatness of the GaN layer 30, the thickness of the GaN layer 30 is preferably 0.8 μm or more. From the viewpoint of improving the overall yield at the time of manufacturing the light emitting element 200, the upper limit of the thickness of the GaN layer 30 is preferably 7 μm or less.

[0114] Next, in the Group III nitride layer forming step S50, a Group III nitride layer 40 is formed by growing a Group III nitride on the GaN layer 30. The wafer 150 is formed by this operation. By forming the Group III nitride layer 40 on the high-quality GaN layer 30, the quality of the Group III nitride layer 40 can be improved, and the performance of the light emitting element 200 can be improved.

[0115] As the Group III nitride layer 40, a light emitting layer 41 and a p-type layer 42 are formed. As the light emitting layer 41, for example, a multiple quantum well structure in which InGaN well layers and GaN barrier layers are alternately stacked is formed. As the p-type layer 42, for example, a stack of a p-type AlGaN clad layer and a p-type GaN contact layer is formed. Note that the constitution of the light emitting layer 41 and the p-type layer 42 can be appropriately selected in accordance with the wavelength of light that is desired to be emitted from the light emitting element 200 and the like.

[0116] The Group III nitride layer 40 is constituted by a stack of Group III nitride layers having different compositions. Of the respective layers constituting the Group III nitride layer 40, at least one of, for example, aluminum (Al), gallium (Ga), and indium (In) can be included as a Group III element in accordance with the composition of each layer as required.

[0117] As the growth method of the Group III nitride layer 40, for example, the MOVPE method can be used. As the Al source gas, for example, trimethylaluminum (Al(CH3)3, TMA) gas can be used. As the Ga source gas, for example, trimethylgallium (Ga(CH3)3, TMG) gas can be used. As the In source gas, for example, trimethylindium (In(CH3)3, TMI) gas can be used. As the nitrogen (N) source gas, for example, NH3gas can be used. As the p-type impurity, for example, magnesium (Mg) can be used, and as the Mg source gas, for example, cyclopentadienylmagnesium (Cp2Mg) can be used, and furthermore, for example, ethylcyclopentadienylmagnesium (EtCp2Mg) gas can be used. These source gases can be mixed with a carrier gas using H2gas, N2gas, or a mixed gas thereof and supplied. The supply amount of the source gas is appropriately adjusted in accordance with the composition of each layer constituting the Group III nitride layer 40 and the added impurities.

[0118] Next, in the electrode forming step S60, the electrodes 50 (n-side electrode 51 and p-side electrode 52) are formed. Note that, as a part of the electrode forming step S60, formation of a recess for arranging the n-side electrode 51 can be performed. The light emitting element 200 is manufactured by the above operation. Thereafter, the plurality of light emitting elements 200 formed on the wafer 150 are divided into individual light emitting elements 200. Further, removal of the sapphire substrate 10 (and the AlN layer 20) is performed as necessary.

[0119] <Embodiment>

[0120] Next, experimental results for the embodiment of the present application will be described. By the method described in the above embodiment, a laminated substrate (hereinafter also referred to as an intermediate wafer) having a sapphire substrate 10 (hereinafter also referred to simply as a base substrate), an AlN layer 20 (hereinafter also referred to simply as an AlN layer), and a GaN layer 30 (hereinafter also referred to simply as a GaN layer) was manufactured. Further, by the method described in the above embodiment, a laminated substrate 150 (hereinafter also referred to as an element wafer) further laminating a light emitting layer 41 (hereinafter also referred to simply as a light emitting layer) and a p-type layer 42 (hereinafter also referred to simply as a p-type layer) on the GaN layer of the intermediate wafer was manufactured, and an electrode was formed, whereby a light emitting element was manufactured.

[0121] For the intermediate wafer, by changing the thickness of the GaN layer, how the crystallinity of the GaN layer, the surface flatness of the GaN layer, the in-plane uniformity of the film thickness of the GaN layer, the in-plane uniformity of the impurity concentration (carrier concentration) in the GaN layer, and the warping of the intermediate wafer respectively change were investigated.

[0122] Further, for the light emitting element formed on the element wafer, by changing the thickness of the GaN layer, how the in-plane uniformity of the light emission power output, the in-plane uniformity of the light emission wavelength, the in-plane uniformity of the driving voltage, the in-plane uniformity of the reverse leakage current suppression effect, and the overall yield rate respectively change were investigated.

[0123] As the sapphire substrate, a C-plane sapphire substrate having a diameter of 4 inches and a thickness of 900 μm was used. The thickness of the AlN layer was set to 0.35 μm. In the GaN layer, Si was added as an n-type impurity at a concentration of 3 x 1018cm-2 (over the entire thickness). 18 cm -3 The thickness of the GaN layer was changed to 0.4 μm, 0.6 μm, 0.8 μm, 1 μm, 1.2 μm, 1.5 μm, 2 μm, 3 μm, 5 μm, 7 μm, 9 μm, and 10 μm.

[0124] As the light emitting layer, a multi-quantum well structure in which an InGaN well layer having a thickness of 3 nm and a GaN barrier layer having a thickness of 12 nm were alternately stacked in 6 cycles was formed so that the design value of the light emitting wavelength (hereinafter also referred to as the reference light emitting wavelength) would be 445 nm. As the p-type layer, a p-type AlGaN clad layer having a thickness of 30 nm and a p-type GaN contact layer having a thickness of 300 nm were stacked.

[0125] A plurality of light emitting elements were formed on the entire surface of the element wafer, and each light emitting element was separated, thereby obtaining light emitting elements from the element wafer. The size of each light emitting element was set to 100 μm square. Hereinafter, the light emitting element will be simply referred to as an element. The design value of the drive current (hereinafter also referred to as the reference drive current) in each element was set to 20 mA, the design value of the drive voltage (hereinafter also referred to as the reference drive voltage) was set to 3.3 V, and the design value of the light emitting power output (hereinafter also referred to as the reference light emitting power output) was set to 10 mW.

[0126] Each element was separated by a portion having a 20 μm interval. In addition, a region within 2 mm from the outer periphery of the element wafer was excluded from evaluation because the LED characteristics did not satisfy the specifications due to the influence of non-uniformity of growth, non-uniformity of a photolithography process, and the like. About 500,000 elements could be obtained from a 4-inch wafer. For all the LEDs obtained from one element wafer, the following measurements were performed.

[0127] As the characteristics of each element, the light emitting power output, the light emitting wavelength, the drive voltage, and the reverse leakage current were measured. For these characteristics, it was investigated whether each element satisfied the prescribed conditions, respectively. In addition, as the comprehensive yield, it was investigated whether all of these characteristics of each element satisfied the prescribed conditions. For each element wafer, the ratio of the number of elements satisfying the prescribed conditions to the total number of elements obtained from the element wafer was evaluated as the in-plane uniformity with respect to the light emitting power output, the light emitting wavelength, the drive voltage, the reverse leakage current, and the comprehensive yield.

[0128] Further, a comparative example was also conducted. In the comparative example, a method of forming a conventional low-temperature growth GaN buffer layer on a sapphire substrate was employed. Specifically, the sapphire substrate was introduced into a MOVPE apparatus, the apparatus was replaced with nitrogen gas, and then the substrate temperature was set to 1100°C, and surface cleaning was performed for 10 minutes in a hydrogen atmosphere. Next, the substrate temperature was set to a low temperature of 550°C, TMG and ammonia were introduced into the apparatus, and a GaN buffer layer was grown to a thickness of 30 nm. Thereafter, while flowing ammonia, the substrate temperature was set to 1050°C, and a GaN layer 30 was grown in the same manner as in the example. The growth temperature of the GaN layer 30 in the comparative example was higher than in the example because, in the method of the comparative example, it was difficult to obtain a GaN layer 30 of sufficient quality. Note that, in the comparative example, when the thickness of the GaN layer was less than 1.5 μm, an element that sufficiently functions as an LED could not be obtained.

[0129] The experimental results will be described in more detail below. As will be described later, from the viewpoint of improving the overall yield of the element, the thickness of the GaN layer is preferably 7 μm or less. Therefore, the example will be described with focus on the range in which the thickness of the GaN layer is 7 μm or less.

[0130] (Crystallinity of GaN layer)

[0131] Figure 5 is a graph showing the crystallinity of the GaN layer of the example, Figure 15 is a graph showing the crystallinity of the GaN layer of the comparative example. As the crystallinity, the half-value width of (0002) diffraction measured based on an X-ray rocking curve and the half-value width of (10-12) diffraction measured based on an X-ray rocking curve were measured. In Figure 5 and Figure 15 In the graphs of Figs. 8 and 9, the horizontal axis represents the thickness of the GaN layer, and the vertical axis represents the half-value width of X-ray diffraction.

[0132] Both the example and the comparative example had the same tendency that the thicker the GaN layer, the smaller the half-value width of X-ray diffraction, in other words, the better the crystallinity of the GaN layer, but in the comparative example ( Figure 15 ), even when the GaN layer was thickened to 10 μm, the half-value width of the (0002) plane decreased only to 190 seconds, and the half-value width of the (10-12) plane decreased only to 290 seconds, around 300 seconds.

[0133] On the other hand, in the example ( Figure 5) even if the thickness of the GaN layer is as thin as 0.8 μm, the half-value width of the (0002) plane becomes 95 seconds, and the half-value width of the (10-12) plane becomes 190 seconds and 200 seconds or less. In the embodiment, by making the thickness of the GaN layer 0.8 μm or more, even if the thickness of the GaN layer is 7 μm or less, it is possible to make the half-value width of the (0002) plane 100 seconds or less and the half-value width of the (10-12) plane 200 seconds or less. In the embodiment, if the GaN layer is further thickened to 7 μm, the half-value width of the (0002) plane decreases to 63 seconds, and the half-value width of the (10-12) plane decreases to 112 seconds, and 110 seconds or less.

[0134] Note that, as the measured value of the thickness of the GaN layer in the range of 7 μm or less in the embodiment, the minimum value of the half-value width of the (0002) plane is 55 seconds when the thickness of the GaN layer is 3 μm, and the minimum value of the half-value width of the (10-12) plane is 112 seconds when the thickness of the GaN layer is 7 μm. As a reference level of the minimum value of the half-value width of the (0002) plane in this thickness range, for example, 50 seconds can be cited. Further, as a reference level of the minimum value of the half-value width of the (10-12) plane, for example, 105 seconds can be cited.

[0135] The crystallinity of the GaN layer of the embodiment shows a tendency to greatly increase up to the point at which the GaN layer is thickened to about 1.5 μm. When the thickness of the GaN layer is 1 μm, the half-value width of the (0002) plane becomes 76 seconds, and 80 seconds or less, and the half-value width of the (10-12) plane becomes 175 seconds, and 180 seconds or less. By making the thickness of the GaN layer 1 μm or more, it is possible to make the half-value width of the (0002) plane 80 seconds or less and the half-value width of the (10-12) plane 180 seconds or less. Further, when the thickness of the GaN layer is 1.5 μm, the half-value width of the (0002) plane becomes 68 seconds, and 70 seconds or less, and the half-value width of the (10-12) plane becomes 160 seconds, and 170 seconds or less. By making the thickness of the GaN layer 1.5 μm or more, it is possible to make the half-value width of the (0002) plane 70 seconds or less and the half-value width of the (10-12) plane 170 seconds or less.

[0136] The GaN layer of the embodiment can be made to have the crystallinity described above even if impurities are added to the GaN layer (even if, for example, 1 x 1018atoms / cm2or more of impurities are added to the entire thickness of the GaN layer, for example, 1 x 1019atoms / cm2or more of impurities are added to the entire thickness of the GaN layer, or 1 x 1020atoms / cm2or more of impurities are added to the entire thickness of the GaN layer). 16 cm -3 1 x 1018atoms / cm2or more of impurities are added to the entire thickness of the GaN layer, for example, 1 x 1019atoms / cm2or more of impurities are added to the entire thickness of the GaN layer, or 1 x 1020atoms / cm2or more of impurities are added to the entire thickness of the GaN layer). 17 cm -3 1 x 1018atoms / cm2or more of impurities are added to the entire thickness of the GaN layer, for example, 1 x 1019atoms / cm2or more of impurities are added to the entire thickness of the GaN layer, or 1 x 1020atoms / cm2or more of impurities are added to the entire thickness of the GaN layer). 18 cm -3The GaN layer of the above concentration with the addition of impurities also showed high crystallinity as described above. Therefore, it can be said that it shows high crystallinity equal to or higher than that in the case where no impurities are added. Note that the concentration of the impurities added to the GaN layer is preferably set to, for example, 1 x 10 19 cm -3 below.

[0137] (Surface flatness of GaN layer)

[0138] Figure 6 is a graph showing the surface flatness of the GaN layer of the example, Figure 16 is a graph showing the surface flatness of the GaN layer of the comparative example. As the surface flatness, the rms value (hereinafter, also simply referred to as rms) of the surface roughness was found by AFM measurement for a 5 μm square region of the surface of the GaN layer. In Figure 6 and Figure 16 , the horizontal axis represents the thickness of the GaN layer, and the vertical axis represents the rms.

[0139] Both the example and the comparative example can observe the tendency that the rms sharply decreases until the GaN layer becomes a certain degree of thickness, and is substantially constant for a thickness equal to or higher than the degree. In the comparative example Figure 16 , the rms can be made to be 0.5 nm or less for a thickness of 2 μm or more of the GaN layer, but the rms is 3.1 nm for a thickness of 1.5 μm of the GaN layer, and the rms is 92 nm for a thickness of 0.8 μm of the GaN layer.

[0140] On the other hand, in the example Figure 6 , the rms is 0.33 nm for a thickness of 0.8 μm of the GaN layer, and the rms can be made to be preferably 0.5 nm or less, and more preferably 0.4 nm or less, by making the thickness of the GaN layer to be 0.8 μm or more. The rms is 3 nm for a thickness of 0.6 μm of the GaN layer, and the rms is 10 nm for a thickness of 0.4 μm of the GaN layer.

[0141] Note that the minimum value of the rms is 0.21 nm for a thickness of 1.2 μm of the GaN layer, as a measured value of the thickness of the GaN layer of the example in the range of 7 μm or less. As a reference level of the minimum value of the rms, for example, 0.2 nm can be cited.

[0142] As described above, the GaN layer of the example has high crystallinity and high surface flatness compared to the GaN layer of the comparative example, and thus can be preferably used as a base layer for growing a Group III nitride layer.

[0143] (In-plane uniformity of film thickness of GaN layer)

[0144] Figure 7 is a graph showing the in-plane deviation of the thickness of the GaN layer of the example. Figure 7 In the graph, the horizontal axis represents the thickness of the GaN layer, and the vertical axis represents the in-plane deviation of the thickness. The in-plane deviation of the thickness has a tendency to be smaller as the GaN layer is thinner. By making the thickness of the GaN layer 7 μm or less, the in-plane deviation of the thickness can preferably be 3.5% or less, more preferably 3% or less.

[0145] Note that, as a measured value of the thickness of the GaN layer of the example in the range of 7 μm or less, the minimum value of the in-plane deviation of the thickness of the GaN layer was 0.5% when the thickness of the GaN layer was 1 μm. As a reference level of the minimum value of the in-plane deviation of the thickness of the GaN layer, for example, 0.5% can be cited, and, in addition, for example, 0.4% can be cited.

[0146] (In-plane uniformity of impurity concentration in GaN layer)

[0147] Figure 8 is a graph showing the in-plane deviation of the (carrier concentration) impurity concentration in the GaN layer of the example. In the present example, n-type impurities were added as impurities in the GaN layer, and the in-plane deviation of the n-type carrier concentration in the GaN layer was measured. The in-plane deviation of the n-type carrier concentration in the GaN layer can also be interpreted as the in-plane deviation of the n-type impurity concentration in the GaN layer. Figure 8 In the graph, the horizontal axis represents the thickness of the GaN layer, and the vertical axis represents the deviation of the n-type carrier concentration, that is, the in-plane deviation of the n-type impurity concentration. The in-plane deviation of the (carrier concentration) impurity concentration has a tendency to be smaller as the GaN layer is thinner. By making the thickness of the GaN layer 7 μm or less, the in-plane deviation of the (carrier concentration) impurity concentration can preferably be 3.5% or less, more preferably 3% or less.

[0148] Note that, as a measured value of the thickness of the GaN layer of the example in the range of 7 μm or less, the minimum value of the in-plane deviation of the (carrier concentration) impurity concentration was 0.54% when the thickness of the GaN layer was 1.2 μm. As a reference level of the minimum value of the in-plane deviation of the (carrier concentration) impurity concentration in the GaN layer, for example, 0.5% can be cited, and, in addition, for example, 0.4% can be cited.

[0149] (Warp of intermediate wafer)

[0150] Figure 9 is a graph showing the warp of the intermediate wafer of the example. Figure 9In the graph, the horizontal axis represents the thickness of the GaN layer, and the vertical axis represents the warpage of the intermediate wafer. The warpage of the intermediate wafer has a tendency to be smaller as the GaN layer is thinner. When the thickness of the GaN layer is 7 μm, the warpage of the intermediate wafer is 98 μm, and by making the thickness of the GaN layer 7 μm or less, the warpage of the intermediate wafer can be preferably 110 μm or less, more preferably 105 μm or less.

[0151] As for the device wafer, the thickness of the intermediate wafer is increased by the lamination of the light emitting layer and the p-type layer. However, by sufficiently reducing the thickness of the Group III nitride layer formed by laminating the light emitting layer and the p-type layer, the increase in the warpage caused by the light emitting layer and the p-type layer can be suppressed. By making the thickness of the GaN layer 7 μm or less, the warpage of the device wafer can also be preferably 110 μm or less, more preferably 105 μm or less.

[0152] Note that, as a measured value of the thickness of the GaN layer of the embodiment in the range of 7 μm or less (and 0.8 μm or more), the minimum value of the warpage of the intermediate wafer was 12 μm when the thickness of the GaN layer was 0.8 μm. As a reference level of the minimum value of the warpage of the intermediate wafer (or the device wafer), for example, 10 μm can be cited.

[0153] The GaN layer of the embodiment and the intermediate wafer (or the device wafer) having the GaN layer also have the following characteristics. The crystallinity of the GaN layer has a tendency to be lower as the GaN layer is thinner, but on the other hand, as for the in-plane deviation of the thickness of the GaN layer, the in-plane deviation of the impurity concentration (carrier concentration) in the GaN layer, and the warpage of the intermediate wafer (or the device wafer), the thinner the GaN layer is, the lower each of them can be (see Figures 7-9 ).

[0154] For example, by making the thickness of the GaN layer 5 μm or less, the in-plane deviation of the thickness of the GaN layer can be preferably 3% or less, more preferably 2.5% or less, the in-plane deviation of the impurity concentration (carrier concentration) in the GaN layer can be preferably 3% or less, more preferably 2.5% or less, and the warpage of the intermediate wafer (or the device wafer) can be preferably 80 μm or less, more preferably 75 μm or less. Note that, as a measured value of the thickness of the GaN layer of the embodiment in the range of 5 μm or less, the minimum value of the half-value width of the (0002) plane was 55 seconds when the thickness of the GaN layer was 3 μm, and the minimum value of the half-value width of the (10-12) plane was 123 seconds when the thickness of the GaN layer was 5 μm. In this thickness range, as a reference level of the minimum value of the half-value width of the (0002) plane, for example, 50 seconds can be cited. Further, as a reference level of the minimum value of the half-value width of the (10-12) plane, for example, 115 seconds can be cited.

[0155] Further, for example, by making the thickness of the GaN layer 3 μm or less, the in-plane deviation of the thickness of the GaN layer can be preferably 2.5% or less, more preferably 2% or less, the in-plane deviation of the impurity concentration (carrier concentration) in the GaN layer can be preferably 2.5% or less, more preferably 2% or less, and the warpage of the intermediate wafer (or device wafer) can be preferably 50 μm or less, more preferably 45 μm or less. Note that, as a measured value in the range where the thickness of the GaN layer of the example is 3 μm or less, the minimum value of the half-value width of the (0002) plane is 55 seconds when the thickness of the GaN layer is 3 μm, and the minimum value of the half-value width of the (10-12) plane is 143 seconds when the thickness of the GaN layer is 2 μm. In this thickness range, as a reference level of the minimum value of the half-value width of the (0002) plane, for example, 50 seconds can be cited. Further, as a reference level of the minimum value of the half-value width of the (10-12) plane, for example, 135 seconds can be cited.

[0156] Further, for example, by making the thickness of the GaN layer 2 μm or less, the in-plane deviation of the thickness of the GaN layer can be preferably 2% or less, more preferably 1.5% or less, the in-plane deviation of the impurity concentration (carrier concentration) in the GaN layer can be preferably 2% or less, more preferably 1.5% or less, and the warpage of the intermediate wafer (or device wafer) can be preferably 40 μm or less, more preferably 35 μm or less. Note that, as a measured value in the range where the thickness of the GaN layer of the example is 2 μm or less, the minimum value of the half-value width of the (0002) plane is 62 seconds when the thickness of the GaN layer is 2 μm, and the minimum value of the half-value width of the (10-12) plane is 143 seconds when the thickness of the GaN layer is 2 μm. In this thickness range, as a reference level of the minimum value of the half-value width of the (0002) plane, for example, 55 seconds can be cited. Further, as a reference level of the minimum value of the half-value width of the (10-12) plane, for example, 135 seconds can be cited.

[0157] Further, for example, by making the thickness of the GaN layer 1.5 μm or less, the in-plane deviation of the thickness of the GaN layer can be preferably 1.5% or less, more preferably 1% or less, the in-plane deviation of the impurity concentration (carrier concentration) in the GaN layer can be preferably 1.5% or less, more preferably 1% or less, and the warpage of the intermediate wafer (or element wafer) can be preferably 35 μm or less, more preferably 30 μm or less. Note that, as a measured value in the range of 1.5 μm or less of the thickness of the GaN layer of the embodiment, the minimum value of the half-value width of the (0002) plane was 68 seconds when the thickness of the GaN layer was 1.5 μm, and the minimum value of the half-value width of the (10-12) plane was 160 seconds when the thickness of the GaN layer was 1.5 μm. In this thickness range, as a reference level of the minimum value of the half-value width of the (0002) plane, for example, 60 seconds can be cited. Further, as a reference level of the minimum value of the half-value width of the (10-12) plane, for example, 155 seconds can be cited.

[0158] Further, for example, by making the thickness of the GaN layer 1.2 μm or less, the in-plane deviation of the thickness of the GaN layer can be preferably 1% or less, more preferably 0.8% or less, the in-plane deviation of the impurity concentration (carrier concentration) in the GaN layer can be preferably 1% or less, more preferably 0.8% or less, and the warpage of the intermediate wafer (or element wafer) can be preferably 30 μm or less, more preferably 25 μm or less. Note that, as a measured value in the range of 1.2 μm or less of the thickness of the GaN layer of the embodiment, the minimum value of the half-value width of the (0002) plane was 70 seconds when the thickness of the GaN layer was 1.2 μm, and the minimum value of the half-value width of the (10-12) plane was 166 seconds when the thickness of the GaN layer was 1.2 μm. In this thickness range, as a reference level of the minimum value of the half-value width of the (0002) plane, for example, 65 seconds can be cited. Further, as a reference level of the minimum value of the half-value width of the (10-12) plane, for example, 160 seconds can be cited.

[0159] Note that, as the reference level of the minimum value of the half-value width of the (0002) plane, the reference level of the minimum value of the half-value width of the (10-12) plane, the reference level of the minimum value of the rms, the reference level of the minimum value of the in-plane deviation of the thickness of the GaN layer, the reference level of the minimum value of the in-plane deviation of the impurity concentration (carrier concentration) in the GaN layer, and the reference level of the minimum value of the warpage of the intermediate wafer (or element wafer) exemplified in the above description, there is a possibility that each can be further reduced.

[0160] (In-plane uniformity of light emission power output)

[0161] Figure 10 is a graph showing the in-plane uniformity of the light emission power output of the element of the embodiment,Figure 17 is a graph showing the in-plane uniformity of the luminous power output of the elements of the comparative example. For each element, it was investigated whether a reference luminous power output (10 mW in this example) could be obtained by applying a reference drive current (20 mA in this example) (in other words, whether a luminous power output of 10 mW or more could be obtained). Furthermore, the ratio of the number of elements satisfying this condition (luminous power output condition) to the total number of elements obtained from the wafer for elements was evaluated as the in-plane uniformity of the luminous power output.

[0162] Any of the elements of the example and the comparative example obtained a high in-plane uniformity of 90% or more for the luminous power output by making the thickness of the GaN layer a certain degree or more. However, in order to obtain such a high in-plane uniformity, it was necessary to make the thickness of the GaN layer 5 μm or more in the comparative example, in contrast to which it was sufficient to make the thickness of the GaN layer 0.8 μm or more in the example. In the example, the in-plane uniformity of the luminous power output was 95% when the thickness of the GaN layer was 0.8 μm, and by making the thickness of the GaN layer 0.8 μm or more, the in-plane uniformity of the luminous power output was preferably 90% or more, and more preferably 95% or more. Note that the in-plane uniformity of the luminous power output in the example reached 100% when the thickness of the GaN layer was 1.2 μm, 3 μm, and 5 μm.

[0163] (In-Plane Uniformity of Emission Wavelength)

[0164] Figure 11 is a graph showing the in-plane uniformity of the luminous power output of the elements of the comparative example. For each element, it was investigated whether a reference luminous power output (10 mW in this example) could be obtained by applying a reference drive current (20 mA in this example) (in other words, whether a luminous power output of 10 mW or more could be obtained). Furthermore, the ratio of the number of elements satisfying this condition (luminous power output condition) to the total number of elements obtained from the wafer for elements was evaluated as the in-plane uniformity of the luminous power output.

[0165] In the embodiment, a tendency that the thinner the thickness of the GaN layer, the higher the in-plane uniformity of the emission wavelength is generally observed. The in-plane uniformity of the emission wavelength is 100% when the thickness of the GaN layer is 0.8 μm, but a tendency of decrease is observed when the thickness of the GaN layer is less than 0.8 μm. The in-plane uniformity of the emission wavelength is 65% when the thickness of the GaN layer is 7 μm, and by making the thickness of the GaN layer 7 μm or less (and 0.8 μm or more), the in-plane uniformity of the emission wavelength can be made 60% or more. Further, the in-plane uniformity of the emission wavelength is 72% when the thickness of the GaN layer is 5 μm, and by making the thickness of the GaN layer 5 μm or less (and 0.8 μm or more), the in-plane uniformity of the emission wavelength can be made 70% or more. Further, the in-plane uniformity of the emission wavelength is 80% when the thickness of the GaN layer is 3 μm, and by making the thickness of the GaN layer 3 μm or less (and 0.8 μm or more), the in-plane uniformity of the emission wavelength can be made 80% or more.

[0166] Figure 18 is a graph showing the in-plane uniformity of the emission wavelength of the elements of the comparative example. In the comparative example, a tendency that the thinner the thickness of the GaN layer, the higher the in-plane uniformity of the emission wavelength is generally observed, but the maximum value of the in-plane uniformity of the emission wavelength does not reach 90%. Note that in the comparative example, elements having a thickness of the GaN layer of less than 1.5 μm could not be produced.

[0167] (In-Plane Uniformity of Drive Voltage)

[0168] Figure 12 is a graph showing the in-plane uniformity of the drive voltage of the elements of the embodiment. For each element, it is investigated whether the drive voltage for generating a reference drive current (20 mA in this example) is included in a voltage range of ±0.1 V with respect to a reference drive voltage (3.3 V in this example) (3.2 V or more and 3.4 V or less in this example). Further, the ratio of the number of elements satisfying this condition (condition of drive voltage) with respect to the total number of elements obtained from the wafer for elements is evaluated as the in-plane uniformity of the drive voltage.

[0169] In the embodiment, it is roughly observed that the thinner the thickness of the GaN layer, the higher the in-plane uniformity of the driving voltage becomes. The in-plane uniformity of the driving voltage is 99.4% when the thickness of the GaN layer is 0.8 μm, reaching almost 100%, but a tendency of decrease is observed when the thickness of the GaN layer is less than 0.8 μm. The in-plane uniformity of the driving voltage is 67% when the thickness of the GaN layer is 3 μm, and by making the thickness of the GaN layer 3 μm or less (and 0.8 μm or more), the in-plane uniformity of the driving voltage can be made 60% or more. Further, the in-plane uniformity of the driving voltage is 71% when the thickness of the GaN layer is 2 μm, and by making the thickness of the GaN layer 2 μm or less (and 0.8 μm or more), the in-plane uniformity of the driving voltage can be made 70% or more. Further, the in-plane uniformity of the driving voltage is 83% when the thickness of the GaN layer is 1.5 μm, and by making the thickness of the GaN layer 1.5 μm or less (and 0.8 μm or more), the in-plane uniformity of the driving voltage can be made 80% or more.

[0170] Figure 19 is a graph showing the in-plane uniformity of the driving voltage of the element of the comparative example. In the comparative example, a tendency that the thinner the thickness of the GaN layer, the higher the in-plane uniformity of the driving voltage becomes is roughly observed, but the maximum value of the in-plane uniformity of the emission wavelength does not reach 70%. Note that in the comparative example, an element whose thickness of the GaN layer is less than 1.5 μm cannot be made.

[0171] (In-plane uniformity of reverse leakage current suppression effect)

[0172] Figure 13 is a graph showing the in-plane uniformity of the reverse leakage current suppression effect of the element of the embodiment. For each element, whether or not the leakage current when a reverse voltage of 20 V is applied between the GaN layer as the n-type layer and the p-type layer is 1 μA or less is investigated. Also, the ratio of the number of elements satisfying this condition (condition of reverse leakage current) to the total number of elements obtained from the wafer for elements is evaluated as the in-plane uniformity of the reverse leakage current suppression effect (hereinafter also referred to as the leakage suppression effect).

[0173] In the embodiment, it was roughly observed that the thinner the thickness of the GaN layer, the higher the tendency of the in-plane uniformity of the leakage suppression effect became. The in-plane uniformity of the leakage suppression effect reached 100% at a thickness of 1.2 μm and 1 μm of the GaN layer, and was as high as 98% at a thickness of 0.8 μm of the GaN layer, but a tendency of significant decrease was observed at a thickness of less than 0.8 μm of the GaN layer. The in-plane uniformity of the leakage suppression effect was 68% at a thickness of 5 μm of the GaN layer, and by making the thickness of the GaN layer 5 μm or less (and 0.8 μm or more), the in-plane uniformity of the leakage suppression effect could be made 60% or more. Further, the in-plane uniformity of the emission wavelength was 87% at a thickness of 3 μm of the GaN layer, and by making the thickness of the GaN layer 3 μm or less (and 0.8 μm or more), the in-plane uniformity of the emission wavelength was preferably 70% or more, more preferably 80% or more.

[0174] Figure 20 is a graph showing the in-plane uniformity of the leakage suppression effect of the elements of the comparative example. Regarding the leakage suppression effect in the comparative example, a tendency was shown that it was higher at a thickness of 7 μm, 5 μm, or 3 μm of the GaN layer than at a thickness of 9 μm or 10 μm of the GaN layer, but a tendency of decrease was observed at a thickness of less than 3 μm of the GaN layer, and further, the maximum was around 70%. Note that in the comparative example, elements with a thickness of less than 1.5 μm of the GaN layer could not be fabricated.

[0175] (Overall yield)

[0176] Figure 14 is a graph showing the overall yield of the elements of the embodiment. For each element, it was investigated whether the conditions of the emission power output, the condition of the emission wavelength, the condition of the driving voltage, and the condition of the reverse leakage current, as described above, were all satisfied. And, the ratio of the number of elements for which all of these conditions (conditions for overall yield) were satisfied to the total number of elements obtained from the wafer for elements was evaluated as the overall yield.

[0177] In the embodiment, it was roughly observed that the thinner the thickness of the GaN layer, the higher the tendency of the overall yield became. The overall yield reached 98% at a thickness of 1 μm of the GaN layer, and was close to 100%, and was as high as 94% at a thickness of 0.8 μm of the GaN layer, but a tendency of significant decrease was observed at a thickness of less than 0.8 μm of the GaN layer.

[0178] Figure 21is a graph showing the yield of the integrated product of the element of the comparative example. The yield of the integrated product in the comparative example stays at several % regardless of the thickness of the GaN layer, and is at most 8.2% when the thickness of the GaN layer is 7 μm, which is less than 10%. Note that in the comparative example, an element having a GaN layer with a thickness of less than 1.5 μm could not be produced.

[0179] In contrast, in the embodiments, the yield of the integrated product is 15% when the thickness of the GaN layer is 7 μm, and by making the thickness of the GaN layer 7 μm or less (and 0.8 μm or more), the yield of the integrated product can be made 10% or more, which is higher than that of the comparative example. Further, the yield of the integrated product is 32% when the thickness of the GaN layer is 5 μm, and by making the thickness of the GaN layer 5 μm or less (and 0.8 μm or more), the yield of the integrated product can be made 30% or more. Further, the yield of the integrated product can be increased to 48% when the thickness of the GaN layer is 3 μm, which is close to 50%, and by making the thickness of the GaN layer 3 μm or less (and 0.8 μm or more), the yield of the integrated product can be made 40% or more.

[0180] Further, the yield of the integrated product is 56% when the thickness of the GaN layer is 2 μm, which exceeds 50%, and by making the thickness of the GaN layer 2 μm or less (and 0.8 μm or more), the yield of the integrated product can be made 50% or more. Further, the yield of the integrated product is 72% when the thickness of the GaN layer is 1.5 μm, and by making the thickness of the GaN layer 1.5 μm or less (and 0.8 μm or more), the yield of the integrated product can be made 70% or more. Further, the yield of the integrated product is 95% when the thickness of the GaN layer is 1.2 μm, and by making the thickness of the GaN layer 1.2 μm or less (and 0.8 μm or more), the yield of the integrated product can be made 90% or more. Note that when the thickness of the GaN layer is 2 μm or less, a tendency that the yield of the integrated product is significantly increased is observed, and thus, it can be said that it is particularly preferable to make the thickness of the GaN layer 2 μm or less (and 0.8 μm or more) from the viewpoint of increasing the yield of the integrated product.

[0181] <Other Embodiments>

[0182] The present application is not limited to the above-described embodiments, and various changes can be made without departing from the spirit of the present application. Further, the various embodiments can be appropriately combined.

[0183] In the above-described embodiment, a method of forming the wafer 150 by forming the GaN layer 30 and the Group III nitride layer 40 on the wafer 90 after manufacturing the wafer 90 as the AlN template is exemplified. The method of manufacturing the wafer 150 is not limited thereto. For example, a GaN template in which the GaN layer 30 is formed on the AlN layer 20 and the GaN layer 30 on the sapphire substrate 10 can be manufactured, and the Group III nitride layer 40 can be formed on the GaN template, thereby manufacturing the wafer 150. Further, the wafer 150 can be manufactured by forming the AlN layer 20, the GaN layer 30, and the Group III nitride layer 40 on the sapphire substrate 10 by, for example, a series of crystal growth.

[0184] The GaN layer 30 of the wafer 150 of the above-described embodiment has high quality. Since the GaN layer 30 has high quality, even if the light emitting layer 41 and the p-type layer 42 that constitute the Group III nitride layer 40 are of various types, the performance of each light emitting element 200 can be improved when a plurality of light emitting elements 200 of a size of, for example, 10 μm square or more and 3000 μm square (3 mm square) or less (or 100 μm square or more and 9000 μm square or less) are formed using the wafer 150, and the performance deviation among the light emitting elements 200 can be suppressed. 2 9000 μm square or less) are formed using the wafer 150, and the performance deviation among the light emitting elements 200 can be suppressed. 2 (9 mm square or more and 90 mm square or less) are formed using the wafer 150, and the performance deviation among the light emitting elements 200 can be suppressed. 2 The performance of each light emitting element 200 can be improved when a plurality of light emitting elements 200 of a size of, for example, 10 μm square or more and 3000 μm square (3 mm square) or less (or 100 μm square or more and 9000 μm square or less) are formed using the wafer 150, and the performance deviation among the light emitting elements 200 can be suppressed.

[0185] The preferable characteristics of one light emitting element 200 are as follows. The light emitting power output is preferably, for example, 10 mW or more. In order to make the ratio of the number of light emitting elements 200 satisfying this condition (the condition of the light emitting power output) to the total number of elements obtained from the wafer 150 (the in-plane uniformity of the light emitting power output) preferably 90% or more, more preferably 95% or more, in the wafer 150 of the above-described embodiment, the thickness of the GaN layer 30 is preferably 0.8 μm or more.

[0186] It is preferable that the light emitting peak wavelength be included in a wavelength range of ±5 nm with respect to the reference light emitting wavelength (the designed light emitting wavelength). In order to make the ratio of the number of light emitting elements 200 satisfying this condition (the condition of the light emitting wavelength) to the total number of elements obtained from the wafer 150 (the in-plane uniformity of the light emitting wavelength) preferably 60% or more, more preferably 70% or more, further preferably 80% or more, in the wafer 150 of the above-described embodiment, the thickness of the GaN layer 30 is preferably (0.8 μm or more and) 7 μm or less, more preferably 5 μm or less, further preferably 3 μm or less.

[0187] The reference light emission wavelength can be appropriately selected depending on the constitution of the light emitting layer 41. The reference light emission wavelength can be selected from, for example, the near-ultraviolet range of 380 nm or more and 400 nm or less, or the blue range of 440 nm or more and 460 nm or less, or the green range of 520 nm or more and 530 nm or less, or, if these are summarized, the range of 380 nm or more and 530 nm or less.

[0188] The drive voltage for generating the reference drive current (design value of the drive current) varies depending on the element size, the wavelength, and the constitution of each layer, but is preferably included in a voltage range of ±0.1 V with respect to the reference drive voltage (design value of the drive voltage) defined according to the design. In order for the ratio of the number of light emitting elements 200 satisfying this condition (condition of the drive voltage) to the total number of elements obtained from the wafer 150 (in-plane uniformity of the drive voltage) to be, for example, 60% or more, more preferably 70% or more, and further preferably 80% or more, in the wafer 150 based on the above-described embodiment, the thickness of the GaN layer 30 is preferably 3 μm or less, more preferably 2 μm or less, and further preferably 1.5 μm or less.

[0189] The reference drive current and the reference drive voltage can be appropriately selected depending on the constitution of the light emitting element 200, respectively. The reference drive current is preferably selected from the range of 15 mA or more and 25 mA or less, and is typically 20 mA, and the reference drive voltage is preferably selected from the range of 3 V or more and 3.5 V or less, and is typically 3.3 V.

[0190] As a related characteristic of the reverse withstand voltage, for example, the leakage current when a reverse voltage of 20 V is applied between the GaN layer as the n-type layer and the p-type layer is preferably 1 μA or less. In order for the ratio of the number of light emitting elements 200 satisfying this condition (condition of the reverse leakage current) to the total number of elements obtained from the wafer 150 (in-plane uniformity of the reverse leakage current suppression effect) to be 60% or more, more preferably 70% or more, and further preferably 80% or more, in the wafer 150 based on the above-described embodiment, the thickness of the GaN layer 30 is preferably 5 μm or less, and more preferably 3 μm or less.

[0191] The ratio of the number of light emitting elements 200 in which all of the conditions of the light emitting power output, the light emitting wavelength, the driving voltage, and the reverse leakage current are satisfied to the total number of elements obtained from the wafer 150 is preferably 10% or more, more preferably 30% or more, further preferably 40% or more, further preferably 50% or more, further preferably 70% or more, further preferably 90% or more. In the wafer 150 based on the above-described embodiment, the thickness of the GaN layer 30 is preferably 7 μm or less, more preferably 5 μm or less, further preferably 3 μm or less, further preferably 2 μm or less, further preferably 1.5 μm or less, further preferably 1.2 μm or less.

[0192] <Preferred Embodiment of the Invention>

[0193] Hereinafter, a preferred embodiment of the present invention will be described.

[0194] (Note 1)

[0195] A Group III nitride laminated substrate has:

[0196] a sapphire substrate (2 inches or more in diameter);

[0197] a first layer formed on the sapphire substrate and composed of aluminum nitride;

[0198] a second layer that is an n-type layer formed on the first layer and composed of gallium nitride to which an n-type impurity is added;

[0199] a third layer that is a light emitting layer formed on the second layer and composed of a Group III nitride; and

[0200] a fourth layer that is a p-type layer formed on the third layer and composed of a Group III nitride to which a p-type impurity is added,

[0201] the second layer has a thickness of 7 μm or less, a half-value width of (0002) diffraction based on an X-ray rocking curve is 100 seconds or less, and a half-value width of (10-12) diffraction based on an X-ray rocking curve is 200 seconds or less.

[0202] The sapphire substrate is preferably, for example, 2 inches in diameter and 300 μm or more and 500 μm or less in thickness, or, for example, 4 inches in diameter and 600 μm or more and 1000 μm or less in thickness, or, for example, 6 inches in diameter and 1000 μm or more and 1500 μm or less in thickness.

[0203] (Note 2)

[0204] The Group III nitride laminated substrate according to the above Note 1, wherein the thickness of the second layer is 0.8 μm or more.

[0205] (Note 3)

[0206] The Group III nitride laminated substrate according to the above Note 1 or 2, wherein the thickness of the first layer is 1 μm or less.

[0207] (Note 4)

[0208] The Group III nitride laminated substrate according to any one of the above Notes 1 to 3, wherein the thickness of a layer in which the third layer and the fourth layer are laminated is 1 μm or less.

[0209] (Note 5)

[0210] The Group III nitride laminated substrate according to any one of the above Notes 1 to 4, wherein the in-plane variation of the thickness of the second layer is 3.5% or less (more preferably 3% or less).

[0211] (Note 6)

[0212] The Group III nitride laminated substrate according to any one of the above Notes 1 to 5, wherein the in-plane variation of the n-type carrier concentration (n-type impurity concentration) in the second layer is 3.5% or less (more preferably 3% or less).

[0213] (Note 7)

[0214] The Group III nitride laminated substrate according to any one of the above Notes 1 to 6, wherein the warpage of the Group III nitride laminated substrate is 110 μm or less (more preferably 105 μm or less).

[0215] (Note 8)

[0216] The Group III nitride laminated substrate according to any one of the above Notes 1 to 7, wherein the thickness of the second layer is 5 μm or less.

[0217] (Note 9)

[0218] The Group III nitride laminated substrate according to the above Note 8, wherein the in-plane variation of the thickness of the second layer is 3% or less (more preferably 2.5% or less).

[0219] (Note 10)

[0220] The Group III nitride laminated substrate according to the above Note 8 or 9, wherein the in-plane variation of the n-type carrier concentration (n-type impurity concentration) in the second layer is 3% or less (more preferably 2.5% or less).

[0221] (Note 11)

[0222] The Group III nitride laminated substrate according to any one of Embodiments 8 to 10, wherein the warpage of the Group III nitride laminated substrate is 80 μm or less (more preferably 75 μm or less).

[0223] (Embodiment 12)

[0224] The Group III nitride laminated substrate according to any one of Embodiments 1 to 11, wherein the thickness of the second layer is 3 μm or less.

[0225] (Embodiment 13)

[0226] The Group III nitride laminated substrate according to Embodiment 12, wherein the in-plane variation in the thickness of the second layer is 2.5% or less (more preferably 2% or less).

[0227] (Embodiment 14)

[0228] The Group III nitride laminated substrate according to Embodiment 12 or 13, wherein the in-plane variation in the n-type carrier concentration (n-type impurity concentration) in the second layer is 2.5% or less (more preferably 2% or less).

[0229] (Embodiment 15)

[0230] The Group III nitride laminated substrate according to any one of Embodiments 12 to 14, wherein the warpage of the Group III nitride laminated substrate is 50 μm or less (more preferably 45 μm or less).

[0231] (Embodiment 16)

[0232] The Group III nitride laminated substrate according to any one of Embodiments 1 to 15, wherein the thickness of the second layer is 2 μm or less.

[0233] (Embodiment 17)

[0234] The Group III nitride laminated substrate according to Embodiment 16, wherein the in-plane variation in the thickness of the second layer is 2% or less (more preferably 1.5% or less).

[0235] (Embodiment 18)

[0236] The Group III nitride laminated substrate according to Embodiment 16 or 17, wherein the in-plane variation in the n-type carrier concentration (n-type impurity concentration) in the second layer is 2% or less (more preferably 1.5% or less).

[0237] (Embodiment 19)

[0238] The Group III nitride laminated substrate according to any one of the Embodiments 16 to 18, wherein the warpage of the Group III nitride laminated substrate is 40 μm or less (more preferably 35 μm or less).

[0239] (Embodiment 20)

[0240] The Group III nitride laminated substrate according to any one of the Embodiments 1 to 19, wherein the thickness of the second layer is 1.5 μm or less.

[0241] (Embodiment 21)

[0242] The Group III nitride laminated substrate according to Embodiment 20, wherein the in-plane variation in the thickness of the second layer is 1.5% or less (more preferably 1% or less).

[0243] (Embodiment 22)

[0244] The Group III nitride laminated substrate according to Embodiment 20 or 21, wherein the in-plane variation in the n-type carrier concentration (n-type impurity concentration) in the second layer is 1.5% or less (more preferably 1% or less).

[0245] (Embodiment 23)

[0246] The Group III nitride laminated substrate according to any one of the Embodiments 20 to 22, wherein the warpage of the Group III nitride laminated substrate is 35 μm or less (more preferably 30 μm or less).

[0247] (Embodiment 24)

[0248] The Group III nitride laminated substrate according to any one of the Embodiments 1 to 23, wherein the thickness of the second layer is 1.2 μm or less.

[0249] (Embodiment 25)

[0250] The Group III nitride laminated substrate according to Embodiment 24, wherein the in-plane variation in the thickness of the second layer is 1% or less (more preferably 0.8% or less).

[0251] (Embodiment 26)

[0252] The Group III nitride laminated substrate according to Embodiment 24 or 25, wherein the in-plane variation in the n-type carrier concentration (n-type impurity concentration) in the second layer is 1% or less (more preferably 0.8% or less).

[0253] (Embodiment 27)

[0254] The Group III nitride layered substrate according to any one of the provisos 24 to 36, wherein the warpage of the aforementioned Group III nitride layered substrate is 30 μm or less (more preferably 25 μm or less).

[0255] (Proviso 28)

[0256] The Group III nitride layered substrate according to any one of the provisos 1 to 27, wherein the thickness of the aforementioned second layer is 0.8 μm or more,

[0257] The ratio of the number of the aforementioned semiconductor light emitting elements capable of obtaining a light emitting power output of 10 mW or more to the total number of the semiconductor light emitting elements obtained from the aforementioned Group III nitride layered substrate is 90% or more (more preferably 95% or more).

[0258] (Proviso 29)

[0259] The Group III nitride layered substrate according to any one of the provisos 1 to 28, wherein the thickness of the aforementioned second layer is 7 μm or less (more preferably 5 μm or less, further preferably 3 μm or less) (and 0.8 μm or more),

[0260] The ratio of the number of the aforementioned semiconductor light emitting elements having a light emitting peak wavelength within a wavelength range of ±5 nm with respect to a reference light emitting wavelength to the total number of the semiconductor light emitting elements obtained from the aforementioned Group III nitride layered substrate is 60% or more (more preferably 70% or more, further preferably 80% or more).

[0261] The aforementioned reference light emitting wavelength is preferably selected from the range of 380 nm or more and 530 nm or less, typically, for example, from the near-ultraviolet range of 380 nm or more and 400 nm or less, or, for example, from the blue range of 440 nm or more and 460 nm or less, or, for example, from the green range of 520 nm or more and 530 nm or less.

[0262] (Proviso 30)

[0263] The Group III nitride layered substrate according to any one of the provisos 1 to 29, wherein the thickness of the aforementioned second layer is 3 μm or less (more preferably 2 μm or less, further preferably 1.5 μm or less) (and 0.8 μm or more),

[0264] The ratio of the number of the aforementioned semiconductor light emitting elements having a driving voltage for generating a reference driving current within a voltage range of ±0.1 V with respect to a reference driving voltage to the total number of the semiconductor light emitting elements obtained from the aforementioned Group III nitride layered substrate is 60% or more (more preferably 70% or more, further preferably 80% or more).

[0265] The aforementioned reference drive current is preferably selected from the range of 15 mA or more and 25 mA or less, and is typically 20 mA. The aforementioned reference drive voltage is preferably selected from the range of 3 V or more and 3.5 V or less, and is typically 3.3 V.

[0266] (POSTSCRIPT 31)

[0267] The Group III nitride laminated substrate according to any one of POSTSCRIPTS 1 to 30, wherein the thickness of the second layer is 5 μm or less (more preferably 3 μm or less) (and 0.8 μm or more),

[0268] The ratio of the number of the aforementioned semiconductor light emitting elements, among the total number of semiconductor light emitting elements obtained from the aforementioned Group III nitride laminated substrate, in which the leakage current when a reverse voltage of 20 V is applied between the second layer and the fourth layer is 1 μA or less, is 60% or more (more preferably 70% or more, further preferably 80% or more).

[0269] (POSTSCRIPT 32)

[0270] The Group III nitride laminated substrate according to any one of POSTSCRIPTS 1 to 31, wherein the thickness of the second layer is 7 μm or less (more preferably 5 μm or less, further preferably 3 μm or less, further preferably 2 μm or less, further preferably 1.5 μm or less, further preferably 1.2 μm or less) (and 0.8 μm or more),

[0271] The ratio of the number of the aforementioned semiconductor light emitting elements, among the total number of semiconductor light emitting elements obtained from the aforementioned Group III nitride laminated substrate, in which the luminescent power output is 10 mW or more, and

[0272] The luminescent peak wavelength is included in a wavelength range of ±5 nm with respect to the reference luminescent wavelength, and

[0273] The drive voltage for generating the reference drive current is included in a voltage range of ±0.1 V with respect to the reference drive voltage, and

[0274] The ratio of the number of the aforementioned semiconductor light emitting elements, among the total number of semiconductor light emitting elements obtained from the aforementioned Group III nitride laminated substrate, in which the leakage current when a reverse voltage of 20 V is applied between the second layer and the fourth layer is 1 μA or less, is 10% or more (more preferably 30% or more, further preferably 40% or more, further preferably 50% or more, further preferably 70% or more, further preferably 90% or more).

[0275] (POSTSCRIPT 33)

[0276] The Group III nitride layered substrate according to any one of the provisos 1 to 32, wherein each of the semiconductor light emitting elements has a size of 10 μm square or more and 3000 μm square (3 mm square) or less (preferably 100 μm square or less) in plan view, or each of the semiconductor light emitting elements has an area of 100 μm 2 2 or more and 9000000 μm 2 (9 mm 2 square or less (preferably 10000 μm 2 square or less) in plan view.

[0277] (Proviso 34)

[0278] A semiconductor light emitting element having the aforementioned second layer of the Group III nitride layered substrate according to any one of the provisos 1 to 33 as an n-type layer.

[0279] (Proviso 35)

[0280] A Group III nitride layered substrate having:

[0281] a sapphire substrate (2 inches or more in diameter); and

[0282] a first layer formed on the aforementioned sapphire substrate and composed of aluminum nitride,

[0283] the aforementioned first layer has a surface used as a base for growing a second layer composed of gallium nitride, a thickness of 7 μm or less, a half-value width of (0002) diffraction of 100 seconds or less based on X-ray rocking curve measurement, and a half-value width of (10-12) diffraction of 200 seconds or less based on X-ray rocking curve measurement. Preferably, the aforementioned first layer has a surface used as a base for growing the second layer according to any one of the provisos 2 to 26.

Claims

1. A group III nitride multilayer substrate, comprising: Sapphire substrate; The first layer is formed on the sapphire substrate and consists only of aluminum nitride, with the upper surface of the first layer being Al polar; The second layer is an n-type layer formed on the upper surface of the first layer and composed of gallium nitride with added n-type impurities. The third layer is a light-emitting layer formed on the second layer and composed of group III nitrides; and The fourth layer is a p-type layer formed on the third layer and composed of group III nitrides with added p-type impurities. The thickness of the first layer is 0.1 μm or more and 1 μm or less, the half-width of (0002) diffraction measured based on X-ray rocking curves is less than 100 seconds, and the half-width of (10-12) diffraction measured based on X-ray rocking curves is less than 300 seconds. The thickness of the second layer is less than 7 μm, the half-width of (0002) diffraction measured based on X-ray rocking curve is less than 100 seconds, and the half-width of (10-12) diffraction measured based on X-ray rocking curve is less than 200 seconds.

2. The group III nitride multilayer substrate according to claim 1, wherein, The in-plane deviation of the thickness of the second layer is less than 3.5%.

3. The group III nitride multilayer substrate according to claim 1 or 2, wherein, The in-plane deviation of the n-type carrier concentration in the second layer is less than 3.5%.

4. The group III nitride multilayer substrate according to claim 1 or 2, wherein, The warpage of the group III nitride multilayer substrate is less than 110 μm.

5. The group III nitride multilayer substrate according to claim 1 or 2, wherein, The thickness of the second layer is less than 3 μm.

6. The group III nitride multilayer substrate according to claim 5, wherein, The in-plane deviation of the thickness of the second layer is less than 2.5%.

7. The group III nitride multilayer substrate according to claim 5, wherein, The in-plane deviation of the n-type carrier concentration in the second layer is less than 2.5%.

8. The group III nitride multilayer substrate according to claim 5, wherein, The warpage of the group III nitride multilayer substrate is less than 50 μm.

9. The group III nitride multilayer substrate according to claim 1 or 2, wherein, The thickness of the second layer is 0.8 μm or more. Of the total number of semiconductor light-emitting elements obtained from the group III nitride multilayer substrate, the proportion of semiconductor light-emitting elements that can achieve a light output power of 10mW or more is 90% or more.

10. The group III nitride multilayer substrate according to claim 1 or 2, wherein, The thickness of the second layer is less than 7 μm. Of the total number of semiconductor light-emitting elements obtained from the group III nitride multilayer substrate, the proportion of the number of semiconductor light-emitting elements that contain the emission peak wavelength in a wavelength range of ±5 nm relative to the reference emission wavelength is 60% or more.

11. The group III nitride multilayer substrate according to claim 1 or 2, wherein, The thickness of the second layer is less than 3 μm. Of the total number of semiconductor light-emitting elements obtained from the group III nitride multilayer substrate, the proportion of the number of semiconductor light-emitting elements that include a driving voltage for generating a reference driving current within a voltage range of ±0.1V relative to a reference driving voltage is 60% or more.

12. The group III nitride multilayer substrate according to claim 1 or 2, wherein, The thickness of the second layer is less than 5 μm. Of the total number of semiconductor light-emitting elements obtained from the group III nitride multilayer substrate, the percentage of semiconductor light-emitting elements whose leakage current is less than 1 μA when a reverse voltage of 20 V is applied between the second layer and the fourth layer is 60% or more.

13. The group III nitride multilayer substrate according to claim 1 or 2, wherein, The thickness of the second layer is less than 7 μm. Of the total number of semiconductor light-emitting elements obtained from the group III nitride multilayer substrate, It can achieve a luminous power output of over 10mW, and The wavelength range includes the emission peak wavelength within ±5 nm of the reference emission wavelength, and The voltage range relative to the reference drive voltage includes a drive voltage for generating the reference drive current, and The ratio of the number of semiconductor light-emitting elements whose leakage current is less than 1 μA when a reverse voltage of 20 V is applied between the second layer and the fourth layer is 10% or more.

14. A semiconductor light-emitting element comprising the second layer of the group III nitride multilayer substrate as described in any one of claims 1 to 13 as an n-type layer.

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