A USB OTG power supply switching system
By designing a USB OTG power supply switching system, using USB ID pin recognition and main control IO control, the power supply switching of the USB OTG port is achieved, solving the problem that the existing technology cannot supply power to electronic devices and external devices at the same time, and the USB Host function and charging function are realized simultaneously.
Patent Information
- Application Number
- CN202110383083.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-04-09
- Publication Date
- 2025-02-28
- Estimated Expiration
- 2041-04-09
AI Technical Summary
The existing USB OTG ports cannot power the electronic device itself and power the external device at the same time, resulting in the inability to meet the needs of both charging the device and powering the external USB device.
A USB OTG power supply switching system is designed, which is recognized by the USB ID pin and the input and output IO is controlled by the main control to select VBUS power supply, thereby charging the device or powering the external USB device. The system includes a USB socket J1 and a power switch U1, which is connected to external devices through a USB power cord or OTG adapter cable in different power supply modes.
It realizes the USB Host function and charging function simultaneously through one USB port, which is easy to operate, can power the electronic device itself and power the external device, meeting various application needs.
Smart Images

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Abstract
Description
Technical Field
[0001] The invention relates to the technical field of USB bus, and in particular to a USB OTG power supply switching system. Background Art
[0002] Universal Serial Bus (USB) is an emerging data communication method that gradually replaces other interface standards. As a high-speed serial bus, the USB bus has an extremely high transmission speed that can meet the application environment requirements of high-speed data transmission. In addition, the bus also has the advantages of simple power supply (bus power supply), convenient installation and configuration (supporting plug-and-play and hot-swap), simple expansion port (up to 127 peripherals can be expanded through a hub), diversified transmission methods (4 transmission modes), and good compatibility (downward compatibility after product upgrade). With the enhancement of the computing power of mobile devices and the needs of practical applications, the USB Implementers Association (USB IF) has developed the USB OTG (On-The-Go) specification. However, the USB OTG port of existing electronic devices (such as POS devices) cannot realize both powering the electronic device itself and powering external devices through the USB OTG port. Therefore, it is urgent to provide a USB OTG power switching system that can power the electronic device itself and power external devices through the USB OTG port. Summary of the invention
[0003] The present invention provides a USB OTG power supply switching system, thereby solving the above-mentioned problems in the prior art.
[0004] The present invention provides a USB OTG power supply switching system, comprising an electronic device, wherein the electronic device is provided with a USB socket J1 and a power switch U1; when an external power supply device supplies power to the electronic device, the USB socket J1 is connected to the external power supply device through a USB power line; when the electronic device supplies power to an external device, the USB socket J1 is connected to the external device through an OTG adapter line.
[0005] Furthermore, the USB socket includes a VBUS pin, a DN pin, a DP pin, an ID pin and a GND pin, the VBUS pin is connected to the peripheral signal terminal VCC_HOST, the DN pin is connected to the POS device signal USB DN, the ID pin is connected to the signal ID, and the GND pin is grounded.
[0006] Further, the peripheral signal terminal VCC_HOST is respectively connected to the voltage regulator D1, the resistor R4, the transistor Q2, the resistor R6, the capacitor C1 and the MOS transistor Q3, one end of the voltage regulator D1, one end of the resistor R4, the E pole of the transistor Q2, one end of the resistor R6, one end of the capacitor C1, and the S pole of the MOS transistor Q3 are respectively connected to the peripheral signal terminal VCC_HOST; the other end of the voltage regulator D1 is connected to one end of the resistor R1, and the other end of the resistor R1 is respectively connected to the resistor R2, the resistor R3 and the transistor Q1, the other end of the resistor R1 is connected to one end of the resistor R2, and the other end of the resistor R2 is connected to the power supply signal HOST_CT, one end of the resistor R3 is connected to the other end of the resistor R1, and the S pole of the resistor R3 is connected to the power supply signal HOST_CT. The other end is grounded, the B pole of the transistor Q1 is connected to the other end of the resistor R1, the E pole of the transistor Q1 is grounded, the C pole of the transistor Q1 is respectively connected to one end of the resistor R4 and one end of the resistor R5, the other end of the resistor R4 is connected to the external signal terminal VCC_HOST, the other end of the resistor R5 is connected to the B pole of the transistor Q2, the C pole of the transistor Q2, the other end of the resistor R6, the other end of the capacitor C1 and the G pole of the MOS tube Q3 are respectively connected to one end of the resistor R7, and the other end of the resistor R7 is grounded; the E pole of the MOS tube Q3 is respectively connected to the system internal voltage terminal VCC and the capacitor C2, one end of the capacitor C2 is respectively connected to the system internal voltage terminal VCC and the E pole of the MOS tube Q3, and the other end of the capacitor C2 is grounded.
[0007] Furthermore, the power switch U1 includes a signal input pin VIN, a signal output pin VOUT, an enable terminal EN, an external current limiting control pin ILIM and a ground pin GND. The signal input pin VIN is connected to one end of a capacitor C3 and a system internal voltage terminal VCC, one end of the capacitor C3 is connected to the system internal voltage terminal VCC, and the other end of the capacitor C3 is grounded; the enable terminal EN is connected to the system enable USB_HOST_EN, the ground pin GND is grounded, one end of the signal output pin VOUT is respectively connected to a diode D2, a power signal HOST_CT and a capacitor C4, the power signal HOST_CT is respectively connected to one end of a diode D2 and one end of a capacitor C4, one end of the capacitor C4 is connected to one end of a diode D2, the other end of the diode D2 is connected to the external signal terminal VCC_HOST, the other end of the capacitor C4 is grounded, and the external current limiting control pin ILIM is connected to one end of a resistor R8, and the other end of the resistor R8 is grounded.
[0008] Furthermore, when the external power supply device supplies power to the electronic device, the USB socket J1 is connected to the external power supply device through the USB power line, the external power supply device provides a preset voltage signal to the electronic device, and the preset voltage signal is input into the POS device as the peripheral signal terminal VCC_HOST, the system enables USB_HOST_EN to be low level, the power switch U1 is not turned on, the power signal HOST_CT is low level, the voltage regulator D1, the resistor R1, the resistor R2, the resistor R3, the transistor Q1, the resistor R4, the resistor R5, the transistor Q2, the resistor R6, the capacitor C1, the resistor R7 and the MOS tube Q3 form a loop, so that the G pole of the MOS tube Q3 is at a low level, the MOS tube Q3 is turned on, and the peripheral signal terminal VCC_HOST supplies power to the system internal voltage terminal VCC.
[0009] Furthermore, when the electronic device supplies power to the external device, the USB socket J1 is connected to the external device through the OTG adapter cable. According to the USB OTG specification, the ID pin of the USB socket J1 is grounded and pulled down to a low level by the external device, the signal ID is low, the system enables USB_HOST_EN to be high, the enable terminal EN of the power switch U1 is high, the power switch U1 is turned on, the system internal voltage terminal VCC is connected to the power signal HOST_CT, the power signal HOST_CT is connected to the peripheral signal terminal VCC_HOST through the diode D2, the power signal HOST_CT is high, the B pole of the transistor Q1 is high, the transistor Q1 is turned on, the B pole of the transistor Q2 is pulled down to a low level, the transistor Q2 is turned on, the voltage of the G pole of the transistor Q2 is consistent with the S pole of the transistor Q2, the transistor Q2 is not turned on, the system internal voltage terminal VCC is connected to the peripheral signal terminal VCC_HOST, and the electronic device supplies power to the external device.
[0010] Furthermore, the electronic device includes a mobile terminal, and the mobile terminal includes a POS device.
[0011] The beneficial effects of the present invention are as follows: the USB OTG power supply switching system designed by the present invention selects VBUS power supply through USB ID pin identification, main control input and output IO, so as to charge the device or supply power to the external USB device. The present invention enables the USB socket J1 to act as a host function to connect an external USB device; it can also be used as a power supply to supply power to the electronic device. The present invention is easy to operate and uses one USB port to realize the USB host function and the charging function at the same time. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.
[0013] Figure 1 This is a pin diagram of the USB socket J1 provided in the first embodiment.
[0014] Figure 2 This is a schematic diagram of the circuit connection between the peripheral signal terminal VCC_HOST and the system internal voltage terminal VCC provided in the first embodiment.
[0015] Figure 3 This is a pin diagram of the power switch U1 provided in the first embodiment. DETAILED DESCRIPTION
[0016] In order to make the purpose, technical solution and advantages of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. It should be noted that the terms "including" and "having" and any variations thereof in the specification and claims of the present invention and the above-mentioned drawings are intended to cover non-exclusive inclusions, so that the processes, methods, systems, products or devices of a series of units are not necessarily limited to those units, but may include other units that are not clearly listed or inherent to these processes, methods, products or devices.
[0017] Embodiment 1, a USB OTG power switching system includes an electronic device, wherein the electronic device is provided with a USB socket J1 and a power switch U1; when an external power device supplies power to the electronic device, the USB socket J1 is connected to the external power device via a USB power line; when the electronic device supplies power to an external device, the USB socket J1 is connected to the external device via an OTG adapter line. In this embodiment, the electronic device is a POS device.
[0018] like Figure 1 As shown, the USB socket J1 includes a VBUS pin, a DN pin, a DP pin, an ID pin and a GND pin. The VBUS pin is connected to the peripheral signal terminal VCC_HOST, the DN pin is connected to the POS device signal USB DN, the ID pin is connected to the signal ID, and the GND pin is grounded.
[0019] like Figure 2As shown, the peripheral signal terminal VCC_HOST is respectively connected to the voltage regulator D1, the resistor R4, the transistor Q2, the resistor R6, the capacitor C1 and the MOS transistor Q3, one end of the voltage regulator D1, one end of the resistor R4, the E pole of the transistor Q2, one end of the resistor R6, one end of the capacitor C1, and the S pole of the MOS transistor Q3 are respectively connected to the peripheral signal terminal VCC_HOST; the other end of the voltage regulator D1 is connected to one end of the resistor R1, the other end of the resistor R1 is respectively connected to the resistor R2, the resistor R3 and the transistor Q1, the other end of the resistor R1 is connected to one end of the resistor R2, and the other end of the resistor R2 is connected to the power signal HOST_CT, HOST_CT is a power signal, and is the power supply obtained after the system internal voltage terminal VCC is controlled by the power switch U1. One end of the resistor R3 is connected to the other end of the resistor R1, and the other end of the resistor R3 is grounded. The B pole of the transistor Q1 is connected to the other end of the resistor R1, and the E pole of the transistor Q1 is grounded. The C pole of the transistor Q1 is respectively connected to one end of the resistor R4 and one end of the resistor R5, and the other end of the resistor R4 is connected to the peripheral signal terminal VCC_HOST. The other end of the resistor R5 is connected to the B pole of the transistor Q2. The C pole of the transistor Q2, the other end of the resistor R6, the other end of the capacitor C1, and the G pole of the MOS tube Q3 are respectively connected to one end of the resistor R7, and the other end of the resistor R7 is grounded. The E pole of the MOS tube Q3 is respectively connected to the system internal voltage terminal VCC and the capacitor C2, one end of the capacitor C2 is respectively connected to the system internal voltage terminal VCC and the E pole of the MOS tube Q3, and the other end of the capacitor C2 is grounded.
[0020] like Figure 3 As shown, the power switch U1 includes a signal input pin VIN, a signal output pin VOUT, an enable terminal EN, an external current limiting control pin ILIM and a ground pin GND. The signal input pin VIN is connected to one end of a capacitor C3 and a system internal voltage terminal VCC, one end of the capacitor C3 is connected to the system internal voltage terminal VCC, and the other end of the capacitor C3 is grounded; the enable terminal EN is connected to the system enable USB_HOST_EN, and the ground pin GND is grounded; one end of the signal output pin VOUT is respectively connected to a diode D2, a power signal HOST_CT and a capacitor C4, the power signal HOST_CT is respectively connected to one end of a diode D2 and one end of a capacitor C4, one end of the capacitor C4 is connected to one end of a diode D2, the other end of the diode D2 is connected to the external signal terminal VCC_HOST, the other end of the capacitor C4 is grounded, and the external current limiting control pin ILIM is connected to one end of a resistor R8, and the other end of the resistor R8 is grounded.
[0021] When the external power supply device supplies power to the electronic device, the USB socket J1 is connected to the external power supply device through the USB power line, and the external power supply device provides a preset voltage signal to the electronic device, and inputs the preset voltage signal as the peripheral signal terminal VCC_HOST into the POS device, the system enables USB_HOST_EN to be low level, the power switch U1 is not turned on, the power signal HOST_CT is low level, the voltage regulator D1, the resistor R1, the resistor R2, the resistor R3, the transistor Q1, the resistor R4, the resistor R5, the transistor Q2, the resistor R6, the capacitor C1, the resistor R7 and the MOS tube Q3 form a loop, so that the G pole of the MOS tube Q3 is low level, the MOS tube Q3 is turned on, the peripheral signal terminal VCC_HOST supplies power to the system internal voltage terminal VCC, and the external power supply device supplies power to the electronic device. When the USB socket J1 is connected to the external USB power line, it provides 5V / 2A to power the electronic device.
[0022] When the electronic device supplies power to the external device, the USB socket J1 is connected to the external device through the OTG adapter cable. According to the USB OTG specification, the ID pin of the USB socket J1 is grounded and pulled down to a low level by the external device, the signal ID is low, the system enables USB_HOST_EN to be high, the enable terminal EN of the power switch U1 is high, the power switch U1 is turned on, the system internal voltage terminal VCC is connected to the power signal HOST_CT, the power signal HOST_CT is connected to the peripheral signal terminal VCC_HOST through the diode D2, the power signal HOST_CT is high, the B pole of the transistor Q1 is high, the transistor Q1 is turned on, the B pole of the transistor Q2 is pulled down to a low level, the transistor Q2 is turned on, the voltage of the G pole of the transistor Q2 is consistent with the voltage of the S pole of the transistor Q2, the transistor Q2 is not turned on, the system internal voltage terminal VCC is connected to the peripheral signal terminal VCC_HOST, and the electronic device supplies power to the external device. When the USB socket J1 is connected to an external device through an OTG adapter cable, the POS device needs to supply power to the external device.
[0023] By adopting the above technical solution disclosed in the present invention, the following beneficial effects are obtained:
[0024] The USB OTG power supply switching system designed by the present invention recognizes the USB ID pin, controls the input and output IO, and selects the VBUS power supply, thereby charging the device or supplying power to the external USB device. The present invention enables the USB socket J1 to act as a host function to connect an external USB device; it can also be used as a power supply to supply power to the electronic device. The present invention is easy to operate and uses one USB port to realize the USB host function and the charging function at the same time.
[0025] The above are only preferred embodiments of the present invention. It should be pointed out that, for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A USB OTG power switching system, characterized in that: The electronic device comprises an electronic device, wherein the electronic device is provided with a USB socket J1 and a power switch U1; When the external power supply device supplies power to the electronic device, the USB socket J1 is connected to the external power supply device through the USB power line; when the electronic device supplies power to the external device, the USB socket J1 is connected to the external device through the OTG adapter cable; The USB socket includes a VBUS pin, a DN pin, a DP pin, an ID pin and a GND pin, wherein the VBUS pin is connected to the peripheral signal terminal VCC_HOST, the DN pin is connected to the POS device signal USB DN, the ID pin is connected to the signal ID, and the GND pin is grounded; The peripheral signal terminal VCC_HOST is respectively connected to a voltage regulator tube D1, a resistor R4, a transistor Q2, a resistor R6, a capacitor C1 and a MOS tube Q3. The negative electrode of the voltage regulator tube D1, one end of the resistor R4, the E electrode of the transistor Q2, one end of the resistor R6, one end of the capacitor C1 and the S electrode of the MOS tube Q3 are respectively connected to the peripheral signal terminal VCC_HOST; the positive electrode of the voltage regulator tube D1 is connected to one end of the resistor R1, and the other end of the resistor R1 is respectively connected to the resistor R2, the resistor R3 and the transistor Q1. The other end of the resistor R1 is connected to one end of the resistor R2, and the other end of the resistor R2 is connected to the power supply signal HOST_CT. One end of the resistor R3 is connected to the other end of the resistor R1. The other end of the resistor R3 is grounded, the B pole of the transistor Q1 is connected to the other end of the resistor R1, the E pole of the transistor Q1 is grounded, the C pole of the transistor Q1 is respectively connected to the other end of the resistor R4 and one end of the resistor R5, the other end of the resistor R5 is connected to the B pole of the transistor Q2, the C pole of the transistor Q2, the other end of the resistor R6, the other end of the capacitor C1 and the G pole of the MOS transistor Q3 are respectively connected to one end of the resistor R7, and the other end of the resistor R7 is grounded; the D pole of the MOS transistor Q3 is respectively connected to the system internal voltage terminal VCC and the capacitor C2, one end of the capacitor C2 is respectively connected to the system internal voltage terminal VCC and the D pole of the MOS transistor Q3, and the other end of the capacitor C2 is grounded; The power switch U1 includes a signal input pin VIN, a signal output pin VOUT, an enable terminal EN, an external current limiting control pin ILIM and a ground pin GND, wherein the signal input pin VIN is connected to one end of a capacitor C3 and a system internal voltage terminal VCC, one end of the capacitor C3 is connected to the system internal voltage terminal VCC, and the other end of the capacitor C3 is grounded; the enable terminal EN is connected to the system enable USB_HOST_EN, the ground pin GND is grounded, one end of the signal output pin VOUT is respectively connected to a diode D2, a power signal HOST_CT and a capacitor C4, the power signal HOST_CT is respectively connected to the positive electrode of the diode D2 and one end of the capacitor C4, one end of the capacitor C4 is connected to the positive electrode of the diode D2, the negative electrode of the diode D2 is connected to the external signal terminal VCC_HOST, the other end of the capacitor C4 is grounded, the external current limiting control pin ILIM is connected to one end of a resistor R8, and the other end of the resistor R8 is grounded; The external power supply device provides a preset voltage signal to the electronic device, and inputs the preset voltage signal into the POS device as the peripheral signal terminal VCC_HOST. The system enables USB_HOST_EN to be low level, the power switch U1 is not turned on, the power signal HOST_CT is low level, and the voltage regulator D1, the resistor R1, the resistor R2, the resistor R3, the transistor Q1, the resistor R4, the resistor R5, the transistor Q2, the resistor R6, the capacitor C1, the resistor R7 and the MOS transistor Q3 form a loop, so that the G pole of the MOS transistor Q3 is low level, the MOS transistor Q3 is turned on, and the peripheral signal terminal VCC_HOST supplies power to the system internal voltage terminal VCC; According to the USB OTG specification, the ID pin of the USB socket J1 is grounded and pulled down to a low level by the external device, the signal ID is low, the system enable USB_HOST_EN is high, the enable terminal EN of the power switch U1 is high, the power switch U1 is turned on, the system internal voltage terminal VCC is connected to the power signal HOST_CT, the power signal HOST_CT is connected to the peripheral signal terminal VCC_HOST through the diode D2, the power signal HOST_CT is high, the B pole of the transistor Q1 is high, the transistor Q1 is turned on, the B pole of the transistor Q2 is pulled down to a low level, the transistor Q2 is turned on, the voltage of the G pole of the MOS tube Q3 is consistent with the S pole of the MOS tube Q3, the MOS tube Q3 is not turned on, the system internal voltage terminal VCC is connected to the peripheral signal terminal VCC_HOST through the 1-pin VOUT of the U1 chip through the diode D2, and the electronic device supplies power to the external device; The electronic device includes a mobile terminal, and the mobile terminal includes a POS device.
Citation Information
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