Solar cell stack passivation structure and preparation method
By adopting a stacked passivation structure composed of different dielectric layers in solar cells and using PECVD method to deposition, a low-cost and efficient passivation effect is achieved, the open circuit voltage and short circuit current are improved, and the problems of high production cost and poor safety of PERC batteries are solved.
Patent Information
- Application Number
- CN202110396614.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-01-19
- Filing Date
- 2021-04-14
- Publication Date
- 2025-07-08
- Estimated Expiration
- 2041-04-14
AI Technical Summary
The production cost of existing PERC batteries is high and has high risk, the production cost of traditional alumina and silicon nitride laminate passivation structures is high, and the special gas used during the deposition of alumina thin films affects production safety.
A stacked passivation structure consisting of the first dielectric layer, the second dielectric layer and the third dielectric layer are adopted. Each dielectric layer has different thicknesses and refractive indexes. It is deposited by the PECVD method to form a thin film rich in hydrogen ions and hydrogen atoms, achieving chemical passivation and light reflection effects, and reducing the surface recombination rate.
It achieves a low-cost and efficient passivation effect, improves open circuit voltage and short-circuit current, and the battery conversion efficiency reaches more than 22.89%, reducing production costs and dangers.
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Figure CN112993059B_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of solar energy, and relates to a stacked passivation structure of a solar cell and a preparation method thereof. Background Art
[0002] Solar energy is a renewable energy source that is inexhaustible for humanity. Among the effective uses of solar energy, solar photovoltaic utilization is the fastest-growing and most dynamic research field in recent years, and is one of the most prominent projects. Monocrystalline silicon solar cells have the highest conversion efficiency and the most mature technology. For traditional P-type all-aluminum back surface field solar cells, the recombination at the back metal and silicon contact area, that is, the all-aluminum back surface field formed by the full aluminum doping on the back surface, is the key factor restricting the further improvement of efficiency. At the same time, the long-wave reflectivity of the all-aluminum back surface field is relatively low, and the optical loss is relatively high. To solve this problem, major research institutions at home and abroad focus on the passivation treatment of the surface of high-efficiency batteries and the improvement of the structure. By introducing a back passivation film and a local aluminum back surface field technology, the recombination at the metal-silicon contact interface is reduced while the long-wave reflectivity of the back surface is improved, greatly increasing the open-circuit voltage and short-circuit current of the battery, and the photoelectric conversion efficiency of the solar cell is increased by more than 1%, that is, the P-type PERC battery. This process path is relatively simple and compatible with existing battery production lines. Therefore, it has been rapidly promoted and applied on a large scale, and the current market share of PERC batteries reaches more than 90%. To further improve the conversion efficiency of PERC batteries, the surface of the battery must be well passivated to reduce surface defect recombination and thus increase the open-circuit voltage of the battery.
[0003] CN111987191A discloses a method for repairing laser opening film damage of a PERC battery, including texturing the front and back surfaces of a P-type monocrystalline silicon wafer and performing phosphorus diffusion on the front and / or back surfaces to form a phosphorus-doped surface; using a laser to perform local doping on the front surface of the P-type monocrystalline silicon wafer to fabricate a selective emitter; through back etching, thermal oxidation, depositing a stack of aluminum oxide and silicon nitride or a stack of silicon nitride and silicon oxynitride on the back surface, and depositing a passivation and antireflection layer on the front surface, performing laser opening film and damage repair to achieve solid-phase epitaxial growth in the damaged area and make the crystalline silicon recrystallize and restore an orderly arrangement.
[0004] CN211929505U. This comparative document relates to a crystalline silicon solar cell wafer. The passivation layer is a stack of an aluminum oxide layer and a silicon nitride layer, and the thickness of the passivation layer is 110 nm - 140 nm, and the silicon nitride layer is disposed on the bottom surface of the aluminum oxide layer.
[0005] Currently, industrialized PERC batteries are based on the stacked passivation result of aluminum oxide and silicon nitride on the back surface. Special gases such as TMA are used in the deposition process of the aluminum oxide thin film, resulting in high production costs and being dangerous. On the basis of ensuring the passivation effect, the production costs and risks of the above solutions need to be further improved. Summary of the Invention
[0006] In view of the above deficiencies in the prior art, the purpose of the present invention is to provide a stacked passivation structure for a solar cell and a preparation method thereof. The stacked passivation structure for a solar cell has a good passivation effect and low production cost.
[0007] To achieve this purpose, the present invention adopts the following technical solutions:
[0008] In a first aspect, the present invention provides a stacked passivation structure for a solar cell, which includes: a P-type silicon substrate, and a first dielectric layer, a second dielectric layer, and a third dielectric layer sequentially arranged from inside to outside on the back surface of the P-type silicon substrate.
[0009] In the stacked passivation structure for a solar cell provided by the present invention, the function of the first dielectric layer is that this film can reduce the density of dangling bonds, can well control interface traps, and play a chemical passivation role; the function of the second dielectric layer is that during the deposition process of this film, there is a large amount of hydrogen in the film, which can form chemical passivation and bulk passivation on the surface of the silicon wafer. At the same time, after depositing the second dielectric layer at low power, it can avoid the bombardment of the first dielectric layer by high-power plasma when depositing the third dielectric layer; the function of the third dielectric layer is similar to that of the second dielectric layer, but the refractive index of the second dielectric layer is between that of the first dielectric layer and the third dielectric layer. Such a film layer design can better increase the light reflection on the back surface and improve the current; there are a large number of free hydrogen atoms and hydrogen ions in the second dielectric layer and the third dielectric layer, which can diffuse to the silicon-silicon oxide interface and combine with the silicon dangling bonds at the interface, reducing the surface interface state density to achieve the effect of reducing the surface recombination rate, passivating the battery surface. At the same time, hydrogen will also diffuse into the silicon wafer body to passivate the defects and impurities in the silicon wafer body.
[0010] In the stacked passivation structure for a solar cell provided by the present invention, the back surface stacked passivation structure contains abundant hydrogen ions or atoms, which will be implanted into the surface and inside of the silicon wafer during subsequent annealing or sintering processes to passivate the recombination centers. Therefore, the solar cell passivation structure provided by the present invention has a good passivation effect.
[0011] The following are preferred technical solutions of the present invention, but do not limit the technical solutions provided by the present invention. Through the following preferred technical solutions, the technical purpose and beneficial effects of the present invention can be better achieved and realized.
[0012] As a preferred technical solution of the present invention, the first dielectric layer includes a silicon-containing layer.
[0013] Preferably, the first dielectric layer is a silicon oxide layer.
[0014] Preferably, the thickness of the first dielectric layer is 1-10 nm, such as 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm or 10 nm, etc.
[0015] In the present invention, if the thickness of the first dielectric layer is too thin, the chemical passivation effect will be unstable; if the thickness of the first dielectric layer is too thick, it will hinder the diffusion of hydrogen ions or atoms to the silicon-silicon oxide interface, affecting the passivation effect.
[0016] As a preferred technical solution of the present invention, the second dielectric layer includes a silicon-containing layer.
[0017] Preferably, the second dielectric layer is any one or a combination of at least two of a silicon oxynitride layer, a silicon nitride layer or a silicon carbide layer.
[0018] Preferably, the thickness of the second dielectric layer is 1-150 nm, such as 1 nm, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 100 nm, 125 nm or 150 nm, etc.
[0019] In the present invention, if the thickness of the second dielectric layer is too thick, a high-energy laser is required to open it during backside laser grooving. The high energy of the laser reduces the bulk lifetime of the silicon wafer and the battery conversion efficiency. Whether the thickness of the second dielectric layer is too thick or too thin will also result in a weakened back reflection effect.
[0020] Preferably, the second dielectric layer is deposited by PECVD method and has a thickness of 1 nm-100 nm.
[0021] Preferably, the refractive index of the second dielectric layer is 1.5-2.4, such as 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3 or 2.4, etc.
[0022] Preferably, the second dielectric layer is a laminated film structure with different refractive indices.
[0023] Preferably, the second dielectric layer is a laminated film structure of silicon oxynitride with a refractive index in the range of 1.6-2.2 (such as refractive indices of 1.6, 1.7, 1.8, 1.9, 2.0, 2.1 or 2.2, etc.) and silicon oxynitride with a refractive index in the range of 1.7-2.4 (such as refractive indices of 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3 or 2.4, etc.).
[0024] Preferably, the second dielectric layer is a laminated film structure of silicon oxynitride with a refractive index in the range of 1.6 - 2.2 (such as 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, or 2.2, etc.) and silicon carbide with a refractive index in the range of 1.7 - 2.4 (such as 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, or 2.4, etc.).
[0025] Preferably, in the laminated film structure of the second dielectric layer, along the direction away from the P-type silicon substrate, the refractive indices of the respective films of the laminated film increase in sequence.
[0026] In the present invention, by adopting a laminated film with such an arrangement of refractive indices in the second dielectric layer, the short-circuit current can be increased. This is because the laminated film structure with high and low refractive indices arranged can enhance the reflection of the backlight and ensure the absorption and utilization of long-wavelength light.
[0027] Exemplarily, the laminated film structure of the second dielectric layer can be a three-layer film structure, which are the first film of the second dielectric layer, the second film of the second dielectric layer, and the third film of the second dielectric layer along the direction away from the P-type silicon substrate. The refractive index of the first film of the second dielectric layer is 1.5 - 2.2, the refractive index of the second film of the second dielectric layer is 1.6 - 2.3, and the refractive index of the third film of the second dielectric layer is 1.7 - 2.4.
[0028] As a preferred technical solution of the present invention, the third dielectric layer includes a silicon-containing layer.
[0029] Preferably, the third dielectric layer is any one or a combination of at least two of a silicon oxide layer, a silicon oxynitride layer, a silicon nitride layer, or a silicon carbide layer.
[0030] Preferably, the thickness of the third dielectric layer is 1 - 200 nm, such as 20 nm, 50 nm, 70 nm, 80 nm, 90 nm, 100 nm, 120 nm, 135 nm, 140 nm, 160 nm, 180 nm, or 200 nm, etc.
[0031] In the present invention, if the thickness of the third dielectric layer is too thin, the blocking effect of the film on the corrosion of the back aluminum paste or silver paste will be weakened, affecting the passivation effect of the laminated film. If the thickness of the third dielectric layer is too thick, a high-energy laser is required to open it during back laser grooving. The high energy of the laser causes the reduction of the silicon wafer bulk lifetime and the reduction of the battery conversion efficiency. Whether the film is too thick or too thin will also lead to the weakening of the back reflection effect.
[0032] Preferably, the refractive index of the third dielectric layer is 1.5 - 2.4, such as 1.5, 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, 2.2, 2.3, or 2.4, etc.
[0033] Preferably, the third dielectric layer is a laminated film structure with different refractive indices.
[0034] Preferably, the third dielectric layer is a laminated film structure of silicon nitride with a refractive index in the range of 1.6 - 2.2 (such as refractive indices of 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, or 2.2, etc.) and silicon nitride with a refractive index in the range of 1.9 - 2.4 (such as refractive indices of 1.9, 2.0, 2.1, 2.2, 2.3, or 2.4, etc.).
[0035] Preferably, the fourth dielectric layer is a laminated film structure of silicon oxynitride with a refractive index in the range of 1.6 - 2.2 (such as refractive indices of 1.6, 1.7, 1.8, 1.9, 2.0, 2.1, or 2.2, etc.) and silicon nitride with a refractive index in the range of 1.9 - 2.4 (such as refractive indices of 1.9, 2.0, 2.1, 2.2, 2.3, or 2.4, etc.).
[0036] Preferably, in the laminated film structure of the third dielectric layer, along the direction away from the P - type silicon substrate, the refractive indices of the respective films of the laminated film increase in sequence.
[0037] In the present invention, by adopting a laminated film with such an arrangement of refractive indices in the third dielectric layer, the short - circuit current can be improved. This is because the laminated film structure with high and low refractive indices arranged can enhance the reflection of backlight and ensure the absorption and utilization of long - wavelength light.
[0038] Exemplarily, the laminated film structure of the third dielectric layer can be a three - layer film structure, which are the first film of the third dielectric layer, the second film of the third dielectric layer, and the third film of the third dielectric layer along the direction away from the P - type silicon substrate. The refractive index of the first film of the third dielectric layer is 1.5 - 2.2, the refractive index of the second film of the third dielectric layer is 1.6 - 2.3, and the refractive index of the third film of the fourth dielectric layer is 1.7 - 2.4.
[0039] As another preferred technical solution of the solar cell stacked passivation structure of the present invention, the first dielectric layer is a silicon oxide layer with a thickness of 1 - 10 nm (such as 1 nm, 5 nm, 8 nm, or 10 nm, etc.), the second dielectric layer is a silicon oxynitride layer with a thickness of 1 - 80 nm (such as 1 nm, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, or 80 nm, etc.), and the third dielectric layer is a silicon nitride layer with a thickness of 1 - 100 nm (such as 1 nm, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, or 100 nm, etc.).
[0040] As another preferred technical solution of the stacked passivation structure of the solar cell of the present invention, the first dielectric layer is a silicon oxide layer with a thickness of 1-10 nm, the second dielectric layer is a silicon carbide layer with a thickness of 1-80 nm, and the third dielectric layer is a silicon nitride layer with a thickness of 1-100 nm.
[0041] As a preferred technical solution of the present invention, the stacked passivation structure of the solar cell further includes an N-type emitter sequentially arranged from inside to outside on the front surface of the P-type silicon substrate, that is, N ++ heavy diffusion region, N + light diffusion region, the fourth dielectric layer and the fifth dielectric layer.
[0042] In the present invention, the N + light diffusion region refers to a region with a relatively low phosphorus concentration formed by phosphorus doping, and the N ++ heavy diffusion region refers to a region with a relatively high phosphorus doping concentration formed by laser doping or high-temperature diffusion in order to obtain better metal contact resistance and lower metal region recombination current.
[0043] Preferably, the fourth dielectric layer (9) is a SiO2 layer.
[0044] Preferably, the thickness of the fourth dielectric layer (9) is 1-10 nm, such as 1 nm, 2 nm, 4 nm, 6 nm, 8 nm or 10 nm, etc.
[0045] Preferably, the fifth dielectric layer (6) is any one or a combination of at least two of a silicon oxide layer, a silicon oxynitride layer, a silicon nitride layer or a silicon carbide layer.
[0046] Preferably, the fifth dielectric layer (6) is a SiN x layer with a thickness of 25-100 nm (such as 25 nm, 50 nm, 75 nm or 100 nm, etc.).
[0047] Preferably, the stacked passivation structure of the solar cell further includes a front Ag electrode that penetrates through the fifth dielectric layer, the fourth dielectric layer and contacts the N ++ heavy diffusion region.
[0048] Preferably, the stacked passivation structure of the solar cell further includes an aluminum back surface field that sequentially penetrates through the third dielectric layer, the second dielectric layer and the first dielectric layer and then connects to the P-type silicon substrate.
[0049] Preferably, the N + light diffusion region (8) has a sheet resistance of 120-300 ohm / sq, such as 120 ohm / sq, 150 ohm / sq, 180 ohm / sq, 200 ohm / sq, 150 ohm / sq or 300 ohm / sq, etc.
[0050] Preferably, the N ++ The sheet resistance of the ++ multiple diffusion region (7) is 40 - 100 ohm / sq, such as 40 ohm / sq, 50 ohm / sq, 60 ohm / sq, 70 ohm / sq, 80 ohm / sq, 90 ohm / sq or 100 ohm / sq, etc.
[0051] As a preferred technical solution of the solar cell stack passivation structure of the present invention, the solar cell stack passivation structure includes: a P-type silicon substrate, on the front surface of the P-type silicon substrate, an emitter junction region and a first SiN x film are sequentially provided from inside to outside, and the Ag electrode passes through the first SiN x film and is connected to the emitter junction region. On the back surface of the P-type silicon substrate, a second SiO2 film, a SiO x N y film and a second SiN x film are sequentially provided from inside to outside, and the aluminum back surface field passes through the second SiN x film, the SiO x N y film and the second SiO2 film in sequence and contacts the P-type silicon substrate.
[0052] Preferably, the thickness of the second SiO2 film is 0 - 10 nm, such as 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm or 10 nm, etc.
[0053] Preferably, the SiO x N y film is deposited by PECVD method, and the thickness is 1 nm - 100 nm, such as 1 nm, 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm or 100 nm, etc.
[0054] Preferably, the second SiN x film is a SiN x layer deposited by PECVD method, and the thickness is 10 nm - 150 nm, such as 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 100 nm, 120 nm, 130 nm or 150 nm, etc.
[0055] Preferably, the thickness of the second SiN x film is 10 nm - 150 nm, such as 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 100 nm, 120 nm, 130 nm or 150 nm, etc.
[0056] Preferably, the SiO x Ny SiO with different refractive indices of the film x N y Stacked film.
[0057] Preferably, the second SiN x film is a separate SiN x passivation layer or a SiN stacked film with different refractive indices x Stacked film.
[0058] Preferably, the emitter junction region includes an N++ heavily diffused region, an N+ lightly diffused region, and a first SiO2 film which are arranged from inside to outside on the front surface of the P-type silicon substrate.
[0059] Preferably, the sheet resistance of the N+ lightly diffused region is between 120 - 180 ohm / sq, such as 120 ohm / sq, 130 ohm / sq, 145 ohm / sq, 160 ohm / sq, or 180 ohm / sq, etc.; the sheet resistance of the N++ heavily diffused region is between 40 - 100 ohm / sq, such as 40 ohm / sq, 65 ohm / sq, 85 ohm / sq, or 100 ohm / sq, etc.
[0060] Preferably, the thickness of the first SiO2 film is 1 - 10 nm, such as 1 nm, 5 nm, or 10 nm, etc.; the thickness of the first SiNx film is 25 - 100 nm, such as 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, or 100 nm, etc.
[0061] In a second aspect, the present invention provides a method for preparing a stacked passivation structure of a solar cell as described in the first aspect, and the method includes the following steps:
[0062] Generate a first dielectric layer on the back surface of the P-type silicon substrate, and then sequentially deposit a second dielectric layer and a third dielectric layer on the first dielectric layer.
[0063] The method provided by the present invention is simple to operate, has a short process, low cost, and is easy to carry out large-scale industrial production, which can make the stacked passivation structure of the solar cell provided in the first aspect have good industrialization prospects.
[0064] As a preferred technical solution of the present invention, the growth method of the first dielectric layer is thermal oxidation method, solution method, or plasma enhanced chemical vapor deposition method (Plasma Enhanced Chemical Vapor Deposition, PECVD).
[0065] Preferably, the method for depositing the second dielectric layer is PECVD.
[0066] Preferably, the method for depositing the third dielectric layer is PECVD.
[0067] As a preferred technical solution of the present invention, the method further includes: preparing an N ++ -type heavy diffusion region and an N + -type light diffusion region, and depositing a fourth dielectric layer and a fifth dielectric layer.
[0068] Preferably, the method for depositing the fourth dielectric layer is PECVD.
[0069] Preferably, the method for depositing the fifth dielectric layer is PECVD.
[0070] As a further preferred technical solution of the preparation method of the present invention, the method includes the following steps:
[0071] Removing the mechanical damage layer of the P-type silicon substrate with an alkaline etching solution, then etching the surface of the silicon substrate with the alkaline etching solution to form a pyramid structure on the front surface of the P-type silicon substrate, and then diffusing an N + -type light diffusion region on the front surface of the P-type silicon substrate, performing laser doping to obtain an N ++ -type heavy diffusion region, removing the back junction of the P-type silicon substrate, polishing the back surface of the P-type silicon substrate, oxidizing the first dielectric layer and the fourth dielectric layer on the P-type silicon substrate, then sequentially depositing the second dielectric layer and the third dielectric layer on the first dielectric layer, depositing the fifth dielectric layer on the fourth dielectric layer, printing the back Ag electrode and drying it, then printing the back Al paste to form an aluminum back field, and printing the front Ag electrode.
[0072] Compared with the prior art, the present invention has the following beneficial effects:
[0073] The back surface stacked passivation structure of the solar cell provided by the present invention has a good interfacial chemical passivation effect. The abundant hydrogen ions and hydrogen atoms in the thin film can effectively passivate the impurities and defects in the body. At the same time, by optimizing the refractive indices of each dielectric film, the light reflection effect on the back surface of the cell is greatly enhanced. The open-circuit voltage of the stacked passivation structure of the solar cell provided by the present invention can reach more than 690 mV, the short-circuit current is above 40.7 mA / cm 2 ², and the conversion efficiency is as high as more than 22.89%. Therefore, the passivation structure of the solar cell of the present invention has the same passivation effect and light reflection effect as the traditional scheme. BRIEF DESCRIPTION OF THE DRAWINGS
[0074] FIG. 1 is a schematic diagram of the back surface stacked passivation structure of the solar cell provided in Embodiment 1, wherein
[0075] Figure 1A-1G schematic diagrams of the solar cell in different stages of the preparation method of Embodiment 1 are shown (the front surface of the cell is a velvet surface structure, and is drawn as a plane for simple illustration)
[0076] wherein
[0077] 1 - P - type silicon substrate,
[0078] 2 - First dielectric layer,
[0079] 3 - Second dielectric layer,
[0080] 4 - Third dielectric layer,
[0081] 6 - Fifth dielectric layer,
[0082] 7 - N ++ heavily - doped region,
[0083] 8 - N + lightly - doped region,
[0084] 9 - Fourth dielectric layer.
[0085] Figure 2 Cross - sectional schematic diagram showing the passivation structure of the solar cell stack provided in Embodiment 1 (the front side of the cell is a textured structure, and is drawn as a plane for simplicity)
[0086] Wherein
[0087] 1 - P - type silicon substrate,
[0088] 2 - First dielectric layer,
[0089] 3 - Second dielectric layer,
[0090] 4 - Third dielectric layer,
[0091] 5 - Aluminum back surface field,
[0092] 6 - Fifth dielectric layer,
[0093] 7 - N ++ heavily - doped region,
[0094] 8 - N + lightly - doped region,
[0095] 9 - Fourth dielectric layer,
[0096] 10 - Front - side Ag electrode.
[0097] Figure 3 Cross - sectional schematic diagram showing the back - side passivation structure of the solar cell stack provided in Embodiment 1 (the front side of the cell is a textured structure, and is drawn as a plane for simplicity)
[0098] Wherein
[0099] 1 - P - type silicon substrate,
[0100] 2 - First dielectric layer,
[0101] 3 - Second dielectric layer,
[0102] 4 - Third dielectric layer. Detailed implementation manners
[0103] To better illustrate the present invention and facilitate the understanding of its technical solutions, the present invention will be further described in detail below. However, the following embodiments are merely simple examples of the present invention and do not represent or limit the scope of the claimed protection of the present invention. The scope of protection of the present invention is subject to the claims.
[0104] In the present invention, as a specific implementation manner, the passivation structure of the solar cell stack includes a P-type silicon substrate. On the front surface of the P-type silicon substrate, an emitter junction region and a first SiN x film are sequentially provided from the inside to the outside. The Ag electrode passes through the first SiN x film and then connects to the emitter junction region. On the back surface of the P-type silicon substrate, a second SiO2 film, a SiO x N y film, and a second SiN x film are sequentially provided from the inside to the outside. The aluminum back surface field passes through the second SiN x film, the SiO x N y film, and the second SiO2 film in sequence and then contacts the P-type silicon substrate.
[0105] The emitter junction region includes an N ++ heavily doped region, an N + lightly doped region, and a first SiO2 film which are arranged from the inside to the outside on the front surface of the P-type silicon substrate.
[0106] The thickness of the second SiO2 film is 0 - 10 nm. The SiO x N y film is deposited by PECVD method and has a thickness of 1 nm - 100 nm. The second SiNx film is a SiN x layer deposited by PECVD method and has a thickness of 10 nm - 150 nm. The thickness of the second SiN x film is 10 nm - 150 nm. The thickness of the first SiO2 film is 0 - 10 nm, and the thickness of the first SiNx film is 25 - 100 nm.
[0107] The second SiO x N y film is a separate SiO x N y passivation layer or a SiO x N y stacked film with different refractive indices.
[0108] The second SiN x film is a separate SiN x passivation layer or a SiNx stacked film with different refractive indices.
[0109] N + The sheet resistance of the light diffusion region is between 120 - 180 ohm / sq, N ++ The sheet resistance of the heavy diffusion region is 40 - 100 ohm / sq.
[0110] In this embodiment, the film on the back of the P-type silicon substrate contains a large amount of H + , which will be injected into the surface and inside of the silicon wafer during subsequent annealing or sintering processes to passivate the recombination centers.
[0111] As another specific embodiment, the stacked passivation structure of the solar cell includes a P-type silicon substrate. On the front of the P-type silicon substrate, an emitter junction region and a first SiN x film are sequentially provided from the inside to the outside. The Ag electrode passes through the first SiN x film and then connects to the emitter junction region. On the back of the P-type silicon substrate, a second SiO2 film, a SiO x N y film and a second SiN x film are sequentially provided from the inside to the outside. The aluminum back surface field passes through the second SiN x film, the SiO x N y film and the second SiO2 film in sequence and then contacts the P-type silicon substrate. The emitter junction region 2 includes an N ++ heavy diffusion region, an N + light diffusion region and a first SiO2 film which are arranged from the inside to the outside on the front of the P-type silicon substrate.
[0112] Specifically, the mechanical damage layer of the P-type silicon substrate is removed by 2 - 3 μm using a KOH solution with a volume ratio of 47%. Then, the surface of the silicon wafer is etched with a KOH solution with a volume ratio of 47% to form a pyramid structure of 2 - 3 μm.
[0113] POCl3 liquid low-pressure diffusion is used for diffusion to form a p-n junction, which is the N + light diffusion region. The diffusion temperature is 810°C, the process duration is 90 min, and the sheet resistance is controlled between 120 - 180 ohm / sq.
[0114] Laser SE doping is carried out to laser-dope the P atoms in the phosphosilicate glass after diffusion through laser high temperature to form a locally heavily doped region, which is the N ++ heavy diffusion region, and the sheet resistance is 40 - 100 ohm / sq.
[0115] The back junction of the P-type silicon substrate is removed by a chain cleaning machine, and the back of the silicon wafer is polished by 3 - 4 μm to remove the peripheral p-n junction.
[0116] Oxidation generates thin SiO2 films, a first SiO2 film and a second SiO2 film, on the front, back, and edges of the P-type silicon substrate wafer, with thicknesses of 0 - 10 nm respectively.
[0117] PECVD deposits a backside SiO x N y film with a thickness of 1 - 100 nm.
[0118] PECVD deposits a second SiN on the backside x film with a thickness of 10 - 150 nm.
[0119] PECVD deposits a first SiN on the front side x film with a thickness of 25 - 100 nm.
[0120] Use a ns laser with a wavelength of 532 nm to perform local grooving on the backside stack film to open the stack passivation film.
[0121] After printing the backside Ag electrode and drying, print the backside Al paste.
[0122] Print the front side Ag cell and rapidly sinter it at 875 °C to form a good ohmic contact of the Ag electrode.
[0123] As yet another specific embodiment, the solar cell stack passivation structure includes a P-type silicon substrate. On the front side of the P-type silicon substrate, a emitter junction region and a first SiN x film are sequentially provided from the inside to the outside. The Ag electrode passes through the first SiN x film and then connects to the emitter junction region. On the back side of the P-type silicon substrate, a SiO x N y film and a second SiN x film are sequentially provided from the inside to the outside. The aluminum back surface field sequentially passes through the second SiN x film, SiO x N y film and contacts the P-type silicon substrate. The emitter junction region includes an N ++ heavily diffused region, an N + lightly diffused region, and a first SiO2 film provided on the front side of the P-type silicon substrate 1 from the inside to the outside.
[0124] Use a KOH solution with a volume ratio of 47% to remove the mechanical damage layer of the P-type substrate by 2 - 3 μm, and then use a KOH solution with a volume ratio of 47% to etch the surface of the silicon wafer to form a pyramid structure of 2 - 3 μm.
[0125] Adopt POCl3 liquid low-pressure diffusion for diffusion to form an N+ lightly diffused region. The diffusion temperature is 810 °C, the process duration is 90 min, and the diffusion sheet resistance is controlled between 120 - 180 ohm / sq.
[0126] Laser SE doping, where P atoms in the phosphosilicate glass after diffusion are laser-doped through high laser temperature to form a local N ++ heavy diffusion region with a sheet resistance of 40 - 100 ohm / sq.
[0127] The chain cleaner removes the back junction and polishes the back of the silicon wafer by 3 - 4 μm to remove the peripheral p - n junction.
[0128] Oxidation generates a thin SiO2 film on the front and edge of the silicon wafer, the first SiO2 film with a thickness of 0 - 10 nm.
[0129] PECVD deposits the back SiO x N y film and the second SiN x film with thicknesses of 1 - 100 nm and 10 - 150 nm respectively. The front first SiN x film is deposited by PECVD with a thickness of 25 - 100 nm.
[0130] A 532 - nm ns laser is used to perform local grooving on the back stack film to open the stack passivation film.
[0131] After printing the back Ag electrode and drying, the back Al paste is printed. The front Ag battery is printed and rapidly sintered at 875°C to form a good ohmic contact.
[0132] The following are typical but non - restrictive embodiments of the present invention:
[0133] Embodiment 1
[0134] This embodiment provides a stacked passivation structure for a solar cell. As shown in Figure 2 and Figure 3 , the passivation structure of the solar cell includes a P - type silicon substrate 1. On the back of the P - type silicon substrate 1, a first dielectric layer 2, a second dielectric layer 3, and a third dielectric layer 4 are sequentially arranged from the inside to the outside. An aluminum back surface field 5 that sequentially passes through the third dielectric layer 4, the second dielectric layer 3, and the first dielectric layer 2 and then connects to the P - type silicon substrate 1. On the front of the P - type silicon substrate 1, an N ++ heavy diffusion region 7, an N + light diffusion region 8, a fourth dielectric layer 9, and a fifth dielectric layer 6 are sequentially arranged from the inside to the outside. A stacked passivation structure for a solar cell provided in this embodiment further includes a front Ag electrode 10, and the front Ag electrode 10 passes through the fifth dielectric layer 6 and the fourth dielectric layer 9 and enters the N ++ heavy diffusion region 7.
[0135] In the tandem passivation structure of the solar cell provided in this embodiment, the first dielectric layer 2 is a silicon oxide film with a thickness of 2 nm, the second dielectric layer 3 is a silicon oxynitride film stack with a total thickness of 20 nm and a refractive index of 1.7, the third dielectric layer 4 is a silicon nitride film stack with a total thickness of 70 nm and a refractive index of 2.1, N + The sheet resistance of the lightly doped region 8 is 150 ohm / sq, N ++ The sheet resistance of the heavily doped region 7 is 75 ohm / sq. The fourth dielectric layer 9 is a silicon oxide film with a thickness of 2 nm, and the fifth dielectric layer 6 is a silicon nitride film with a thickness of 75 nm and a refractive index of 2.0.
[0136] The second dielectric layer 3 is a three-layer silicon oxynitride stack. Along the direction away from the P-type silicon substrate 1, they are the first film of the second dielectric layer 3, the second film of the second dielectric layer 3, and the third film of the second dielectric layer 3. The refractive index of the first film of the second dielectric layer 3 is 1.7, the refractive index of the second film of the second dielectric layer 3 is 1.8, and the refractive index of the third film of the second dielectric layer 3 is 1.9.
[0137] The third dielectric layer 4 is a three-layer silicon nitride stack. Along the direction away from the P-type silicon substrate 1, they are the first film of the third dielectric layer 4, the second film of the third dielectric layer 4, and the third film of the third dielectric layer 4. The refractive index of the first film of the third dielectric layer 4 is 2.0, the refractive index of the second film of the third dielectric layer (4) is 2.1, and the refractive index of the third film of the third dielectric layer (4) is 2.2
[0138] In the tandem passivation structure of the solar cell provided in this embodiment, N + The lightly doped region 8 is obtained by diffusion with a tubular liquid phosphorus source, N ++ The heavily doped region 7 is obtained by laser doping.
[0139] A method for preparing the tandem passivation structure of the battery provided in this embodiment, the specific steps are as follows:
[0140] (1) Use a 2% KOH solution by mass to remove the mechanical damage layer of the P-type silicon wafer by 1.5 μm, and then use a 3% KOH solution by mass to etch the surface of the silicon wafer to form a pyramid structure with a size of 1.5 μm.
[0141] (2) Adopt POCl3 liquid diffusion for diffusion to form N + The lightly doped region 8, the diffusion temperature is 810 °C, and the process duration is 90 min.
[0142] (3) Laser SE doping, laser-dope the phosphorus atoms in the phosphosilicate glass after diffusion through laser high temperature to form a local N ++ The heavily doped region 7.
[0143] (4) The chain cleaner removes the back junction and polishes the back surface of the silicon wafer by 3.5 μm to remove the peripheral p-n junction.
[0144] (5) Thermal oxidation generates thin silicon oxide films on the front, back, and edges of the silicon wafer, serving as the first dielectric layer 2 and the fourth dielectric layer 10, with a thickness of 2 nm.
[0145] (6) PECVD deposits a silicon oxynitride film on the back surface as the second dielectric layer 3. PECVD deposits a silicon nitride film on the back surface as the third dielectric layer 4.
[0146] (7) PECVD deposits a silicon nitride film on the front surface as the fifth dielectric layer 6.
[0147] (8) Use a 532 nm ns laser to perform local grooving on the back stack film to open the stack passivation film.
[0148] (9) Print the back Ag paste, dry it, then print the back Al paste 5 and dry it, print the front Ag paste 10 and quickly sinter it at 875 °C to form a good ohmic contact.
[0149] Figure 1A 、 Figure 1B 、 Figure 1C 、 Figure 1D 、 Figure 1E 、 Figure 1F and Figure 1G are schematic diagrams of the solar cell at different stages of the above preparation method.
[0150] Example 2
[0151] The stacked passivation structure of the solar cell provided in this example refers to Example 1, the difference being that the first dielectric layer 2 is a silicon oxide film with a thickness of 2 nm, the second dielectric layer 3 is a stacked film composed of a silicon oxynitride film, a silicon nitride film, and a silicon carbide film, the total thickness of the stacked film is 20 nm, the refractive index is 1.7, the third dielectric layer 4 is two layers of silicon nitride films with thicknesses of 20 nm and 40 nm respectively, N + The sheet resistance of the light diffusion region 8 is 150 ohm / sq, N ++ The sheet resistance of the heavy diffusion region 7 is 75 ohm / sq, the fourth dielectric layer 9 is a SiO2 film with a thickness of 2 nm, the fifth dielectric layer 6 is a silicon nitride film with a thickness of 75 nm, and the refractive index is 2.0.
[0152] The second dielectric layer 3 is a stacked film composed of a silicon oxynitride film, a silicon nitride film, and a silicon carbide film. Along the direction away from the P-type silicon substrate 1, they are the first film of the second dielectric layer 3 (silicon oxynitride film), the second film of the second dielectric layer 3 (silicon nitride film), and the third film of the second dielectric layer 3 (silicon carbide film). The refractive index of the first film of the second dielectric layer 3 is 1.7, the refractive index of the second film of the second dielectric layer 3 is 1.9, and the refractive index of the third film of the second dielectric layer 3 is 2.0.
[0153] The third dielectric layer 4 is two layers of silicon nitride film. Along the direction away from the P-type silicon substrate 1, they are the first film of the third dielectric layer 4 and the second film of the third dielectric layer 4. The refractive index of the first film of the third dielectric layer 4 is 2.0, and the refractive index of the second film of the third dielectric layer 4 is 2.1.
[0154] A method for preparing the battery stacked passivation structure provided in this embodiment, and its specific steps are as follows:
[0155] (1) Use a 2% KOH solution by mass to remove the mechanical damage layer of the P-type silicon wafer by 1.5 μm, and then use a 3% KOH solution by mass to etch the surface of the silicon wafer to form a pyramid structure with a size of 1.5 μm.
[0156] (2) Perform diffusion using POCl3 liquid diffusion to form a lightly diffused region 8. The diffusion temperature is 810 °C, and the process duration is 90 min. + The lightly diffused region 8, the diffusion temperature is 810 °C, and the process duration is 90 min.
[0157] (3) Laser SE doping, laser dope phosphorus atoms in the phosphorus silicate glass after diffusion through laser high temperature to form a local heavily diffused region 7. ++ The heavily diffused region 7.
[0158] (4) Use a chain cleaner to remove the back junction, and polish the back of the silicon wafer by 3.5 μm to remove the surrounding p-n junction.
[0159] (5) Thermal oxidation generates a thin silicon oxide film on the front, back, and edges of the silicon wafer, which are the first dielectric layer 2 and the fourth dielectric layer 10, with a thickness of 2 nm.
[0160] (6) Deposit a silicon oxynitride film, a silicon nitride film, and a silicon carbide film on the back by PECVD, which is the second dielectric layer 3. Deposit a double-layer silicon nitride film on the back by PECVD, which is the third dielectric layer 4.
[0161] (7) Deposit a silicon nitride film on the front by PECVD method, which is the fifth dielectric layer 6.
[0162] (8) Use a 532 nm ns laser to perform local grooving on the back stacked film to open the stacked passivation film.
[0163] (9) After drying the backside Ag paste, print the backside Al paste and dry it. Then print the frontside Ag paste and sinter it rapidly at 875 °C to form a good ohmic contact.
[0164] Comparative Example 1
[0165] The difference between this comparative example and Example 1 is that the first dielectric layer 2 is not provided in the solar cell stacked passivation structure provided in this comparative example.
[0166] Comparative Example 2
[0167] The difference between this comparative example and Example 1 is that the second dielectric layer 3 is not provided in the solar cell stacked passivation structure provided in this comparative example.
[0168] Comparative Example 3
[0169] The difference between this comparative example and Example 2 is that the third dielectric layer 4 of the stacked structure is not provided in the solar cell stacked passivation structure provided in this comparative example.
[0170] The results of the batteries with different schemes are shown in the following table:
[0171] Table 1
[0172] Open-circuit voltage Short-circuit current Fill factor Conversion efficiency [mV] [mA / cm2] [%] [%] Example 1 690 40.7 81.5 22.89 Comparative Example 1 688 40.68 81.45 22.80 Comparative Example 2 688 40.6 81.45 22.75 Example 2 690 40.8 81.5 22.94 Comparative Example 3 690 40.7 81.5 22.89
[0173] The above battery efficiency test was carried out under standard test conditions: irradiance 1000 W / m 2 , cell temperature 25 °C, air mass AM1.5
[0174] Compared with Example 1, in Comparative Example 1, since the first dielectric layer 2 is not provided, the chemical passivation effect is weakened, the Voc of the battery is 2 mV lower, and the efficiency is 0.09% lower.
[0175] Compared with Example 1, in Comparative Example 2, since the second dielectric layer 3 is not provided, the backside light reflection effect is also weakened, and at the same time, it is impossible to weaken the bombardment of the high-power plasma on the first dielectric layer (2) when depositing the third dielectric layer (4). The open-circuit voltage of the battery is 2 mV lower, and the current density is 0.1 mA / cm 2 , and the efficiency is 0.14% lower.
[0176] Compared with Example 2, in Comparative Example 3, since the third dielectric layer 4 of the stacked structure is not provided, the backside light reflection effect is also weakened, and the current density is 0.1 mA / cm 2 , and the efficiency is 0.05% lower.
[0177] From the above results, it can be seen that the back stack passivation structure of the solar cell provided in Embodiments 1-2 has very good chemical passivation and back reflection effects.
[0178] The applicant declares that the present invention uses the above embodiments to illustrate the detailed method of the present invention, but the present invention is not limited to the above detailed method, that is, it does not mean that the present invention must rely on the above detailed method to be implemented. Those skilled in the art should understand that any improvement of the present invention, the equivalent substitution of each raw material of the product of the present invention, the addition of auxiliary components, the selection of specific methods, etc. all fall within the protection scope and the disclosure scope of the present invention.
Claims
1. A passivation structure for a solar cell stack, characterized in that, The stacked passivation structure of the solar cell includes: a P-type silicon substrate (1), and a first dielectric layer (2), a second dielectric layer (3), and a third dielectric layer (4) sequentially arranged from the inside to the outside on the back surface of the P-type silicon substrate (1). Wherein the first dielectric layer (2) is a silicon oxide layer with a thickness of 1 - 10 nm, the second dielectric layer (3) is a silicon oxynitride layer, and the third dielectric layer (4) is a silicon nitride layer. Wherein the second dielectric layer (3) and the third dielectric layer (4) are a stacked film structure with different refractive indices. Wherein in the stacked film structure of the second dielectric layer (3) and the third dielectric layer (4), along the direction away from the P-type silicon substrate (1), the refractive index of each film of each stacked film increases in sequence, and the refractive index range of the second dielectric layer (3) is 1.5 - 2.4, and the refractive index range of the third dielectric layer (4) is 1.5 - 2.
4.
2. The passivation structure for a solar cell stack according to claim 1, characterized in that, The thickness of the second dielectric layer (3) is 1 - 150 nm.
3. The passivation structure for a solar cell stack according to claim 1 or 2, wherein, The second dielectric layer (3) is deposited by PECVD method, and the thickness is 1 nm - 100 nm.
4. The passivation structure of the solar cell stack according to claim 1, characterized in that, The second dielectric layer (3) is a stacked film structure of silicon oxynitride with a refractive index range of 1.6 - 2.2 and silicon oxynitride with a refractive index range of 1.7 - 2.
4.
5. The passivation structure for a solar cell stack according to claim 1, wherein, The thickness of the third dielectric layer (4) is 1 - 200 nm.
6. The passivation structure for a solar cell stack according to any one of claims 1 or 5, characterized in that The third dielectric layer (4) is deposited by PECVD method, and the thickness is 10 - 150 nm.
7. The passivation structure for a solar cell stack according to claim 1, wherein, The third dielectric layer (4) is a stacked film structure of silicon nitride with a refractive index range of 1.6 - 2.2 and silicon nitride with a refractive index range of 1.9 - 2.
4.
8. The passivation structure for a solar cell stack according to claim 1, wherein, The second dielectric layer (3) has a thickness of 1 - 80 nm, and the third dielectric layer (4) has a thickness of 1 - 100 nm.
9. The passivation structure of the solar cell stack according to claim 1, characterized in that, The passivation structure of the solar cell stack further includes an N-type heavily doped region (7), an N-type lightly doped region (8), a fourth dielectric layer (9), and a fifth dielectric layer (6) which are sequentially arranged from inside to outside on the front surface of the P-type silicon substrate (1). ++ type heavily doped region (7), an N + type lightly doped region (8), a fourth dielectric layer (9), and a fifth dielectric layer (6).
10. The passivation structure for a solar cell stack according to claim 9, characterized in that, The fourth dielectric layer (9) is a SiO2 layer.
11. The passivation structure for a solar cell stack according to claim 9 or 10, characterized in that, The thickness of the fourth dielectric layer (9) is 1 - 10 nm.
12. The passivation structure for a solar cell stack according to claim 9, characterized in that, The fifth dielectric layer (6) is any one or a combination of at least two of a silicon oxide layer, a silicon oxynitride layer, a silicon nitride layer, or a silicon carbide layer.
13. The passivation structure of the solar cell stack according to claim 9 or 12, characterized in that, The fifth dielectric layer (6) is a SiN layer with a thickness of 25 - 100 nm x layer.
14. The passivation structure for a solar cell stack according to claim 9, wherein, The passivation structure of the solar cell stack further includes a front Ag electrode (10) passing through the fifth dielectric layer (6), the fourth dielectric layer (9), and the N ++ -type heavy diffusion region (7).
15. The passivation structure of the solar cell stack according to claim 1, characterized in that, The stacked passivation structure of the solar cell further includes an aluminum back surface field (5) that sequentially passes through the third dielectric layer (4), the second dielectric layer (3), and the first dielectric layer (2) and then connects to the P-type silicon substrate (1).
16. The passivation structure for a solar cell stack according to claim 9, characterized in that, The said N + The sheet resistance of the light diffusion region (8) is 120 - 300 ohm / sq.
17. The passivation structure for a solar cell stack according to claim 9, wherein, The said N ++ The sheet resistance of the double diffusion region (7) is 40 - 100 ohm / sq.
18. The passivation structure for a solar cell stack according to claim 1, characterized in that, On the front side of the P-type silicon substrate (1), an emitter junction region and a first SiN are sequentially provided from the inside to the outside. x film, the Ag electrode passes through the first SiNx film and is connected to the emitter junction region. On the back side of the P-type silicon substrate, a second SiO2 film, a SiO x N y film and a second SiN x film are sequentially provided from the inside to the outside. The aluminum back surface field (5) sequentially passes through the second SiN x film, the SiO x Ny film and the second SiO2 film and then contacts the P-type silicon substrate (1).
19. The passivation structure for a solar cell stack according to claim 18, wherein, The emitter junction region includes an N ++ heavily doped region (7), an N + lightly doped region (8) and a first SiO2 film, which are arranged from the inside to the outside on the front surface of the P-type silicon substrate (1).
20. The passivation structure of the solar cell stack according to claim 19, wherein, The described N + The sheet resistance of the light diffusion region (8) is between 120 and 180 ohm / sq, and the described N ++ The sheet resistance of the heavy diffusion region (7) is between 40 and 100 ohm / sq.
21. The passivation structure for a solar cell stack according to claim 18, wherein, The thickness of the first SiO2 film is 1 - 10 nm, and the thickness of the first SiNx film is 25 - 100 nm.
22. A method for preparing a passivation structure of a solar cell stack according to any one of claims 1-21, characterized in that, The method includes the following steps: Generate a first dielectric layer (2) on the back surface of the P-type silicon substrate (1), and then sequentially deposit a second dielectric layer (3) and a third dielectric layer (4) on the first dielectric layer (2).
23. The method according to claim 22, wherein, The growth method of the first dielectric layer (2) is thermal oxidation method, solution method, or PECVD.
24. The method according to claim 22, wherein, The second dielectric layer, the third dielectric layer, or both are deposited by PECVD method.
25. The method according to claim 22, characterized in that, The method further includes: preparing an N ++ heavy diffusion region (7) and an N + light diffusion region (8), and depositing a fourth dielectric layer (9) and a fifth dielectric layer (6).
26. The method according to claim 25, wherein The fourth dielectric layer, the fifth dielectric layer, or both are deposited by PECVD method.
27. The preparation method of the passivation structure of the solar cell stack according to claim 22, characterized in that, The method includes the following steps: removing the mechanical damage layer of the P-type silicon substrate (1) with an alkaline etching solution, then etching the surface of the silicon substrate (1) with the alkaline etching solution to form a pyramid structure on the front surface of the P-type silicon substrate (1), and then diffusing a light diffusion region (8) on the front surface of the P-type silicon substrate (1) and performing laser doping to obtain a heavy diffusion region (7). Removing the back junction of the P-type silicon substrate (1), polishing the back surface of the P-type silicon substrate (1), oxidizing on the P-type silicon substrate (1) to generate a first dielectric layer (2) and a fourth dielectric layer (9), then sequentially depositing a second dielectric layer (3) and a third dielectric layer (4) on the first dielectric layer (2), depositing a fifth dielectric layer (6) on the fourth dielectric layer (9), printing the back Ag electrode and drying it, then printing the back Al paste to form an aluminum back field (5), and printing the front Ag electrode (10). + light diffusion region (8), and performing laser doping to obtain an ++ heavy diffusion region (7). Removing the back junction of the P-type silicon substrate (1), polishing the back surface of the P-type silicon substrate (1), oxidizing on the P-type silicon substrate (1) to generate a first dielectric layer (2) and a fourth dielectric layer (9), then sequentially depositing a second dielectric layer (3) and a third dielectric layer (4) on the first dielectric layer (2), depositing a fifth dielectric layer (6) on the fourth dielectric layer (9), printing the back Ag electrode and drying it, then printing the back Al paste to form an aluminum back field (5), and printing the front Ag electrode (10).
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