Time signal generating circuit of power converter and control method thereof

Abstract

The present invention provides a time signal generating circuit of a power converter and a control method thereof. The time signal generating circuit of the power converter includes a basic frequency generating circuit, an on-time circuit and a frequency tracking circuit. The basic frequency generating circuit provides a basic frequency signal. The on-time circuit provides an on-time signal based on a first reference signal and a second reference signal. The second reference signal is related to the output voltage of the power converter. The frequency tracking circuit couples the basic frequency generating circuit and the on-time circuit, and compares the basic frequency signal with the frequency of the on-time signal within a default time to generate a tracking signal. The on-time circuit adjusts the second reference signal based on the tracking signal so that the on-time circuit adjusts the frequency of the on-time signal. The present invention enables the power converter to maintain good power conversion efficiency under both heavy load and light load conditions.

Description

Technical Field

[0001] The present invention relates to a signal generating circuit and a control method thereof, and in particular to a time signal generating circuit of a power converter and a control method thereof. Background Art

[0002] In a general constant on-time (COT) voltage conversion system (e.g., a DC-to-DC converter), when the system is in a heavy-load steady state, since the on-time of the COT voltage conversion system does not change, the frequency of the pulse width modulation (PWM) signal will increase, and the additional loss caused by the parasitic resistance of the components will increase, so the conversion efficiency of the COT voltage conversion system will decrease. In view of this, several embodiments of the solution are proposed below. Summary of the invention

[0003] The present invention is directed to a time signal generating circuit of a power converter and a control method thereof, which can generate and modulate a conduction time signal.

[0004] According to an embodiment of the present invention, a time signal generating circuit of a power converter includes a basic frequency generating circuit, a conduction time circuit and a frequency tracking circuit. The basic frequency generating circuit provides a basic frequency signal. The conduction time circuit provides an on-time signal according to a first reference signal and a second reference signal. The second reference signal is related to the output voltage of the power converter. The frequency tracking circuit couples the basic frequency generating circuit and the on-time circuit, and compares the basic frequency signal with the frequency of the on-time signal within a default time to generate a tracking signal. The on-time circuit adjusts the second reference signal according to the tracking signal so that the on-time circuit adjusts the frequency of the on-time signal.

[0005] In the time signal generating circuit according to an embodiment of the present invention, the on-time circuit includes an adjustment circuit coupled to the frequency tracking circuit and generating a compensation signal to adjust the second reference signal according to the tracking signal so that the on-time circuit adjusts the frequency of the on-time signal.

[0006] In the timing signal generating circuit according to the embodiment of the present invention, the adjusting circuit includes a plurality of current sources, and the tracking signal controls the plurality of current sources to generate the compensation signal.

[0007] In the timing signal generating circuit according to an embodiment of the present invention, the on-time circuit includes an adjustment circuit and an addition circuit. The adjustment circuit is coupled to the frequency tracking circuit and generates a compensation signal according to the tracking signal. The addition circuit adds a first digital signal related to the output voltage and the compensation signal to generate a second reference signal.

[0008] In the time signal generating circuit according to the embodiment of the present invention, the second reference signal is the sum of the first digital signal and the compensation signal divided by the second digital signal related to the input voltage.

[0009] In the time signal generating circuit according to an embodiment of the present invention, the frequency tracking circuit includes a first flip-flop, a second flip-flop and a counter. The first flip-flop receives a base frequency signal and outputs a first frequency signal. The second flip-flop receives a conduction time signal and outputs a second frequency signal. The counter is coupled to the first flip-flop and the second flip-flop, and generates a count value as a tracking signal according to the first frequency signal and the second frequency signal within a default time.

[0010] In the timing signal generating circuit according to the embodiment of the present invention, the counter compares the rising edge of the first frequency signal with the rising edge of the second frequency signal to determine the count value.

[0011] In the time signal generating circuit according to the embodiment of the present invention, the counter increases or decreases the count value by one bit at a time, or maintains the count value.

[0012] In the time signal generating circuit according to an embodiment of the present invention, the basic frequency generating circuit further includes a current generating circuit and a frequency generating circuit. The current generating circuit provides a basic current through an external setting resistor of a power converter and an input voltage coupled to the power converter. The frequency generating circuit is coupled to the current generating circuit and generates a basic frequency signal according to the basic current.

[0013] In the time signal generating circuit according to an embodiment of the present invention, the power converter further includes an output stage and a feedback circuit. The output stage is coupled to the time signal generating circuit and converts the input voltage into an output voltage according to the on-time signal. The feedback circuit includes an error amplifier and a comparator. The error amplifier provides an error amplification signal according to a reference voltage and a feedback voltage related to the output voltage. The comparator generates a trigger signal according to the ramp signal and the error amplification signal. The on-time circuit generates a first reference signal according to the trigger signal.

[0014] According to an embodiment of the present invention, a control method of a time signal generating circuit is used to generate a conduction time signal to an output stage of a power converter to control the output stage to convert an input voltage of the power converter into an output voltage. The control method includes the following steps: providing a basic frequency signal; providing a conduction time signal according to a first reference signal and a second reference signal, wherein the second reference signal is related to the output voltage; comparing the basic frequency signal with the frequency of the conduction time signal within a default time to generate a tracking signal; and adjusting the second reference signal according to the tracking signal to adjust the frequency of the conduction time signal.

[0015] According to the control method of the embodiment of the present invention, in the step of adjusting the second reference signal according to the tracking signal, the method further includes controlling a plurality of current sources according to the tracking signal to adjust the second reference signal.

[0016] According to the control method of an embodiment of the present invention, in the step of adjusting the second reference signal according to the tracking signal, the method further includes generating a compensation signal according to the tracking signal; and adding the first digital signal related to the output voltage and the compensation signal to generate the second reference signal.

[0017] In the control method according to an embodiment of the present invention, in the step of adjusting the second reference signal according to the tracking signal, the second reference signal is the sum of the first digital signal and the compensation signal divided by the second digital signal related to the input voltage.

[0018] According to the control method of an embodiment of the present invention, in the step of comparing the frequencies of the basic frequency signal and the conduction time signal within the default time, it also includes receiving the basic frequency signal and outputting a first frequency signal; receiving the conduction time signal and outputting a second frequency signal; generating a counting value based on the first frequency signal and the second frequency signal within the default time; and generating a tracking signal based on the counting value.

[0019] According to the control method of the embodiment of the present invention, in the step of generating the count value according to the first frequency signal and the second frequency signal within the default time, the rising edge of the first frequency signal and the rising edge of the second frequency signal are compared to determine the count value.

[0020] According to the control method of the embodiment of the present invention, in the step of generating the count value, one bit of the count value is gradually increased or decreased, or the count value is maintained.

[0021] Based on the above, the timing signal generating circuit and control method of the power converter of the present invention can generate a conduction timing signal and adjust the frequency of the conduction timing signal according to the change of the load.

[0022] In order to make the above features and advantages of the present invention more clearly understood, embodiments are given below with reference to the accompanying drawings for detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the present invention and together with the description serve to explain the principles of the present invention.

[0024] Figure 1 is a block diagram of a time signal generating circuit according to an embodiment of the present invention;

[0025] Figure 2 is a block diagram of a basic frequency generating circuit according to an embodiment of the present invention;

[0026] Figure 3 is a block diagram of a frequency tracking circuit according to an embodiment of the present invention;

[0027] Figure 4 is a signal timing diagram of multiple signals according to an embodiment of the present invention;

[0028] Figure 5 A schematic diagram of a digital on-time circuit according to an embodiment of the present invention;

[0029] Figure 6 The flowchart is a method for modulating an on-time signal according to an embodiment of the present invention. DETAILED DESCRIPTION

[0030] Reference will now be made in detail to exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numerals are used in the drawings and the description to refer to the same or like parts.

[0031] Figure 1 FIG. 1 is a block diagram of an analog time signal generating circuit according to an embodiment of the present invention. Figure 1The time signal generating circuit 100 is suitable for a control circuit in a DC-to-DC converter 10. The time signal generating circuit 100 is used to generate a time signal Ton to drive an output stage 200 to provide an output voltage Vout. The DC-to-DC converter 10 also includes an output stage 200 and a feedback circuit 300. The time signal generating circuit 100 includes an on-time circuit 110, a frequency tracking circuit 120, a basic frequency generating circuit 130, and a time on-time setting terminal 140. In this embodiment, the on-time circuit 110 generates the time signal Ton according to the output voltage Vout, the on-time current ITon, and the tracking signal Sb. The on-time circuit 110 is coupled to the output stage 200. The on-time circuit 110 outputs the on-time signal Ton to the output stage 200 and the frequency tracking circuit 120 to control the output stage 200 to convert the input voltage Vin received by the DC-to-DC converter 10 into the output voltage Vout. In this embodiment, the frequency tracking circuit 120 is coupled to the on-time circuit 110 and the basic frequency generating circuit 130 to receive the basic frequency signal BF provided by the basic frequency generating circuit 130 and the on-time signal Ton provided by the on-time circuit 110. The frequency tracking circuit 120 is used to provide a corresponding tracking signal Sb to the on-time circuit 110 according to the basic frequency signal BF and the on-time signal Ton, so that the on-time circuit 110 can adjust the on-time signal Ton accordingly according to the tracking signal Sb.

[0032] The on-time circuit 110 includes a comparator 111, a voltage follower 112, an adjustment circuit 113, a switch S1, and a capacitor C1. In the present embodiment, a first input terminal of the comparator 111 is coupled to one terminal of the switch S1, one terminal of the capacitor C1, and an on-time current Iton. A second input terminal of the comparator 111 is coupled to the adjustment circuit 113, and the adjustment circuit 113 is coupled to the frequency tracking circuit 120 and the voltage follower 112. When the switch S1 is not turned on, the on-time current Iton charges the capacitor C1, so that the voltage level of the first reference signal Va received by the first input terminal of the comparator 111 starts to rise. Conversely, when the switch S1 is turned on, the capacitor C1 is discharged through the switch S1, so that the voltage level of the first reference signal Va received by the first input terminal of the comparator 111 decreases, so that the first reference signal Va is a ramp signal. In this embodiment, the voltage follower 112 receives the output voltage Vout and provides the output voltage Vout to the adjustment circuit 113, so that the adjustment circuit 113 outputs the second reference signal Vb to the second input terminal of the comparator 111. The second reference signal Vb is a voltage related to the output voltage Vout.

[0033] The adjustment circuit 113 includes variable current sources 114-117 and a resistor Ri. The output end of the variable current source 114 and the input end of the variable current source 115 are coupled to the first end of the resistor Ri, and the output end of the voltage follower 112 is coupled to the first end of the resistor Ri. The output end of the variable current source 116 and the input end of the variable current source 117 are coupled to the second end of the resistor Ri, and the second end of the resistor Ri is coupled to the second input end of the comparator 111. In this embodiment, the adjustment circuit 113 can control the current provided by the variable current sources 114-117 to flow through the resistor Ri according to the tracking signal Sb, so that the resistor Ri generates a cross-voltage as a compensation signal Vf, so as to combine with the output voltage Vout to output a second reference signal Vb to the second input end of the comparator 111. Therefore, the comparator 111 can compare the voltage levels of the first input end and the second input end, and output a corresponding on-time signal Ton.

[0034] The switch S1 is controlled by the feedback circuit 300. The feedback circuit 300 includes a ramp signal generator 301, a comparator 302, an error amplifier 303, a resistor R1 and a capacitor C2. The ramp signal generator 301 is coupled to a first input terminal of the comparator 302. The ramp signal generator 301 receives a start signal Sa. When the start signal Sa starts the ramp signal generator 301, the ramp signal generator 301 provides a ramp signal Vramp to the first input terminal of the comparator 302. The output terminal of the error amplifier 303 is coupled to a second input terminal of the comparator 302 and is coupled to a filter circuit formed by a resistor R1 and a capacitor C2 connected in series. The first input terminal of the error amplifier 303 receives a reference voltage Vref. The second input terminal of the error amplifier 303 receives an output voltage Vout. The output terminal of the error amplifier 303 outputs an error signal Vc to the second input terminal of the comparator 302. Therefore, the comparator 302 can determine whether to output a trigger signal Tri to turn on the switch S1 according to the ramp signal Vramp and the error signal Vc.

[0035] Specifically, the on-time circuit 110 can provide the on-time signal Ton to the output stage 200 according to the output voltage Vout and the on-time current Iton at the current time point, so that the output stage 200 outputs the corresponding output voltage Vout according to the input voltage Vin according to the on-time signal Ton. Then, at the next time point, if the frequency tracking circuit 120 detects that the frequency of the on-time signal Ton changes due to the load change and fails to meet the frequency of the basic frequency signal BF, the frequency tracking circuit 120 will output an appropriate tracking signal Sb to the on-time circuit 110, so that the on-time circuit 110 can adjust the frequency of the on-time signal Ton output at the next time point according to the tracking signal Sb, and the output stage 200 can output a new output voltage Vout according to the adjusted on-time signal Ton. Therefore, the time signal generating circuit 100 of the present embodiment can effectively adjust the output voltage Vout according to the load change, so that the power converter can maintain good power conversion efficiency under both heavy load and light load conditions.

[0036] Figure 2 FIG. 1 is a block diagram of a basic frequency generating circuit according to an embodiment of the present invention. Figure 1 as well as Figure 2 , Figure 2 for Figure 1 The block diagram of the internal functional circuit of the basic frequency generating circuit 130 is shown in FIG. The basic frequency generating circuit 130 includes a current generating circuit 131 and a frequency generating circuit 132. The current generating circuit 131 is coupled to the frequency generator 132 and to the time on-setting terminal 140 coupled to the time signal generating circuit 100. The time on-setting terminal 140 is used to couple the resistor Rton to receive the input voltage Vin. In the present embodiment, the current generating circuit 131 generates the on-time current Iton to the on-time circuit 110 according to the resistor Rton and the input voltage Vin, and outputs the basic current IBase to the frequency generating circuit 132. The frequency generating circuit 132 can be, for example, an LC oscillation circuit or other known oscillation devices, which can provide a basic frequency signal BF to the frequency tracking circuit 120 according to the basic current IBase. In the present embodiment, the input voltage Vin is a fixed voltage value, and the resistor Rton has a fixed resistance value. Furthermore, the base current IBase provided by the current generating circuit 131 to the frequency generating circuit 132 is also fixed, so that the frequency generating circuit 132 can provide a fixed base frequency signal BF to the frequency tracking circuit 120. Therefore, the frequency tracking circuit 120 of this embodiment can effectively determine whether the on-time is changed due to the load by comparing the frequency of the base frequency signal BF and the frequency of the on-time signal Ton.

[0037] Figure 3FIG. 1 is a block diagram of a frequency tracking circuit according to an embodiment of the present invention. Figure 1 as well as Figure 3 , Figure 3 for Figure 1 FIG. 1 is a block diagram of the internal functional circuit of the frequency tracking circuit 120. In the present embodiment, the frequency tracking circuit 120 includes flip-flops 127, 128 and a counter 129. The flip-flops 127, 128 are coupled to the counter 129, and the flip-flops 127, 128 are edge detectors, respectively. The flip-flop 127 receives the basic frequency signal BF provided by the basic frequency generating circuit 130, and the flip-flop 128 receives the on-time signal Ton provided by the on-time circuit 110. The flip-flop 127 is used to output the frequency signal Lton correspondingly when the basic frequency signal BF changes state. The flip-flop 128 is used to output the frequency signal Gton correspondingly when the on-time signal Ton changes state. In addition, the counter 129 can generate a count value as the tracking signal Sb according to the frequency signals Lton and Gton within a default time. It is worth noting that the counter 129 of the present embodiment determines the count value by comparing the rising edges of the frequency signals Lton and Gton.

[0038] For example, if the counter 129 receives the frequency signal Gton first, it means that the frequency of the on-time signal Ton is greater than the basic frequency signal BF, so the counter 129 adds 1 to the count value. Since the count value is increased by 1, the tracking signal Sb increases, so the adjustment circuit 113 can output the compensation signal Vf for increasing the output voltage Vout received by the on-time circuit 110. Conversely, if the counter 129 receives the frequency signal Lton first, it means that the frequency of the on-time signal Ton is less than the basic frequency signal BF, so the counter 129 subtracts 1 from the count value. Since the count value is reduced by 1, the tracking signal Sb decreases, so the adjustment circuit 113 outputs the compensation signal Vf for reducing the output voltage Vout received by the on-time circuit 110. It is worth noting that the counter 129 is an up / down counter, which only increases or decreases one bit of the count value in one counting cycle, or maintains the count value. In other words, the frequency tracking circuit 120 of the present embodiment outputs the tracking signal Sb in a fine-tuning manner, so that the on-time circuit 110 can fine-tune the on-time signal Ton accordingly according to the tracking signal Sb, and can effectively compensate the on-time signal Ton, thereby achieving a frequency tracking effect of maintaining the frequency of the on-time signal Ton.

[0039] Figure 4 FIG. 1 is a signal timing diagram of multiple signals according to an embodiment of the present invention. Figure 1 , Figure 3 and Figure 4, the comparator 111 compares the first reference signal Va with the second reference signal Vb to output the on-time signal Ton. The first reference signal Va is a ramp signal. Specifically, when the second reference signal Vb is higher than the first reference signal Va, the comparator 111 outputs the on-time signal Ton. The on-time signal Ton is a square wave signal. In this embodiment, when Figure 3 When the up / down counter 129 first receives the frequency signal Gton at time point t1, the counting action Ct of the up / down counter 129 is to increase the count value by one bit (e.g., 87+1=88). Then, the tracking signal Sb operates the variable current sources 115 and 116 in the adjustment circuit 113 to turn on to generate a positive voltage compensation signal Vf (e.g., Vf=+Vout / 256). In this regard, the second input terminal of the comparator 111 can receive the second reference signal Vb, and the second reference signal Vb is the output voltage Vout plus the compensation signal Vf (e.g., Vb=Vout+Vf). Therefore, the comparator 111 can adjust the pulse width of the on-time signal Ton according to the second reference signal Vb to output the extended on-time signal Ton. Since the dead time of the output stage 200 is fixed, that is, extending the pulse width of the on-time signal Ton can reduce the frequency of the on-time signal Ton. It is worth noting that the compensation signal Vf is the output voltage Vout divided by 2 to the power of n, where n is an integer greater than or equal to 0. Similarly, at time point t2, if the up / down counter 133 still receives the frequency signal Gton first, the comparator 111 will increase the count value by one bit (e.g., 88+1=89) to enable the adjustment circuit 113 to provide a positive voltage compensation signal Vf (e.g., Vf=+2Vout / 256) to adjust the second reference signal Vb again, and extend the pulse width of the on-time signal Ton again. Until the up / down counter 129 receives the frequency signals Lton and Gton at the same time or at a similar time at time point t3, the up / down counter 129 will maintain the count value (e.g., 89) to maintain the adjustment of the compensation signal Vf (e.g., maintain Vf=+2Vout / 256) and the pulse width of the on-time signal Ton.

[0040] In contrast, when Figure 3When the up / down counter 129 first receives the frequency signal Lton at time point t4, the counting action Ct of the up / down counter 129 is to reduce the count value by one bit (for example, 87-1=86). Then, the tracking signal Sb operates the variable current sources 114 and 117 to turn on to provide a negative voltage compensation signal Vf (for example, Vf=-Vout / 256). In this regard, the second input terminal of the comparator 111 can receive the second reference signal Vb, and the second reference signal Vb is the output voltage Vout plus the compensation signal Vf (for example, Vb=Vout+Vf). Therefore, the comparator 111 can adjust the pulse width of the on-time signal Ton according to the second reference signal Vb to output a shortened on-time signal Ton, that is, to increase the frequency of the on-time signal Ton. Similarly, at time point t5, if the up / down counter 129 still receives the frequency signal Lton first, the comparator 111 will reduce the count value by one bit (e.g., 86-1=85) to enable the adjustment circuit 113 to provide a negative voltage compensation signal Vf (e.g., Vf=-2Vout / 256) to adjust the second reference signal Vout' and shorten the pulse width of the on-time signal Ton again. Until the counter 133 receives the frequency signals Lton and Gton at the same time or at a similar time at time point t6, the up / down counter 133 will maintain the count value (e.g., 85) to maintain the compensation signal Vf (e.g., maintained as Vf=-2Vout / 256) and the pulse width of the on-time signal Ton.

[0041] Figure 5 FIG. 4 is a schematic diagram of a digital on-time circuit according to an embodiment of the present invention. Figure 5 for Figure 1 The digital system architecture diagram of the on-time circuit 110 is shown in FIG. Figure 5, the on-time circuit 110 includes analog-to-digital converters 501, 504, an adding circuit 502, an adjusting circuit 503, a divider 505, a comparator 506, an up counter 507, and a flip-flop 508. In the present embodiment, the analog-to-digital converter 501 receives the output voltage Vout to output a first digital signal to the adding circuit 502. The adjusting circuit 503 receives the tracking signal Sb to generate a compensation signal Vf to the adding circuit 502. Therefore, the adding circuit 502 adds the first digital signal related to the output voltage Vout and the compensation signal Vf to generate a second reference signal Vb to the divider 505. Therefore, the second reference signal Vb is the sum of the first digital signal and the compensation signal Vf divided by the second digital signal related to the input voltage Vin. The divider 505 divides the second reference signal Vb by the input voltage Vin, and may, for example, multiply it by another frequency signal or other digital signal to output a reference signal D1 based on the output voltage to the inverting input terminal of the comparator 506. The frequency input terminal of the up-counter 507 receives the frequency signal CLK, and the reset terminal R of the up-counter 507 receives the trigger signal St. In the present embodiment, the up-counter 507 is used to output the voltage signal D2 of the analog ramp signal to the non-inverting input terminal of the comparator 506 according to the frequency signal CLK and the trigger signal St. Therefore, when the voltage signal D2 increases to the value of the reference signal D1, the output terminal of the comparator 506 outputs a high-level comparison signal Dc to the reset terminal R of the flip-flop 508. The setting terminal S of the flip-flop 508 receives the trigger signal St. Therefore, the flip-flop 508 can output the conduction time Ton through the output terminal Q according to the trigger signal St and the digital comparison signal Dc. The trigger signal St can be Figure 1 The trigger signal Tri generated by the feedback circuit 300.

[0042] Figure 6 FIG. 1 is a flow chart of a method for modulating an on-time signal according to an embodiment of the present invention. Figure 1 as well as Figure 6 The modulation method of the conduction time signal of the present invention can be applied to Figure 1The time signal generating circuit 100 of the embodiment. In step S610, the basic frequency generating circuit 130 provides the basic frequency signal BF to the frequency tracking circuit 120. In step S620, the on-time circuit 110 provides the on-time signal Ton to the output stage 200 and the frequency tracking circuit 120 according to the first reference signal Va and the second reference signal Vb, and the second reference signal Vb is related to the output voltage Vout. The output stage 200 generates the output voltage Vout according to the on-time signal Ton. In step S630, the frequency tracking circuit 120 compares the basic frequency signal BF with the frequency of the on-time signal Ton within a default time to generate a tracking signal Sb. In step S640, the on-time circuit 110 adjusts the second reference signal Vb according to the tracking signal Sb to adjust the frequency of the on-time signal Ton. Therefore, the control method of the on-time signal generating circuit of this embodiment can adjust the width of the on-time signal Ton in real time according to the comparison result of the frequency of the on-time signal Ton and the basic frequency signal BF to maintain the frequency of the on-time signal Ton.

[0043] In addition, the relevant circuit features, implementation methods and technical details of the time signal generating circuit 100 of this embodiment can be referred to the above Figures 1 to 5 The description of the embodiments provides sufficient teachings, suggestions and implementation instructions, so they will not be repeated here.

[0044] In summary, the timing signal generating circuit and control method of the power converter of the present invention can adjust the frequency of the on-time signal to track the on-time signal in response to load changes, so that the power converter can maintain good power conversion efficiency under both heavy load and light load conditions.

[0045] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A time signal generating circuit for a power converter, characterized in that: include: A basic frequency generating circuit provides a basic frequency signal; A conduction time circuit, providing a conduction time signal according to a first reference signal and a second reference signal, wherein the second reference signal is related to the output voltage of the power converter; as well as A frequency tracking circuit is coupled to the basic frequency generating circuit and the on-time circuit, and compares the frequencies of the basic frequency signal and the on-time signal within a default time to generate a tracking signal. wherein the on-time circuit adjusts the second reference signal according to the tracking signal so that the on-time circuit adjusts the frequency of the on-time signal, The power converter further comprises: The feedback circuit includes an error amplifier and a comparator. The error amplifier provides an error amplification signal according to a reference voltage and a feedback voltage related to the output voltage. The comparator generates a trigger signal according to a ramp signal and the error amplification signal. The on-time circuit generates the first reference signal according to the trigger signal.

2. The time signal generating circuit according to claim 1, characterized in that: The on-time circuit comprises: The adjustment circuit is coupled to the frequency tracking circuit and generates a compensation signal according to the tracking signal to adjust the second reference signal so that the on-time circuit adjusts the frequency of the on-time signal.

3. The time signal generating circuit according to claim 2, characterized in that: The adjustment circuit includes a plurality of current sources, and the tracking signal controls the plurality of current sources to generate the compensation signal.

4. The time signal generating circuit according to claim 1, characterized in that: The on-time circuit comprises: an adjustment circuit coupled to the frequency tracking circuit and generating a compensation signal according to the tracking signal; and The adding circuit adds a first digital signal related to the output voltage and the compensation signal to generate the second reference signal.

5. The time signal generating circuit according to claim 1, characterized in that: The frequency tracking circuit comprises: A first flip-flop, receiving the base frequency signal and outputting a first frequency signal; a second flip-flop, receiving the on-time signal and outputting a second frequency signal; and The counter is coupled to the first flip-flop and the second flip-flop, and generates a count value as the tracking signal according to the first frequency signal and the second frequency signal within the default time.

6. The time signal generating circuit according to claim 5, characterized in that: The counter compares a rising edge of the first frequency signal with a rising edge of the second frequency signal to determine the count value.

7. The time signal generating circuit according to claim 5, characterized in that: The counter increases or decreases one bit of the count value one by one, or maintains the count value.

8. The time signal generating circuit according to claim 1, characterized in that: The basic frequency generating circuit further comprises: A current generating circuit provides a basic current through an external setting resistor of the power converter and an input voltage coupled to the power converter; and The frequency generating circuit is coupled to the current generating circuit and generates the basic frequency signal according to the basic current.

9. The time signal generating circuit according to claim 1, characterized in that: The power converter further comprises: The output stage is coupled to the time signal generating circuit and converts the input voltage into the output voltage according to the conduction time signal.

10. A control method of a timing signal generating circuit, for generating a conduction timing signal to an output stage of a power converter, so as to control the output stage to convert an input voltage of the power converter into an output voltage, characterized in that: The control method comprises: Providing an error amplification signal according to a reference voltage and a feedback voltage related to the output voltage, generating a trigger signal according to a ramp signal and the error amplification signal, and generating a first reference signal according to the trigger signal; Providing a fundamental frequency signal; Providing the on-time signal according to the first reference signal and a second reference signal, wherein the second reference signal is related to the output voltage; comparing the base frequency signal with the frequency of the on-time signal within a default time to generate a tracking signal; and The second reference signal is adjusted according to the tracking signal to adjust the frequency of the on-time signal.

11. The control method according to claim 10, wherein in the step of adjusting the second reference signal according to the tracking signal, The method also includes controlling a plurality of current sources according to the tracking signal to adjust the second reference signal.

12. The control method according to claim 10, wherein in the step of adjusting the second reference signal according to the tracking signal, The method also includes generating a compensation signal according to the tracking signal; and adding a first digital signal related to the output voltage and the compensation signal to generate the second reference signal.

13. The control method according to claim 10, wherein in the step of comparing the base frequency signal with the frequency of the on-time signal within a default time, Also includes receiving the basic frequency signal and outputting a first frequency signal; receiving the on-time signal and outputting a second frequency signal; generating a count value according to the first frequency signal and the second frequency signal within the default time; as well as The tracking signal is generated according to the count value.

14. The control method according to claim 13, wherein in the step of generating the count value according to the first frequency signal and the second frequency signal within the default time, The rising edge of the first frequency signal and the rising edge of the second frequency signal are compared to determine the count value.

15. The control method according to claim 13, characterized in that: In the step of generating the count value, it is characterized in that one bit of the count value is gradually increased or decreased, or the count value is maintained.

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