Test circuit and method for detecting power consumption of power supply circuit containing super capacitor

Abstract

The present invention provides a test circuit for detecting the power consumption of a power supply circuit containing a supercapacitor, comprising: an isolation circuit, wherein two wiring terminals are respectively used to couple one end of the two diodes away from the supercapacitor, and a signal input terminal is coupled to a control circuit for shielding the supercapacitor; a discharge and voltage detection circuit, wherein a wiring terminal is used to couple a non-grounded end of the supercapacitor, and a signal input terminal and an output terminal are coupled to a control circuit for discharging the supercapacitor and collecting a voltage signal; a current detection circuit, wherein a wiring terminal is used to couple a power supply circuit, and an output terminal is coupled to a control circuit for detecting the current in the power supply circuit; a control circuit, which is used to send a control level signal, and receive a current signal collected by a current detection circuit and calculate the power consumption of the power supply circuit based on the current signal; and a power supply circuit, which is used to provide a power supply signal for the test circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of instrument intelligent control, and in particular to a test circuit and method for detecting the power consumption of a power supply circuit containing a super capacitor. Background Art

[0002] Static power consumption refers to the minimum power consumption when the main control board program is in normal mode. When there are devices with large capacitance such as super capacitors in the main control board system, it takes a long time to test its power consumption. Among the current detection methods, there is a detection method that estimates static power consumption through dynamic power consumption curves, but since the power consumption in this field is generally in the microampere level, while the dynamic power consumption curve is in the milliampere level, it is easy to make a misjudgment.

[0003] For example, in the power consumption test device and method of a communication module disclosed in the Chinese patent "A Power Consumption Test Device and Method for a Communication Module" with publication number CN111669202A, the power consumption of a system containing a supercapacitor is detected by sampling the supercapacitor charging curve, comparing it with the main control board sampling curve, and obtaining the static power consumption through dynamic power consumption calculation. Since it is calculated, the dynamic power consumption of the supercapacitor is at the milliampere level, and the accuracy cannot meet the requirements for products with static power consumption at the microampere level. Due to the characteristics of the communication module itself, this technology can only be used when the power consumption curve has good consistency, so the method itself has many limitations. Summary of the invention

[0004] Based on the above background, the present invention provides a test circuit for detecting power consumption of a power supply circuit containing a super capacitor, wherein the power supply circuit includes at least one super capacitor coupled in the circuit and two diodes coupled on both sides of the super capacitor, and the test circuit includes:

[0005] An isolation circuit, wherein two connection terminals are respectively used to couple one end of the two diodes away from the super capacitor, and a signal input terminal is coupled to a control circuit for shielding the super capacitor;

[0006] A discharge and voltage detection circuit, wherein the connection terminal is used to couple the non-ground terminal of the super capacitor, and the signal input terminal and the output terminal are coupled to the control circuit, and is used to discharge the super capacitor and collect the voltage signal;

[0007] A current detection circuit, whose connection terminal is used to couple with the power circuit, and whose output terminal is coupled with the control circuit, is used to detect the current in the power circuit;

[0008] A control circuit, which is used to send a control level signal, and receive a current signal collected by a current detection circuit and calculate the power consumption of the power supply circuit based on the current signal;

[0009] and a power supply circuit for providing a power supply signal to the test circuit.

[0010] Furthermore, the isolation circuit includes a PMOS tube Q2 and a transistor Q4, wherein the source and drain of the PMOS tube Q2 are respectively used as two terminals for coupling the ends of two diodes on both sides of the supercapacitor away from the supercapacitor, and the gate is coupled to the collector of the transistor Q4; the base of the transistor Q4 is used as a signal input terminal to couple the control circuit, and the emitter is grounded.

[0011] Furthermore, the discharge and voltage detection circuit includes a switch discharge circuit and a signal amplification circuit, wherein the switch discharge circuit is used to discharge the super capacitor when turned on, and the signal amplification circuit is used to detect the voltage of the super capacitor.

[0012] Furthermore, the switch discharge circuit includes a transistor Q6, the collector of the transistor Q6 is used as a connection terminal for coupling to the non-grounded end of the super capacitor, the emitter is coupled to the power ground, and the base is used as a signal input terminal to couple to the control circuit.

[0013] Furthermore, the signal amplifying circuit includes a comparator U4, a positive input terminal of which is coupled to the collector of the transistor Q6, and a negative input terminal of which is coupled to an output terminal, and the output terminal is used to output the amplified current signal to the control circuit.

[0014] Furthermore, the current detection circuit includes a current detection chip U5, whose signal input end is coupled to the output end of the power supply circuit and the power supply circuit, and whose output end is coupled to the control circuit, and is used to detect the current in the power supply circuit and send it to the control circuit.

[0015] Furthermore, the control circuit includes a single chip microcomputer and its peripheral circuits.

[0016] Furthermore, the power supply circuit includes a PMOS tube Q1 and a transistor Q3, wherein the source of the PMOS tube Q1 is coupled to the power input Vout, the drain is coupled to the current detection circuit as an output terminal, and the gate is coupled to the collector of the transistor Q3; the base of the transistor Q3 is coupled to the control circuit as a signal input terminal, and the emitter is grounded.

[0017] The present invention also includes a testing method for the test circuit as described above, comprising the following steps:

[0018] S1, initialization detection, setting all control terminals of the control circuit to a preset potential;

[0019] S2, control discharge and voltage detection circuit for supercapacitor discharge;

[0020] S3, coupling the isolation circuit to the corresponding wiring position of the power circuit;

[0021] S4, supplying power to the power circuit under test and the test circuit through the power supply circuit;

[0022] S5, detecting the voltage of the supercapacitor, and adjusting the voltage of the power supply circuit when the voltage reaches a preset voltage;

[0023] S6. Detect the current through the current detection circuit to obtain the power consumption of the power supply circuit.

[0024] The beneficial effects of the present invention are as follows:

[0025] The test circuit and method of the present invention can separate the detection of supercapacitors from the detection of static power consumption without destroying the structure, thereby more accurately containing the static power consumption of supercapacitor products, and has the advantages of higher test accuracy, prevention of false alarms, and good stability. It can improve production efficiency, enhance detection accuracy, and has strong versatility. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 The figure is a schematic diagram of the circuit composition and connection relationship of the detection circuit embodiment of the present invention.

[0027] Figure 2 Schematic diagram of a power supply circuit containing a supercapacitor in an embodiment of the present invention.

[0028] Figure 3 Schematic diagram of a cutoff circuit in an embodiment of the present invention.

[0029] Figure 4 Schematic diagram of a discharge and voltage detection circuit in an embodiment of the present invention.

[0030] Figure 5 Schematic diagram of a current detection circuit in an embodiment of the present invention.

[0031] Figure 6 Schematic diagram of a control circuit in an embodiment of the present invention.

[0032] Figure 7 Schematic diagram of a power supply circuit in an embodiment of the present invention. DETAILED DESCRIPTION

[0033] In order to further understand the present invention, preferred embodiments of the present invention are described below in conjunction with examples. However, it should be understood that these descriptions are only for further illustrating the features and advantages of the present invention, rather than limiting the claims of the present invention.

[0034] Example 1

[0035] A first embodiment of the present invention provides a test circuit for detecting the power consumption of a power circuit containing a super capacitor. Figure 2In the example shown, the power supply circuit includes two voltage regulating chips U1 and U2 coupled in sequence, and two super capacitors C4 and C6 coupled in the circuit. Two diodes D1 and D2 are coupled on both sides of the super capacitor respectively, and TP1-TP4 marked on the circuit are connection points.

[0036] Reference Figure 1 , the test circuit of this embodiment includes:

[0037] An isolation circuit, wherein two connection terminals are respectively used to couple one end of the two diodes away from the super capacitor, and a signal input terminal is coupled to a control circuit for shielding the super capacitor;

[0038] A discharge and voltage detection circuit, wherein the connection terminal is used to couple the non-ground terminal of the super capacitor, and the signal input terminal and the output terminal are coupled to the control circuit, and is used to discharge the super capacitor and collect the voltage signal;

[0039] A current detection circuit, whose connection terminal is used to couple with the power circuit, and whose output terminal is coupled with the control circuit, is used to detect the current in the power circuit;

[0040] A control circuit, which is used to send a control level signal, and receive a current signal collected by a current detection circuit and calculate the power consumption of the power supply circuit based on the current signal;

[0041] and a power supply circuit for providing a power supply signal to the test circuit.

[0042] For details, please refer to the attached Figure 3 The isolation circuit shown in this embodiment includes a PMOS tube Q2 and a transistor Q4, wherein the source and drain of the PMOS tube Q2 are respectively used as two terminals for coupling the ends of two diodes on both sides of the super capacitor away from the super capacitor, and the gate is coupled to the collector of the transistor Q4; the base of the transistor Q4 is coupled to the control circuit as a signal input terminal, and the emitter is grounded.

[0043] Reference Figure 4 The discharge and voltage detection circuit shown in this embodiment includes a switch discharge circuit and a signal amplification circuit. The switch discharge circuit is used to discharge the super capacitor when it is turned on, and the signal amplification circuit is used to detect the voltage of the super capacitor.

[0044] The switch discharge circuit includes a transistor Q6, a collector of the transistor Q6 is used as a connection terminal for coupling to a non-grounded end of the super capacitor, an emitter is coupled to a power ground, and a base is used as a signal input terminal for coupling to a control circuit.

[0045] The signal amplifying circuit includes a comparator U4 , a positive input terminal of which is coupled to the collector of the transistor Q6 , and a negative input terminal of which is coupled to an output terminal, and the output terminal is used to output the amplified current signal to the control circuit.

[0046] Reference Figure 5 The current detection circuit shown in this embodiment includes a current detection chip U5 (INA219), whose signal input end is coupled to the output end of the power supply circuit and the power supply circuit, and the output end is coupled to the control circuit for detecting the current in the power supply circuit and sending it to the control circuit.

[0047] Reference Figure 6 , the control circuit shown in this embodiment includes a single chip microcomputer and its peripheral circuits.

[0048] Reference Figure 7 The power supply circuit shown in this embodiment includes a PMOS tube Q1 and a transistor Q3, wherein the source of the PMOS tube Q1 is coupled to the power input Vout, the drain is coupled to the current detection circuit as the output terminal, and the gate is coupled to the collector of the transistor Q3; the base of the transistor Q3 is coupled to the control circuit as the signal input terminal, and the emitter is grounded.

[0049] Example 2

[0050] A second embodiment of the present invention is a testing method for the testing circuit described in Embodiment 1, comprising the following steps:

[0051] 1) Initialization detection, setting all control terminals of the control circuit to a preset potential;

[0052] 2) Control the discharge and voltage detection circuit for supercapacitor discharge;

[0053] 3) coupling the isolation circuit to the corresponding wiring position of the power circuit;

[0054] 4) Power the power circuit under test and the test circuit through the power supply circuit;

[0055] 5) Detect the supercapacitor voltage and adjust the voltage of the power supply circuit when it reaches a preset voltage;

[0056] 6) The current is detected by the current detection circuit to obtain the power consumption of the power supply circuit.

[0057] The following is combined with Figure 2-7 The working principle of the test circuit and method of the present invention is further explained.

[0058] See attached Figure 2, the key components on the power supply circuit under test are diodes D1 and D2, which are anti-reverse diodes and are the premise for the test to be established. During the test, the test points starting with TP are connected to the corresponding TP test points of the test circuit. The purpose is to test the static power consumption, but the supercapacitor will have an impact on the test. Usually, the impact of supercapacitors on power consumption is at the mA level (about 100mA), while the static power consumption of the board under test is at the uA level (about 10μA), the order of magnitude difference is 10,000 times. If the detection is not shielded, it will bring great errors (the existing high-precision detection module cannot detect larger currents, and the low-precision detection module cannot detect μA).

[0059] In this embodiment, since the diode has a voltage drop, that is, it does not conduct in the reverse direction, and the forward conduction voltage is between 0.3-0.7V. Then, by using a jumper, the voltages of TP1 and TP3 are made consistent (V1), and the voltage of TP2 is about 0.2V lower than the voltage of TP1. At this time, the voltage difference of D1 is lower than 0.3V and it does not conduct, and the negative electrode voltage of D2 is higher than the positive electrode voltage and it does not conduct. At this time, supercapacitors C4 and C5 are equivalent to a shielding state, thereby eliminating the interference of supercapacitors on detection.

[0060] The specific test process is:

[0061] The first step is to initialize the test. At the initial stage of the test, all control terminals need to be set. Figure 1 , YI_CHK is set to low level, jump_CAP is set to low level, and CAP_CTL is set to high level.

[0062] The second step is to discharge the supercapacitor. CAP_CTL is set to a low level until the voltage is 1-2V lower than the VOut voltage, and CAP_CTL is set to a high level.

[0063] Step 3: Connect TP1 and TP3. Set jump_CAP to high level to connect TP1 and TP3.

[0064] Step 4: Set VI_CHK to high level and power the board under test through VOut.

[0065] Step 5. Adjust the VOut output voltage to 4V, set the VI_CHK pin to a high level, and wait for 5-7 seconds.

[0066] Step 6: Check the supercapacitor voltage, which should be between 3.4-3.7V.

[0067] Step 7. Adjust the VOut output voltage to 3.6V.

[0068] The eighth step is to detect the current and calculate the power consumption.

[0069] The above embodiments are only used to help understand the method and core idea of ​​the present invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made to the present invention without departing from the principles of the present invention, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A test circuit for detecting power consumption of a power supply circuit containing a super capacitor, wherein the power supply circuit comprises at least one super capacitor coupled in the circuit and two diodes coupled on both sides of the super capacitor, wherein: The test circuit comprises: An isolation circuit, wherein two connection terminals are respectively used to couple ends of the two diodes away from the super capacitor, and a signal input terminal is coupled to a control circuit for shielding the super capacitor; A discharge and voltage detection circuit, whose connection terminal is used to couple the non-ground terminal TP2 of the super capacitor, and whose signal input terminal and output terminal are coupled to the control circuit, is used to discharge the super capacitor and collect voltage signals; A current detection circuit, whose connection terminal is used to couple with the power circuit, and whose output terminal is coupled with the control circuit, is used to detect the current in the power circuit; A control circuit, which is used to send a control level signal, and receive a current signal collected by a current detection circuit and calculate the power consumption of the power supply circuit based on the current signal; and a power supply circuit, used for providing a power supply signal to the test circuit; The isolation circuit includes a PMOS tube Q2 and a transistor Q4, wherein the source and drain of the PMOS tube Q2 are respectively coupled to the ends of two diodes on both sides of the supercapacitor away from the supercapacitor as two connection terminals TP1 and TP3, and the gate is coupled to the collector of the transistor Q4; the base of the transistor Q4 is coupled to the control circuit as a signal input terminal, and the emitter is grounded; during testing, the control circuit sends a control level signal to turn on the PMOS tube Q2, connect TP1 and TP3, and make the voltages of TP1 and TP3 consistent; the supercapacitor voltage is detected, and when the preset voltage is reached, the voltage of the power supply circuit is adjusted to make the voltage of TP2 lower than the voltage of TP1 by about 0.2V, so that the two diodes are not turned on.

2. The test circuit for detecting power consumption of a power supply circuit containing a super capacitor according to claim 1, characterized in that: The discharge and voltage detection circuit includes a switch discharge circuit and a signal amplification circuit. The switch discharge circuit is used to discharge the super capacitor when it is turned on, and the signal amplification circuit is used to detect the voltage of the super capacitor.

3. The test circuit for detecting power consumption of a power supply circuit containing a super capacitor according to claim 2, characterized in that: The switch discharge circuit includes a transistor Q6, the collector of the transistor Q6 is used as a connection terminal for coupling to the non-grounded end of the super capacitor, the emitter is coupled to the power ground, and the base is used as a signal input terminal to couple to the control circuit.

4. The test circuit for detecting power consumption of a power supply circuit containing a super capacitor according to claim 3, characterized in that: The signal amplifying circuit includes a comparator U4 , a positive input terminal of which is coupled to the collector of the transistor Q6 , and a negative input terminal of which is coupled to an output terminal, and the output terminal is used to output the amplified current signal to the control circuit.

5. The test circuit for detecting power consumption of a power supply circuit containing a super capacitor according to claim 1, characterized in that: The current detection circuit includes a current detection chip U5, whose signal input end is coupled to the output end of the power supply circuit and the power circuit, and whose output end is coupled to the control circuit, and is used to detect the current in the power circuit and send it to the control circuit.

6. The test circuit for detecting power consumption of a power supply circuit containing a super capacitor according to claim 1, characterized in that: The control circuit includes a single chip microcomputer and its peripheral circuits.

7. The test circuit for detecting power consumption of a power supply circuit containing a super capacitor according to claim 1, characterized in that: The power supply circuit includes a PMOS tube Q1 and a transistor Q3, wherein the source of the PMOS tube Q1 is coupled to the power input Vout, the drain is coupled to the current detection circuit as an output terminal, and the gate is coupled to the collector of the transistor Q3; the base of the transistor Q3 is coupled to the control circuit as a signal input terminal, and the emitter is grounded.

8. A method for testing a test circuit according to any one of claims 1 to 7, characterized in that: The steps include: S1, initialization detection, setting all control terminals of the control circuit to a preset potential; S2, control discharge and voltage detection circuit for supercapacitor discharge; S3, coupling the isolation circuit to the corresponding wiring position of the power circuit; S4, supplying power to the power circuit under test and the test circuit through the power supply circuit; S5, detecting the voltage of the supercapacitor, and adjusting the voltage of the power supply circuit when the voltage reaches a preset voltage; S6. Detect the current through the current detection circuit to obtain the power consumption of the power supply circuit.

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